Imaging device, manufacturing method thereof, and electronic equipment

By introducing light controls into the imaging device, light is prevented from being directly incident on the charge holding unit and the vertical electrode, noise and color mixing problems are solved and image quality is improved.

CN114730777BActive Publication Date: 2025-06-13SONY SEMICON SOLUTIONS CORP
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Patent Information

Application Number
CN202080076029.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-12-02
Filing Date
2020-12-01
Publication Date
2025-06-13
Estimated Expiration
2040-12-01

AI Technical Summary

Technical Problem

The existing imaging devices may cause noise to increase when light directly enters the charge holding unit and the incident light passes through the pixel boundary to cause color mixing.

Method used

An imaging device is designed, including a semiconductor substrate, a photoelectric conversion unit, a charge holding unit, a charge transfer unit, a vertical electrode and an optical control unit. The optical controller includes first and second optical controllers, through a structure extending in the depth direction of the semiconductor substrate, light is prevented from being directly incident to the charge holding unit and the vertical electrode.

Benefits of technology

It effectively suppresses noise and color mixing, and improves the image quality and signal-to-noise ratio of the camera device.

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Abstract

[Technical Problem] To suppress noise, color mixing, etc. [Technical Solution] The camera is provided with: a semiconductor substrate; a photoelectric conversion unit disposed on the semiconductor substrate and generating charges corresponding to the amount of received light through photoelectric conversion; a charge holding unit disposed on the first surface side of the semiconductor substrate related to the photoelectric conversion unit and holding the charges transmitted from the photoelectric conversion unit; a charge transfer unit for transferring the charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode for transferring the charges generated by the photoelectric conversion unit to the charge transfer unit, the vertical electrode being disposed in the depth direction of the semiconductor substrate; and a first light control member disposed on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode. When looking down at the semiconductor substrate in the normal direction of the first surface, the first light control portion is disposed at a position overlapping with the vertical electrode and has a T-shaped cross section in the depth direction of the substrate. The first light control member includes a first light control portion and a second light control portion which are of an integral structure and extend in mutually intersecting directions.
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Description

Technical Field

[0001] The present disclosure relates to an imaging device that performs imaging based on photoelectric conversion, a manufacturing method thereof, and an electronic device. Background Art

[0002] An imaging device compatible with a global shutter scheme in which all pixels are imaged at the same time is known (see Patent Document 1). This type of imaging device includes a charge holding unit that accumulates the charge accumulated in the photoelectric conversion unit for each pixel.

[0003] Citation List

[0004] Patent Document

[0005] Patent Document 1: WO 2016 / 136486 Summary of the Invention

[0006] Technical Problem

[0007] However, if the light incident on the imaging device directly hits the charge holding unit without being photoelectrically converted by the photoelectric conversion unit, this may cause an increase in noise. In addition, if the light incident on one pixel passes through the boundary of the pixel and then hits another adjacent pixel, this may cause color mixing and the like.

[0008] The present disclosure provides an imaging device, a manufacturing method thereof, and an electronic device that can suppress noise, color mixing, and the like.

[0009] Solution to the Technical Problem

[0010] To solve the above problems, according to one aspect of the present disclosure, there is provided an imaging device, including: a semiconductor substrate; a photoelectric conversion unit disposed on the semiconductor substrate and generating charges according to the amount of received light through photoelectric conversion; a charge holding unit disposed on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holding the charges transferred from the photoelectric conversion unit; a charge transfer unit transferring the charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode transferring the charges generated by the photoelectric conversion unit to the charge transfer unit and disposed in the depth direction of the semiconductor substrate; and a first light control member disposed on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode, wherein the first light control member includes a first light control portion and a second light control portion extending in a direction intersecting with each other in an integral structure, the first light control portion is disposed at a position overlapping with the vertical electrode when looking down at the semiconductor substrate from the normal direction of the first surface, and the second light control portion includes one end connected to the first light control portion and the other end disposed along the depth direction of the semiconductor substrate.

[0011] The first light control portion may be disposed along the direction of the first surface, and the other end of the second light control portion may be disposed along the second surface.

[0012] The semiconductor substrate may include a silicon crystal plane represented by the plane index {111}, and the first light control portion may include a first light control surface and a second light control surface, the first light control surface is disposed in a first direction different from the depth direction of the semiconductor substrate and along a first crystal plane represented by the plane index {111}, and the second light control surface is disposed in a second direction different from the depth direction of the semiconductor substrate and along a second crystal plane represented by the plane index {111}.

[0013] The photoelectric conversion unit, the charge holding unit, the charge transfer unit, and the vertical electrode may be provided for each pixel, and when looking down at the semiconductor substrate from the normal direction of the first surface or the second surface, the first light control portion may be disposed across multiple pixel regions to overlap with the multiple vertical electrodes corresponding to the multiple pixels.

[0014] At least a part of the first light control member may have the property of absorbing or reflecting incident light.

[0015] The first light control member may include at least one of an insulating material, a metal, polysilicon, a metal oxide, a carbon-containing material, and an electrochromic material.

[0016] The second light control member is disposed on a side closer to the first surface of the semiconductor substrate than the first light control member and is disposed around the charge holding unit.

[0017] The second light control member may include a third light control portion disposed in the direction of the first surface and a fourth light control portion connected to the third light control portion and disposed in a direction intersecting the third light control portion.

[0018] One end portion of the fourth light control portion may be connected to the third light control portion, and the other end portion of the fourth light control portion may be disposed along the first surface.

[0019] The fourth light control portion may penetrate the third light control portion and extend along the depth direction of the semiconductor substrate.

[0020] An element isolation unit may be included that extends in the depth direction of the semiconductor substrate along the pixel boundary of the semiconductor substrate.

[0021] The element isolation unit may include a fifth light control portion disposed in the depth direction of the semiconductor substrate along the pixel boundary of the semiconductor substrate.

[0022] The element isolation unit may include a sixth light control portion connected to the fifth light control portion and disposed in a direction intersecting the fifth light control portion.

[0023] One end portion of the sixth light control portion may be connected to the fifth light control portion, and the other end portion of the sixth light control portion may be disposed along the second surface.

[0024] The sixth light control portion may penetrate the fifth light control portion and extend along the depth direction of the semiconductor substrate.

[0025] The photoelectric conversion unit may have a concentration gradient, wherein in a first region on the second surface side of the first light control portion, the concentration of impurities in the concentration gradient varies according to position.

[0026] The photoelectric conversion unit may have a concentration gradient, wherein in a second region on the first surface side of the first light control portion, the concentration of impurities in the concentration gradient varies according to position.

[0027] At least one of the first region and the second region may have a concentration gradient in the horizontal direction of the semiconductor substrate.

[0028] At least one of the first region and the second region may have a concentration gradient in the depth direction of the semiconductor substrate.

[0029] According to another aspect of the present disclosure, there is provided a method of manufacturing an imaging device, the method including: forming a photoelectric conversion unit on a semiconductor substrate, the photoelectric conversion unit generating charges according to the amount of received light through photoelectric conversion; forming a charge holding unit disposed on a side closer to a first surface of the semiconductor substrate than the photoelectric conversion unit and holding the charges transferred from the photoelectric conversion unit; forming a charge transfer unit that transfers the charges from the photoelectric conversion unit to the charge holding unit; forming a vertical electrode that transfers the charges generated by the photoelectric conversion unit in the depth direction of the semiconductor substrate to the charge transfer unit; and forming a first light control member disposed on a side closer to a second surface opposite to the first surface of the semiconductor substrate than the vertical electrode and including a first light control portion and a second light control portion extending in a direction intersecting each other in an integrated structure; wherein the first light control portion is disposed at a position overlapping the vertical electrode when looking down on the semiconductor substrate from the normal direction of the first surface, one end portion of the second light control portion is connected to the first light control portion, and the other end portion of the second light control portion is disposed along the depth direction of the semiconductor substrate from the one end portion.

[0030] According to another aspect of the present disclosure, there is provided a method of manufacturing an imaging device, the method including: forming a photoelectric conversion unit on a semiconductor substrate, the photoelectric conversion unit generating charges according to the amount of received light through photoelectric conversion; forming a cavity portion or a filling portion in a part of the photoelectric conversion unit, the filling portion being obtained by filling the cavity portion with a predetermined material; forming a charge holding unit disposed on a side closer to a first surface of the semiconductor substrate than the cavity portion or the filling portion and holding the charges transferred from the photoelectric conversion unit; forming a charge transfer unit that transfers the charges from the photoelectric conversion unit to the charge holding unit; forming a trench reaching the cavity portion or the filling portion from a second surface side of the semiconductor substrate opposite to the first surface; and using the cavity portion or the filling portion and the trench to form a first light control portion at a position where the cavity portion or the filling portion is formed and form a second light control portion at a position where the trench is formed.

[0031] According to another aspect of the present disclosure, there is provided an electronic device, including: an imaging device, the imaging device including: a semiconductor substrate; a photoelectric conversion unit disposed on the semiconductor substrate and generating charges according to the amount of received light through photoelectric conversion; a charge holding unit disposed on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holding the charges transferred from the photoelectric conversion unit; a charge transfer unit transferring the charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode transferring the charges generated by the photoelectric conversion unit to the charge transfer unit and disposed in the depth direction of the semiconductor substrate; and a first light control member disposed on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode, the first light control member including a first light control portion and a second light control portion extending in a direction intersecting each other in an integrated structure, the first light control portion being disposed at a position overlapping with the vertical electrode when looking down at the semiconductor substrate from the normal direction of the first surface, and the second light control portion including one end connected to the first light control portion and the other end disposed along the depth direction of the semiconductor substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a block diagram showing the overall configuration of an imaging device according to an embodiment.

[0033] Figure 2 is an equivalent circuit diagram of a sensor pixel and a read circuit.

[0034] Figure 3 is a plan layout diagram of a partial pixel region within the pixel array unit 111.

[0035] Figure 4A is Figure 3 a cross-sectional view taken along the line A-A in

[0036] Figure 4B is Figure 3 a cross-sectional view taken along the line B-B in

[0037] Figure 5 is by adding a P-type semiconductor region in Figure 4A a cross-sectional view of the PN junction surface thus increased.

[0038] Figure 6A is a plan view of the vertical light-shielding portion 12V of the second light-shielding unit 12.

[0039] Figure 6B is a plan view of the horizontal light-shielding portion 12H of the second light-shielding unit 12.

[0040] Figure 6C This is the final plan view of the horizontal light-shielding portion 12H of the second light-shielding unit 12.

[0041] Figure 7A This is a cross-sectional view of the vertical light-shielding portions of the first light-shielding unit 13 and the second element separation unit 20.

[0042] Figure 7B This is a cross-sectional view of the horizontal light-shielding portion 13H of the first light-shielding unit 13.

[0043] Figure 8A This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit.

[0044] Figure 8B This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit, which is Figure 8A a continuous diagram.

[0045] Figure 8C This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit, which is Figure 8B a continuous diagram.

[0046] Figure 8D This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit, which is Figure 8C a continuous diagram.

[0047] Figure 8E This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit, which is Figure 8D a continuous diagram.

[0048] Figure 8F This is a diagram showing a specific example of the planar shape of the horizontal light-shielding portion of the first light-shielding unit, which is Figure 8E a continuous diagram.

[0049] Figure 9A This is a diagram showing an example where the planar shape of the horizontal light-shielding portion is larger than that of the vertical light-shielding portion.

[0050] Figure 9B This is a diagram showing an example where the planar shape of the vertical light-shielding portion is the same as that of the horizontal light-shielding portion.

[0051] Figure 9C This is a diagram showing an example where the planar shape of the horizontal light-shielding portion is smaller than that of the vertical light-shielding portion.

[0052] Figure 10 This is a diagram for explaining the charge transfer path.

[0053] Figure 11It is a diagram showing the cross-sectional shapes of three parts of the horizontal light-shielding part that constitutes the first light-shielding unit.

[0054] Figure 12A It is a flowchart for explaining the manufacturing method of the imaging device 101 according to the first embodiment.

[0055] Figure 12B It is consecutive with Figure 12A a consecutive flowchart.

[0056] Figure 12C It is consecutive with Figure 12B a consecutive flowchart.

[0057] Figure 12D It is consecutive with Figure 12C a consecutive flowchart.

[0058] Figure 12E It is consecutive with Figure 12D a consecutive flowchart.

[0059] Figure 12F It is consecutive with Figure 12E a consecutive flowchart.

[0060] Figure 12G It is consecutive with Figure 12F a consecutive flowchart.

[0061] Figure 12H It is consecutive with Figure 12G a consecutive flowchart.

[0062] Figure 12I It is consecutive with Figure 12H a consecutive flowchart.

[0063] Figure 12J It is consecutive with Figure 12I a consecutive flowchart.

[0064] Figure 12K It is consecutive with Figure 12J a consecutive flowchart.

[0065] Figure 12L It is consecutive with Figure 12K a consecutive flowchart.

[0066] Figure 12M It is consecutive with Figure 12L a consecutive flowchart.

[0067] Figure 12N It is consecutive with Figure 12M a consecutive flowchart.

[0068] Figure 12O It is consecutive with Figure 12N a consecutive flowchart.

[0069] Figure 12P is consecutive with Figure 12O in the flowchart.

[0070] Figure 12Q is consecutive with Figure 12P in the flowchart.

[0071] Figure 12R is consecutive with Figure 12Q in the flowchart.

[0072] Figure 12S is consecutive with Figure 12R in the flowchart.

[0073] Figure 13A is a flowchart illustrating a second example of the manufacturing process of the imaging device.

[0074] Figure 13B is consecutive with Figure 13A in the flowchart.

[0075] Figure 13C is consecutive with Figure 13B in the flowchart.

[0076] Figure 13D is consecutive with Figure 13C in the flowchart.

[0077] Figure 13E is consecutive with Figure 13D in the flowchart.

[0078] Figure 13F is consecutive with Figure 13E in the flowchart.

[0079] Figure 13G is consecutive with Figure 13F in the flowchart.

[0080] Figure 13H is consecutive with Figure 13G in the flowchart.

[0081] Figure 13I is consecutive with Figure 13H in the flowchart.

[0082] Figure 13J is consecutive with Figure 13I in the flowchart.

[0083] Figure 13K is consecutive with Figure 13J in the flowchart.

[0084] Figure 13L is consecutive with Figure 13K in the flowchart.

[0085] Figure 13Mis consecutive with Figure 13L a consecutive flowchart.

[0086] Figure 13N is consecutive with Figure 13M a consecutive flowchart.

[0087] Figure 13O is consecutive with Figure 13N a consecutive flowchart.

[0088] Figure 13P is consecutive with Figure 13O a consecutive flowchart.

[0089] Figure 14A is a flowchart illustrating a third example of the manufacturing process of the imaging device.

[0090] Figure 14B is consecutive with Figure 14A a consecutive flowchart.

[0091] Figure 14C is consecutive with Figure 14B a consecutive flowchart.

[0092] Figure 14D is consecutive with Figure 14C a consecutive flowchart.

[0093] Figure 14E is consecutive with Figure 14D a consecutive flowchart.

[0094] Figure 14F is consecutive with Figure 14E a consecutive flowchart.

[0095] Figure 14G is consecutive with Figure 14F a consecutive flowchart.

[0096] Figure 14H is consecutive with Figure 14G a consecutive flowchart.

[0097] Figure 14I is consecutive with Figure 14H a consecutive flowchart.

[0098] Figure 14J is consecutive with Figure 14I a consecutive flowchart.

[0099] Figure 14K is consecutive with Figure 14J a consecutive flowchart.

[0100] Figure 14L is consecutive with Figure 14K a consecutive flowchart.

[0101] Figure 14M is consecutive withFigure 14L Successive flowcharts.

[0102] Figure 15A It is a plan view showing an example in which a hole member or a contact member is used instead of a vertical light-shielding portion.

[0103] Figure 15B It is a plan view showing Figure 15A Another modified example of

[0104] Figure 15C It is a plan view showing Figure 15A Another modified example of

[0105] Figure 15D It is a plan view showing Figure 15A Another modified example of

[0106] Figure 15E It is a plan view showing Figure 15A Another modified example of

[0107] Figure 15F It is a plan view showing Figure 15A Another modified example of

[0108] Figure 16 It is a cross-sectional view of an imaging device composed of first to third semiconductor substrates attached to each other.

[0109] Figure 17A It is a plan view showing various modified examples of a second light-shielding unit, a first light-shielding unit, and an element separation unit.

[0110] Figure 17B It is a cross-sectional view of an imaging device including a second light-shielding unit having a cross-shaped cross-section.

[0111] Figure 17C It is based on Figure 17B A cross-sectional view of a modified example of an imaging device.

[0112] Figure 17D It is a cross-sectional view including a second light-shielding unit and an element separation unit in addition to a first light-shielding unit having a T-shaped cross-section.

[0113] Figure 17E It is a cross-sectional view of a second light-shielding unit 12 having a cross-shaped cross-section.

[0114] Figure 17F It is a cross-sectional view of an imaging device 101, in which the cross-sections of the first light-shielding unit 13 and the second element separation unit 20 are both T-shaped.

[0115] Figure 17G It is based on Figure 17F A cross-sectional view of a modified example of an imaging device 101.

[0116] Figure 17H is a cross-sectional view of the imaging device 101 according to Figure 17F the second modification example.

[0117] Figure 17I is a cross-sectional view of the imaging device 101 according to Figure 17H the first modification example.

[0118] Figure 17J is a cross-sectional view of the imaging device 101 according to Figure 17H the second modification example.

[0119] Figure 17K is a cross-sectional view of the imaging device 101 according to Figure 17J a modification example.

[0120] Figure 17L is a cross-sectional view of the imaging device, in which the cross-sections of the second light-shielding unit and the element separation unit have a cross shape.

[0121] Figure 17M is a cross-sectional view of the imaging device, in which the cross-sections of the second light-shielding unit and the element separation unit have a cross shape.

[0122] Figure 17N is a cross-sectional view of the imaging device, in which the second light-shielding unit and the element separation unit are provided as an integral structure, and a vertical light-shielding portion penetrating from the front surface 11A to the back surface of the semiconductor substrate is provided.

[0123] Figure 17O is a cross-sectional view of the imaging device, in which the second light-shielding unit and the element separation unit are provided as an integral structure, and a vertical light-shielding portion penetrating from the front surface 11A to the back surface of the semiconductor substrate is provided.

[0124] Figure 17P is a cross-sectional view in the case where a gap is generated in the inner layer portion.

[0125] Figure 17Q is a cross-sectional view of the imaging device having a conical vertical light-shielding portion.

[0126] Figure 18A is a cross-sectional view of the imaging device according to the third embodiment.

[0127] Figure 18B is a schematic cross-sectional view showing an example in which a concentration gradient is included in the horizontal direction within a range wider than Figure 18A in the photoelectric conversion unit.

[0128] Figure 18C is a schematic cross-sectional view showing an example in which the concentration gradient in the photoelectric conversion unit is vertically inverted.

[0129] Figure 18D is a cross-sectional view showing an example that includes a concentration gradient in the depth direction in addition to Figure 18A

[0130] Figure 18E is a cross-sectional view showing an example that includes a concentration gradient in the depth direction in addition to Figure 18B

[0131] Figure 18F is a cross-sectional view showing an example that includes a concentration gradient in the depth direction in addition to Figure 18C

[0132] Figure 19 is a plan view schematically showing the structure of pixels 121A and 121B according to the fourth embodiment.

[0133] Figure 20A is a cross-sectional view along line A-A in Figure 19

[0134] Figure 20B is a cross-sectional view along line B-B in Figure 19

[0135] Figure 21A is a graph showing the extinction coefficient of tungsten as an example of the material of the inner layer portion 13A.

[0136] Figure 21B is a graph showing the extinction coefficient of a silicon oxide film as an example of the material of the outer layer portion 13B.

[0137] Figure 22A is a graph showing the refractive index of a single crystal silicon as an example of the semiconductor substrate 11.

[0138] Figure 22B is a graph showing the reflectance of a silicon oxide film as an example of the material of the outer layer portion 13B.

[0139] Figure 23A is a cross-sectional view showing the process of a method for forming the structure shown in Figure 20A

[0140] Figure 23B is a cross-sectional view showing the process of a method for forming the structure shown in Figure 20A

[0141] Figure 24A is a cross-sectional view along line A-A in a process continuous with Figure 23A

[0142] Figure 24B is a cross-sectional view along line B-B in a process continuous with Figure 23A

[0143] ​​​​​​​​​Figure 24C is a plan view of a process consecutive with Figure 23B

[0144] Figure 25A is a cross-sectional view along line A-A in a process consecutive with Figure 24A

[0145] Figure 25B is a cross-sectional view along line B-B in a process consecutive with Figure 24B

[0146] Figure 26A is a cross-sectional view along line A-A in a process consecutive with Figure 25A

[0147] Figure 26B is a cross-sectional view along line B-B in a process consecutive with Figure 25B

[0148] Figure 27A is a plan view showing a modified example of the fourth embodiment.

[0149] Figure 27B is a plan view showing another modified example of the fourth embodiment.

[0150] Figure 28A is a cross-sectional view showing still another modified example of the fourth embodiment.

[0151] Figure 28B is a cross-sectional view showing yet another modified example of the fourth embodiment.

[0152] Figure 28C is a cross-sectional view showing yet another different modified example of the fourth embodiment.

[0153] Figure 28D is a cross-sectional view showing still another different modified example of the fourth embodiment.

[0154] Figure 29 is a diagram for explaining a specific combination of a plane and an orientation for establishing etching in the <110> direction in the {111} plane.

[0155] Figure 30 is a schematic diagram for explaining back bonds in a crystal plane of an Si substrate according to the present invention.

[0156] Figure 31 is a schematic diagram for explaining a tilt angle of the surface of an Si substrate according to the present invention.

[0157] Figure 32 is a block diagram showing an example of the overall configuration of a vehicle control system.

[0158] Figure 33 ​​​​​It is an explanatory diagram showing an example of the installation positions of an out-vehicle information detection unit and an imaging unit.

[0159] Figure 34 It is a plan view schematically showing main components of a pixel array unit in an imaging device in an enlarged manner. Detailed implementation manners

[0160] (First Embodiment)

[0161] Hereinafter, embodiments of the present disclosure will be described in detail. The imaging device according to the present disclosure is, for example, a back-illuminated image sensor using a global shutter scheme of a complementary metal oxide semiconductor (CMOS) image sensor. The imaging device according to the present disclosure receives light from a subject at each pixel, performs photoelectric conversion thereon, and generates a pixel signal as an electrical signal.

[0162] The global shutter scheme is a scheme that simultaneously executes the start and end of exposure for all pixels. Here, all pixels refer to all pixels that form a valid image and do not include virtual pixels etc. that do not contribute to image formation. In addition, as long as image distortion and exposure time difference are small enough not to cause problems, it is not necessary to execute the start and end simultaneously. For example, a case where an operation of performing simultaneous exposure in units of multiple rows (such as dozens of rows) is repeated when moving in the row direction in units of multiple rows is also included in the global shutter scheme. Also, a case where simultaneous exposure is performed only on a part of the pixel region is included in the global shutter scheme.

[0163] The back-illuminated image sensor is an image sensor in which a photoelectric conversion unit is provided for each pixel between a light receiving surface onto which light from a subject is incident and a wiring layer in which transistors etc. for driving each pixel are provided. The photoelectric conversion unit is, for example, a photodiode that receives light from a subject and converts the light into an electrical signal. Note that the present disclosure can be applied to image sensors of imaging schemes other than CMOS image sensors.

[0164] (Block configuration of imaging device 101)

[0165] Figure 1 It is a block diagram showing the overall configuration of an imaging device 101 according to an embodiment of the present disclosure. Since the imaging device 101 is formed on a semiconductor substrate 11, Figure 1 the imaging device 101 in it is actually a solid-state imaging device 101, which will be hereinafter simply referred to as the imaging device 101. Figure 1The imaging device 101 therein includes a pixel array unit 111, in which a plurality of sensor pixels 121 that perform photoelectric conversion are arranged in a matrix shape, i.e., a two-dimensional planar shape. The sensor pixel 121 corresponds to a specific example of a "pixel" according to the present disclosure. The pixel signals after photoelectric conversion in the pixel array unit 111 are read by a reading circuit.

[0166] The imaging device 101 includes, for example, a pixel array unit 111, a vertical driving unit 112, a ramp module 113, a column signal processing unit 114, a clock module 115, a data storage unit 116, a horizontal driving unit 117, a system control unit 118, and a signal processing unit 119.

[0167] The imaging device 101 is composed of a single or multiple semiconductor substrates 11. For example, the imaging device 101 can be constructed by electrically connecting another semiconductor substrate 11 to the semiconductor substrate 11 on which the pixel array unit 111 is formed through Cu-Cu bonding or the like. The other semiconductor substrate 11 is formed with a vertical driving unit 112, a ramp module 113, a column signal processing unit 114, a clock module 115, a data storage unit 116, a horizontal driving unit 117, a system control unit 118, a signal processing unit 119, etc.

[0168] The pixel array unit 111 includes a plurality of sensor pixels 121, and the plurality of sensor pixels 121 include a photoelectric conversion element that generates and accumulates charges according to the amount of light incident from a subject. As Figure 1 shown, the sensor pixels 121 are arranged in the horizontal (row direction) and vertical (column direction). In the pixel array unit 111, pixel driving lines 122 are arranged in the row direction for each pixel row including sensor pixels 121 arranged in a row in the row direction, and vertical signal lines 123 are arranged in the column direction for each pixel column including sensor pixels 121 arranged in a row in the column direction.

[0169] The vertical driving unit 112 includes a shift register, an address decoder, etc. By providing signals, etc. to each of the plurality of sensor pixels 121 via a plurality of pixel driving lines 122, the vertical driving unit 112 drives all the plurality of sensor pixels 121 in the pixel array unit 111 simultaneously or in pixel row units.

[0170] The ramp module 113 generates a ramp signal for analog-to-digital (A / D) conversion of pixel signals and provides the ramp signal to the column signal processing unit 114. The column signal processing unit 114 includes, for example, a shift register, an address decoder, etc., and performs noise removal processing, correlated double sampling processing, A / D conversion processing, etc. to generate pixel signals. The column signal processing unit 114 provides the generated pixel signals to the signal processing unit 119.

[0171] The clock module 115 provides a clock signal for operation to each component of the imaging device 101.

[0172] The horizontal drive unit 117 sequentially selects the unit circuits of the column signal processing unit 114 corresponding to the pixel columns. The pixel signals after signal processing for each unit circuit in the column signal processing unit 114 are sequentially output to the signal processing unit 119 through the selective scanning performed by the horizontal drive unit 117.

[0173] The system control unit 118 includes a timing generator that generates various timing signals, etc. The system control unit 118 controls the driving of the vertical drive unit 112, the ramp module 113, the column signal processing unit 114, the clock module 115, and the horizontal drive unit 117 according to the timing signals generated by the timing generator.

[0174] The signal processing unit 119 performs signal processing such as arithmetic operations on the pixel signals provided from the column signal processing unit 114 while temporarily storing data in the data storage unit 116 as needed, and outputs an image signal including each pixel signal.

[0175] (Circuit configuration of the read circuit 120)

[0176] Figure 2 is an equivalent circuit diagram of the sensor pixel 121 and the read circuit 120. Figure 3 is a planar layout diagram of a partial pixel region inside the pixel array unit 111. Figure 3 shows the planar layout of a pixel region including two pixels in the X direction and four pixels in the Y direction.

[0177] As Figure 2 and Figure 3 shown, the read circuit 120 includes four transfer transistors TRZ, TRY, TRX, and TRG, a discharge transistor OFG, a reset transistor RST, an amplification transistor AMP, and a selection transistor SEL. These transistors are N-type MOS transistors. The reset transistor RST, the amplification transistor AMP, and the selection transistor SEL are formed and connected on a semiconductor substrate different from the semiconductor substrate 11 on which the pixel array unit 111 is provided, and these transistors are not clearly shown in the Figure 3 planar layout.

[0178] Hereinafter, an example in which the photodiode PD is used as the photoelectric conversion unit 51 will be mainly described. The transfer transistor TRZ is connected to the photodiode PD inside the sensor pixel 121, and transfers the charge (pixel signal) photoelectrically converted by the photodiode PD to the transfer transistor TRY. It is assumed that the vertical transistor is used as the transfer transistor TRZ, and the transfer transistor TRZ includes a vertical gate electrode.

[0179] The transfer transistor TRY transfers the charge transferred from the transfer transistor TRZ to the transfer transistor TRX. The transfer transistors TRY and TRX can be replaced by one transfer transistor. The charge holding unit (MEM) 54 is connected to the transfer transistors TRY and TRX. The potential of the charge holding unit (MEM) 54 is controlled by the control signals applied to the gate electrodes of the transfer transistors TRY and TRX. For example, if the transfer transistors TRY and TRX are turned on, the potential of the charge holding unit (MEM) 54 becomes deeper, and if the transfer transistors TRY and TRX are turned off, the potential of the charge holding unit (MEM) 54 becomes shallower. For example, if the transfer transistors TRZ, TRY, and TRX are turned on, the charge accumulated in the photodiode PD is transferred to the charge holding unit (MEM) 54 via the transfer transistors TRZ, TRY, and TRX. The drain of the transfer transistor TRX is electrically connected to the source of the transfer transistor TRG, and the gates of the transfer transistors TRY and TRX are connected to the pixel drive line.

[0180] The charge holding unit (MEM) 54 is an area that temporarily holds the charge accumulated in the photodiode PD to implement the global shutter function. The charge holding unit (MEM) 54 holds the charge transferred from the photodiode PD.

[0181] The transfer transistor TRG is connected between the transfer transistor TRX and the floating diffusion section FD, and transfers the charge held by the charge holding unit (MEM) 54 to the floating diffusion section FD according to the control signal applied to the gate electrode. For example, if the transfer transistor TRX is turned off and the transfer transistor TRG is turned on, the charge held by the charge holding unit (MEM) 54 is transferred to the floating diffusion section FD. The drain of the transfer transistor TRG is electrically connected to the floating diffusion section FD, and the gate of the transfer transistor TRG is connected to the pixel drive line.

[0182] The floating diffusion section FD is a floating and diffusion area that temporarily holds the charge output from the photodiode PD via the transfer transistor TRG. For example, the reset transistor RST is connected to the floating diffusion section FD, and the vertical signal line VSL is connected to the floating diffusion section FD via the amplification transistor AMP and the selection transistor SEL.

[0183] The discharge transistor OFG initializes (resets) the photodiode PD according to the control signal applied to the gate electrode. The drain of the discharge transistor OFG is connected to the power supply line VDD, and the source is connected between the transfer transistor TRZ and the transfer transistor TRY.

[0184] For example, if the transfer transistor TRZ and the discharge transistor OFG are turned on, the potential of the photodiode PD is reset to the potential level of the power supply line VDD. In other words, the photodiode PD is initialized. Further, the discharge transistor OFG forms an overflow path, for example, between the transfer transistor TRZ and the power supply line VDD, and discharges the charge overflowing from the photodiode PD to the power supply line VDD.

[0185] The reset transistor RST initializes (resets) each region from the charge holding unit (MEM) 54 to the floating diffusion section FD in accordance with a control signal applied to the gate electrode. The drain of the reset transistor RST is connected to the power supply line VDD, and the source is connected to the floating diffusion section FD. For example, if the transfer transistor TRG and the reset transistor RST are turned on, the potentials of the charge holding unit (MEM) 54 and the floating diffusion section FD are reset to the potential level of the power supply line VDD. In other words, the charge holding unit (MEM) 54 and the floating diffusion section FD are initialized by turning on the reset transistor RST.

[0186] The amplifying transistor AMP has a gate connected to the floating diffusion section FD and a drain connected to the power supply line VDD, and serves as an input unit of a source follower circuit that reads the charge obtained by photoelectric conversion at the photodiode PD. In other words, the amplifying transistor AMP forms a source follower circuit with its source connected to the vertical signal line VSL via the selection transistor SEL and a constant current source connected to one end of the vertical signal line VSL.

[0187] The selection transistor SEL is connected between the source of the amplifying transistor AMP and the vertical signal line VSL, and a control signal serving as a selection signal is supplied to the gate of the selection transistor SEL. If the control signal is turned on, the selection transistor SEL enters an on state, and the sensor pixel 121 coupled to the selection transistor SEL enters a selection state. If the sensor pixel 121 enters the selection state, the pixel signal output from the amplifying transistor AMP is read by the column signal processing unit 114 via the vertical signal line VSL.

[0188] As Figure 3 shown, the transfer transistors TRG, TRX, TRY, and TRZ and the discharge transistor OFG in the read circuit 120 of one sensor pixel 121 are sequentially arranged in the Y direction. For the setting of each transistor in two sensor pixels 121 adjacent in the Y direction, the transistors are symmetrically arranged with respect to the boundary of the pixels in the Y direction. For two sensor pixels 121 adjacent in the X direction, the case where the arrangement of the transistors in the read circuit 120 is opposite and the case where the arrangement is the same are alternately repeated.

[0189] The charge holding unit (MEM) 54 is provided under the transfer transistors TRG, TRX, and TRY. Further, the photodiode PD in one sensor pixel 121 is provided across a portion under the transfer transistors TRG, TRX, and TRY of the sensor pixel 121 and a portion under the discharge transistor ORG and the transfer transistors TRZ and TRY of the sensor pixel 121 adjacent in the X direction.

[0190] The planar layout of each transistor in the read circuit 120 does not have to be limited to Figure 3 the layout shown. If the setting of each transistor in the read circuit 120 changes, the setting positions of the photodiode PD and the charge holding unit (MEM) 54 provided under the transistor also change.

[0191] (Cross-sectional structure of the imaging device 101)

[0192] Figure 4A is Figure 3 a cross-sectional view taken along the A-A direction of Figure 4B is Figure 3 a cross-sectional view taken along the B-B direction of

[0193] Figure 4A and Figure 4B The imaging device 101 shown in

[0194] includes a semiconductor substrate 11, a photoelectric conversion unit 51, a charge holding unit (MEM) 54, a charge transfer unit 50, a vertical gate electrode 52V serving as a vertical electrode of the transfer transistor TRZ, and a first light shielding unit 13 serving as a first light control member.

[0195] In addition, the imaging device 101 includes a second light-shielding unit 12 serving as a second light control component, element separation units 13V and 20, an etch stop portion 17, a color filter CF, and an optical receiving lens LNS. In this specification, one main surface of the semiconductor substrate 11 on the side where the optical receiving lens LNS is provided is referred to as the rear surface 11B or the light-receiving surface, and one main surface of the side where the reading circuit 120 is provided is referred to as the front surface 11A.

[0196] The photoelectric conversion unit 51 of the semiconductor substrate 11 has, for example, an N-type semiconductor region 51A, an N-type semiconductor region 51B, and a P-type semiconductor region 51C in order from the position closest to the rear surface 11B. Light incident on the rear surface 11B of the N-type semiconductor region 51A is photoelectrically converted to generate charges, and the charges accumulate in the N-type semiconductor region 51B. Note that the boundary between the N-type semiconductor region 51A and the N-type semiconductor region 51B does not have to be clear as long as, for example, the concentration of N-type impurities gradually increases from the N-type semiconductor region 51A toward the N-type semiconductor region 51B. In addition, a P+-type semiconductor region having a higher P-type impurity concentration than the P-type semiconductor region 51C may be provided between the N-type semiconductor region and the P-type semiconductor region 51C. In this way, the layer structure of the photoelectric conversion unit 51 formed inside the semiconductor substrate 11 does not have to be limited to Figure 1 the layer structure shown.

[0197] The first light-shielding unit 13 is provided on the side closer to the rear surface 11B of the semiconductor substrate 11 than the second light-shielding unit 12. The first light-shielding unit 13 includes a vertical light-shielding portion 13V extending in the depth direction of the semiconductor substrate 11 and a horizontal light-shielding portion 13H extending in the horizontal direction of the semiconductor substrate 11. The vertical light-shielding portion 13V also serves as a part of the element separation units 13V and 20, which will be described later. As Figure 4A shown, the cross-sectional shape of the first light-shielding unit 13 is a T-shape formed by the vertical light-shielding portion 13V and the horizontal light-shielding portion 13H. The horizontal light-shielding portion 13H of the first light-shielding unit 13 is provided at a position overlapping the vertical gate electrode 52V in the depth direction in a plan view. In this way, light incident from the rear surface 11B side of the semiconductor substrate 11 is blocked by the horizontal light-shielding portion 13H and does not enter the vertical gate electrode 52V. As described later, the first light-shielding unit 13 has excellent light absorption or excellent light reflectivity, and can be referred to as the first light control member in this specification. In addition, the horizontal light-shielding portion 13H of the first light-shielding unit 13 may be referred to as the first light control portion, and the vertical light-shielding portion 13V of the first light-shielding unit 13 may be referred to as the second light control portion. Details of the first light-shielding unit 13 will be described later.

[0198] The second light-shielding unit 12 is a component that functions to prevent light from entering the charge holding unit (MEM) 54 and is provided so as to surround the charge holding unit (MEM) 54. Specifically, the second light-shielding unit 12 includes, for example, a horizontal light-shielding portion 12H that extends in the horizontal plane (XY plane) between the photoelectric conversion unit 51 and the front surface 11A of the semiconductor substrate 11, and a vertical light-shielding portion 12V that extends in the YZ plane such that the vertical light-shielding portion 12V intersects the horizontal light-shielding portion 12H. The second light-shielding unit 12 has excellent light absorption properties or excellent light reflection properties, and may be referred to as the second light control member in this specification. In addition, the horizontal light-shielding portion 12H of the second light-shielding unit 12 may be referred to as the third light control portion, and the vertical light-shielding portion 12V of the second light-shielding unit 12 may be referred to as the fourth light control portion. Details of the second light-shielding unit 12 will be described later.

[0199] The element isolation units 13V and 20 are provided along the boundaries of the pixels and include a first element isolation unit 13V and a second element isolation unit 20. The first element isolation unit 13V corresponds to the vertical light-shielding portion 13V of the first light-shielding unit 13 described above. The second element isolation unit 20 is a wall-shaped component that extends in the depth (Z-axis) direction along the boundary positions between adjacent sensor pixels 121 and surrounds each photoelectric conversion unit 51. The second element isolation unit 20 can electrically isolate adjacent sensor pixels 121. The second element isolation unit 20 is formed of an insulating material such as silicon oxide, for example. The second element isolation unit 20 can be used to prevent light from entering adjacent sensor pixels 121. The second element isolation unit 20 is formed of a material having excellent light absorption characteristics or excellent light reflection characteristics. Details of the second element isolation unit 20 will be described later.

[0200] As Figure 4A and Figure 4B shown, the vertical light-shielding portion 13V of the first light-shielding unit 13 or the second element isolation unit 20 (the first element isolation unit or the second element isolation unit 20) is provided at the boundary of the sensor pixel 121. Although in Figure 4A and Figure 4B the second element isolation unit 20 only includes a vertical light-shielding portion, the second element isolation unit 20 may include a vertical light-shielding portion and a horizontal light-shielding portion described later. As the cross-sectional shape of the second element isolation unit 20, various cross-sectional shapes such as a T-shape and a cross-shape can be considered.

[0201] Both the vertical light-shielding portion 13V of the first light-shielding unit 13 and the second element isolation unit 20 can prevent light leaking into each sensor pixel 121 from the back surface 11B side of the semiconductor substrate 11 from leaking into adjacent sensor pixels 121 and can reduce crosstalk between pixels.

[0202] Although the first light-shielding unit 13, the second light-shielding unit 12, and the second element separation unit 20 do not have to be limited to the same structure and the same constituent materials, the first light-shielding unit 13, the second light-shielding unit 12, and the second element separation unit 20 generally include materials having excellent light absorption characteristics or excellent light reflection characteristics. The first light-shielding unit 13 and the second element separation unit 20 have vertical light-shielding portions extending in the depth direction from the back surface 11B side of the semiconductor substrate 11, while the second light-shielding unit 12 has a vertical light-shielding portion extending in the depth direction from the front surface 11A side of the semiconductor substrate 11.

[0203] Each gate electrode of the transfer transistors TRZ, TRY, TRX, and TRG and the discharge transistor ORG in the read circuit 120 is provided on the front surface 11A side of the semiconductor substrate 11 via the insulating layer 18. Inside the P-type semiconductor region 51C of the semiconductor substrate 11, a charge holding unit (MEM) 54, which is an N-type semiconductor region, is provided. More specifically, the charge holding unit (MEM) 54 is provided between the front surface 11A of the semiconductor substrate 11 and the horizontal light-shielding portion 12H of the second light-shielding unit 12. As Figure 4A shown, the second light-shielding unit 12 surrounds the periphery of the charge holding unit (MEM) 54 to prevent light from the back surface 11B side from entering the charge holding unit (MEM) 54. In the specification, the transfer transistors TRZ, TRY, TRX, and TRG will also be collectively referred to as the charge transfer unit 50.

[0204] The transfer transistor TRZ includes a horizontal gate electrode 52H provided in the horizontal plane direction of the semiconductor substrate 11 and a vertical gate electrode 52V extending in the depth direction of the semiconductor substrate 11. The deepest position of the vertical gate electrode 52V is, for example, inside the N-type semiconductor region 52A. Although Figure 4A the example in which each sensor pixel 121 includes two vertical gate electrodes 52V is shown, the number of the vertical gate electrodes 52V is not limited and may be one or more. The transfer transistor TRZ transfers the charge after photoelectric conversion performed by the photoelectric conversion unit 51 to the transfer transistor TRY via the vertical gate electrode 52V.

[0205] The photoelectric conversion unit 51 can effectively generate charges using the depletion layer generated around the PN junction. Therefore, as Figure 5 shown, the vertical light-shielding portion 13V of the first light-shielding unit 13 and the second element separation unit 20 may be provided with a P-type semiconductor region 14 in the depth direction to widen the area of the PN junction surface. The P-type semiconductor region 14 may also be provided above and below the horizontal light-shielding portion 13H.

[0206] As Figure 4A , Figure 4BAs shown in the figure, the fixed charge film 15 is provided between the photoelectric conversion unit 51 and the rear surface 11B. The fixed charge film 15 is provided along the rear surface 11B of the semiconductor substrate 11. The fixed charge film 15 has negative fixed charges to suppress the occurrence of dark current caused by interface states at the rear surface 11B, which is the light-receiving surface of the semiconductor substrate 11. Using the electric field caused by the fixed charge film 15, a hole accumulation layer is formed near the rear surface 11B of the semiconductor substrate 11. The generation of electrons from the rear surface 11B is suppressed by the hole accumulation layer.

[0207] As Figure 4A and Figure 4B shown, the color filter CF is provided on the front surface 11A of the fixed charge film 15, and the light-receiving lens LNS is provided on the front surface 11A of the color filter CF. The color filter CF and the light-receiving lens LNS are provided for each pixel.

[0208] (Structure of the second light-shielding unit 12)

[0209] Figure 6A is a plan view of the vertical light-shielding portion 12V of the second light-shielding unit 12. Figure 6A is along Figure 4A the line C-C direction of the plan view. Figure 6B is a plan view of the horizontal light-shielding portion 12H of the second light-shielding unit 12. Figure 6B is along Figure 4A the cross-sectional view in the line D-D' direction in. As Figure 4A and Figure 6A shown, the vertical light-shielding portion 12V extends in the Y-axis direction along the boundary portion of the sensor pixels 121 adjacent in the X-axis direction, and is substantially at the center of the sensor pixels 121 in the plan view. The vertical light-shielding portion 12V extends in the depth direction from the front surface 11A of the semiconductor substrate 11 and is connected to the horizontal light-shielding portion 12H. The vertical light-shielding portion 12V is provided at an interval of approximately half of each pixel in the X-axis direction and has a length corresponding to a plurality of pixels in the Y-axis direction.

[0210] Note that the light-shielding portion extending laterally and shown by a dashed line in Figure 6A is the vertical light-shielding portion of the second element separation unit 20 to be described later. The vertical light-shielding portion of the second element separation unit 20 is provided on a side closer to the rear surface 11B than the vertical light-shielding portion 12V of the second light-shielding unit 12, and the vertical light-shielding portion of the second element separation unit 20 and the vertical light-shielding portion 12V of the second light-shielding unit 12 are actually provided at different positions in the depth direction, and although the two overlap each other in the plan view, they do not contact each other.

[0211] As Figure 6BAs shown, the horizontal light-shielding portion 12H extends in the lateral (horizontal) direction from the deepest position of the vertical light-shielding portion 12V of the second light-shielding unit 12. In Figure 6B , the shaded area is the horizontal light-shielding portion 12H. As will be described later, the horizontal light-shielding portion 12H has the function of reflecting light. The horizontal light-shielding portion 12H is provided with openings 12H1 in some places. The openings 12H1 are provided with etch stop portions 17. As will be described later, the horizontal light-shielding portion 12H is formed by wet etching to form grooves in the depth direction and the horizontal direction and filling the grooves with a light-shielding component. The progress of etching can be stopped by providing the etch stop portions 17. As a result, openings 12H1 as shown in Figure 6B are formed. In the present embodiment, it is assumed that a silicon substrate 11 with a plane index {111} is used, and wet etching is performed using an etchant such as an alkaline aqueous solution that can etch the semiconductor substrate 11 in the <110> direction. Figure 6B The etch stop portions 17 in

[0212] can be formed using a material that exhibits etch resistance to the alkaline aqueous solution. For example, a crystal defect structure obtained by implanting impurity elements such as B (boron) or hydrogen ions, or an insulator such as an oxide. Figure 4A As shown, the horizontal light-shielding portion 12H is located between the photoelectric conversion unit 51 and the charge holding unit (MEM) 54 in the depth (Z-axis) direction. As shown in Figure 6B , the horizontal light-shielding portion 12H is provided on the entire XY plane of the pixel array unit 111 except for the openings 12H1. The light that is incident from the back surface 11B and transmitted through the photoelectric conversion unit 51 without being absorbed by the photoelectric conversion unit 51 is reflected by the horizontal light-shielding portion 12H of the second light-shielding unit 12, and then incident on the photoelectric conversion unit 51 again, contributing to photoelectric conversion. In other words, the horizontal light-shielding portion 12H of the second light-shielding unit 12 serves as a reflector and is used to suppress the noise generated due to the light transmitted through the photoelectric conversion unit 51 incident on the charge holding unit (MEM) 54, improve the photoelectric conversion efficiency Qe, and improve the sensitivity. In addition, the vertical light-shielding portion 12V of the second light-shielding unit 12 is used to prevent noises such as color mixing generated due to the light leaking from adjacent sensor pixels 121 incident on the photoelectric conversion unit 51.

[0213] As shown in Figure 4BAs shown, each horizontal light-shielding portion 12H includes a pair of first surfaces S1 extending in the horizontal direction, and a pair of second surfaces S2 and a third surface S3 extending in a direction intersecting the pair of first surfaces. The pair of first surfaces S1 are both surfaces along the first crystal plane 11S1 of the semiconductor substrate 11, and the first surfaces S1 face each other in the Z-axis direction. The first crystal plane 11S1 of the semiconductor substrate 11 is represented by the plane index {111}. In addition, the pair of second surfaces S2 are respectively surfaces of the semiconductor substrate 11 along the second crystal plane 11S2. The end surfaces S2 of the horizontal light-shielding portion 12H along the second crystal plane 11S2 are located on both end sides in the Y-axis direction of the pixel array unit 111, although not shown in Figure 6B . The second crystal plane 11S2 of the semiconductor substrate 11 is not located in the effective pixel region but in the peripheral pixel region surrounding the effective pixel region. Figure 3 , Figure 4A , Figure 4B show a part of the effective pixel region, and the peripheral pixel region is provided outside the effective pixel region.

[0214] The second crystal plane 11S2 of the semiconductor substrate 11 is represented by the plane index {111} and is inclined by about 19.5° with respect to the Z-axis direction. That is, the inclination angle of the second crystal plane 11S2 with respect to the horizontal plane (XY plane) is about 70.5°. The second crystal plane 11S2 is inclined with respect to the X-axis and the Y-axis in the horizontal plane (XY plane) and is inclined at an angle of about 30° with respect to the Y-axis, for example. In addition, the third surface S3 is a surface having a planar shape that defines the contour of each opening portion 12H1 as a rhombus, for example, and is a surface along the third crystal plane 11S3 of the semiconductor 11. The third crystal plane 11S3 of the semiconductor substrate 11 is inclined by about 19.5° with respect to the Z-axis direction in the same manner as the second crystal plane 11S2. In other words, the inclination angle of the third crystal plane 11S3 with respect to the horizontal plane (XY plane) is about 70.5°. Thus, the Si residue region outside the region occupied by the horizontal light-shielding portion 12H in the horizontal plane that perpendicularly intersects the thickness direction has a shape along the third crystal plane 11S3, for example, and has a rhombus shape in the examples of Figure 6A and Figure 6B .

[0215] As Figure 4A and Figure 6AAs shown, the vertical light-shielding portion 12V of the second light-shielding unit 12 is provided at intervals of half a pixel in the X-axis direction and extends in the Y-axis direction, and the charge holding unit (MEM) 54 is provided between two vertically adjacent light-shielding portions 12V in the X direction. In addition, the horizontal light-shielding portion 12H of the second light-shielding unit 12 is provided between the charge holding unit (MEM) 54 and the photoelectric conversion unit 51, and the charge holding unit (MEM) 54 is surrounded by the vertical light-shielding portion 12V and the horizontal light-shielding portion 12H. In this way, there is no need to worry about light that has not been subjected to photoelectric conversion by the photoelectric conversion unit 51 from incident on the charge holding unit (MEM) 54, and noise can be reduced. The second light-shielding unit 12 is electrically connected to the wiring unit provided on the front surface 11A side of the semiconductor substrate 11.

[0216] As Figure 4A and 4B shown, the second light-shielding unit 12 has a double-layer structure including an inner layer portion 12A and an outer layer portion 12B surrounding its periphery. The inner layer portion 12A is made of a material containing at least one of a single metal, a metal alloy, a metal nitride, and a metal silicide having light-shielding properties, for example. More specifically, examples of the material constituting the inner layer portion 12A include Al (aluminum), Cu (copper), Co (cobalt), W (tungsten), Ti (titanium), Ta (tantalum), Ni (nickel), Mo (molybdenum), Cr (chromium), Ir (iridium), platinum-iridium, TiN (titanium nitride), and tungsten silicide compounds. In particular, Al (aluminum) is the most preferable material in terms of optics. Note that the inner layer portion 12A may be made of graphite or an organic material. The outer layer portion 12B is made of an insulating material such as SiOx (silicon oxide), for example. The outer layer portion 12B ensures electrical insulation between the inner layer portion 12A and the semiconductor substrate 11.

[0217] (Structure of the first light-shielding unit 13)

[0218] Figure 7A is a cross-sectional view of the vertical light-shielding portion of the first light-shielding unit 13 and the second element isolation unit 20. Figure 7A is along Figure 4A the cross-sectional view in the direction of line E-E in Figure 7B is a cross-sectional view of the horizontal light-shielding portion 13H of the first light-shielding unit 13. Figure 7B is along Figure 4A the cross-sectional view in the direction of line F-F of Figure 7B As shown, the second element isolation unit 20 is provided along the boundary of the sensor pixel 121 and is provided to surround the side surface of the photoelectric conversion unit 51 of each sensor pixel 121. As Figure 7B shown, the first light-shielding unit 13 is provided in a zigzag pattern along the boundary of the sensor pixel 121 in the XY plane. For example, the horizontal light-shielding portion 13H extending horizontally from the vertical light-shielding portion 13V of the first light-shielding unit 13 has a rhombus shape along the third crystal plane 11S3.

[0219] The first light-shielding unit 13 is formed by forming a trench along the boundary of the sensor pixel 121 from the back surface 11B side of the semiconductor substrate 11, widening the trench in the horizontal direction by wet etching treatment from the bottom of the trench, providing an insulating layer in the outer layer portion of the trench in the horizontal direction, and providing a metal layer in the inner layer portion. When the trench of the first light-shielding unit 13 is widened in the horizontal direction by wet etching treatment, etching is performed in the direction along a specific crystal plane, and etching is stopped when the third crystal plane 11S3 with the plane index {111} finally appears. Therefore, if etching is forcibly stopped before the third crystal plane 11S3 appears, the shape of the horizontal light-shielding portion 13H of the first light-shielding unit 13 can be changed into an arbitrary shape.

[0220] (Specific example of the planar shape of the horizontal light-shielding portion 13H)

[0221] Figures 8 is a diagram showing specific examples of the planar shape of each horizontal light-shielding portion 13H of the first light-shielding unit 13. The planar shape of the horizontal light-shielding portion 13H depends on the shape and direction of the vertical light-shielding portion 13V of the first light-shielding unit 13. ​ The formation of the shown horizontal light-shielding portion 13H is independent of the surface orientation of the silicon substrate 11. ​ The shown horizontal light-shielding portion 13H and vertical light-shielding portion 13V can also be formed using any manufacturing process, and various manufacturing processes described later can be adopted.

[0222] ​ Shows an example in which the vertical light-shielding portion 13V extends in one direction in the XY plane. ​ Shows an example in which the planar shape of the horizontal light-shielding portion 13H is a rhombus. As described above, although the surface orientation of the silicon substrate 11 as the base is not important, for example, in the case where the vertical light-shielding portion 13V is formed in the silicon substrate 11 with the plane index {111}, etching finally proceeds until the third crystal plane 11S3 with the plane index {111} appears and the planar shape is highly likely to become a rhombus, as shown in ​ (a) of. Note that if etching is further continued from ​ (a) in, over-etching may occur and a shape different from a rhombus may be obtained. In addition, in the case where etching is forcibly stopped before the third crystal plane 11S3 appears, the etching shape at this time is the final shape, and due to the etching shape when etching is forcibly stopped, for example, shapes as shown in ​ (b) of, ​ (c) of, and ​ (d) of can be obtained.

[0223] ​shows the planar shape of the horizontal light-shielding portion in the case where the vertical light-shielding portion 13V has an "I" shape in the plan view. In this case, a diamond shape with the corners at two opposite vertices removed, as shown in Figure 8B can be obtained. Although Figure 8B shows an example of continuous etching until the third crystal plane 11S3 appears, depending on the length of the etching time, a planar shape different from that in Figure 8B can be obtained.

[0224] Figure 8C shows the planar shape of the horizontal light-shielding portion 13H in the case where the vertical light-shielding portion 13V has an upside-down "T" shape in the plan view. Although in this case the horizontal light-shielding portion 13H can eventually have a planar shape in which the ends of the vertical light-shielding portion 13V become corner portions, as shown in (a) of Figure 8C , if the etching is forced to stop in the middle, a shape as shown in (b) of Figure 8C can be obtained, or other planar shapes can be obtained.

[0225] Figure 8D shows the planar shape of the horizontal light-shielding portion 13H in the case where the vertical light-shielding portion 13V has a cross shape in the plan view. In this case, the etching is carried out so that the ends of the vertical light-shielding portion 13V also become corner portions, and finally a diamond shape as shown in (a) of Figure 8D or (b) of Figure 8D is obtained. However, different shapes can be obtained in the case of forcedly stopping the etching halfway or in the case of over-etching.

[0226] Figure 8E shows the planar shape of the horizontal light-shielding portion 13H in the case where the vertical light-shielding portion 13V has an H shape in the plan view. In this case, the etching is carried out so that the ends of the vertical light-shielding portion 13V also become corner portions, and finally a polygon shape as shown in (a) of Figure 8E or (b) of Figure 8E is obtained. However, different shapes can be obtained in the case of forcedly stopping the etching halfway or in the case of over-etching.

[0227] Figure 8F shows the planar shape of the horizontal light-shielding portion 13H in the case where the vertical light-shielding portion 13V has a cross shape in the plan view. Figure 8F shows an example of forming a horizontal light-shielding portion 13H having a hexagonal shape by etching in the horizontal plane direction from one end of a vertical light-shielding portion 13V having a cross planar shape. Note that the planar shape of the horizontal light-shielding portion 13H obtained from the cross-shaped vertical light-shielding portion 13V can be a polygon other than a quadrilateral or a hexagon.

[0228] AlthoughFigures 8A to 8F An example is shown in which the horizontal light-shielding portion 13H extends in the horizontal direction from one end portion of the vertical light-shielding portion 13V. However, in a plan view from the normal direction of the substrate surface, the end portions of the vertical light-shielding portion 13V and the horizontal light-shielding portion 13H may not completely coincide.

[0229] Figure 9A is a diagram showing an example in which the planar shape of the horizontal light-shielding portion 13H is larger than the planar shape of the vertical light-shielding portion 13V, Figure 9B is a diagram showing an example in which the planar shape of the vertical light-shielding portion 13V coincides with the planar shape of the horizontal light-shielding portion 13H, and Figure 9C is a diagram showing an example in which the planar shape of the horizontal light-shielding portion 13H is smaller than the planar shape of the vertical light-shielding portion 13V.

[0230] In order to form Figures 9A to 9C the horizontal light-shielding portion 13H and the vertical light-shielding portion 13V in, trenches for the vertical light-shielding portion 13V may be formed first, and trenches for the horizontal light-shielding portion 13H may be formed by wet etching of the trenches, and a light-shielding material may be filled in the trenches, or alternatively, cavities for the horizontal light-shielding portion 13H may be formed first, then trenches for the vertical light-shielding portion 13V may be formed, and a light-shielding material as described later may be filled in the trenches and cavities.

[0231] Figures 9A to 9C The region surrounded by the dashed line in is the region of the unit pixel 121. Figures 9A to 9C An example is shown in which the horizontal light-shielding portion 13H is provided across four adjacent pixels. Although the white region where the horizontal light-shielding portion 13H is not provided within each pixel is a region for transmitting the charge generated by photoelectric conversion, the horizontal light-shielding portion 12H is provided at an interval from the horizontal light-shielding portion 13H in the paper depth direction (substrate depth direction) of the white region. The gap between the horizontal light-shielding portion 13H and the horizontal light-shielding portion 12H serves as a charge transfer path.

[0232] Figure 10 is a diagram for explaining the charge transfer path. Figure 10 Each region surrounded by the dashed line in is the region of the unit pixel 121, and the horizontal light-shielding portion 13H is provided to overlap a part of the region of the unit pixel 121. Figure 10 An example is shown in which the horizontal light-shielding portion 13H having a rectangular shape is provided along one end portion of the vertical light-shielding portion 13V having a cross-shaped planar shape. In fact, the planar shape of the vertical light-shielding portion 13V may be various shapes as shown in Figures 8A to 8F Although Figure 10 the white region in is the charge transfer path, the horizontal light-shielding portion 12H is also provided in at least a part of the white region, as shown in Figures 9A to 9C and thus the charge generated by photoelectric conversion passes through Figure 10The gap between the horizontal light-shielding portion 13H shown and the horizontal light-shielding portion 12H provided in the paper depth direction is guided to the vertical gate electrode 52V.

[0233] Although Figures 4A to 4B An example in which the cross-sectional shape of the first light-shielding unit 13 is T-shaped is shown, but the cross-sectional shape of the first light-shielding unit 13 may change according to the position where the cross-section of the first light-shielding unit 13 is obtained. Figure 11 It is a diagram showing the cross-sectional shapes of three parts of the horizontal light-shielding portion 13H constituting the first light-shielding unit 13. Figure 11 The cross-sectional shape along line A-A is T-shaped, the cross-sectional shape along line B-B is an elongated rectangular shape corresponding to the thickness of the horizontal light-shielding portion 13H, and the cross-sectional shape along line C-C is a rectangular shape corresponding to the sum of the thickness of the horizontal light-shielding portion 13H and the thickness of the vertical light-shielding portion 13V.

[0234] In this way, the cross-sectional shape of the first light-shielding unit 13 has various variations according to the position where the cross-section of the first light-shielding unit 13 is obtained, and when the cross-section is obtained at a specific part of the first light-shielding unit 13, the cross-sectional shape of the first light-shielding unit 13 is T-shaped.

[0235] (First example of the manufacturing process of the imaging device 101)

[0236] Next, a first example of the manufacturing process of the imaging device 101 will be described. Figures 12A to 12S It is a process cross-sectional view showing a first example of the manufacturing process of the imaging device 101 according to the first embodiment. Note that hereinafter, the processes for forming the second light-shielding unit 12 and the first light-shielding unit 13 will be mainly described, and the processes for forming the read circuit 120 and the like will be omitted.

[0237] First, prepare Figure 12B The silicon substrate 11 with a plane index {111} shown. The photoelectric conversion unit 51 composed of the photodiode PD is formed on the silicon substrate 11. The photoelectric conversion unit 51 has, for example, a structure in which an N-type semiconductor region 51A, an N-type semiconductor region 51B, and a P-type semiconductor region 51C are stacked, as Figure 4A shown.

[0238] Next, as Figure 12B shown, the trench 17T is formed according to the position of the etching stop portion 17 used when forming the horizontal light-shielding portion 12H of the second light-shielding unit 12. For example, the trench 17T is formed by dry etching using a hard mask. The hard mask is made of an insulating material such as SiN (silicon nitride) or SiO 2 (silicon oxide), etc.

[0239] Next, as Figure 12CAs shown, a crystalline defect structure obtained by implanting impurity elements such as B (boron) or hydrogen ions or an insulator such as an oxide is filled inside the trench 17T to form an etch stop portion 17. Then, as Figure 12D shown, the trench 12T is formed according to the position of the vertical light-shielding portion 12V of the second light-shielding unit 12 by dry etching using a hard mask or the like.

[0240] Next, as Figure 12E shown, the sidewall 12S covering the side surface and the bottom surface of the trench 12T is formed. The sidewall 12S is formed of an insulating film made of, for example, SiN or SiO 2 . Then, Figure 12F shown, for example, the insulating film on the bottom surface is removed by dry etching while leaving the insulating film on the side surface portion of the trench 12T. At this time, it is desirable to use a material for the sidewall 12S different from the material of the hard mask so that the hard mask selectively covering the front surface 11A of the silicon substrate 11 is left without being removed by dry etching.

[0241] Next, a predetermined alkaline aqueous solution is injected into the trench 12T and wet etching is performed thereon to partially remove the silicon substrate 11, as Figure 12G shown. As the alkaline aqueous solution, inorganic solutions such as KOH, NaOH, and CsOH can be used, and aqueous solutions of organic solutions such as ethylenediamine pyrocatechol (EDP), N2H4 (hydrazine), NH4OH (ammonium hydroxide), and tetramethylammonium hydroxide (TMAH) can be used.

[0242] Here, crystal anisotropic etching is performed using the characteristic that the etching rate varies according to the plane orientation of Si{111}. Specifically, in a silicon {111} substrate, the etching rate in the <110> direction is sufficiently high relative to the etching rate in the <111> direction. Therefore, in this embodiment, etching is performed in the X-axis direction, and almost no etching is performed in the Y-axis and Z-axis directions. As a result, a space 12Z communicating with the trench 12T surrounded by the first crystal plane 11S1, the second crystal plane 11S2, and the third crystal plane 11S3 is formed in the semiconductor substrate 11 which is a silicon {111} substrate.

[0243] Note that the etching progress distance in the <110> direction can be adjusted by the processing time of the etching performed on the semiconductor substrate 11 using the alkaline aqueous solution. However, in this embodiment, by presetting the etch stop portion 17 at a predetermined position, the etching in the <110> direction can be easily controlled and the region of Si{111} can be accurately ensured to be left. The etching in the <100> direction is blocked by the etch stop portion 17, and as a result, the second and third crystal planes 11S2 and 11S3 (see Figure 4B)。

[0244] Note that Figure 6B shows a state in which the second crystal plane 11S and the third crystal plane 11S3 extended from the two etch stop portions 17 form a rhombus in a plan view. The rhombus region surrounded by the second crystal plane 11S2 and the third crystal plane 11S3 is a Si residue region, and this Si residue region is surrounded by the horizontal light-shielding portion 12H of the light-shielding unit 12, and Si{111} remains in this region. Note that if etching is further performed from Figure 6B then an opening portion having a rectangular shape as shown in Figure 6C is finally formed.

[0245] After forming the space 12Z extending in the horizontal direction, the hard mask HM and the sidewall 12S are removed by wet etching, for example. Note that in some cases, the hard mask HM and the sidewall 12S can be removed by isotropic dry etching. In wet etching, for example, when the hard mask HM or the like is made of SiO 2 it is desirable to use a chemical containing hydrofluoric acid (HF) such as dilute hydrofluoric acid (DHF) or buffered hydrofluoric acid (BHF). Alternatively, when the hard mask HM or the like is made of SiN, it is desirable to use a chemical containing hot phosphoric acid or HF. Note that the hard mask HM and the sidewall 12S may not be removed.

[0246] Next, as shown in Figure 12H an outer layer portion 12B is formed using an insulating material or the like to cover the side surface 12TA of the trench 12T, the inner surface of the space 12Z, and the front surface 11A of the semiconductor substrate 11, and the inside of the outer layer portion 12B is filled with an inner layer portion 12A to fill the trench 12T and the space 12Z. In this way, the second light-shielding unit 12 including the vertical light-shielding portion 12V occupying the trench 12T and the horizontal light-shielding portion 12H occupying the space 12Z is formed. Note that in order to fill the space 12Z without a gap, it is preferable that the width of the trench 12T (dimension in the X-axis direction) is wider than the thickness of the space 12Z (dimension in the Z-axis direction). In addition, when the inner layer portion 12A is filled with the above metal material at this stage, it is difficult to perform subsequent processing at high temperature. Therefore, it is preferable to temporarily fill the trench 12T and the space 12Z with a temporary filling material 12G having relatively excellent heat resistance such as SiO 2 , SiN, polysilicon, etc., and after the subsequent high-temperature process is completed, and then, for example, after the process of forming the second element isolation unit 20 is completed, replacement is performed with a predetermined metal material. Figure 12H shows an example of forming a temporary embedding material such as SiO 2 in the inner layer portion of the trench and the space.

[0247] Note that the filling of the trench 12T can be performed by solid-phase diffusion. More specifically, for example, an insulating layer such as an SiO film containing P (phosphorus) as an N-type impurity element is formed to cover the inner surface of the trench and the inner surface of the space. Next, the P (phosphorus) contained in the insulating layer is solid-phase diffused to the inner surface of the trench and the inner surface of the space in the semiconductor substrate 11 by heat treatment. After that, the insulating layer is removed, and heat treatment is performed again to diffuse the P (phosphorus) into the interior of the semiconductor substrate 11, thereby forming an N-type region. Then, an insulating layer such as an SiO film containing B (boron) as a P-type impurity element is formed so as to cover the N-type region. After that, the B (boron) contained in the insulating layer is solid-phase diffused to the inner surface of the trench and the inner surface of the space. In this way, a solid-phase diffusion layer in which a P-type region is provided inside the N-type region is obtained. 2 Next, an insulating layer such as an SiO film containing P (phosphorus) as an N-type impurity element is formed to cover the inner surface of the trench and the inner surface of the space. Next, the P (phosphorus) contained in the insulating layer is solid-phase diffused to the inner surface of the trench and the inner surface of the space in the semiconductor substrate 11 by heat treatment. After that, the insulating layer is removed, and heat treatment is performed again to diffuse the P (phosphorus) into the interior of the semiconductor substrate 11, thereby forming an N-type region. Then, an insulating layer such as an SiO film containing B (boron) as a P-type impurity element is formed so as to cover the N-type region. After that, the B (boron) contained in the insulating layer is solid-phase diffused to the inner surface of the trench and the inner surface of the space. In this way, a solid-phase diffusion layer in which a P-type region is provided inside the N-type region is obtained. 2 film insulating layer. After that, the B (boron) contained in the insulating layer is solid-phase diffused to the inner surface of the trench and the inner surface of the space by heat treatment. In this way, a solid-phase diffusion layer in which a P-type region is provided inside the N-type region is obtained.

[0248] Next, as Figure 12I shown, an N-type semiconductor region 54 serving as a charge holding unit (MEM) 54 is formed on the front surface 11A side of the semiconductor substrate 11 made of Si{111}. With the formation of the charge holding unit (MEM) 54, an N-type semiconductor region serving as a floating diffusion portion is also formed.

[0249] Next, as Figure 12J shown, a trench 52T is formed according to the position of the vertical gate electrode 52V. The method of forming the trench 52T is the same as the method of forming the trench 12T of the second light shielding unit 12 described above. Next, for example, as Figure 12K shown, the vertical gate electrode 52V is formed by filling the trench 52T with polysilicon.

[0250] Then, as Figure 12L shown, the insulator and the like of the inner layer portion 12A and the space 12Z of the trench 12T in the second light shielding unit 12 are replaced with a metal material to form the second light shielding unit 12. The metal material of the inner layer portion 12A includes a material containing at least one of a single metal having light shielding properties, a metal alloy, a metal nitride, and a metal silicide.

[0251] Next, as Figure 12M shown, a read circuit 120 and a wiring layer 80 are formed on the front surface 11A side of the semiconductor substrate 11. The read circuit 120 can be formed on another semiconductor substrate 11, and the semiconductor substrates 11 can be attached to each other.

[0252] Next, as Figure 12NAs shown, according to the position of the first light-shielding unit 13, the back surface 11B side of the semiconductor substrate 11 can be thinned by chemical mechanical polishing (CMP) or the like to form a trench 13T. The method of forming the trench 13T is the same as the method of forming the trench 12T of the second light-shielding unit 12 described above. Then, as Figure 12O shown, a sidewall 13S covering the side surface and the bottom surface of the trench 13T is formed. The sidewall 13S is formed of an insulating film made of, for example, SiN or SiO 2 . Then, for example, as Figure 12P shown, the insulating film on the bottom surface is removed by dry etching while leaving the insulating film on the side portion of the trench 13T.

[0253] Next, a predetermined alkaline aqueous solution is injected into the trench 13T, and anisotropic etching is performed thereon to form a space 13Z that expands in the horizontal direction, as Figure 12Q shown. Similar to the space 12Z formed when forming the second light-shielding unit 12, the space 13Z includes two third crystal planes 11S3 represented by the plane index {111}. As a result, the shape of the space 13Z becomes a rhombus shape as shown in Figure 6B a plan view, and then becomes a rectangular shape as shown in Figure 6C a plan view if the etching is further performed.

[0254] Next, for example, the hard mask and the sidewall used for forming the trench 13T are removed by wet etching, and then, as Figure 12R shown, an outer layer portion 13B made of an insulating material and an inner layer portion 13A made of a metal material are formed on the side surface of the trench 13T and the inner surface of the space. As described above, an insulating material, polysilicon, or the like can be temporarily buried as the inner layer portion 13A.

[0255] Next, as Figure 12S shown, a trench 20T for element isolation is formed along the boundary portion of the pixel, and an outer layer portion 20B made of an insulating material and an inner layer portion 20A made of a metal material are formed in the trench 20T. After that, the inner layer portion of the trench 13T in the first light-shielding unit 13 can be replaced with a metal material.

[0256] (Second example of the manufacturing process of the imaging device 101)

[0257] In the above Figures 12A to 12SIn the first example of the manufacturing process shown, trenches are formed in the depth direction of the silicon substrate 11, and then the trenches are widened in the horizontal direction by wet etching to form the trenches of the horizontal light-shielding portion 13H. According to this manufacturing method, since the etching rate during wet etching varies depending on the surface orientation of the silicon substrate 11, the shape of the trenches of the finally obtained horizontal light-shielding portion 13H depends on the surface orientation. On the other hand, in the case of a manufacturing method in which the cavity of the horizontal light-shielding portion 13H is first formed, a horizontal light-shielding portion 13H having a desired shape can be formed without depending on the surface orientation of the silicon substrate 11.

[0258] Figures 13A to 13P is a process cross-sectional view showing a second example of the manufacturing process of the imaging device 101. As Figure 13A shown, first, a P-type semiconductor substrate (e.g., a silicon substrate) 51C on which a photodiode 51 (PD) is formed is prepared, and then the formation surface of the photodiode 51 (PD) is exposed.

[0259] Next, as Figure 13B shown, for example, a partial region 51P corresponding to the position where the horizontal light-shielding portion 13H is formed is removed from the photodiode 51 (PD) by etching. Next, as Figure 13C shown, an oxide film 51Q is buried in the region 51P removed by etching to flatten the surface of the semiconductor substrate 51C. By using a photomask or the like, the shape of the region 51P etched away from the photodiode 51 (PD) can be arbitrarily controlled, and the shape of the horizontal light-shielding portion 13 finally formed in the region 51P can be arbitrarily controlled. Next, as Figure 13D shown, a p-type silicon layer 51R is formed on the semiconductor substrate 51C by epitaxial growth.

[0260] Next, as Figure 13E shown, a cavity portion 51S of the horizontal light-shielding portion 12H is formed. The cavity portion 51S is provided on the side closer to the front surface (first surface) of the semiconductor substrate 51C than the oxide film buried region 51Q formed in Figure 13C . Next, as Figure 13F shown, in Figure 13E the cavity portion 51S formed, an oxide film 51U is buried to flatten the substrate surface. Next, as Figure 13G shown, a p-type silicon layer 51W is formed on the semiconductor substrate 51C by epitaxial growth.

[0261] Next, as Figure 13H shown, inside the p-type silicon layer 51W on the side closer to the substrate surface than the oxide film buried region 51U formed in Figure 13F , a charge holding unit MEM (54) is formed. For example, the charge holding unit MEM (54) is formed in an N-type semiconductor region.

[0262] Next, as Figure 13I shown, a trench 52T for the vertical gate electrode 52V is formed. Next, a conductive material is buried in the trench 52T formed in Figure 13I to form the vertical gate electrode 52V, as Figure 13J shown.

[0263] Next, as Figure 13K shown, a wiring layer 80 is formed on the substrate surface and an insulating layer 81 covering the periphery of the wiring layer 80 is formed. Next, as Figure 13L shown, the back surface 11B side of the semiconductor substrate 11 is thinned by CMP or the like, and the formation surface of the photodiode 51 (PD) is exposed. Next, as Figure 13M shown, trenches 12T and 13T are formed to reach the oxide film buried region 51U for the horizontal light-shielding portion 12H and the oxide film buried region 51Q for the horizontal light-shielding portion 13H in the depth direction from the exposed formation surface of the photodiode 51 (PD).

[0264] Next, as Figure 13N shown, via the trenches 12T and 13T formed in Figure 13M , the oxide film buried regions 51U and 51Q are removed by wet etching to obtain cavities. Then, as Figure 13O shown, a light-shielding material is buried in the trenches 12T and 13T. Figure 13O An example in which the trenches 12T and 13T have a bi-phase structure therein is shown. As described above, a metal material such as W (tungsten) can be buried in the inner layer portion, or a supercritical fluid (SCM) can be buried. The outer layer portion is an insulating layer. Note that the inside of the trench can be formed as a single-layer structure.

[0265] In the first example of the manufacturing process shown in Figures 12A to 12S , the horizontal light-shielding portion 12H is connected to the vertical light-shielding portion 12V extending from the first surface (front surface) side, and the horizontal light-shielding portion 13H is connected to the vertical light-shielding portion 13V extending from the second surface (back surface) side. In the second example of the manufacturing process, all the horizontal light-shielding portions 12H and 13H are connected to the vertical light-shielding portions 12V and 13V extending from the back surface side. After the process in Figure 13O , trenches for element isolation can be formed along the boundary portions of the pixels as Figure 13P shown, and an outer layer portion made of an insulating material and an inner layer portion made of a metal material can be formed inside the trenches to form the pixel boundary light-shielding layer 20.

[0266] Since the cavities of the horizontal light-shielding portions 12H and 13H are formed before wet etching or the like, and then the vertical light-shielding portions 12V and 13V are formed in the second example of the manufacturing process, it is easy to form the horizontal light-shielding portions 12H and 13H into arbitrary shapes. More specifically, according to the second example of the manufacturing process, it is possible to form the horizontal light-shielding portions 12H and 13H of arbitrary shapes regardless of the surface orientation of the silicon substrate 11. Since a silicon substrate having a plane index of (100) has high mobility and satisfactory interface states, for example, if the silicon substrate 11 is used to form the horizontal light-shielding portions 12H and 13H, the electrical performance of the solid-state imaging device can be improved and defects can be reduced. In addition, when forming the cavity of the horizontal light-shielding portion 12H, it is not necessary to form an etch stop portion 17, so the manufacturing process can be simplified.

[0267] (Third example of the manufacturing process of the imaging device 101).

[0268] Figures 14A to 14M is a process cross-sectional view showing a third example of the manufacturing method of the imaging device. First, the formation surface of the photodiode 51 (PD) on the exposed Figure 14A semiconductor substrate 51C is exposed, and a plurality of trenches 13P are formed adjacent to each other in one direction, and a p-type semiconductor layer 51R is formed thereon by epitaxial growth, as Figure 14B shown. Next, as Figure 14C shown, heat treatment is performed in a hydrogen atmosphere capable of forming a reducing atmosphere. In this way, the plurality of trenches 13P formed adjacent to each other are integrated into a spherical shape, and a cavity 13Q is formed inside the photodiode 51 (PD). By repeating Figure 14B and Figure 14C the processes in Figure 14B while slightly shifting the formation positions of the plurality of trenches 13P in

[0269] Next, as Figure 14D shown, a plurality of trenches 12P adjacent to each other are formed at a position shallower than the cavity 13Q. Next, as Figure 14E shown, heat treatment is performed in a hydrogen atmosphere capable of forming a reducing atmosphere. In this way, the cavity 12Q of the horizontal light-shielding portion 12H is formed at a position shallower than the cavity 13Q formed in Figure 14C . By repeating Figure 14D and 14E the processes in

[0270] Next, as Figure 14FAs shown, a charge holding unit MEM(54) formed as an N-type semiconductor region is formed inside the p-type silicon layer 51U closer to the surface side than the cavity 12Q for the horizontal light-shielding portion 12H.

[0271] Next, as Figure 14G shown, a trench 52T for the vertical gate electrode 52V is formed. Next, a conductive material is buried in the trench 52T to form the vertical gate electrode 52V, as Figure 14H shown.

[0272] Next, as Figure 14I shown, a wiring layer 80 is formed on the substrate surface and an insulating layer 81 covering the periphery of the wiring layer 80 is formed. Next, the back surface 11B side of the semiconductor substrate 11 is thinned by CMP or the like, as Figure 14J shown, to expose the formation surface of the photodiode 51(PD). Next, as Figure 14K shown, new trenches 12T, 13T reaching the cavity 12Q for the horizontal light-shielding portion 12H and the cavity 13Q for the horizontal light-shielding portion 13H are formed in the depth direction from the exposed formation surface of the photodiode 51(PD). Next, the inside of the trenches 12T, 13T is removed by wet etching, as Figure 14L shown, and a light-shielding material or the like is buried in the trenches 12T, 13T. Thereafter, as Figure 14M shown, a pixel boundary structure can be formed.

[0273] Although an example in which the first light-shielding unit 13 includes a vertical light-shielding portion 13V connected to the horizontal light-shielding portion 13H and the second light-shielding unit 12 includes a vertical light-shielding portion 12V connected to the horizontal light-shielding portion 12H has been described in the above example, at least the vertical light-shielding portion 12V or 13V can be a hole member or a contact member having a diameter required to fill the cavities of the horizontal light-shielding portions 12H and 13H with a light-shielding material.

[0274] Figures 15A to 15F is a plan view showing an example in which a hole member or a contact member 12PH or 13PH is used instead of at least one of the vertical light-shielding portions 12V or 13V. Figures 15A to 15D is a schematic plan view observed from the second surface (back surface) side of the solid-state imaging device and shows a state in which the horizontal light-shielding portion 12H is provided below the horizontal light-shielding portion 13H. Figures 15A to 15D shows the horizontal light-shielding portions 13H having different shapes. Note that the shape of the horizontal light-shielding portion 13H is not limited to Figures 15A to 15D the shape shown.

[0275] In Figures 15A to 15DIn this case, for example, hole members 12PH extending from the second surface (rear surface) side are formed at the four corners of the rectangular horizontal light-shielding portion 12H. The cavity of the horizontal light-shielding portion 12H is filled with a light-shielding material or the like through the hole members 12PH to form the horizontal light-shielding portion 12H. Similarly, for example, hole members 13PH extending from the rear surface side are substantially formed at the central portion of the horizontal light-shielding portion 13H. The horizontal light-shielding portion 13H is provided near the center of the horizontal light-shielding portion 12H, and the cavity of the horizontal light-shielding portion 13H is filled with a light-shielding material or the like through the hole members 13PH to form the horizontal light-shielding portion 13H. After forming the horizontal light-shielding portions 12H and 13H, a light-shielding material or the like can be buried in the hole members 12PH and 13PH to form contact members, or the hole members 12PH and 13PH can be left as hole members reserved.

[0276] Although Figures 15A to 15D An example is shown in which the hole members 12PH are provided at the four corners of the horizontal light-shielding portion 12H and the hole members 12PH are filled with a light-shielding material for the horizontal light-shielding portions 12H and 13H. The number and the setting position of the hole members 12PH are arbitrarily selected, and the hole members 12PH do not necessarily have to be provided at the corners of the horizontal light-shielding portion 12H. In addition, a plurality of hole members 13PH for the horizontal light-shielding portion 13H can be provided.

[0277] Figure 15E An example is shown in which the hole members 12PH are provided at the four corners of the horizontal light-shielding portion 12H to straddle four adjacent pixels and the horizontal light-shielding portion 13H and the hole members 13PH for the horizontal light-shielding portion 13H are provided at the central portion of the four pixels. The number and the setting position of the hole members 12PH and 13PH are also Figure 15E arbitrarily selected.

[0278] In Figure 15F this case, a groove 12T is formed to surround the periphery of the horizontal light-shielding portion 12H. The cavity of the horizontal light-shielding portion 12H is filled with a light-shielding portion or the like from the groove 12T to form the horizontal light-shielding portion 12H, and the groove 12T is filled to form a vertical light-shielding portion 12V. In addition, a cavity for the horizontal light-shielding portion 13H is formed at the central portion of the horizontal light-shielding portion 12H, a hole member 13PH is formed at the central portion of the horizontal light-shielding portion 13H, and a light-shielding material or the like for the horizontal light-shielding portion 13H is filled in the hole member 13PH to form the horizontal light-shielding portion 13H.

[0279] As Figure 15F shown, one of the horizontal light-shielding portions 12H and 13H can have a vertical light-shielding portion, while the other can have a hole member or a contact member.

[0280] (Materials of the second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20)

[0281] The second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20 of this embodiment have the property of absorbing or reflecting incident light, and various materials can be applied. For example, insulating films such as SiN or SiO 2 can be used as examples of materials. Alternatively, metal materials such as tungsten or aluminum can be used. Tungsten has the property of absorbing light, while aluminum has the property of reflecting light. In addition, the above materials can be polysilicon. Polysilicon has excellent light reflection properties. Alternatively, the foregoing materials can be metal oxide films (such as alumina or aluminum nitride). Alternatively, the above materials can be carbides or organic materials. Alternatively, the above materials can be electrochromic materials. Electrochromic materials are materials that can change the light reflectivity or absorptivity by applying a voltage or current thereto (for example, polyaniline or a porogen).

[0282] The second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20 only need to have a light absorption property or a light reflection property. Note that in this specification, the cases where light is absorbed and where light is reflected are collectively referred to as "light shielding". In other words, "light shielding" in this specification means including the property of not allowing light to pass through. Note that the case where a little light is allowed to pass through is interpreted as being included in "light shielding". Due to the light absorption or reflection property, the second light-shielding unit 12 and the first light-shielding unit 13 can be referred to as light control members.

[0283] (Connection structure of the imaging device 101)

[0284] The imaging device 101 according to this embodiment is configured by connecting another semiconductor substrate 11 on which a reading circuit 120 or the like is formed to a semiconductor substrate 11 on which a pixel array unit 111 is formed. Figure 16 is a cross-sectional view of the imaging device 101 constructed by connecting the first to third semiconductor substrates BP1 to BP3. The sensor pixel 121 is formed in the first semiconductor substrate BP1. The reading circuit 120, the wiring layer 80, and the insulating layer 81 are formed in the second semiconductor substrate BP2. The first semiconductor substrate BP1 and the second semiconductor substrate BP2 are electrically connected by a through-wire 82. The reading circuit 120 is Figure 2The circuit shown, and is a circuit that outputs a pixel signal based on the charge output by the sensor pixel 121. A plurality of pixel driving lines 122 and a plurality of vertical signal lines 123 are formed in the wiring layer 83. The periphery of the reading circuit 120 and the wiring layer 80 is covered by the insulating layer 81. The logic circuit CR3, the wiring layer 63, and the insulating layer 62 are formed in the third semiconductor substrate BP3. The logic circuit CR3 includes, for example, a vertical driving unit 112, a ramp module 113, a column signal processing unit 114, a clock module 115, a data storage unit 116, a horizontal driving unit 117, a system control unit 118, a signal processing unit 119, etc. The peripheries of the logic circuit and the wiring layer are both covered with an insulating layer. For example, an electrical connection is established between the second semiconductor substrate BP2 and the third semiconductor substrate BP3 through the Cu-Cu junction 83.

[0285] Thus, according to the first embodiment, the first light-shielding unit 13 including the vertical light-shielding portion 13V and the horizontal light-shielding portion 13H is provided in the photoelectric conversion unit 51 below the vertical gate electrode 52V in the back-illuminated imaging device 101, so that it is possible to prevent light incident from the rear surface 11B from passing through the photoelectric conversion portion 51 and incident on the vertical gate electrode 52V. Since the vertical light-shielding portion 13V and the horizontal light-shielding portion 13H are integrally formed, the first light-shielding unit 13 is relatively easy to manufacture. In addition, since the cross-sectional shape of the first light-shielding unit 13 is T-shaped and the horizontal light-shielding portion 13H does not penetrate the vertical light-shielding portion 13V, there is no need to worry that the vertical light-shielding portion 13V will block the movement of electrons generated by the photoelectric conversion unit 51.

[0286] In addition, the height of the vertical light-shielding portion 13V in the first light-shielding unit 13 can be arbitrarily adjusted, and the height of the second element separation unit 20 can also be arbitrarily adjusted. By optimizing the heights of the vertical light-shielding portion 13V and the second element separation unit 20, the vertical light-shielding portion 13V and the second element separation unit 20 do not block the movement of electrons generated by the photoelectric conversion unit 51, thereby improving the photoelectric conversion efficiency Qe, that is, the sensitivity, without increasing noise and color mixing.

[0287] In addition, the vertical light-shielding portion 13V of the first light-shielding unit 13 is provided at the boundary portion of the pixel, which can prevent light leakage to adjacent pixels and can reduce halation caused by color mixing. In addition, in addition to the first light-shielding unit 13, by providing the second element separation unit 20 at the boundary portion of the pixel, the effect of reducing crosstalk between pixels can be further enhanced.

[0288] In addition, in addition to the first light-shielding unit 13, by providing the second light-shielding unit 12 covering the charge holding unit (MEM) 54, it is possible to prevent the worry of light incident on the charge holding unit (MEM) 54 and reduce noise.

[0289] (Second Embodiment)

[0290] Although an example has been described in the first embodiment in which the cross section of the first light-shielding unit 13 has a T shape and the second light-shielding unit 12 and the second element separation unit 20 are present, the second element separation unit 20 is not essential. In addition, various modifications can be conceived for the shapes of the second element separation unit 20 and the second light-shielding unit 12.

[0291] (Specific Shapes of the Second Light-Shielding Unit 12, the First Light-Shielding Unit 13, and the Second Element Separation Unit 20)

[0292] Figures 17A to 17O are cross-sectional views showing various modifications of the second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20. Figures 17A to 17O is a diagram schematically showing a cross-sectional structure around the second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20 of the imaging device 101 according to the second embodiment.

[0293] Figure 17A is a cross-sectional view of the imaging device 101 in which the second element separation unit 20 is omitted. Although the omission of the second element separation unit 20 increases the light leakage to the adjacent sensor pixels 121, when the imaging device 101 performs black-and-white imaging, the light incident on the adjacent sensor pixels 121 does not cause a decrease in image quality. Therefore, the second element separation unit 20 can be omitted. Due to the omission of the second element separation unit 20, the electrons generated by the photoelectric conversion unit 51 become more easily movable, and the photoelectric conversion efficiency Qe, that is, the sensitivity, can be improved.

[0294] Figure 17B is a cross-sectional view of the imaging device 101 in which the cross section of the second light-shielding unit 12 has a cross shape. By making the vertical light-shielding portion 12V of the second light-shielding unit 12 extend longer in the depth direction of the semiconductor substrate 11, light leakage to the adjacent sensor pixels 121 at the vertical light-shielding portion can be suppressed. In other words, since the vertical light-shielding portion 12V of the second light-shielding unit 12 functions to separate pixels, the second element separation unit 20 does not need to be provided. In addition, the horizontal light-shielding portion 12H of the second light-shielding unit 12 can be provided at any position in the extending direction of the vertical light-shielding portion 12V.

[0295] Figure 17C is according to Figure 17B of the modified example of the imaging device 101. In Figure 17C , the vertical light-shielding portion 12V of the second light-shielding unit 12 penetrates from the front surface 11A to the back surface 11B of the semiconductor substrate 11. Thus, the vertical light-shielding portion 12V of the second light-shielding unit 12 also functions as the second element separation unit 20. InFigure 17C In the imaging device 101, an effect similar to that of the second element separation unit 20 can be obtained without forming the second element separation unit 20, and thus the time and effort required to separately form the second element separation unit 20 can be saved. In addition, the horizontal light-shielding portion 12H of the second light-shielding unit 12 can also be provided at Figure 17C any depth position in the semiconductor substrate 11 in

[0296] Figure 17D It includes a structure similar to that of the imaging device 101 according to the first embodiment, and in addition to the first light-shielding unit 13 having a T-shaped cross section, it also includes a second light-shielding unit 12 and a second element separation unit 20. Although the number of manufacturing processes will increase because the second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20 need to be separately formed for the imaging device 101 in Figure 17D the imaging device 101 in, the effects of suppressing color mixing and noise reduction can be obtained simultaneously.

[0297] Figure 17E It is different from Figure 17D in that the cross section of the second light-shielding unit 12 has a cross shape instead of a T shape. In Figure 17E the imaging device 101, since the vertical light-shielding portion 12V of the second light-shielding unit 12 and the second element separation unit 20 are arranged to face each other and the region therebetween becomes narrow, light is less likely to enter other adjacent sensor pixels 121, and crosstalk between pixels can be reduced.

[0298] Figure 17F is a cross-sectional view of the imaging device 101, in which the cross sections of both the first light-shielding unit 13 and the second element separation unit 20 are T-shaped. In the example of Figure 17F the imaging device 101, the height of the horizontal light-shielding portion 13H of the first light-shielding unit 13 is lower than the height of the horizontal light-shielding portion of the second element separation unit 20. Therefore, light incident from the back surface 11B is less likely to enter adjacent sensor pixels 121. Desirably, the height of the vertical light-shielding portion 13V of the first light-shielding unit 13 is set to be different from the height of the vertical light-shielding portion 20V of the second element separation unit 20, and the distance in the depth direction between the horizontal light-shielding portion 13H of the first light-shielding unit 13 and the horizontal light-shielding portion 20H of the second element separation unit 20 is maximized to prevent the movement of electrons generated by the photoelectric conversion unit 51 from being blocked by the horizontal light-shielding portion 13H of the first light-shielding unit 13 and the horizontal light-shielding portion 20H of the second element separation unit 20.

[0299] Figure 17G is Figure 17F a cross-sectional view of the imaging device 101 according to the first modification of Figure 17G the imaging device 101 in Figure 17FThe imaging device 101 in [reference] is different in that the cross-section of the second light-shielding unit 12 has a cross shape instead of a T shape. Since in Figure 17G the case where the distance between the vertical light-shielding portion 12V of the second light-shielding unit 12 and the horizontal light-shielding portion 20H of the second element separation unit 20 is shortened, light leakage to adjacent sensor pixels 121 can be reduced and crosstalk between pixels can be reduced.

[0300] Figure 17H is a cross-sectional view of the imaging device 101 according to the second modification example of Figure 17F [reference]. Figure 17H The imaging device 101 in [reference] is different from Figure 17F [reference] in that the height of the horizontal light-shielding portion 13H of the first light-shielding unit 13 from the rear surface 11B is higher than the height of the second element separation unit 20 from the rear surface 11B. Since the horizontal light-shielding portion 13H of the first light-shielding unit 13 is arranged closer to the vertical gate electrode 52V, light incident on the vertical gate electrode 52V can be further prevented and the influence of noise is smaller.

[0301] Figure 17I is a cross-sectional view of the imaging device 101 according to the first modification example of Figure 17H [reference]. Figure 17I The imaging device 101 in [reference] is different from the imaging device 101 in Figure 17H [reference] in that the cross-section of the second light-shielding unit 12 has a cross shape instead of a T shape. On the other hand, Figure 17J is a cross-sectional view of the imaging device 101 according to the second modification example of Figure 17H [reference]. Figure 17J The imaging device 101 in [reference] is different from the imaging device 101 in Figure 17H [reference] in that the cross-section of the second element separation unit 20 has a cross shape instead of a T shape. Figure 17I and Figure 17J The imaging device 101 in [reference] can both reduce the probability of light incident on adjacent sensor pixels 121.

[0302] Figure 17K is a cross-sectional view of the imaging device 101 according to the modification example of Figure 17J [reference]. In the imaging device 101 of Figure 17K [reference], the horizontal light-shielding portion 13H of the first light-shielding unit 13 is arranged on a side closer to the front surface 11A than the horizontal light-shielding portion 20H of the second element separation unit 20. Therefore, Figure 17K in the imaging device 101 of [reference], the distance between the horizontal light-shielding portion 12H of the second light-shielding unit 12 and the vertical light-shielding portion 20V of the second element separation unit 20 is longer than that in the imaging device 101 of Figure 17J [reference]. In terms of light leakage to adjacent sensor pixels 121, compared with Figure 17K [reference], Figure 17JThe light leakage in can be further suppressed.

[0303] Figure 17L and 17M are cross-sectional views of the imaging device 101, in which the cross-sections of the second light-shielding unit 12 and the second element separation unit 20 both have a cross shape. In Figure 17L and Figure 17M the height of the horizontal light-shielding portion 13H of the first light-shielding unit 13 and the height of the horizontal light-shielding portion 20H of the second element separation unit 20 are opposite.

[0304] Figure 17N and Figure 17O are cross-sectional views of the imaging device 101, in which the second light-shielding unit 12 and the second element separation unit 20 are formed as an integral structure with a vertical light-shielding portion penetrating from the front surface 11A to the back surface 11B of the semiconductor substrate 11. In Figure 17N and Figure 17O the height of the horizontal light-shielding portion 13H of the first light-shielding unit 13 and the height of the horizontal light-shielding portion of the second element separation unit 20 are opposite. In Figure 17N and Figure 17O the boundary between adjacent sensor pixels 121 is sealed by a vertical light-shielding portion penetrating from the front surface 11A to the back surface 11B of the semiconductor substrate 11, and thus, light leakage caused by color mixing can be reliably prevented.

[0305] Note that in Figure 17A and Figure 17O only some representative examples of the combination of the first light-shielding unit 13 having a T-shaped cross-section, the second light-shielding unit 12 having various cross-sectional shapes, and the second element separation unit 20 having various cross-sectional shapes are shown, and combinations of cross-sectional shapes not shown can also be adopted.

[0306] In Figures 17A to 17O when the volumes of the space 13Z of the horizontal light-shielding portion 13H of the first light-shielding unit 13 and the space 12Z of the horizontal light-shielding portion 12H of the second light-shielding unit 12 manufactured in the manufacturing process are large, even if the inner layer portion is filled as in Figure 17P gaps (voids) may occur, but there is no problem in performance in particular. In addition, the vertical light-shielding portions 13V and 12V can actually be Figure 17Q the tapered shape shown in. In this specification, the shape of the vertical light-shielding portion that intersects the horizontal plane of the semiconductor substrate 11 not completely vertically but intersects the horizontal plane is also included in the concept of the vertical light-shielding portion.

[0307] In this way, according to the second embodiment, in addition to the first light-shielding unit 13 having a T shape, by changing the cross-sectional shape of the second light-shielding unit 12 in various ways, the light incident on the vertical gate electrode 52V and the charge holding unit (MEM) 54 is suppressed, and light leakage to adjacent sensor pixels 121 is also prevented, while maintaining the movement of the charge generated by the photoelectric conversion unit 51 as much as possible without being blocked. In addition, in addition to the first light-shielding unit 13 having a T-shaped cross-section and the second light-shielding unit 12 having various cross-sectional shapes, by providing the second element isolation unit 20 having various shapes, light leakage to adjacent sensor pixels 121 can be reliably prevented.

[0308] (Third Embodiment)

[0309] In the imaging device 101 having Figure 4A and Figure 4B the cross-sectional structure shown, an N-type semiconductor region 51A is included on the back surface 11B side within the photoelectric conversion unit 51, an N-type semiconductor region 51B is included thereon, and potential gradients and impurity concentration gradients exist only in the depth direction of the semiconductor substrate 11. On the other hand, since potential gradients and impurity concentration gradients do not exist in the horizontal direction (substrate surface direction) of the semiconductor substrate 11, there is a problem that electrons generated by the photoelectric conversion unit 51 are difficult to move in the horizontal direction. For example, since the horizontal light-shielding portion is an obstacle in the imaging device 101 as shown in Figure 16 electrons generated near the vertical light-shielding portion 13V of the first light-shielding unit 13 need to move to the vertical gate electrode 52V by bypassing the horizontal light-shielding portion 13H. However, since there are no potential gradients and impurity concentration gradients in the horizontal direction of the semiconductor substrate 11, electrons are not easily moved in the horizontal direction.

[0310] Therefore, the imaging device 101 according to the third embodiment is provided with an impurity concentration gradient in the horizontal direction within the photoelectric conversion unit 51 to make it easier for electrons to move in the horizontal direction.

[0311] Figure 18A is a cross-sectional view of the imaging device 101 according to the third embodiment. The cross-sectional view shows Figure 3 the cross-sectional structure in the direction of line A-A in the middle, and the basic cross-sectional structure is the same as Figure 5 . In Figure 18A , grayscale is schematically applied to the impurity concentration gradient inside the photoelectric conversion unit 51, with a portion closer to black indicating a higher impurity concentration and a portion closer to white indicating a lower impurity concentration. In Figure 18AA schematic diagram illustrating the impurity concentration gradient is shown beside the cross-sectional view. In these diagrams, the horizontal axis represents the position coordinate in the horizontal direction, and the vertical axis represents the N-type impurity concentration. As shown in these diagrams, with respect to the vertical light-shielding portion 13V of the first light-shielding unit 13 as a reference, the N-type impurity concentration increases in the horizontal direction toward the vertical light-shielding portion of the second element separation unit 20. On the other hand, the concentration of the N-type semiconductor region is substantially constant in the depth direction inside the photoelectric conversion unit 51. Note that although the N-type impurity concentration changes substantially linearly in Figure 18A it may change in a non-linear manner.

[0312] In this specification, the region from the horizontal light-shielding portion 13H to the rear surface 11B side in the photoelectric conversion unit 51 is referred to as the first region, and the region from the horizontal light-shielding portion 13H to the front surface 11A side in the photoelectric conversion unit 51 is referred to as the second region. In Figure 18A the N-type impurity concentration gradient is included in the horizontal direction within the first region.

[0313] Thus, in Figure 18A the imaging device 101, the closer to the vertical light-shielding portion of the second element separation unit 20, the higher the N-type impurity concentration is set, and the closer to the side of the vertical light-shielding portion 12V of the second light-shielding unit 12, the higher the N-type impurity concentration is set. Thus, electrons generated by photoelectric conversion on the side closer to the vertical light-shielding portion of the second element separation unit 20 are more likely to move near the second element separation unit 20 on the high impurity concentration side. Since the impurity concentration gradient is initially set in the depth direction of the semiconductor substrate 11 and a positive potential is applied to the vertical gate electrode VG, the electrons moving near the second element separation unit 20 move toward the front surface 11A side and are attracted by the vertical gate electrode VG.

[0314] In the case where there is no impurity concentration gradient in the horizontal direction of the semiconductor substrate 11, electrons generated on the side of the photoelectric conversion unit 51 closer to the rear surface 11B than the horizontal light-shielding portion 13H of the first light-shielding unit 13 are blocked from moving to the vertical gate electrode 52V because the horizontal light-shielding portion acts as an obstacle. However, if the concentration gradient shown in the figure is included within the photoelectric conversion unit 51, the electrons are more likely to move in the direction of the second element separation unit 20, and then, according to the impurity concentration gradient in the depth direction of the semiconductor substrate 11 and the positive potential applied to the vertical gate electrode 52V, the electrons move in the direction of the vertical gate electrode 52V.

[0315] Figure 18AThe vertical light-shielding portion of the second element separation unit 20 in [has a three-layer structure. For example, the innermost layer is a metal layer, the outer layer of the metal layer is an N-type region, and the outermost layer is a P-type region. The N-type region and the P-type region are formed by solid-phase diffusion, for example. By disposing the P-type region on the outermost layer of the vertical light-shielding portion, the surface of the PN junction inside the photoelectric conversion unit 51 can be increased and the charge generation efficiency when light is incident can be improved. For Figure 18A the N-type impurity concentration gradient in [, when forming the vertical light-shielding portion of the second element separation unit 20, an insulator containing P (phosphorus) or As (arsenic) is formed in the trench, and 2 SiO etc. is heat-treated in the solid-phase diffusion process, so that the N-type impurity can gradually diffuse in the horizontal direction of the photoelectric conversion unit 51 and include a concentration gradient. In Figure 18A the example of [, a concentration gradient is included in the horizontal direction in the range from the back surface 11B side of the semiconductor substrate 11 to the horizontal light-shielding portion 13H of the first light-shielding unit 13. In this case, although the electrons generated in the region where the concentration gradient is included inside the photoelectric conversion unit 51 move in the direction of the second element separation unit 20, there is still a concern that the electrons generated on the side closer to the front surface 11A inside the photoelectric conversion unit 51 do not move near the vertical gate electrode 52V. Therefore, the impurity concentration gradient can be included in a wider range in the horizontal direction in the photoelectric conversion unit 51.

[0316] Figure 18B is a schematic cross-sectional view showing an example in which a concentration gradient is included in the horizontal direction in a wider range inside the photoelectric conversion unit 51 than Figure 18A Figure 18B shows an example in which the length of the second element separation unit 20 in the depth direction is longer than that of the second element separation unit 20 in Figure 18A [[. The photoelectric conversion unit 51 has an impurity concentration gradient in the horizontal direction in the region corresponding to the length of the second element separation unit 20 in the depth direction, that is, the above-mentioned first region and second region. In this case, for example, the electrons attracted near the second element separation unit 20 move to the vertical gate electrode 52V through the N-type semiconductor region 51B.

[0317] In order to make the electrons attracted near the second element separation unit 20 easily move toward the vertical gate electrode 52V, a concentration gradient in the opposite direction can be included inside the photoelectric conversion unit 51 on the side closer to the front surface 11A than the horizontal light-shielding portion 13H of the first light-shielding unit 13.

[0318] Figure 18C is a schematic cross-sectional view showing an example in which opposite concentration gradients are included inside the photoelectric conversion unit 51 on the back surface 11B side and the front surface 11A side starting from the horizontal light-shielding portion 13H of the first light-shielding unit 13. In Figure 18C ​In the example of Figure 18A and Figure 18B are similar, the impurity concentration is set to increase toward the second element separation unit 20 on one side of the rear surface 11B (i.e., in the first region) starting from the horizontal light-shielding portion 13H of the first light-shielding unit 13. On the other hand, the impurity concentration is set to increase toward the vertical light-shielding portion 13V of the first light-shielding unit 13 on one side of the front surface 11A (i.e., in the second region) starting from the horizontal light-shielding portion 13H of the first light-shielding unit 13. In this way, the electrons attracted near the second element separation portion 20 move slightly toward the front surface 11A side according to the electric field in the depth direction, and then move to the vertical gate electrode 52V according to the concentration gradient in the opposite direction.

[0319] Since a reverse bias is usually applied to the photoelectric conversion unit 51, an electric field is generated in the photoelectric conversion unit 51 in the depth direction, and the electrons generated inside the photoelectric conversion unit 51 attempt to move toward the front surface 11A side according to the electric field. However, if there are structures such as the second light-shielding unit 12, the first light-shielding unit 13, and the second element separation unit 20, the movement of electrons caused by the electric field is prevented. Therefore, the N-type impurity concentration gradient can include not only in the horizontal direction of the photoelectric conversion unit 51 but also in the depth direction, as Figures 18D to 18F shown. Figures 18D to 18F Each of Figures 18A to 18C shows an example in which a concentration gradient in the depth direction is included in addition to the concentration gradient in the horizontal direction in

[0320] In this case, the N-type impurity concentration is set to increase toward the front surface 11A of the semiconductor substrate 11. By including such concentration gradients in the horizontal and vertical directions, the electrons that have been attracted near the second element separation unit 20 are more likely to move to the front surface 11A side, more electrons can be collected by the vertical gate electrode 52V, and the photoelectric conversion efficiency Qe, that is, the sensitivity, can be improved.

[0321] (Fourth Embodiment)

[0322] Figure 19is a plan view schematically showing the structures of sensor pixels 121A and 121B according to the fourth embodiment. Figure 20A is a cross-sectional view along Figure 19 line A-A in Figure 20B is a cross-sectional view along Figure 19 line B-B in. In the fourth embodiment, the structures of the first light-shielding unit (first element isolation unit) 13 and the second element isolation unit 20 will be described in more detail. Note that Figure 19 shows a plan view of the semiconductor substrate 11 as seen from the back surface 11B side. Figure 20A and Figure 20B are cross-sectional views with the upper end corresponding to the front surface 11A and the lower end corresponding to the back surface 11B.

[0323] As Figure 19 shown, the first element isolation unit 13 and the second element isolation unit 20 are provided between a plurality of sensor pixels 121 and electrically or optically isolate the plurality of sensor pixels 121. Similar to the above-described embodiments, the first element isolation unit 13 is composed of a substantially rhombic horizontal light-shielding portion 13H and a vertical light-shielding portion 13V provided in the diagonal direction (Y direction) of the horizontal light-shielding portion 13H. On the other hand, the second element isolation unit 20 does not have a horizontal light-shielding portion and is composed only of a vertical light-shielding portion. Although not shown here, a vertical gate electrode 52V that is part of the transfer transistor TRZ is provided directly above each of the four corners of the intersection point XP where the first element isolation unit 13 and the second element isolation unit 20 cross each other, and is provided at a position overlapping the horizontal light-shielding portion 13H in a plan view (see Figure 20A and Figure 20B ). In this way, the horizontal light-shielding portion 13H can shield the vertical gate electrode 52V.

[0324] Note that in the present disclosure, the first element isolation unit 13 and the second element isolation unit 20 are separated from each other without overlapping or connecting to each other. For example, as Figure 19 shown, the vertical light-shielding portion 13V of the first element isolation unit 13 extends in the Y direction, is separated from the second element isolation unit 20 that also extends in the Y direction, and is separated from the second element isolation unit 20 arranged in the X direction. In this way, it is possible to prevent the trenches of the first element isolation unit 13 and the second element isolation unit 20 from becoming too deep at the intersection point XP where the first element isolation unit 13 and the second element isolation unit 20 cross each other. As Figure 20BAs shown, the end of the vertical light-shielding portion of the second element separation unit 20 extending in the X direction is located in front of the connection of the vertical light-shielding portion 13V of the first element separation unit 13 extending in the Y direction, and the vertical light-shielding portion 20V of the second element separation unit 20 extending in the X direction and the vertical light-shielding portion 13V of the first element separation unit 13 extending in the Y direction are not connected. In this way, it is possible to prevent the drawback that the depth of the trench for the vertical light-shielding portion becomes too deep at the intersection XP between the first element separation unit 13 and the second element separation unit 20.

[0325] Reference Figure 20A , the first element separation unit 13 includes a vertical light-shielding portion 13V and a horizontal light-shielding portion 13H. The end of the vertical light-shielding portion 13V is connected to the horizontal light-shielding portion 13H, and the cross-section in the depth direction is T-shaped. In addition, the second element separation unit 20 does not include a horizontal light-shielding portion and is only composed of a vertical light-shielding portion 20V. Note that, as described above, the second element separation unit 20 may also be provided with a horizontal light-shielding portion 20H.

[0326] As described above, the first element separation unit 13 includes an inner layer portion 13A and an outer layer portion 13B. The inner layer portion 13A is made of a light-shielding material, which may be at least one of a single metal, a metal alloy, a metal nitride, or a metal silicide.

[0327] The outer layer portion 13B is a material covering the inner layer portion 13A, having a refractive index lower than that of the semiconductor substrate 11 (e.g., silicon) and an extinction coefficient K lower than that of the inner layer portion 13A. For example, the outer layer portion 20B is made of SiO 2 , SiN, SiCN, SiON, Al 2 O 3 , SiOC, TiO 2 , Ta 2 O 5 and other insulating materials.

[0328] Figure 21A is a graph showing the extinction coefficient of tungsten as an example of the material of the inner layer portion 13A. Figure 21B is a graph showing the extinction coefficient of a silicon oxide film as an example of the material of the outer layer portion 13B. In the case of using tungsten as the inner layer portion 13A and a silicon oxide film as the outer layer portion 13B, the extinction coefficient of the outer layer portion 13B is lower than that of the inner layer portion 13A. Therefore, since the inner layer portion 13A absorbs incident light and the outer layer portion 13B hardly absorbs incident light, the first element separation unit 13 has excellent light-shielding characteristics.

[0329] Figure 22A is a graph showing the refractive index of a single crystal silicon as an example of the semiconductor substrate 11. Figure 22BThis is a diagram showing the refractive index of a silicon oxide film, which is an example of the material of the outer layer portion 13B. When silicon is used as the semiconductor substrate 11 and a silicon oxide film is used as the outer layer portion 13B of the first element isolation element 13 and the second element isolation element 20, incident light from the semiconductor substrate 11 is likely to be reflected at the interface between the first element isolation unit 13 or the second element isolation unit 20 and the semiconductor substrate 11. Note that, for example, for incident light with a wavelength of 633 nm, the refractive index of silicon is 3.9 and the refractive index of the silicon oxide film is 1.46. In this case, the refraction angle of the incident light from the semiconductor substrate 11 to the first element isolation unit 13 or the second element isolation unit 20 is greater than the incident angle, and the light is likely to be totally reflected.

[0330] Electrical insulation between the inner layer portion 13A and the semiconductor substrate 11 is ensured by covering the inner layer portion 13A with the outer layer portion 13B. In addition, since the refractive index of the outer layer portion 13B is lower than that of the semiconductor substrate 11 and the extinction coefficient K is lower than that of the inner layer portion 13A, the first element isolation unit 13 can reflect incident light at the interface between the outer layer portion 13B and the semiconductor substrate 11. In this way, the photoelectric conversion efficiency Qe can be improved. In addition, since the extinction coefficient K of the inner layer portion 13A is relatively high and it has light-shielding properties, even if the outer layer portion 13B is a transparent material, the first element isolation unit 13 will not allow incident light to pass through. Therefore, the vertical light-shielding portion 13V of the first element isolation unit 13 can suppress crosstalk between pixels, and the horizontal light-shielding portion 13H can suppress noise from entering the transfer transistor TRZ.

[0331] On the other hand, the second element isolation unit 20 does not contain the material of the inner layer portion and is only composed of the same material as the outer layer portion 13B. That is, the second element isolation unit 20 is composed of a material with a refractive index lower than that of the semiconductor substrate 11 and an extinction coefficient K lower than that of the inner layer portion 13A. The second element isolation unit 20 is, for example, composed of a transparent insulating material, and reflects incident light at the interface between the second element isolation unit 20 and the semiconductor substrate 11 without significantly attenuating the incident light. In this way, the second element isolation unit 20 can suppress crosstalk between pixels and further improve the photoelectric conversion efficiency Qe.

[0332] Note that although the material of the second element isolation unit 20 can be the same as the material of the outer layer portion 13B, as long as the material has the above characteristics, it can be another material different from the material of the outer layer portion 13B.

[0333] Here, the first width W13 in the horizontal direction of the vertical light-shielding portion 13V of the first element separation unit 13 may be greater than the second width W20 in the horizontal direction of the second element separation unit 20. This is because the second element separation unit 20 is formed only of the material of the outer layer portion 13B, while the first element separation unit 13 has a double-layer structure of the outer layer portion 13B and the inner layer portion 13A. For example, when the film thickness of the outer layer portion 13B is set to x and the film thickness of the inner layer portion 13A is set to y, it is preferable that the first width W13 is greater than 2x and less than 2x + 2y. The second width W20 is preferably less than 2x.

[0334] Note that as long as the light-shielding performance can be obtained, it is no problem to leave a certain degree of void inside the inner layer portion 13A of the horizontal light-shielding portion 13H. Therefore, the width (thickness) of the inner layer portion 13A in the Z direction may be greater than 2x + 2y.

[0335] Figure 20B The B-B cross section in includes the intersection point XP where the first element separation unit 13 and the second element separation unit 20 cross each other. In Figure 20B In this case, the semiconductor substrate 11 is held between the second element separation portion 20 and the vertical light-shielding portion 13V of the first element separation portion 13 at the intersection point XP, and the second element separation unit 20 does not contact the vertical light-shielding portion 13V of the first element separation unit 13. On the other hand, the second element separation unit 20 contacts the outer layer portion 13B of the horizontal light-shielding portion 13H of the first element separation unit 13 within the semiconductor substrate 11. This is because the second element separation unit 20 serves as the etching stop portion 17 of the first element separation unit 13 in the process of manufacturing the first element separation unit 13 and the second element separation unit 20.

[0336] Next, a method for manufacturing the first element separation unit 13 and the second element separation unit 20 will be described.

[0337] Figures 23A to 26B is a cross-sectional view or a plan view showing a method for forming the structure shown in Figure 20A Note that Figures 23A to 26B shows a state of processing from the back surface 11B.

[0338] First, the method for forming the trench 13T and the space 13Z for the first element separation unit 13 is substantially similar to the method for forming the trench 13T and the space 13Z described with reference to Figures 12P to 12R In this way, the structures shown in Figure 23A and Figure 23B are obtained. As shown in Figure 23B The space 13Z is formed in a substantially rhombic shape along the crystal plane direction. However, at this time, the sacrificial film 13S is embedded in the trench 13T and the space 13Z, as shown in Figure 23A shown. Figure 23BThe cross-sections along line A-A and line B-B are both the same as Figure 23A the cross-section shown.

[0339] Next, as shown in Figure 24A and Figure 24B a trench 20T is formed in the formation region of the second element isolation unit 20 using photolithography and etching techniques. Figure 24A shows the cross-section along line A-A in Figure 24C . Figure 24B shows the cross-section along line B-B in Figure 24C . At this time, the width W20 of the trench 20T for the second element isolation unit 20 is formed to be narrower than the width W13 of the trench 13T for the first element isolation unit 13. In addition, as shown in Figure 24C , the trench 20T is formed between pixels other than the trench 13T.

[0340] Here, the intersection point XP where the first element isolation unit 13 and the second element isolation unit 20 cross is covered with a resist PR, and the sacrificial film 13S of the trench 13T is left, as shown in Figure 24B . The other regions in the trench 20T are etched. At this time, the sacrificial film 13S in the space 13Z serves as an etch stop portion 17. By stopping the etching when the etching reaches the sacrificial film 13S in the space 13Z, the depth of the trench 20T can be easily controlled.

[0341] As shown in Figure 25A and Figure 25B , the sacrificial film 13S is removed after removing the resist PR.

[0342] Next, as shown in Figure 26A and Figure 26B , a material film for the outer layer portion 13B is formed inside the trenches 13T and 20T and the space 13Z. At this time, the material of the outer layer portion 13B is deposited in such a way that it does not fill the trenches 13T and the space 13Z but fills the trench 20T. In this way, the outer layer portion 13B is formed inside the trenches 13T and the space 13Z, and the trench 20T is filled with the material of the outer layer portion 13B, thereby forming the second element isolation unit 20. Note that the width W20 of the trench 20T for the second element isolation unit 20 is narrower than the width W13 of the trench 13T for the first element isolation unit 13. At the stage of filling the trench 20T with the material of the outer layer portion 13B, the inside of the trench 20T is filled to complete the second element isolation unit 20.

[0343] On the other hand, since the inside of the trench 13T has not been filled yet, the material of the inner layer portion 13A is filled in the trenches 13T and the space 13Z. In this way, the first element isolation unit 13 is formed, and Figure 20A andFigure 20B The structure shown.

[0344] According to the fourth embodiment, since the refractive index of the outer layer portion 13B of the first element isolation unit 13 is set to be lower than the refractive index of the semiconductor substrate 11, incident light can be reflected by the interface between the outer layer portion 13B and the semiconductor substrate 11. In this way, incident light can be retained inside the pixel and the photoelectric conversion efficiency Qe can be improved. In addition, since the inner layer portion 13A of the first element isolation unit 13 has a high extinction coefficient K and light-shielding property, incident light can be absorbed without allowing the incident light to pass through. Therefore, even if the light reaches the inner layer portion 13A without being reflected by the outer layer portion 13B of the first element isolation unit 13, the light is absorbed by the inner layer portion 13A, so that the light penetrates the first element isolation unit 13 and does not enter the adjacent sensor pixel 121, and crosstalk between pixels can be prevented.

[0345] Furthermore, since the first element isolation unit 13 is made of a material (e.g., a transparent insulating material) having a refractive index lower than that of the semiconductor substrate 11 and an extinction coefficient K lower than that of the inner layer portion 13A, incident light can be reflected at the interface between the first element isolation unit 13 and the semiconductor substrate 11 without much loss of the incident light. In this way, the first element isolation unit 13 can prevent light from leaking to the adjacent sensor pixel 121 and further improve the photoelectric conversion efficiency Qe.

[0346] (Modification: Intersection point)

[0347] Figure 27A and Figure 27B is a plan view showing a modification of the fourth embodiment. Figure 19 The plan view in shows an example in which the vertical light-shielding portion 13V of the first element isolation unit 13 and the vertical light-shielding portion of the second element isolation unit 20 are not connected at the intersection point XP.

[0348] When the depths of the first element isolation unit 13 and the second element isolation unit 20 at the intersection point XP do not cause any problems, the vertical light-shielding portion 13V and the second element isolation unit 20 can be connected at the intersection point XP, as Figure 27A shown. The vertical light-shielding portion 13V and the second element isolation unit 20 can be connected in any region other than the pixel boundary position. In addition, for example, the second element isolation unit 20 can be connected in a cross shape.

[0349] Or, as Figure 27BAs shown, at the intersection XP, not only can the separation between the vertical light-shielding portion 13V and the second element separation unit 20 be achieved, but also the separation between the second element separation units 20 can be achieved. In this way, the trench depths of the vertical light-shielding portion 13V and the second element separation unit 20 can be further satisfactorily controlled.

[0350] (Modification example: inner layer portion and void)

[0351] Figures 28A to 28D It is a cross-sectional view showing another modification example of the fourth embodiment.

[0352] As Figure 28A shown, the inner layer portion 13A can be provided in the horizontal light-shielding portion 13H and not provided in the vertical light-shielding portion 13V. In this case, the vertical light-shielding portion 13V is filled with the outer layer portion 13B, and the vertical light-shielding portion 13V does not have light-shielding properties. However, since the outer layer portion 13B is made of a material having a refractive index lower than that of the semiconductor substrate 11, the vertical light-shielding portion 13V can reflect incident light. Therefore, the photoelectric conversion efficiency Qe can be improved. In addition, since the light-shielding characteristics of the horizontal light-shielding portion 13H are maintained, noise of the transfer transistor TRZ can be suppressed.

[0353] As Figure 28B shown, the vertical light-shielding portion 13V can protrude and bite into the inner layer portion 13A of the horizontal light-shielding portion 13H. In this case, effects similar to those of the modification example in Figure 28A can also be obtained.

[0354] As Figure 28C shown, the inner layer portion 13A can also be formed at the front end portion of the first element separation unit 13. In this case, the light-shielding property of the front end portion of the first element separation unit 13 is improved, and noise at the transfer transistor TRZ can be further suppressed.

[0355] As Figure 28D shown, the void B can be included in the inner layer portion 13A of the horizontal light-shielding portion 13H. If a void is left to some extent, there is no problem as long as the light-shielding performance of the horizontal light-shielding portion 13H is obtained. In addition, if the space 13Z is filled with a metal material, stress may be applied to the semiconductor substrate 11. Therefore, by forming the void B in the inner layer portion 13A, the stress applied to the semiconductor substrate 11 can be alleviated and warping of the semiconductor substrate 11 can be suppressed. The void B can be provided in any of the horizontal light-shielding portions 12H and 13H in the foregoing embodiments and modification examples.

[0356] The fourth embodiment can be applied to the first to third embodiments described above. At this time, the second light-shielding unit 12 can have the same structure as the first element separation unit 13.

[0357] In the above embodiments, the characteristics of different etching rates according to the plane orientation of Si{111} have been described, and through crystal anisotropic etching, a structure such as Figure 12G shown is used to form the space 12Z for forming the first light-shielding unit 12. Here, the Si{111} substrate in the present invention refers to a substrate or wafer made of a silicon single crystal and having a crystal plane represented as {111} in the description of Miller indices. The Si{111} substrate in the present invention includes substrates or wafers with a crystal orientation deviated by several degrees, for example, substrates or wafers with a crystal orientation deviated by several degrees in the

[110] direction closest to the {111} plane. In addition, the Si{111} substrate includes substrates or wafers on which a silicon single crystal is grown on a part or the entire surface by an epitaxial method or the like.

[0358] In addition, the {111} planes in the concept of the present invention are a general term for crystal planes (111) plane, (-111) plane, (1-11) plane, (11-1) plane, (-1-11) plane, (-11-1) plane, (1-1-1) plane, and (-1-1-1) plane that are equivalent to each other in terms of symmetry. Therefore, for example, the description of the Si{111} substrate in the specification of the present disclosure can be alternatively understood as the Si(1-11) substrate. Here, a minus sign is used instead of a bar symbol as the concept of the Miller index in the negative direction.

[0359] In addition, the <110> directions in the description of the present invention are crystal plane directions that are equivalent to each other in terms of symmetry: the

[110] direction,

[101] direction,

[011] direction, [-110] direction, [1-10] direction, [-101] direction, [10-1] direction, [0-11] direction, [01-1] direction, [-1-10] direction, [-10-1] direction, and [0-1-1] direction, and can be alternatively understood as any one of these. However, according to the present disclosure, etching is performed in a direction perpendicular to the element formation plane and in a direction further perpendicular to the direction perpendicular to the element formation plane (i.e., a direction parallel to the element formation plane).

[0360] Figure 29 shows a specific combination of the plane and orientation in which etching in the <110> direction is established in the {111} plane, which is the crystal plane of the Si{111} substrate of the present disclosure.

[0361] As Figure 29 shown, there are 96 (=8×12) combinations between the {111} plane and the <110> direction. However, the <110> direction in the present disclosure is limited to a direction perpendicular to the {111} plane as the element formation plane and a direction parallel to the element formation plane. That is, the combination of the element formation plane of the Si{111} substrate of the present invention and the direction of etching on the Si{111} substrate is selected from Figure 29Any combination shown by the circles in

[0362] In addition, in the above-described first embodiment, as an example, a case where etching is performed in the X-axis direction using a Si{111} substrate and etching is not performed in the Y-axis direction and the Z-axis direction is shown. However, the present invention is not limited thereto, and it is only necessary that the etching progress direction exists in either both the X-axis direction and the Y-axis direction or the X-axis direction or the Y-axis direction.

[0363] As is well known, for example, when performing crystal anisotropic etching using an etching solution on a Si substrate, if an alkaline solution is used for etching, since the Si etching reaction caused by the alkaline solution proceeds through the reaction between the bonding bonds (bonding hands) of Si and OH ions, the more unbonded bonds (unbonded hands) exposed on the front surface side, the easier the etching, and the more back bonds extending on the bulk side, the more difficult the etching.

[0364] In other words, the horizontal light-shielding portion includes one or two or at least less than three Si back bonds in a direction substantially horizontal with respect to the substrate surface, and includes three Si back bonds in a direction substantially perpendicular to the substrate surface. If the back bonds are described taking Fig. 24 as an example, for example, the back bonds represent the bonding bonds extending in the negative direction on the opposite side of the Si unbonded bond with respect to the normal of the Si{111} plane assuming that the side of the Si unbonded bond is the positive side.

[0365] Figure 30 Examples of three back bonds at -19.47° to +19.47° with respect to the {111} plane are shown. Specifically, in the case where the photoelectric conversion unit, the horizontal light-shielding portion, and the charge holding unit are provided in a Si{111} substrate, the horizontal light-shielding portion includes a first surface along the first crystal plane of the Si{111} substrate and a second surface along the second crystal plane of the Si{111} substrate. The first surface perpendicularly intersects the first direction and is represented by the plane index {111}, and the second surface is inclined with respect to the first direction and is represented by the plane index {111}. In addition, the electronic equipment according to an embodiment of the present disclosure includes the above-described imaging device.

[0366] For example, the Si{111} substrate according to each of the foregoing embodiments includes a substrate processed such that the substrate surface has an off-angle with respect to the <112> direction. For example, as Figure 31 shown. Even when the substrate has an off-angle (the off-angle is 19.47° or less), the following relationship is maintained: the etching rate in the <110> direction (i.e., the direction including 1 Si back bond) is sufficiently high with respect to the etching rate in the <111> direction (i.e., the direction including 3 Si back bonds). Since the number of steps increases and the density of micro-steps increases as the off-angle increases, the off-angle is preferably equal to or less than 5°. Note that although inFigure 31 In the example, the case where the substrate surface has an off-angle in the <112> direction is illustrated. However, the substrate surface may have an off-angle in the <110> direction, and the off-direction does not matter. In addition, X-ray diffraction method, electron beam diffraction method, electron backscatter diffraction method, etc. can be used to analyze the Si plane orientation. Since the number of Si back bonds is determined by the crystal structure of Si, the number of back bonds can also be analyzed by analyzing the Si plane orientation.

[0367] <Examples of applications of electronic equipment>

[0368] Figure 32 FIG. is a block diagram showing a configuration example of a camera 2000 as an electronic device to which the present technology is applied.

[0369] The camera 2000 includes an optical unit 2001 having a lens group, etc., an imaging device (imaging equipment) 2002 to which the above-described imaging device 101, etc. (hereinafter referred to as imaging device 101, etc.) is applied, and a digital signal processor (DSP) circuit 2003 as a camera signal processing circuit. In addition, the camera 2000 further includes a frame memory 2004, a display unit 2005, a recording unit 2006, an operation unit 2007, and a power supply unit 2008. The DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, the operation unit 2007, and the power supply unit 2008 are interconnected via a bus 2009.

[0370] The optical unit 2001 captures incident light (image light) from an object and forms an image on the imaging surface of the imaging device 2002. The imaging device 2002 converts the amount of incident light formed on the imaging surface by the optical unit 2001 into an electric signal in units of pixels and outputs the electric signal as a pixel signal.

[0371] The display unit 2005 is constituted by, for example, a liquid crystal panel or a panel-type display device such as an organic EL panel, etc., and displays a video or a still image captured by the imaging device 2002. The recording unit 2006 records the video or the still image captured by the imaging device 2002 in a recording medium such as a hard disk or a semiconductor memory.

[0372] The operation unit 2007 issues operation commands for various functions of the camera 2000 in response to user operations. The power supply unit 2008 appropriately supplies various power sources serving as operation power sources for the DSP circuit 2003, the frame memory 2004, the display unit 2005, the recording unit 2006, and the operation unit 2007 to these supply targets.

[0373] As described above, by using the above-described imaging device 101, etc. as the imaging device 2002, it is possible to expect to obtain a satisfactory image.

[0374] <Application Example of a Moving Body>

[0375] The technology according to the present disclosure (this technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented by a device installed in any moving body such as an automobile, an electric vehicle, a hybrid vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, or a robot.

[0376] Figure 33 It is a block diagram showing a schematic configuration example of a vehicle control system as an example of a moving body control system to which the technology according to the present disclosure can be applied.

[0377] The vehicle control system 12000 includes a plurality of electronic control units interconnected via a communication network 12001. In Figure 33 the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside vehicle information detection unit 12030, an inside vehicle information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, an audio-visual output unit 12052, and a vehicle-mounted network interface (I / F) 12053 are shown.

[0378] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 serves as a control device for a driving force generation device that generates a driving force of the vehicle, such as an internal combustion engine or a drive motor, a driving force transmission mechanism that transmits the driving force to the wheels, a steering mechanism that adjusts the steering angle of the vehicle, and a braking device that generates a braking force of the vehicle.

[0379] The body system control unit 12020 controls the operation of various devices installed in the body according to various programs. For example, the body system control unit 12020 serves as a control device for a keyless entry system, a smart key system, an electric window device, or various lights such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, radio waves or signals from a portable device that replaces the key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the vehicle door lock device, electric window device, lights, etc.

[0380] The vehicle exterior information detection unit 12030 detects information on the exterior of the vehicle equipped with the vehicle control system 12000. For example, the imaging unit 12031 is connected to the vehicle exterior information detection unit 12030. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to capture an image of the vehicle exterior and receives the captured image. The vehicle exterior information detection unit 12030 can perform object detection processing or distance detection processing on pedestrians, vehicles, obstacles, signs, or text on the road surface based on the received image.

[0381] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of received light. The imaging unit 12031 can also output the electrical signal as an image and ranging information. Additionally, the light received by the imaging unit 12031 can be visible light, or can be invisible light such as infrared light.

[0382] The vehicle interior information detection unit 12040 detects information related to the interior of the vehicle. For example, the driver state detection unit 12041 that detects the driver state is connected to the vehicle interior information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the vehicle interior information detection unit 12040 can calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or can determine whether the driver is dozing off.

[0383] The microcomputer 12051 can calculate control target values for the driving force generation device, steering mechanism, or braking device based on the information on the interior and exterior of the vehicle obtained through the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to implement advanced driver assistance system (ADAS) functions, which include collision avoidance of the vehicle, impact mitigation, following driving based on vehicle distance, cruise control, vehicle collision warning, lane departure warning, etc.

[0384] In addition, based on the information on the vicinity of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, the microcomputer 12051 can perform coordinated control for the purpose of autonomous driving such as autonomous driving without relying on the driver's operation by controlling the driving force generation device, steering mechanism, braking device, etc.

[0385] In addition, the microcomputer 12051 can output a control command to the vehicle body system control unit 12020 based on the external vehicle information obtained by the external vehicle information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control for preventing glare by controlling the headlamp to switch from high beam to low beam, for example, according to the position of the vehicle ahead or the oncoming vehicle detected by the external vehicle information detection unit 12030.

[0386] The audio-visual output unit 12052 sends an output signal of at least one of sound and image to an output device capable of notifying information visually or auditorily to the passengers of the vehicle or the outside of the vehicle. In Figure 33 the example shown, the audio speaker 12061, the display unit 12062, and the instrument panel 12063 are shown as output devices. The display unit 12062 can include, for example, at least one of an in-vehicle display and a head-up display.

[0387] Figure 34 is a diagram showing an example of the installation position of the imaging unit 12031.

[0388] In Figure 34 it, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0389] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at the front nose, the rearview mirror, the rear bumper, the rear door, and the upper part of the windshield on the inner side of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle mainly obtain images of the front part of the vehicle 12100. The imaging units 12102 and 12103 provided at the rearview mirror mainly obtain images of the side of the vehicle 12100. The imaging unit 12104 provided in the rear bumper or the rear door mainly acquires images of the rear side of the vehicle 12100. The imaging unit 12105 included in the upper part of the windshield inside the vehicle is mainly used to detect a vehicle ahead, a pedestrian, an obstacle, a traffic signal, a traffic sign, a lane, etc.

[0390] Figure 34 Shows an example of the imaging range of the imaging units 12101 to 12104. The imaging range 12111 represents the imaging range of the imaging unit 12101 provided at the front nose, the imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging units 12102 and 12103 provided on the rearview mirror, and the imaging range 12114 represents the imaging range of the imaging unit 12104 provided at the rear bumper or the rear door. For example, a bird's-eye view image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0391] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements or may be an imaging element having pixels for phase difference detection.

[0392] For example, based on the distance information obtained from the imaging units 12101 to 12104, by obtaining the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the temporal change of the distance (relative speed with respect to the vehicle 12100), the microcomputer 12051 extracts a three-dimensional object that is particularly the closest on the driving route of the vehicle 12100 and travels in substantially the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or more) as the preceding vehicle. In addition, the microcomputer 12051 can set a pre-guaranteed inter-vehicle distance from the preceding vehicle and perform automatic braking control (including follow-stop control) or automatic acceleration control (including follow-start control). In this way, cooperative control such as autonomous driving aimed at enabling the vehicle to drive autonomously without relying on the driver's operation can be executed.

[0393] For example, the microcomputer 12051 may classify the three-dimensional object data regarding the three-dimensional object based on the distance information obtained from the imaging units 12101 to 12104 and extract it as a two-wheeled vehicle, a normal vehicle, a large vehicle, a pedestrian, and other three-dimensional objects such as utility poles, etc., and use the three-dimensional object data for automatically avoiding obstacles. For example, the microcomputer 12051 classifies the obstacles near the vehicle 12100 into obstacles that can be visually recognized by the driver of the vehicle 12100 and obstacles that are difficult to visually recognize. Then, the microcomputer 12051 can determine a collision risk indicating the degree of collision risk with each obstacle, and when the collision risk value is equal to or greater than the set value and there is a possibility of collision, it can output a warning to the driver through the audio speaker 12061 or the display unit 12062, and perform forced deceleration or avoidance steering through the driving system control unit 12010 to execute driving assistance for avoiding collision.

[0394] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the images captured by the imaging units 12101 to 12104. For example, such identification of a pedestrian is performed by a process of extracting specific points in the images captured by the imaging units 12101 to 12104 that are infrared cameras and a process of performing a pattern matching process on a series of specific points representing the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that there is a pedestrian in the captured images of the imaging units 12101 to 12104 and identifies the pedestrian, the audio-visual output unit 12052 controls the display unit 12062 such that a square contour line for emphasis is superimposed on the identified pedestrian and displayed. In addition, the audio-visual output unit 12052 may control the display unit 12062 such that an icon showing the pedestrian is displayed at a desired position.

[0395] Examples of vehicle control systems to which the technology according to the present disclosure can be applied have been described above. The technology of the present disclosure can be applied to the imaging unit 12031 and the like in the above configuration. Specifically, Figure 1 imaging devices 101 such as those shown etc. can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, excellent operation of the vehicle control system can be expected.

[0396] (Other modification examples)

[0397] Although the present disclosure has been described by way of example with some of the embodiments and modification examples so far, the present disclosure is not limited to the above embodiments and the like, and various modifications can be made. For example, although the imaging device 101 including the columnar etch stop portion 17 has been described in the first embodiment above, the shape of the etch stop portion is not limited thereto. For example, a wall-shaped etch stop portion extending along the Y-axis may be provided. In this case, the opening portion 12H1 has a substantially hexagonal shape. In the case where it is desired to sufficiently ensure the area of the region for forming the vertical gate electrode 52V, as in the imaging device 106, an etch stop portion extending in the Y-axis direction may be provided in parallel with the vertical light-shielding portion 12V of the light-shielding portion 12. On the other hand, in order to further reduce the area of the 12H1 region, similar to the imaging device 101 according to the first embodiment, it is only necessary to provide an etch stop portion 17 having a shape with a small occupied area in the XY plane.

[0398] In addition, in the imaging device 101 according to the foregoing first to fourth embodiments, a solid-phase diffusion layer 19 including a pn junction may be formed around the first light-shielding unit 13 and the second element isolation unit 20. This results in an increase in the PN junction surface and can increase the amount Qs of the saturation signal.

[0399] In addition, although Figure 16 the imaging device 101 having a three-dimensional structure in which three substrates are stacked is shown as an example, the type and number of stacked substrates are not limited thereto.

[0400] Note that the present technology can also adopt the following configuration.

[0401] (1) An imaging device, the imaging device comprising: a silicon {111} substrate; a photoelectric conversion unit that is provided on the semiconductor substrate and generates charges according to the amount of received light by photoelectric conversion; a charge holding unit that is provided on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holds the charges transmitted from the photoelectric conversion unit; a charge transfer unit that transfers the charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode that transfers the charges generated by the photoelectric conversion unit to the charge transfer unit and is provided in the depth direction of the semiconductor substrate; a first light control member that is provided on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode, wherein the first light control member includes a first light control portion and a second light control portion that extend in mutually intersecting directions in an integrated structure, the first light control portion is provided at a position overlapping the vertical electrode when the semiconductor substrate is viewed from the normal direction of the first surface, and the second light control portion includes an end portion connected to the first light control portion and another end portion provided along the depth direction of the semiconductor substrate.

[0402] (2) The imaging device according to (1), wherein the first light control portion is provided along the direction of the first surface, and the other end portion of the second light control portion is provided along the second surface.

[0403] (3) The imaging device according to (1) or (2), wherein the semiconductor substrate includes a silicon crystal plane represented by the plane index {111}, and the first light control portion includes a first light control surface and a second light control surface, the first light control surface is provided in a first direction different from the depth direction of the semiconductor substrate and along a first crystal plane represented by the plane index {111}, and the second light control surface is provided in a second direction different from the depth direction of the semiconductor substrate and along a second crystal plane represented by the plane index {111}.

[0404] (4) The imaging device according to any one of (1) to (3), wherein the photoelectric conversion unit, the charge holding unit, the charge transfer unit, and the vertical electrode are provided for each pixel, and when the semiconductor substrate is viewed from the normal direction of the first surface or the second surface, the first light control portion is provided across a plurality of pixels and overlaps with a plurality of the vertical electrodes corresponding to the plurality of pixels.

[0405] (5) The imaging device according to any one of (1) to (4), wherein at least a part of the first light control member has a property of absorbing or reflecting incident light.

[0406] (6) The imaging device according to (5), wherein the first light control member includes at least one of an insulating material, a metal, polycrystalline silicon, a metal oxide, a carbon-containing material, and an electrochromic material.

[0407] (7) The imaging device according to any one of (1) to (6), further comprising: a second light control member, the second light control member being provided on a side closer to the first surface of the semiconductor substrate than the first light control member and disposed around the charge holding unit.

[0408] (8) The imaging device according to (7), wherein the second light control member includes a third light control portion provided in the direction of the first surface and a fourth light control portion connecting the third light control portion and provided in a direction intersecting the third light control portion.

[0409] (9) The imaging device according to (8), wherein one end portion of the fourth light control portion is connected to the third light control portion, and the other end portion of the fourth light control portion is provided along the first surface.

[0410] (10) The imaging device according to (8), wherein the fourth light control portion penetrates the third light control portion and extends along the depth direction of the semiconductor substrate.

[0411] (11) The imaging device according to any one of (1) to (10), further comprising: an element isolation unit, the element isolation unit extending in the depth direction of the semiconductor substrate along the pixel boundaries of the semiconductor substrate.

[0412] (12) The imaging device according to (11), wherein the element isolation unit includes a fifth light control portion provided along the pixel boundaries of the semiconductor substrate in the depth direction of the semiconductor substrate.

[0413] (13) The imaging device according to (12), wherein the element separation unit includes a sixth light control unit, and the sixth light control unit is connected to the fifth light control unit and is disposed in a direction intersecting the fifth light control unit.

[0414] (14) The imaging device according to (13), wherein one end of the sixth light control unit is connected to the fifth light control unit, and the other end of the sixth light control unit is disposed along the second surface.

[0415] (15) The imaging device according to (13), wherein the sixth light control unit penetrates the fifth light control unit and extends in the depth direction of the semiconductor substrate.

[0416] (16) The imaging device according to any one of (1) to (15), wherein the photoelectric conversion unit has a concentration gradient, and in a first region on the second surface side of the first light control unit, the concentration of impurities varies according to position.

[0417] (17) The imaging device according to (16), wherein the photoelectric conversion unit has a concentration gradient, and in a second region on the first surface side of the first light control unit, the concentration of impurities varies according to position.

[0418] (18) The imaging device according to (17), wherein at least one of the first region and the second region has a concentration gradient in the horizontal direction of the semiconductor substrate.

[0419] (19) The imaging device according to (17) or (18), wherein at least one of the first region and the second region has a concentration gradient in the depth direction of the semiconductor substrate.

[0420] (20)A method of manufacturing an imaging device, comprising: forming a photoelectric conversion unit on a semiconductor substrate, the photoelectric conversion unit generating charges according to the amount of received light through photoelectric conversion; forming a charge holding unit, the charge holding unit being disposed on a side closer to a first surface of the semiconductor substrate than the photoelectric conversion unit and holding the charges transferred from the photoelectric conversion unit; forming a charge transfer unit, the charge transfer unit transferring the charges from the photoelectric conversion unit to the charge holding unit; forming a vertical electrode, the vertical electrode transferring the charges generated by the photoelectric conversion unit in a depth direction of the semiconductor substrate to the charge transfer unit; and forming a first light control member, the first light control member being disposed on a side closer to a second surface opposite to the first surface of the semiconductor substrate than the vertical electrode and including a first light control portion and a second light control portion extending in directions intersecting with each other in an integral structure; wherein, the first light control portion is disposed at a position overlapping with the vertical electrode when looking down on the semiconductor substrate from a normal direction of the first surface, one end portion of the second light control portion is connected to the first light control portion, and the other end portion of the second light control portion is disposed in a depth direction of the semiconductor substrate from the one end portion.

[0421] (21)A method of manufacturing an imaging device, comprising: forming a photoelectric conversion unit on a semiconductor substrate, the photoelectric conversion unit generating charges according to the amount of received light through photoelectric conversion; forming a cavity portion or a filling portion in a part of the photoelectric conversion unit, the filling portion being obtained by filling the cavity portion with a predetermined material; forming a charge holding unit, the charge holding unit being disposed on a side closer to a first surface of the semiconductor substrate than the cavity portion or the filling portion and holding the charges transferred from the photoelectric conversion unit; forming a charge transfer unit, the charge transfer unit transferring the charges from the photoelectric conversion unit to the charge holding unit; forming a trench, the trench reaching the cavity portion or the filling portion from a second surface side opposite to the first surface of the semiconductor substrate; using the cavity portion or the filling portion and the trench, forming a first light control portion at a position where the cavity portion or the filling portion is formed, and forming a second light control portion at a position where the trench is formed.

[0422] (22) Electronic equipment, the electronic equipment comprising: a camera device, wherein the camera device includes a semiconductor substrate; a photoelectric conversion unit disposed on the semiconductor substrate and generating electric charges according to the amount of received light through photoelectric conversion; a charge holding unit disposed on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holding the electric charges transferred from the photoelectric conversion unit; a charge transfer unit transferring the electric charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode transferring the electric charges generated by the photoelectric conversion unit to the charge transfer unit and disposed in the depth direction of the semiconductor substrate; and a first light control member disposed on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode, the first light control member including a first light control portion and a second light control portion extending in mutually intersecting directions in an integrated structure, the first light control portion being disposed at a position overlapping with the vertical electrode when looking down on the semiconductor substrate from the normal direction of the first surface, and the second light control portion including one end connected to the first light control portion and the other end disposed along the depth direction of the semiconductor substrate.

[0423] Aspects of the present disclosure are not limited to the above-described various embodiments, and further include various modification examples that can be implemented by those skilled in the art, and the advantages of the present disclosure are not limited to the above content. In other words, various additions, modifications, and partial deletions can be made without departing from the conceptual ideas and gist of the present disclosure derived from the content defined in the claims and their equivalents.

[0424] List of reference numerals

[0425] 11 Semiconductor substrate

[0426] 12 Second light-shielding unit

[0427] 12A Inner layer portion

[0428] 12B Outer layer portion

[0429] 12H Horizontal light-shielding portion

[0430] 12V Vertical light-shielding portion

[0431] 13 First light-shielding unit (first element isolation unit)

[0432] 13A Inner layer portion

[0433] 13B Outer layer portion

[0434] 13H Horizontal light-shielding portion

[0435] 13V Vertical Light-Shielding Portion

[0436] 14 P-Type Semiconductor Region

[0437] 15 Fixed Charge Film

[0438] 16 P-Type Semiconductor Region

[0439] 17 Etching Stop Portion

[0440] 18 Insulating Layer

[0441] 20 Second Element Separation Unit

[0442] 22,23 Remaining Region

[0443] 51 Photoelectric Conversion Unit

[0444] TRX, TRY, TRZ, TRG Transmission Transistor

[0445] 52H Horizontal Terminal Unit

[0446] 52V Vertical Gate Electrode

[0447] 54 Charge Holding Unit (MEM)

[0448] FD Charge Voltage Conversion Unit (FD)

[0449] ORG Discharge Transistor

[0450] 58RST Reset Transistor

[0451] AMP Amplification Transistor

[0452] SEL Selection Transistor

[0453] 101 Imaging Device

[0454] 111 Pixel Array Unit

[0455] 112 Vertical Driving Unit

[0456] 113 Ramp Module

[0457] 114 Column Signal Processing Unit

[0458] 115 Clock Module

[0459] 116 Data Storage Unit

[0460] 117 Horizontal Driving Unit

[0461] 118 System Control Unit

[0462] 119 Signal Processing Unit

[0463] 121 Sensor pixel

[0464] 122 Pixel drive line

[0465] 123 Vertical signal line.

Claims

1. An imaging device, the imaging device comprising: a semiconductor substrate; a photoelectric conversion unit disposed on the semiconductor substrate and generating charges according to the amount of received light through photoelectric conversion; a charge holding unit disposed on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holding the charges transferred from the photoelectric conversion unit; a charge transfer unit transferring the charges from the photoelectric conversion unit to the charge holding unit; a vertical electrode transferring the charges generated by the photoelectric conversion unit to the charge transfer unit and disposed in the depth direction of the semiconductor substrate; a first light control member disposed within the photoelectric conversion unit and on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode; and a second light control member disposed on a side closer to the first surface of the semiconductor substrate than the first light control member and disposed around the charge holding unit, wherein, the first light control member includes a first light control portion and a second light control portion extending in mutually intersecting directions in an integral structure, the first light control portion is disposed at a position overlapping the vertical electrode when looking down at the semiconductor substrate from the normal direction of the first surface, and the second light control portion includes one end connected to the first light control portion and the other end disposed along the depth direction of the semiconductor substrate.

2. The imaging device according to claim 1, wherein, the first light control portion is disposed along the direction of the first surface, and the other end of the second light control portion is disposed along the second surface.

3. The imaging device according to claim 1, wherein, the semiconductor substrate includes a silicon crystal plane represented by the plane index {111}, and the first light control portion includes a first light control surface and a second light control surface, the first light control surface is disposed in a first direction different from the depth direction of the semiconductor substrate and along a first crystal plane represented by the plane index {111}, and the second light control surface is disposed in a second direction different from the depth direction of the semiconductor substrate and along a second crystal plane represented by the plane index {111}.

4. The imaging device according to claim 1, wherein, the photoelectric conversion unit, the charge holding unit, the charge transfer unit, and the vertical electrode are provided for each pixel, and when looking down at the semiconductor substrate from the normal direction of the first surface or the second surface, the first light control portion is disposed across a plurality of pixel regions to overlap with a plurality of the vertical electrodes corresponding to the plurality of pixels.

5. The imaging device according to claim 1, wherein, at least a part of the first light control member has the property of absorbing or reflecting incident light.

6. The imaging device according to claim 5, wherein, The first light control member includes at least one of an insulating material, a metal, polysilicon, a metal oxide, a carbon-containing material, and an electrochromic material.

7. The imaging device according to claim 1, wherein, the second light control member includes a third light control portion disposed along the direction of the first surface and a fourth light control portion connected to the third light control portion and disposed in a direction intersecting the third light control portion.

8. The imaging device according to claim 7, wherein, one end portion of the fourth light control portion is connected to the third light control portion, and the other end portion of the fourth light control portion is disposed along the first surface.

9. The imaging device according to claim 7, wherein, the fourth light control portion penetrates the third light control portion and extends along the depth direction of the semiconductor substrate.

10. The imaging device according to any one of claims 1 to 6, further comprising an element isolation unit that extends along a pixel boundary of the semiconductor substrate in the depth direction of the semiconductor substrate.

11. The imaging device according to claim 10, wherein, the element isolation unit includes a fifth light control portion disposed along the pixel boundary of the semiconductor substrate in the depth direction of the semiconductor substrate.

12. The imaging device according to claim 11, wherein, the element isolation unit includes a sixth light control portion connected to the fifth light control portion and disposed in a direction intersecting the fifth light control portion.

13. The imaging device according to claim 12, wherein, one end portion of the sixth light control portion is connected to the fifth light control portion, and the other end portion of the sixth light control portion is disposed along the second surface.

14. The imaging device according to claim 12, wherein, the sixth light control portion penetrates the fifth light control portion and extends along the depth direction of the semiconductor substrate.

15. The imaging device according to any one of claims 1 to 6, wherein, the photoelectric conversion unit has a concentration gradient, and in a first region on the second surface side of the first light control portion, the concentration of impurities in the concentration gradient varies according to position.

16. The imaging device according to claim 15, wherein, the photoelectric conversion unit has a concentration gradient, and in a second region on the first surface side of the first light control portion, the concentration of impurities in the concentration gradient varies according to position.

17. The imaging device according to claim 16, wherein, at least one of the first region and the second region has a concentration gradient in the horizontal direction of the semiconductor substrate.

18. The imaging device according to claim 16, wherein, at least one of the first region and the second region has a concentration gradient in the depth direction of the semiconductor substrate.

19. A method for manufacturing an imaging device, comprising: forming a photoelectric conversion unit on a semiconductor substrate, the photoelectric conversion unit generating charges according to the amount of received light through photoelectric conversion; Form a charge holding unit, which is disposed on a side closer to the first surface of the semiconductor substrate than the photoelectric conversion unit and holds the charge transferred from the photoelectric conversion unit; Form a charge transfer unit, which transfers the charge from the photoelectric conversion unit to the charge holding unit; Form a vertical electrode, which transfers the charge generated by the photoelectric conversion unit in the depth direction of the semiconductor substrate to the charge transfer unit; And Form a first light control member, which is disposed within the photoelectric conversion unit, and is disposed on a side closer to the second surface opposite to the first surface of the semiconductor substrate than the vertical electrode and includes a first light control portion and a second light control portion extending in a direction intersecting each other in an integrated structure; and Form a second light control member, which is disposed on a side closer to the first surface of the semiconductor substrate than the first light control member and is disposed around the charge holding unit, Wherein, The first light control portion is disposed at a position overlapping the vertical electrode when looking down at the semiconductor substrate from the normal direction of the first surface, one end portion of the second light control portion is connected to the first light control portion, and the other end portion of the second light control portion is disposed along the depth direction of the semiconductor substrate from the one end portion.

20. A method for manufacturing an imaging device, the method Comprises: Form a photoelectric conversion unit on a semiconductor substrate, which generates charge according to the amount of received light through photoelectric conversion; Form a cavity portion or a filling portion in a part of the photoelectric conversion unit, and the filling portion is obtained by filling a predetermined material into the cavity portion; Form a charge holding unit, which is disposed on a side closer to the first surface of the semiconductor substrate than the cavity portion or the filling portion and holds the charge transferred from the photoelectric conversion unit; Form a charge transfer unit, which transfers the charge from the photoelectric conversion unit to the charge holding unit; Form a trench, which reaches the cavity portion or the filling portion from the second surface side of the semiconductor substrate opposite to the first surface; And Using the cavity portion or the filling portion and the trench, form a first light control portion at the position where the cavity portion or the filling portion is formed, and form a second light control portion at the position where the trench is formed, wherein the first light control portion and the second light control portion are disposed within the photoelectric conversion unit; Form a second light control member, which is disposed on a side closer to the first surface of the semiconductor substrate than the first light control portion and the second light control portion and is disposed around the charge holding unit.

21. An electronic device, which includes the imaging device according to any one of claims 1 to 18.

Citation Information

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