Display substrate, packaging substrate, and display device

Abstract

Disclosed are a display substrate, a packaging substrate, and a display device, relating to the field of display technologies. The display substrate includes: a driving backplane, and a light-emitting device layer located on one side of the driving backplane. Among them, the light-emitting device layer includes: a plurality of light-emitting units; a plurality of transparent electrodes located on the surface of the plurality of light-emitting units away from the driving backplane and electrically connected to the plurality of light-emitting units; a first bonding pattern located at least between the plurality of transparent electrodes; and the first bonding pattern is electrically connected to at least one transparent electrode. In the display substrate provided by the present disclosure, the electrical connection of the plurality of light-emitting units is realized through the connection between the first bonding pattern and the plurality of transparent electrodes. Compared with the related art in which the electrical connection between the plurality of light-emitting units is realized through a transparent material, the resistance is reduced, the voltage drop is reduced, the light-emitting efficiency of the light-emitting units is improved, the power consumption is reduced, and the display performance of the display substrate is improved, etc.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display substrate, a packaging substrate, and a display device. Background Art

[0002] A light emitting diode (LED) is a semiconductor component capable of converting electrical energy into light within a specific wavelength range. The principle of light emission of an LED is the recombination of electrons and holes to emit light.

[0003] LEDs have the advantages of low power consumption, small size, high brightness, easy matching with integrated circuits, and high reliability, and are currently widely used as light sources. With the maturity of LED technology, LED display devices or Micro-LED (micro light emitting diode) display devices that directly use LEDs as sub-pixels have gradually emerged.

[0004] However, the existing LED display devices have relatively high power consumption. Summary of the Invention

[0005] The purpose of the present disclosure is to provide a display substrate, a packaging substrate, and a display device for reducing the power consumption of LED display devices.

[0006] To achieve the above purpose, the present disclosure provides the following technical solutions:

[0007] On the one hand, some embodiments of the present disclosure provide a display substrate. The display substrate includes: a driving backplane, and a light emitting device layer located on one side of the driving backplane. Wherein, the light emitting device layer includes: a plurality of light emitting units; a plurality of transparent electrodes located on the surfaces of the plurality of light emitting units away from the driving backplane and electrically connected to the plurality of light emitting units; a first bonding pattern located at least between the plurality of transparent electrodes; and the first bonding pattern is electrically connected to at least one transparent electrode.

[0008] In some embodiments, the first bonding pattern is also located around the plurality of transparent electrodes.

[0009] In some embodiments, the first bonding pattern includes a plurality of meshes, at least one of the transparent electrodes is disposed within one mesh, and the transparent electrode located within the mesh is electrically connected to the pore wall of the mesh.

[0010] In some embodiments, the first bonding pattern includes a first pattern layer and a second pattern layer stacked thereon, and the second pattern layer is located on the side of the first pattern layer away from the driving backplane.

[0011] In some embodiments, the material of the first pattern layer includes a first metal material, and the material of the second pattern layer includes a second metal material; the melting point of the first metal material is higher than that of the second metal material.

[0012] In some embodiments, the size of the second pattern layer is larger than that of the first pattern layer.

[0013] In some embodiments, the light-emitting unit includes: at least two stacked vertical light-emitting diodes; and a connection layer located between the two vertical light-emitting diodes; wherein, the vertical light-emitting diode includes: an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer; in two adjacent stacked vertical light-emitting diodes, the N-type semiconductor layer of one vertical light-emitting diode and the P-type semiconductor layer of the other vertical light-emitting diode are electrically connected through the connection layer.

[0014] In some embodiments, the display substrate further includes: a reflective electrode layer located between the vertical light-emitting diodes and the driving backplane.

[0015] In some embodiments, the display substrate further includes: an insulating structure located between the plurality of light-emitting units and between the first bonding pattern and the driving backplane.

[0016] On the other hand, an embodiment of the present disclosure provides a packaging substrate. The packaging substrate includes: a substrate; an electrode connection layer located on one side of the substrate; and a second bonding pattern located on the side of the electrode connection layer away from the substrate and exposing at least a part of the electrode connection layer.

[0017] In some embodiments, the second bonding pattern includes a third pattern layer and a fourth pattern layer, and the third pattern layer is located on the side of the fourth pattern layer away from the substrate.

[0018] In some embodiments, the material of the third pattern layer includes a third metal material, and the material of the fourth pattern layer includes a fourth metal material; the melting point of the fourth metal material is higher than that of the third metal material.

[0019] In some embodiments, the size of the third pattern layer is larger than that of the fourth pattern layer.

[0020] In some embodiments, the packaging substrate further includes: a plurality of lenses located between the substrate and the electrode connection layer; wherein, the second bonding pattern is at least located between the plurality of lenses.

[0021] In some embodiments, the substrate includes: a substrate; a color filter layer located on one side of the substrate; and a packaging layer located on the side of the color filter layer away from the substrate; wherein the packaging layer is closer to the electrode connection layer than the color filter layer.

[0022] In some embodiments, the color filter layer includes: a plurality of color filter portions, and a light-shielding pattern located between adjacent color filter portions; at least a part of the orthographic projection of the second bonding pattern on the substrate overlaps with the orthographic projection of the light-shielding pattern on the substrate.

[0023] In some embodiments, the color filter portion includes: a color film layer and a quantum dot layer arranged in a stacked manner; wherein the color film layer is closer to the substrate than the quantum dot layer.

[0024] On the other hand, an embodiment of the present disclosure provides a display device, including: a display substrate as described in any one of the above embodiments, and a packaging substrate as described in any one of the above embodiments. Wherein, the first bonding pattern in the display substrate is bonded to the second bonding pattern in the packaging substrate, so that a plurality of transparent electrodes in the display substrate are in contact with the electrode connection layer in the packaging substrate.

[0025] The display substrate, packaging substrate, and display device provided by the present disclosure have the following beneficial effects:

[0026] For the display substrate provided by the present disclosure, through the connection of the first bonding pattern and a plurality of transparent electrodes, the electrical connection of a plurality of light-emitting units is finally realized; compared with the related art where the electrical connection between a plurality of light-emitting units is achieved through a whole layer of transparent material, the resistance is reduced, the voltage drop is reduced, the light-emitting efficiency of the light-emitting units is improved, the power consumption is reduced, and the display performance of the display substrate is improved.

[0027] For the packaging substrate provided by the present disclosure, by providing a plurality of lenses, the propagation direction of the light incident on the packaging substrate can be changed, so that more light converges towards the color filter portion, increasing the light incident on the quantum dot layer, thereby improving the excitation efficiency of the quantum dot material.

[0028] The beneficial effects that the display device provided by the present disclosure can achieve are the same as those of the display substrate and the packaging substrate provided by the above technical solutions, and will not be elaborated here. Description of the Drawings

[0029] To more clearly illustrate the technical solutions in the present disclosure, the following will briefly introduce the drawings required for use in some embodiments of the present disclosure. Obviously, the drawings in the following description are only the drawings of some embodiments of the present disclosure. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings. In addition, the drawings in the following description can be regarded as schematic diagrams and do not limit the actual dimensions of the products involved in the embodiments of the present disclosure, the actual processes of the methods, the actual timings of the signals, etc.

[0030] Figure 1 Structural diagram of a display substrate according to some embodiments of the present disclosure;

[0031] Figure 2 Structural diagram of a pixel circuit according to some embodiments of the present disclosure;

[0032] Figure 3 Top view of a display substrate according to some embodiments of the present disclosure;

[0033] Figures 4A - 4E Structural diagrams corresponding to the respective steps in the manufacturing method of stacked vertical light-emitting diodes according to some embodiments of the present disclosure;

[0034] Figure 5A Structural diagram of a packaging substrate according to some embodiments of the present disclosure;

[0035] Figure 5B Structural diagram of another packaging substrate according to some embodiments of the present disclosure;

[0036] Figure 6 Structural diagram of another display device according to some embodiments of the present disclosure. Detailed implementation manners

[0037] The following will clearly and completely describe the technical solutions in some embodiments of the present disclosure in conjunction with the drawings. Obviously, the described embodiments are only some embodiments of the present disclosure, rather than all embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by those of ordinary skill in the art fall within the scope of protection of the present disclosure.

[0038] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular form "comprises" and the present participle form "comprising", are to be construed in an open, inclusive sense, i.e., "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example", or "some examples", etc. are intended to indicate that a particular feature, structure, material, or characteristic related to the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the described particular features, structures, materials, or characteristics may be included in any one or more embodiments or examples in any suitable manner.

[0039] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present disclosure, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0040] "A and / or B" includes the following three combinations: only A, only B, and the combination of A and B.

[0041] As used herein and depending on the context, the term "if" is optionally construed to mean "when" or "at the time of" or "in response to determining" or "in response to detecting". Similarly, depending on the context, the phrase "if it is determined that..." or "if [the stated condition or event] is detected" is optionally construed to mean "when it is determined that..." or "in response to determining..." or "at the time of detecting [the stated condition or event]" or "in response to detecting [the stated condition or event]".

[0042] The use of "configured to" herein means open and inclusive language and does not exclude a device that is suitable for or configured to perform additional tasks or steps.

[0043] In addition, the use of "based on" means open and inclusive because a process, step, calculation, or other action "based on" one or more of the stated conditions or values may, in practice, be based on additional conditions or values beyond the stated ones.

[0044] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions is exaggerated for clarity. Thus, variations in the shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Accordingly, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but include shape deviations resulting from, for example, manufacturing. For example, an etched region shown as rectangular will typically have curved features. Thus, the regions shown in the drawings are schematic in nature, and their shapes are not intended to depict the actual shape of the regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0045] As Figure 1 shown, some embodiments of the present disclosure provide a display substrate 100. The display substrate 100 includes a driving backplane 1 and a light-emitting device layer 2.

[0046] In some examples, the driving backplane 1 includes a driving circuit 11, and the driving circuit 11 includes at least one switching transistor, one storage capacitor, and one driving transistor. The driving circuit 11 can generate a driving signal. The light-emitting units in the light-emitting device layer 2 emit light under the driving of the driving signal generated by the driving circuit 11, and the light emitted by the multiple light-emitting units cooperate with each other, so that the display substrate 100 realizes the display function.

[0047] The structure of the driving circuit 11 includes various types and can be selected and set according to actual needs. For example, the structure of the driving circuit 11 can include structures such as "2T1C" or "8T2C". Here, "T" represents a transistor, the number in front of "T" represents the number of transistors, "C" represents a storage capacitor, and the number in front of "C" represents the number of storage capacitors.

[0048] Exemplarily, as Figure 2 shown, Figure 2 is an equivalent circuit diagram of the driving circuit 11.

[0049] For example, the driving circuit 11 includes: a driving transistor DTFT, a switching transistor T1, and a storage capacitor Cst.

[0050] The control electrode of the driving transistor DTFT is coupled to the switching transistor T1; the first electrode of the driving transistor DTFT is coupled to the first electrode of the light-emitting unit; the second electrode of the driving transistor DTFT is coupled to the power signal terminal VDD. Among them, the specific type of the light-emitting unit can be various. Exemplarily, the light-emitting unit includes: a blue-green light-emitting unit or a red-yellow light-emitting unit.

[0051] The first end of the storage capacitor Cst is coupled to the control terminal of the driving transistor DTFT, and the second end of the storage capacitor Cst is coupled to the power signal terminal VDD.

[0052] The control electrode of the switching transistor T1 is coupled to the scanning signal terminal Gate; the first electrode of the switching transistor T1 is coupled to the control terminal of the driving transistor DTFT; the second electrode of the switching transistor T1 is coupled to the data signal terminal Data.

[0053] When the level of the scanning signal transmitted by the scanning signal Gate is an effective level, the switching transistor T1 is turned on under the control of the scanning signal, and the data signal transmitted by the data signal terminal Data is transmitted to the control terminal of the driving transistor DTFT. Here, the driving transistor DTFT can be turned on under the control of the data signal. The voltage signal of the power supply signal terminal VDD is transmitted to the first electrode of the light-emitting unit through the driving transistor DTFT.

[0054] There is no pixel current passing through the switching transistor T1, and there is pixel current passing through the driving transistor DTFT.

[0055] Among them, the size of the driving transistor DTFT is mainly related to its mobility and the magnitude of the pixel current flowing through it. As the pixel current increases, the size of the driving transistor DTFT becomes larger, and the size of the driving circuit also becomes larger.

[0056] In some examples, please continue to refer to Figure 1 , the light-emitting device layer 2 is located on one side of the driving backplane 1.

[0057] The light-emitting device layer 2 includes: a plurality of light-emitting units 21, a plurality of transparent electrodes 22, and a first bonding pattern 23.

[0058] Among them, the plurality of transparent electrodes 22 are located on the surface of the plurality of light-emitting units 21 away from the driving backplane 1 and are electrically connected to the plurality of light-emitting units 22.

[0059] "Transparent" means that light can pass through the transparent structure. Exemplarily, the transmittance of the transparent structure in the present disclosure can reach 80% or more.

[0060] Exemplarily, the material of the plurality of transparent electrodes 22 includes at least one of indium tin oxide or indium zinc oxide.

[0061] The first bonding pattern 23 is at least located between the plurality of transparent electrodes 22; the first bonding pattern 23 is electrically connected to at least one transparent electrode 22.

[0062] The material used for the first bonding pattern 23 can be selected according to actual needs, and the present disclosure does not limit this.

[0063] For example, the first bonding pattern 23 may use nickel (Ni) and tin (Sn) as preparation materials, or silver (Ag) and tin (Sn) as preparation materials, or gold (Au) and tin (Sn) as preparation materials, or a stack of gold (Au) as preparation materials, or a eutectic alloy as preparation materials.

[0064] It should be noted that the material of the transparent electrode is usually indium tin oxide or indium zinc oxide, and the resistance of indium tin oxide or indium zinc oxide is relatively large.

[0065] The display substrate 100 provided by some embodiments of the present disclosure includes a driving backplane 1 and a light-emitting device layer 2; the light-emitting device layer 2 includes a plurality of light-emitting units 21, a plurality of transparent electrodes 22, and a first bonding pattern 23. Among them, the plurality of transparent electrodes 22 are located on the surface of the plurality of light-emitting units 21 away from the driving backplane 1, and the first bonding pattern 23 is at least located between the plurality of transparent electrodes 22; the first bonding pattern 23 is electrically connected to at least one transparent electrode 22. In this embodiment, through the connection between the first bonding pattern 23 and the plurality of transparent electrodes 22, the electrical connection of the plurality of light-emitting units 21 is finally realized; compared with the related art in which the plurality of light-emitting units 21 are electrically connected through a whole layer of transparent material, the resistance is reduced, the voltage drop is reduced, the light-emitting efficiency of the light-emitting unit is improved, the power consumption is reduced, and the display performance of the display substrate is improved.

[0066] In some examples, please refer to Figure 3 , the first bonding pattern 23 is also located around the plurality of transparent electrodes 22. In addition to being located between the plurality of transparent electrodes 22, the first bonding pattern 23 is also located around the plurality of transparent electrodes 22. Thus, not only the electrical connection of the plurality of transparent electrodes 22 is realized, but also, on the basis of realizing a common cathode for the plurality of light-emitting units 21, compared with the related art in which the plurality of light-emitting units 21 are electrically connected through a whole layer of transparent material, the resistance is reduced, the voltage drop is reduced, the light-emitting efficiency of the light-emitting unit is improved, the power consumption is reduced, and the display performance of the display substrate is improved.

[0067] In some examples, please continue to refer to Figure 3 , the first bonding pattern 23 includes a plurality of meshes 230, at least one transparent electrode 22 is disposed in one mesh 230, and the transparent electrode 22 located in the mesh 230 is electrically connected to the pore wall of the mesh 230. That is to say, the first bonding pattern 23 has meshes 230 that expose the plurality of transparent electrodes 22, and the transparent electrode 22 located in the mesh 230 is electrically connected to the pore wall of the mesh 230, thereby realizing a common cathode for the plurality of light-emitting units 21.

[0068] In some embodiments, the first bonding pattern 23 includes an overlapping first pattern layer 231 and a second pattern layer 232, and the second pattern layer 232 is located on a side of the first pattern layer 231 away from the driving backplane 1.

[0069] In some examples, the material 231 of the first pattern layer includes a first metal material, and the material of the second pattern layer 232 includes a second metal material; the melting point of the first metal material is higher than that of the second metal material.

[0070] Exemplarily, the first metal material is gold (Au), and the second metal material is indium (In); alternatively, the first metal material is silver (Ag), and the second metal material is indium (In); alternatively, the first metal material is lead (Pb), and the second metal material is indium (In); alternatively, the first metal material is copper (Cu), and the second metal material is tin (Sn); alternatively, the first metal material is gold (Au), and the second metal material is copper (Cu). The present disclosure does not limit this.

[0071] In some examples, please continue to refer to Figure 3 , the size of the second pattern layer 232 is larger than that of the first pattern layer 231.

[0072] It should be noted that the above "the size of the second pattern layer 232 is larger than that of the first pattern layer 231" means that the area of the orthographic projection of the second pattern layer 232 on the driving backplane 1 is larger than the area of the orthographic projection of the first pattern layer 231 on the driving backplane 1.

[0073] In some embodiments, please continue to refer to Figure 1 , the light-emitting unit 21 includes: at least two stacked vertical light-emitting diodes 210; and a connection layer 220 located between the two vertical light-emitting diodes 210.

[0074] In some examples, as Figure 1 shown, the vertical light-emitting diode 210 includes: an N-type semiconductor layer 211, a quantum well layer 212, and a P-type semiconductor layer 213.

[0075] In some examples, the N-type semiconductor layer 211 includes an N-type doped layer, such as N-GaN; the P-type semiconductor layer 213 includes a P-type doped layer, such as P-GaN.

[0076] In some examples, among two adjacent stacked vertical light-emitting diodes 210, the N-type semiconductor layer of one vertical light-emitting diode 210 and the P-type semiconductor layer of the other vertical light-emitting diode are electrically connected through the connection layer 220.

[0077] Those skilled in the art can understand that in the traditional flip-chip structure of GaN-based LEDs, dry etching is used to fabricate the N-type and P-type electrodes on the same side of the chip surface. The current flows horizontally through the light-emitting region of the LED. Since the lateral injection of electrons starts from one electrode and reaches the other electrode, the current density distribution is uneven during the process, resulting in the current congestion effect and also causing uneven light emission. Moreover, the thermal distribution is also uneven, which easily causes the device to age and fail quickly, thus limiting the size of a single LED chip and the light emission of the device.

[0078] Compared with the traditional flip-chip structure of GaN-based LEDs, in some embodiments of the present disclosure, for the vertical light-emitting diode, the two electrodes of the LED are placed on both sides of the LED thin film, and the current flows through the device perpendicular to the surface of the thin film. This can greatly increase the working current density of a single chip, is more conducive to the expansion of the current, and the recombination of electrons and holes can obtain a more uniform light pattern. Moreover, the vertical light-emitting diode also has advantages such as good heat dissipation, high luminous intensity, low power consumption, and long lifespan.

[0079] In this embodiment, not only can the advantage of the high luminous intensity of the vertical light-emitting diode 210 be utilized to reduce the power consumption of the display substrate 100, but also by stacking at least two vertical light-emitting diodes 210, that is, connecting two vertical light-emitting diodes 210 in series, the breakdown voltage of the light-emitting unit 21 is increased, and the luminous efficiency is further improved.

[0080] In some examples, please refer to Figures 4A - 4E , which are the structure diagrams corresponding to the steps in the manufacturing method of the stacked vertical light-emitting diodes.

[0081] The manufacturing method of the stacked vertical light-emitting diode 210 includes:

[0082] An N-type epitaxial layer, a quantum well epitaxial layer, and a P-type epitaxial layer are sequentially formed on the growth substrate 01 to obtain an epitaxial wafer structure, as Figure 4A shown.

[0083] Among them, the growth substrate 01 can be a silicon substrate, a sapphire substrate, a silicon carbide substrate, etc.

[0084] After forming the N-type epitaxial layer, the quantum well epitaxial layer, and the P-type epitaxial layer, the N-type epitaxial layer, the quantum well epitaxial layer, and the P-type epitaxial layer are patterned to form a plurality of vertical light-emitting diodes, as Figure 4B shown. The vertical light-emitting diode includes: an N-type semiconductor layer 211, a quantum well layer 212, and a P-type semiconductor layer 213. Among them, the N-type semiconductor layer 211 is located in the N-type epitaxial layer, the quantum well layer 212 is located in the quantum well epitaxial layer, and the P-type semiconductor layer 213 is located in the P-type epitaxial layer.

[0085] Bond the patterned epitaxial wafer structure to the surface of the support substrate 02, as Figure 4C shown.

[0086] The support substrate 02 can be a silicon substrate, a sapphire substrate, or a silicon carbide substrate, or can be metallic copper (Cu), tungsten (W), molybdenum (Mo), or their alloys, etc.

[0087] Remove the growth substrate 01, as Figure 4D shown.

[0088] Form a connection layer 220 on the surface of the N-type semiconductor layer 211 of the vertically formed light-emitting diode away from the quantum well layer 212, and bond it to another vertically formed light-emitting diode to form a stacked vertically formed light-emitting diode, as Figure 4E shown.

[0089] Another vertically formed light-emitting diode is formed on the growth substrate 01, and includes: an N-type semiconductor layer 211, a quantum well layer 212, and a P-type semiconductor layer 213 that are sequentially away from the growth substrate 01. Thus, in the above steps, it can be realized that the N-type semiconductor layer of one vertically formed light-emitting diode and the P-type semiconductor layer of another vertically formed light-emitting diode are electrically connected through the connection layer 220.

[0090] It should be noted that after forming the stacked vertically formed light-emitting diode, the growth substrate 01 or the support substrate 02 can be removed first; then the stacked vertically formed light-emitting diode is bonded to the driving backplane, and then the support substrate 02 or the growth substrate 01 is removed. By directly bonding multiple light-emitting units 21 each including at least two stacked vertically formed light-emitting diodes 210 to the driving backplane, compared with the related art where a single LED chip is attached to the driving backplane one by one, the process is simplified and the manufacturing cost is saved.

[0091] In some embodiments, please continue to refer to Figure 1 , the display substrate 100 further includes: a reflective electrode layer 3. The reflective electrode layer 3 is located between the vertically formed light-emitting diode 22 and the driving backplane 1.

[0092] Among them, the material used for the reflective electrode layer 3 can be selected according to actual needs, and the present disclosure does not limit this.

[0093] In some examples, the material of the reflective electrode layer 3 is aluminum (Al), titanium (Ti), nickel (Ni), silver (Ag), etc.

[0094] In some examples, the reflective electrode layer 3 is a Ni Ag alternating stacked layer structure.

[0095] Those skilled in the art can understand that the reflective electrode layer 3 can also use other metals with relatively high reflectivity.

[0096] In this embodiment, by providing a reflective electrode layer 3 between the vertical light-emitting diode 22 and the driving backplane 1, the light irradiated onto the reflective electrode layer 3 can be reflected by the reflective electrode layer 3 and then emitted, improving the light utilization rate.

[0097] In some embodiments, please continue to refer to Figure 1 , the display substrate 100 further includes: an insulating structure 4, located between multiple light-emitting units 21 and between the first bonding pattern 23 and the driving backplane 1. By separating the multiple light-emitting units 21 through the insulating structure 4, electrical crosstalk between the multiple light-emitting units 21 can be prevented.

[0098] Embodiments of the present disclosure also provide a packaging substrate 200, as shown in Figure 5A and Figure 5B . The packaging substrate 200 includes: a substrate 10, an electrode connection layer 20, and a second bonding pattern 30.

[0099] The electrode connection layer 20 is located on one side of the substrate 10.

[0100] Exemplarily, the electrode connection layer 20 is a transparent structure. For example, the material of the electrode connection layer 20 includes at least one of indium tin oxide or indium zinc oxide.

[0101] The second bonding pattern 30 is located on the side of the electrode connection layer 20 away from the substrate 10 and exposes at least a part of the electrode connection layer 20.

[0102] The material used for the second bonding pattern 30 can be selected according to actual needs, and the present disclosure does not limit this.

[0103] For example, the second bonding pattern 30 can use nickel (Ni) and tin (Sn) as preparation materials, can also use silver (Ag) and tin (Sn) as preparation materials, can also use gold (Au) and tin (Sn) as preparation materials, can also use a stack of gold (Au) as preparation materials, and can also use a eutectic alloy as preparation materials.

[0104] In some embodiments, please continue to refer to Figure 5A and Figure 5B , the second bonding pattern 30 includes a third pattern layer 301 and a fourth pattern layer 302, and the third pattern layer 301 is located on the side of the fourth pattern layer 302 away from the substrate 10.

[0105] In some examples, the material of the third pattern layer 301 includes a third metal material, and the material of the fourth pattern layer 302 includes a fourth metal material; the melting point of the fourth metal material is higher than the melting point of the third metal material.

[0106] Exemplarily, the fourth metal material is gold (Au), and the third metal material is indium (In); or, the fourth metal material is silver (Ag), and the third metal material is indium (In); or, the fourth metal material is lead (Pb), and the third metal material is indium (In); or, the fourth metal material is copper (Cu), and the third metal material is tin (Sn); or, the fourth metal material is gold (Au), and the third metal material is copper (Cu). The present disclosure does not limit this.

[0107] In some examples, please continue to refer to Figure 5A and Figure 5B , the size of the third pattern layer 301 is larger than the size of the fourth pattern layer 302.

[0108] It should be noted that the above "the size of the third pattern layer 301 is larger than the size of the fourth pattern layer 302" means that the area of the orthographic projection of the third pattern layer 301 on the driving backplane 1 is larger than the area of the orthographic projection of the fourth pattern layer 302 on the driving backplane 1.

[0109] In some embodiments, please continue to refer to Figure 5A and Figure 5B , the encapsulation substrate 200 further includes: a plurality of lenses 40.

[0110] Exemplarily, the plurality of lenses 40 are located between the substrate 10 and the electrode connection layer 20, and the second bonding pattern 30 is located between the plurality of lenses 40.

[0111] The plurality of lenses 40 can be used to change the propagation direction of the light incident on the encapsulation substrate 200.

[0112] In some examples, the shape of the orthographic projection of at least one lens 40 on the substrate 10 is one of a circle, a square, and a rhombus. Of course, the shape of the orthographic projection of at least one lens 40 on the substrate 10 can also be other irregular shapes.

[0113] For example, as Figure 5A shown, at least one lens 40 is a convex lens, the surface of the lens 40 away from the substrate 10 is a plane, and the surface of the lens 40 away from the substrate 10 is a convex surface. Thus, the lens 40 has the function of converging light and can change the propagation direction of the light incident on the encapsulation substrate 200.

[0114] For example, as Figure 5B shown, at least one lens 40 is a trapezoidal structure.

[0115] In some embodiments, please continue to refer to Figure 5A and Figure 5B , the substrate 10 includes: a substrate 110, a color filter layer 120, and an encapsulation layer 130.

[0116] The color filter layer 120 is located on one side of the substrate 110; the encapsulation layer 130 is located on the side of the color filter layer 120 away from the side where the substrate 110 is located; the encapsulation layer 130 is closer to the electrode connection layer 20 relative to the color filter layer 120.

[0117] In some examples, the encapsulation layer 130 is SiNx, SiOx, photoresist, or other organic materials.

[0118] In some examples, please continue to refer to Figure 5A and Figure 5B , the color filter layer 120 includes a plurality of color filter portions 121, and a light-shielding pattern 122 located between adjacent color filter portions 121.

[0119] In some examples, the plurality of color filter portions 121 include: a red filter portion 123, a blue filter portion 124, and a green filter portion 125.

[0120] Among them, the red filter portion 123, the blue filter portion 124, and the green filter portion 125 are respectively disposed in different pixels. A light-shielding pattern 122 is disposed between adjacent color filter portions 121 to separate the red filter portion 123, the blue filter portion 124, and the green filter portion 125, which can prevent the light emitted from the red filter portion 123, the blue filter portion 124, and the green filter portion 125 from mixing colors.

[0121] In some examples, the light-shielding pattern 122 is an inorganic material; in some other examples, the light-shielding pattern 122 is an organic material; in still some other examples, the light-shielding material is metal chromium or organic resin. The embodiments of the present disclosure do not limit this.

[0122] In some examples, please continue to refer to Figure 5A and Figure 5B , the positive projection of the second bonding pattern 30 on the substrate 110 and the positive projection of the light-shielding pattern 122 on the substrate 110 at least partially overlap.

[0123] It should be noted that the above "the positive projection of the second bonding pattern 30 on the substrate 110 and the positive projection of the light-shielding pattern 122 on the substrate 110 at least partially overlap" includes two cases: the positive projection of the second bonding pattern 30 on the substrate 110 and the positive projection of the light-shielding pattern 122 on the substrate 110 partially overlap or completely overlap.

[0124] In some examples, please continue to refer to Figure 5A and Figure 5B , the positive projection of at least one lens 40 on the substrate 110 and the positive projection of the color filter portion 121 on the substrate 110 at least partially overlap. Thus, the light incident on the color filter portion 121 can be increased, thereby improving the light utilization rate.

[0125] In some embodiments, please continue to refer to Figure 5A and Figure 5B , the color filter unit 121 includes: a color film layer 1211 and a quantum dot layer 1212 which are stacked.

[0126] Among them, the color film layer 1211 is closer to the substrate 110 than the quantum dot layer 1212.

[0127] In some examples, the color film layer 1211 includes a color resist made of an organic photosensitive material, and the color resist can allow light in a specific wavelength range to pass through while blocking light in other wavelength ranges.

[0128] In some examples, the quantum dot layer 1212 includes quantum dots (abbreviated as QDs), and the quantum dots emit light when excited by a light source, and the light emitted from the quantum dot layer 1212 is white light.

[0129] When the light incident on the encapsulation substrate 200 is blue light, the quantum dot layer may include a red quantum dot material and a green quantum dot material. Then, under the excitation of the blue light, the red quantum dot material emits red light, and the green quantum dot material emits green light. Thus, after passing through the quantum dot layer, mixed light of red light, green light, and blue light can be generated.

[0130] In this embodiment, the color filter unit 121 includes: a color film layer 1211 and a quantum dot layer 1212 which are stacked. The light incident on the color filter unit 121 excites the quantum dot layer 1212 to emit light. When the energy of the incident light is the same, the brightness of the light emitted through the color filter unit 121 is increased.

[0131] When the color filter unit 121 includes: a color film layer 1211 and a quantum dot layer 1212 which are stacked, the encapsulation layer 130 can play a role in encapsulating and protecting the quantum dot layer 1212, preventing the quantum dot layer 1212 from contacting the external environment, and thus avoiding the influence of water, oxygen, etc. in the external environment on the luminescence performance of the quantum dots in the quantum dot layer 1212; the plurality of lenses 40 can change the propagation direction of the light incident on the encapsulation substrate 200, making more light converge towards the color filter unit 121, increasing the light incident on the quantum dot layer 1212, and thereby improving the excitation efficiency of the quantum dot material.

[0132] An embodiment of the present disclosure further provides a display device 1000, as Figure 6 shown. The display device 1000 includes: the display substrate 100 as described above and, the encapsulation substrate 200 as described above.

[0133] In some examples, the first bonding pattern 23 in the display substrate 100 is bonded to the second bonding pattern 30 in the encapsulation substrate 200, so that the plurality of transparent electrodes 22 in the display substrate 100 are in contact with the electrode connection layer 20 in the encapsulation substrate 200.

[0134] When the first bonding pattern 23 includes a stacked first pattern layer 231 and a second pattern layer 232, and the second bonding pattern 30 includes a third pattern layer 301 and a fourth pattern layer 302, the first metal material included in the first pattern layer 231 and the fourth metal material included in the fourth pattern layer 302 may be the same or different; the second metal material included in the second pattern layer 232 and the third metal material included in the third pattern layer 301 may be the same or different. Embodiments of the present disclosure do not limit this.

[0135] In some examples, the first metal material included in the first pattern layer 231 and the fourth metal material included in the fourth pattern layer 302 are the same, and the second metal material included in the second pattern layer 232 and the third metal material included in the third pattern layer 301 are the same. For example, the first metal material and the fourth metal material are gold (Au), and the second metal material and the third metal material are indium (In); or, the first metal material and the fourth metal material are silver (Ag), and the second metal material and the third metal material are indium (In); or, the first metal material and the fourth metal material are lead (Pb), and the second metal material and the third metal material are indium (In); or, the first metal material and the fourth metal material are copper (Cu), and the second metal material and the third metal material are tin (Sn); or, the first metal material and the fourth metal material are gold (Au), and the second metal material and the third metal material are copper (Cu).

[0136] The first bonding pattern 23 and the second bonding pattern 30 can be bonded by means of eutectic bonding or thermocompression bonding.

[0137] Those skilled in the art can understand that eutectic bonding is a bonding process based on metal materials. By using the characteristic that certain eutectic alloys have a lower melting temperature than single alloy components, it is used as an intermediate dielectric layer. At a lower temperature, when two metals with similar crystal lattices are heated above the eutectic temperature, the atoms at the interface will diffuse into each other to form a eutectic alloy layer. There is no participation of liquid metal in thermocompression bonding, that is, solid-state diffusion occurs at the bonding interface, which is a metal bonding without intermediate products. In thermocompression bonding, the diffusion rate of metal molecules on the surfaces of two wafers is closely related to the metal type, temperature, pressure, and surface roughness. Heating and pressurization both help to increase the diffusion rate, and a uniformly acting pressure can improve the bonding yield.

[0138] Exemplarily, please continue to refer to Figure 6, when the first bonding pattern 23 is bonded to the second bonding pattern 30, the second pattern layer 232 and the third pattern layer 301 diffuse into each other at a lower temperature to form a eutectic alloy layer 240, thereby realizing the mechanical connection between the display substrate 100 and the encapsulation substrate 200; on this basis, the size of the second pattern layer 232 is larger than that of the first pattern layer 231, and the size of the third pattern layer 301 is larger than that of the fourth pattern layer 302. When the second pattern layer 232 and the third pattern layer 301 diffuse into each other to form the eutectic alloy layer 240, it can further ensure better electrical connection of the plurality of transparent electrodes 22 through the eutectic alloy layer 240 and avoid the problem of poor connection between the plurality of transparent electrodes 22.

[0139] In this embodiment, when the display substrate 100 and the encapsulation substrate 200 are mechanically connected by bonding the first bonding pattern 23 and the second bonding pattern 30, the plurality of transparent electrodes 22 in the display substrate 100 are in contact with the electrode connection layer 20 in the encapsulation substrate 200.

[0140] In some examples, the display device 1000 further includes a connection line and a cathode ring, and the electrode connection layer 20 is electrically connected through the connection line and the cathode ring, so as to introduce signals and power from the driving backplane.

[0141] In some examples, please continue to refer to Figure 6 , the orthographic projections of the plurality of light-emitting units 21 on the substrate 110 and the orthographic projections of the plurality of color filter portions 121 on the substrate 110 at least partially overlap.

[0142] When the light emitted by the light-emitting unit 21 passes through the lens 40, under the action of the lens 40, the propagation direction of the light changes, so that more light converges toward the color filter portion 121, increasing the light incident on the quantum dot layer 1212, thereby improving the excitation efficiency of the quantum dot material.

[0143] It can be understood that the display device 1000 includes the display substrate 100 as described above and the encapsulation substrate 200 as described above, so it has all the above beneficial effects and will not be elaborated here.

[0144] In some examples, the display device 1000 can be any device that displays images whether in motion (e.g., video) or stationary (e.g., still images), and whether text or otherwise. More specifically, it is contemplated that the embodiments can be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rear view cameras in vehicles), electronic photos, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., displays of images of a piece of jewelry), etc.

[0145] As described above, the above is only the specific implementation manner of this application, but the protection scope of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be covered within the protection scope of this application. Therefore, the protection scope of this application should be subject to the protection scope of the claims.

Claims

1. A display substrate, characterized in that, Comprising: A driving backplane, and a light-emitting device layer located on one side of the driving backplane; The light-emitting device layer includes: A plurality of light-emitting units; A plurality of transparent electrodes, located on the surface of the plurality of light-emitting units away from the driving backplane and electrically connected to the plurality of light-emitting units; A first bonding pattern, at least located between the plurality of transparent electrodes; the first bonding pattern is electrically connected to at least one transparent electrode; The first bonding pattern includes a stacked first pattern layer and a second pattern layer, and the second pattern layer is located on the side of the first pattern layer away from the driving backplane; The material of the first pattern layer includes a first metal material, and the material of the second pattern layer includes a second metal material; The melting point of the first metal material is higher than the melting point of the second metal material.

2. The display substrate according to claim 1, wherein: The first bonding pattern is also located around the plurality of transparent electrodes.

3. The display substrate according to claim 2, wherein: The first bonding pattern includes a plurality of mesh holes, at least one of the transparent electrodes is disposed within one mesh hole, and the transparent electrode located within the mesh hole is electrically connected to the hole wall of the mesh hole.

4. The display substrate according to claim 1, wherein: The size of the second pattern layer is larger than the size of the first pattern layer.

5. The display substrate according to any one of claims 1 to 4, characterized in that The light-emitting unit includes: At least two stacked vertical light-emitting diodes; and A connection layer located between the two vertical light-emitting diodes; Wherein, the vertical light-emitting diode includes an N-type semiconductor layer, a quantum well layer, and a P-type semiconductor layer; in two adjacent stacked vertical light-emitting diodes, the N-type semiconductor layer of one vertical light-emitting diode and the P-type semiconductor layer of the other vertical light-emitting diode are electrically connected through the connection layer.

6. The display substrate according to claim 5, characterized in that, Further comprising: A reflective electrode layer, located between the vertical light-emitting diode and the driving backplane.

7. The display substrate according to claim 5, characterized in that Further comprising: An insulating structure, located between the plurality of light-emitting units and between the first bonding pattern and the driving backplane.

8. An encapsulation substrate, characterized in that Comprising: A substrate; An electrode connection layer, located on one side of the substrate; And A second bonding pattern, located on the side of the electrode connection layer away from the substrate and exposing at least a part of the electrode connection layer; the second bonding pattern includes a third pattern layer and a fourth pattern layer, and the third pattern layer is located on the side of the fourth pattern layer away from the substrate; Wherein, the material of the third pattern layer includes a third metal material, the material of the fourth pattern layer includes a fourth metal material; the melting point of the fourth metal material is higher than the melting point of the third metal material; the third pattern layer is bonded to the second pattern layer in the display substrate so that the plurality of transparent electrodes in the display substrate are in contact with the electrode connection layer in the packaging substrate.

9. The packaging substrate according to claim 8, wherein: The size of the third pattern layer is larger than the size of the fourth pattern layer.

10. The encapsulation substrate according to claim 8, wherein Further comprising: A plurality of lenses, located between the substrate and the electrode connection layer; Wherein, the second bonding pattern is at least located between the plurality of lenses.

11. The encapsulated substrate according to any one of claims 8 to 10, characterized in that, The substrate includes: A substrate; A color filter layer, located on one side of the substrate; and, An encapsulation layer, located on the side of the color filter layer away from the substrate; Wherein, the encapsulation layer is closer to the electrode connection layer than the color filter layer.

12. The encapsulation substrate according to claim 11, wherein The color filter layer includes: a plurality of color filter portions, and a light-shielding pattern located between adjacent color filter portions; The positive projection of the second bonding pattern on the substrate and the positive projection of the light-shielding pattern on the substrate at least partially overlap.

13. The encapsulation substrate according to claim 12, wherein The color filter portion includes: a color film layer and a quantum dot layer stacked; Wherein, the color film layer is closer to the substrate than the quantum dot layer.

14. A display device, characterized in that, Comprising: A display substrate according to any one of claims 1 to 7 above; And, An encapsulation substrate according to any one of claims 8 to 13 above; Wherein, the first bonding pattern in the display substrate is bonded to the second bonding pattern in the encapsulation substrate so that a plurality of transparent electrodes in the display substrate are in contact with the electrode connection layer in the encapsulation substrate.

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