Display substrate, display panel, and display device

Abstract

A display substrate, a display panel, and a display device, comprising: a base substrate (10), having a display area (AA) and a frame area (BB) surrounding the display area (AA), wherein the display area (AA) comprises: a first display area (AA1) and a second display area (AA2) located at least on one side of the first display area (AA1); a plurality of first light-emitting devices having the same density in the first display area (AA1) as a plurality of second light-emitting devices in the second display area (AA2); at least one transparent conductive layer located between a drive circuit layer and a light-emitting device layer; and at least one transparent conductive layer located between a drive circuit layer and a light-emitting device layer. Each layer of a transparent conductive layer includes a plurality of first anode wirings (101) electrically connected to a first anode (11); the first anode wirings (101) include at least a first portion (01) extending along a column direction (Y) and a second portion (02) extending along a row direction (X); the second portions (02) of the plurality of first anode wirings (101) electrically connected to the first anodes (11) in the same row are located between two different adjacent rows of first anodes (11), and the second portions (02) are led out to the outside of the first display area (AA1) along the row direction (X).

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel, and a display device. Background Art

[0002] With the rapid development of smartphones, not only are they aesthetically pleasing, but they also need to provide users with a superior visual experience. Major manufacturers are increasing the screen-to-body ratio on their smartphones, making full-screen displays a new competitive advantage. With the rise of full-screen displays, the demand for improved performance and functionality is also increasing. Under-display cameras, without sacrificing a high screen-to-body ratio, can, to a certain extent, deliver a visual and user experience impact. Summary of the Invention

[0003] In one aspect, an embodiment of the present disclosure provides a display substrate, comprising:

[0004] A base substrate having a display area and a frame area surrounding the display area, wherein the display area includes: a first display area and a second display area located at least on one side of the first display area; wherein the light transmittance of the first display area is greater than the light transmittance of the second display area;

[0005] a driving circuit layer located on the base substrate; the driving circuit layer includes a plurality of first pixel circuits and a plurality of second pixel circuits, wherein the orthographic projections of the first pixel circuits on the base substrate do not overlap with the orthographic projections of the first display area on the base substrate, and the second pixel circuits are located in the second display area;

[0006] a light-emitting device layer, located on a side of the driving circuit layer away from the base substrate, the light-emitting device layer comprising a plurality of first light-emitting devices and a plurality of second light-emitting devices, the first light-emitting devices being located in the first display area, the second light-emitting devices being located in the second display area, each of the first light-emitting devices comprising an independently provided first anode, and each of the second light-emitting devices comprising an independently provided second anode; each of the plurality of first anodes being electrically connected to a corresponding respective one of the plurality of first pixel circuits, and each of the plurality of second anodes being electrically connected to a corresponding respective one of the plurality of second pixel circuits; wherein the density of the plurality of first light-emitting devices in the first display area is the same as the density of the plurality of second light-emitting devices in the second display area;

[0007] At least one transparent conductive layer is located between the driving circuit layer and the light-emitting device layer; each of the at least one transparent conductive layer includes a plurality of first anode traces electrically connected to the first anode; the first anode trace includes at least a first portion extending along a column direction and a second portion extending along a row direction, the second portions of the plurality of first anode traces electrically connected to the first anode in the same row are located between two adjacent rows of first anodes, and the second portions are led out to the outside of the first display area along the row direction.

[0008] Optionally, in the display substrate provided in the embodiment of the present disclosure, the at least one transparent conductive layer includes a first transparent conductive layer and a second transparent conductive layer that are stacked and insulated from each other;

[0009] In every two adjacent rows of the first anodes, the first anode wiring corresponding to one row of the first anodes is located in the first transparent conductive layer, and the first anode wiring corresponding to the other row of the first anodes is located in the second transparent conductive layer.

[0010] Optionally, in the above-mentioned display substrate provided by the embodiment of the present disclosure, the patterns of the first transparent conductive layer and the second transparent conductive layer are the same.

[0011] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the number of first anode wirings between two adjacent first anodes in the column direction corresponding to each of the transparent conductive layers is not greater than a first number, and the number of first anode wirings between two adjacent first anodes in the row direction corresponding to each of the transparent conductive layers is not greater than a second number, and the first number is greater than the second number.

[0012] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, at least one row of the first anodes includes adjacent first, second and third regions, the first anode wiring corresponding to the first region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the second region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the third region is located between the same two adjacent rows of first anodes, and the first anode wiring corresponding to the first, second and third regions are located between different two adjacent rows of first anodes.

[0013] Optionally, in the display substrate provided in an embodiment of the present disclosure, the first area is close to the second display area, the second area is located on a side of the first area away from the second display area, and the third area is located on a side of the second area away from the second display area.

[0014] The number of first anode traces corresponding to the first region is no more than half of the first number, and the numbers of first anode traces corresponding to the second region and the third region are both the first number.

[0015] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, at least one row of the first anodes is divided into adjacent fourth, fifth and sixth regions, the first anode wiring corresponding to the fourth region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the fifth region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the sixth region is located between different adjacent rows of first anodes, and the first anode wiring corresponding to the fourth, fifth and sixth regions are located between different adjacent rows of first anodes.

[0016] Optionally, in the display substrate provided in the embodiment of the present disclosure, the fourth area is close to the second display area, the fifth area is located on a side of the fourth area away from the second display area, and the sixth area is located on a side of the fifth area away from the second display area.

[0017] The number of first anode traces corresponding to the fourth region is the first number, the number of first anode traces corresponding to the fifth region is the first number, and the number of first anode traces corresponding to the sixth region is no more than half of the first number.

[0018] Optionally, in the above-mentioned display substrate provided by an embodiment of the present disclosure, the first number is 11-15, and the second number is 2-6.

[0019] Optionally, in the display substrate provided in the embodiment of the present disclosure, the multiple first anode wirings contained in each transparent conductive layer do not overlap with each other, and the orthographic projections of the multiple first anode wirings contained in different transparent conductive layers on the base substrate are intertwined with each other.

[0020] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, there is an insulating layer between the first anode and the transparent conductive layer, and the insulating layer has a plurality of vias for electrically connecting the first anode and the first anode wiring, and the orthographic projection of the first anode wiring on the base substrate does not overlap with the orthographic projection of the vias on the base substrate.

[0021] Optionally, in the above-mentioned display substrate provided by an embodiment of the present disclosure, the plurality of first pixel circuits are located in the frame area adjacent to the first display area.

[0022] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the second display area has a seventh area and an eighth area adjacent to the first display area, the seventh area and the eighth area are arranged relatively to each other, the area occupied by the second pixel circuits in the seventh area and the eighth area is smaller than the area occupied by the second pixel circuits in other second display areas, and the multiple first pixel circuits are located in the seventh area and the eighth area.

[0023] Optionally, in the above-mentioned display substrate provided in an embodiment of the present disclosure, the shape of the first display area is circular, elliptical, rectangular or polygonal.

[0024] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the first display area is divided into four equal parts along the center line of the row direction and the column direction, and the first anode wiring of each equal part adopts the arrangement method of the first anode wiring in the above-mentioned display substrate.

[0025] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the four equal parts include a first equal part, a second equal part, a third equal part and a fourth equal part arranged in a clockwise direction, the first equal part and the second equal part are symmetrically arranged about the center line of the column direction, the second equal part and the third equal part are symmetrically arranged about the center line of the row direction, the third equal part and the fourth equal part are symmetrically arranged about the center line of the column direction, and the fourth equal part and the first equal part are symmetrically arranged about the center line of the row direction.

[0026] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the first row of first anodes is closest to the fourth row in the first equal part, the second row of first anodes is closest to the first equal part in the fourth equal part, and there is a first gap between the first row of first anodes and the second row of first anodes, and the first anode wiring corresponding to the first area of ​​the first row of first anodes close to the second display area and the first anode wiring corresponding to the first area of ​​the second row of first anodes close to the second display area are both located in the first gap.

[0027] On the other hand, an embodiment of the present disclosure further provides a display panel, comprising the above-mentioned display substrate.

[0028] On the other hand, an embodiment of the present disclosure further provides a display device, comprising: a photosensitive device, and the above-mentioned display panel; the photosensitive device is arranged in the first display area of ​​the display substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of a top view of a display substrate in the related art;

[0030] Figure 2A schematic structural diagram of a display substrate provided in an embodiment of the present disclosure;

[0031] Figure 3 for Figure 2 An enlarged schematic diagram of the first display area;

[0032] Figure 4 for Figure 2 An enlarged diagram of the wiring of the first display area;

[0033] Figure 5 for Figure 4 An enlarged schematic diagram of the upper left part of the middle;

[0034] Figure 6 A schematic structural diagram of another display substrate provided in an embodiment of the present disclosure;

[0035] Figure 7 A schematic top view of the transparent conductive layer provided in an embodiment of the present disclosure;

[0036] Figure 8 A schematic diagram of the cross-sectional structure of a transparent conductive layer provided in an embodiment of the present disclosure;

[0037] Figure 9 for Figure 2 Schematic diagram of the wiring layout of the first display area. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0039] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words “include” or “comprise” and the like used in this disclosure mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The words “connect” or “connected” and the like are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Inside”, “outside”, “upper”, “lower”, etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0040] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0041] In related technologies, such as Figure 1 As shown, under-screen camera technology generally sets up a first display area AA1 and a second display area AA2 within the display area AA, where the second display area AA2 occupies the vast majority of the display screen, and the first display area AA1 occupies the remaining part. The first display area AA1 is where the under-screen camera is placed. An under-screen camera means that the front camera is located below the screen but does not affect the screen display function. When the front camera is not in use, the screen above the camera can still display images normally. Therefore, from the appearance, the under-screen camera will not have any camera hole, truly achieving a full-screen display effect. However, in current OLED display devices with under-screen camera designs, the display brightness of the first display area AA1 is at least twice that of the second display area AA2, which is a problem that needs to be solved urgently.

[0042] In view of the above technical problems existing in the related art, the present disclosure provides a display substrate, such as Figure 2-Figure 5 As shown, Figure 2 To show the overall structure of the substrate, Figure 3 for Figure 2 A schematic structural diagram of the first display area AA1, Figure 4 To illustrate Figure 3 The detailed structural diagram of the quarter area where the dotted box is located, Figure 5 for Figure 4 The enlarged structural diagram of the quarter area where the dotted line frame is located, the display substrate includes:

[0043] The base substrate 10 has a display area AA and a frame area BB surrounding the display area. The display area AA includes a first display area AA1 and a second display area AA2 located at least on one side of the first display area AA1. The light transmittance of the first display area AA1 is greater than that of the second display area AA2.

[0044] A driving circuit layer is located on the base substrate 10; the driving circuit layer includes a plurality of first pixel circuits D1 and a plurality of second pixel circuits D2, wherein the orthographic projection of the first pixel circuit D1 on the base substrate 10 does not overlap with the orthographic projection of the first display area AA1 on the base substrate 10, and the second pixel circuit D2 is located in the second display area AA2; Figure 1 Only a portion of the first pixel circuit D1 and the second pixel circuit D2 is shown;

[0045] A light-emitting device layer is located on a side of the driving circuit layer facing away from the base substrate 10. The light-emitting device layer includes a plurality of first light-emitting devices and a plurality of second light-emitting devices. The first light-emitting devices are located in the first display area AA1, and the second light-emitting devices are located in the second display area AA2. Each of the first light-emitting devices includes an independently provided first anode 11, and each of the second light-emitting devices includes an independently provided second anode 12. Each of the plurality of first anodes 11 is electrically connected to a corresponding each of the plurality of first pixel circuits D1, and each of the plurality of second anodes 12 is electrically connected to a corresponding each of the plurality of second pixel circuits D2. The density (i.e., pixel resolution) of the plurality of first light-emitting devices in the first display area AA1 is the same as the density of the plurality of second light-emitting devices in the second display area AA2.

[0046] At least one transparent conductive layer is located between the driving circuit layer and the light-emitting device layer; each of the at least one transparent conductive layer includes multiple first anode traces 101 electrically connected to the first anode 11; the first anode trace 101 includes at least a first portion 01 extending along the column direction Y and a second portion 02 extending along the row direction X. The second portions 02 of the multiple first anode traces 101 electrically connected to the first anodes 11 in the same row are located between two different adjacent rows of first anodes 11, and the second portions 02 are extended outside the first display area AA1 along the row direction X.

[0047] In the above-mentioned display substrate provided in the embodiment of the present disclosure, a second pixel circuit D2 and a corresponding second light-emitting device are arranged in the second display area AA2, and the first pixel circuit D1 corresponding to the first display area AA1 with higher transmittance is not arranged in the first display area AA1, and the density (i.e., pixel resolution) of multiple first light-emitting devices in the first display area AA1 is the same as the density of multiple second light-emitting devices in the second display area AA2, so that the under-screen camera display area (i.e., the first display area AA1) can display images with the same pixel resolution, improve the luminous brightness of the under-screen camera display area, reduce the brightness difference between the main display area (i.e., the second display area AA2) and the under-screen camera display area (i.e., the first display area AA1), and at the same time, the diameter of the hole in the under-screen camera display area can be expanded, thereby achieving a better full-screen display effect and user experience.

[0048] It should be noted that the first anodes and the first anode wiring are electrically connected through a via hole penetrating the insulating layer between the two, and the gap between two adjacent rows of first anodes does not strictly refer to the gap between the two adjacent rows of first anodes. The orthographic projection of the second part of the first anode wiring on the substrate may overlap with the orthographic projection of the first anode on the substrate. Therefore, the gap between two adjacent rows of first anodes in the embodiment of the present disclosure refers to the gap between the two adjacent rows of via holes connecting the two adjacent rows of first anodes and the corresponding transparent conductive layer, that is, the gap between two adjacent rows of first anodes refers to Figure 5 Between two adjacent rows of vias V.

[0049] It should be noted that in the present disclosure, the shape of the first display area AA1 can be Figure 2 The circle shown can also be an ellipse, rectangle, polygon or other shapes, which can be designed according to actual needs and are not limited here. The second display area AA2 can be as follows Figure 2 The circuit shown surrounds the perimeter of the first display area AA1; it may also surround a portion of the first display area AA1, for example, the left side, bottom side, and right side of the first display area AA1, with the upper boundary of the first display area AA1 coinciding with the upper boundary of the second display area AA2. Furthermore, in this disclosure, the first light-emitting device and the second light-emitting device refer to pixels that are actually used to display light, and the first pixel circuit and the second pixel circuit are circuits used to connect light-emitting pixels.

[0050] Optionally, in order to improve the light transmittance of the first display area, in the above-mentioned display substrate provided in the embodiment of the present disclosure, as Figure 2 As shown, a plurality of first pixel circuits D1 are located in the frame area BB adjacent to the first display area AA1. Figure 2 Specifically, multiple first pixel circuits D1 are located in the upper frame area. Furthermore, by disposing multiple first pixel circuits D1 in the frame area BB adjacent to multiple first light-emitting devices and multiple second light-emitting devices, the length of the transparent trace between the first pixel circuits D1 and the first light-emitting devices can be effectively reduced, thereby reducing the resistance of the transparent trace and improving the long-range uniformity of the drive signal.

[0051] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 6 As shown, the second display area AA2 includes a seventh region A1 and an eighth region A2 adjacent to the first display area AA1. The seventh region A1 and the eighth region A2 are arranged opposite each other. The second pixel circuits D2 in the seventh region A1 and the eighth region A2 occupy a smaller area than the second pixel circuits D2 in the other second display areas AA2. Multiple first pixel circuits D1 are located in the seventh region A1 and the eighth region A2. Specifically, by reducing the area of ​​the second pixel circuits D2 in the seventh region A1 and the eighth region A2, the present disclosure arranges the multiple first pixel circuits D1 corresponding to the first display area AA1 in the seventh region A1 and the eighth region A2. This allows the under-screen camera display area (i.e., the first display area AA1) to display images with the same pixel resolution, improve the brightness of the under-screen camera display area, and reduce the brightness difference between the main display area (i.e., the second display area AA2) and the under-screen camera display area (i.e., the first display area AA1).

[0052] It should be noted that Figure 6 Each area only illustrates part of the pixel circuit structure.

[0053] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 5 As shown, the at least one transparent conductive layer includes a first transparent conductive layer and a second transparent conductive layer that are stacked and insulated from each other;

[0054] In every two adjacent rows of first anodes 11, for example Figure 5 In the last row and the second to last row, the first anode trace 101 corresponding to the first anode 11 in one row (for example, the last row) is located in the first transparent conductive layer, and the first anode trace 101 corresponding to the first anode 11 in the other row (for example, the second to last row) is located in the second transparent conductive layer.

[0055] Specifically, assuming Figure 5 From the last row upwards, there are the first row, the second row, the third row, ..., then the first anode traces 101 corresponding to the first anodes 11 in the odd rows are located in the first transparent conductive layer, and the first anode traces 101 corresponding to the first anodes 11 in the even rows are located in the second transparent conductive layer.

[0056] It should be noted that the embodiments of the present disclosure Figure 4 and Figure 5 Only the first anode wiring 101 corresponding to the first anodes 11 in the odd rows is illustrated. The wiring method of the first anode wiring 101 corresponding to the first anodes 11 in the even rows is the same as the wiring method of the first anode wiring 101 corresponding to the first anodes 11 in the odd rows. The only difference between the odd rows and the even rows is that their corresponding cathode wirings are located in different conductive layers.

[0057] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 7 As shown, Figure 7 This is a schematic top view of the structure of the first transparent conductive layer 20 and the second transparent conductive layer 30. The multiple first anode traces contained in each transparent conductive layer do not overlap. For example, the multiple first anode traces 101 contained in the first transparent conductive layer 20 do not overlap, and the multiple first anode traces 101 contained in the second transparent conductive layer 30 do not overlap. The orthographic projections of the multiple first anode traces contained in different transparent conductive layers on the base substrate intersect with each other. For example, the orthographic projections of the multiple first anode traces 101 contained in the first transparent conductive layer 20 on the base substrate 10 intersect with the orthographic projections of the multiple first anode traces 101 contained in the second transparent conductive layer 30 on the base substrate 10. That is, when two transparent conductive layers are used, the first transparent conductive layer 20 and the second transparent conductive layer 30 are alternately arranged in the gaps between each other to minimize overlap between the two layers, thereby reducing the loading between the first anode traces 101.

[0058] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 6 and Figure 8As shown, there is an insulating layer 40 between the first anode 11 and the transparent conductive layer (for example, the first transparent conductive layer 20), and the insulating layer 40 has a plurality of vias V for electrically connecting the first anode 11 and the first anode wiring 101, and the orthographic projection of the first anode wiring 101 on the base substrate 10 does not overlap with the orthographic projection of the vias V on the base substrate 10.

[0059] Optionally, in the display substrate provided in the embodiment of the present disclosure, the patterns of the first transparent conductive layer and the second transparent conductive layer are the same. Figure 5 When the first anode line 101 is arranged in an odd number of rows, the second transparent conductive layer is arranged Figure 5 The first anode trace 101 in the even-numbered rows, Figure 5 Only the routing mode of the odd-numbered rows of first anode wirings 101 is illustrated. The routing mode of the even-numbered rows of first anode wirings 101 is the same as that of the odd-numbered rows, except that the orthographic projections of the odd-numbered rows and the even-numbered rows are staggered.

[0060] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 5 As shown, the first anode wiring (eg Figure 5 The number of first anode wirings 101 between the last row of first anodes 11 and the second-to-last row of first anodes 11 is not greater than the first number. Since each transparent conductive layer is provided with anode wirings, currently due to requirements such as pixel resolution, the number of wirings between two adjacent first anodes 11 in the column direction Y of each transparent conductive layer is generally 11-15. For example, the first number can be 13. The present disclosure takes two transparent conductive layers as an example. Then, in the overall structure of the two transparent conductive layers, the total number of wirings between two adjacent first anodes 11 in the column direction Y is generally not more than 26; the number of first anode wirings (for example) between two adjacent first anodes 11 in the row direction X corresponding to each transparent conductive layer is not greater than the first number. Figure 5 The number of first anode wirings 101 (between the first anode 11 in the first column and the first anode 11 in the second column from the middle right) is not greater than the second number. Since each transparent conductive layer is provided with an anode wiring, currently due to requirements such as pixel resolution, the number of wirings between two adjacent first anodes 11 in the row direction X of each transparent conductive layer is generally 2-6. For example, the second number can be 4. The present disclosure takes two transparent conductive layers as an example. Then, in the overall structure of the two transparent conductive layers, the total number of wirings between two adjacent first anodes 11 in the row direction X generally does not exceed 8; therefore, the first number is greater than the second number.

[0061] It should be noted that, in order to clearly illustrate the wiring method of the first anode wiring 101 in the first display area AA1, Figure 5In the description, an example is given in which the number of wirings between two adjacent first anodes in the column direction Y is 7.

[0062] It should be noted that the first anode and the first anode wiring are electrically connected through a via hole penetrating the insulating layer between the two. The gap between two adjacent first anodes in the row direction X does not strictly refer to the gap between two adjacent first anodes in the row direction X. The orthographic projection of the first part of the first anode wiring on the substrate may overlap with the orthographic projection of the first anode on the substrate. Therefore, the gap between two adjacent first anodes in the row direction X in the embodiment of the present disclosure refers to the gap between two adjacent first anodes in the row direction X and two adjacent via holes in the row direction X connected to the corresponding transparent conductive layer, that is, the gap between two adjacent first anodes in the row direction X refers to Figure 5 Between two adjacent via holes V in the row direction X.

[0063] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 5 As shown, at least one row of first anodes includes adjacent first, second and third regions, for example Figure 5 The last row of first anodes includes adjacent first area B1, second area B2 and third area B3, and the first anode trace 101 corresponding to the first area B1 is located in the gap between two adjacent first anodes 11 in the same column direction Y (the last row and the third area B3). Figure 5 The first anode wiring 101 corresponding to the second area B2 is located in the gap between two adjacent first anodes 11 in the same column direction Y (between the last row and the second to last row), the first anode wiring 101 corresponding to the third area B3 is located in the gap between two adjacent first anodes 11 in the same column direction Y (between the second to last row and the third to last row), and the first anode wiring 101 corresponding to the first area B1, the second area B2 and the third area B3 is located in the gap between two adjacent first anodes 11 in different column directions Y.

[0064] Specifically, if Figure 5 and Figure 9 As shown, Figure 9 A complete anode wiring structure for odd-numbered rows of pixels in the first display area AA1. Figure 5 for Figure 9 Schematic diagram of the upper left quarter of the center. Figure 9 The lower left portion also has another quarter area of ​​the first display area AA1, Figure 5 The last row of first anodes 11 and Figure 9 The area between the first anodes 11 in the first row of the lower left quarter can be used as the anode wiring area of ​​the two rows of first areas B1. Since 7 wirings can be set between two adjacent first anodes in the column direction Y, the two are evenly divided. Figure 5 The three first anode traces 101 and Figure 9 The three first anode traces 101 on the left side of the first row in the lower left quarter are respectively distributed at Figure 5 The last row of first anodes 11 and Figure 9 Between the first anodes 11 in the first row of the lower left quarter area. Taking the first anode traces 101 corresponding to the second area B2 and the third area B3 as an example, the 7 first anode traces 101 corresponding to the second area B2 are all set Figure 5 Between the last row of first anodes 11 and the second to last row of first anodes 11, each first anode trace 101 first extends in the column direction Y, then extends in the row direction X to the first display area AA1, and then extends to the first display area AA2. Figure 2 or Figure 6 The first pixel circuit D1 is electrically connected to the first pixel circuit D1.

[0065] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 2 and Figure 5 As shown, the first area B1 is close to the second display area AA2, the second area B2 is located on the side of the first area B1 away from the second display area AA2, and the third area B3 is located on the side of the second area B2 away from the second display area AA2;

[0066] The number of the first anode traces 101 corresponding to the first area B1 is no more than half of the first number (for example, the first number is 7, Figure 5 The number of first anode traces 101 in the first area B1 is 3), and the number of first anode traces 101 corresponding to the second area B2 and the third area B3 are both the first number (for example, the number of first anode traces 101 corresponding to the second area B2 and the third area B3 are both 7).

[0067] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 5 As shown, at least one row of first anodes is divided into adjacent fourth, fifth and sixth regions, for example Figure 5 The third-to-last row of first anodes is divided into adjacent fourth area B4, fifth area B5 and sixth area B6. The first anode wiring 101 corresponding to the fourth area B4 is located in the gap between the first anodes 11 of the same two adjacent rows (between the third-to-last row and the fourth-to-last row), the first anode wiring 101 corresponding to the fifth area B5 is located in the gap between the first anodes 11 of the same two adjacent rows (between the fourth-to-last row and the fifth-to-last row), the first anode wiring 101 corresponding to the sixth area B6 is located in the gap between the first anodes 11 of different adjacent rows, and the first anode wiring 101 corresponding to the fourth area B4, the fifth area B5 and the sixth area B6 are located in the gap between the first anodes 11 of different adjacent rows.

[0068] Specifically, if Figure 5 As shown, since the fourth area B4, the fifth area B5 and the sixth area B6 are the third-to-last row of pixels, the first anode wires 101 corresponding to the three areas can only be set between the two adjacent rows of first anodes 11 on their upper sides, and the number of wires in the fourth area B4 and the fifth area B5 are both 7, then 7 first anode wires 101 corresponding to the fourth area B4 are set between the third-to-last row and the fourth-to-last row, and 7 first anode wires 101 corresponding to the fifth area B5 are set between the fourth-to-last row and the fifth-to-last row, then the three first anode wires 101 corresponding to the sixth area B6 in the third-to-last row of pixels can only be routed vertically along the column direction first, and then go between the two adjacent rows of first anodes 11 with less than 7 wires and be led out to the second display area AA2 along the row direction.

[0069] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 2 and Figure 5 As shown, the fourth area B4 is close to the second display area AA2, the fifth area B5 is located on the side of the fourth area B4 away from the second display area AA2, and the sixth area B6 is located on the side of the fifth area B5 away from the second display area AA2;

[0070] The number of first anode traces 101 corresponding to the fourth area B4 is the first number (for example, the number of first anode traces 101 corresponding to the fourth area B4 is 7), the number of first anode traces 101 corresponding to the fifth area B5 is the first number (for example, the number of first anode traces 101 corresponding to the fifth area B5 is equal to 7), and the number of first anode traces 101 corresponding to the sixth area B6 is not greater than half of the first number (for example, the number of first anode traces 101 corresponding to the sixth area B6 is less than or equal to 3).

[0071] Specifically, Figure 4 The arrangement of the first anode wiring 101 in the upper left portion of the first display area AA1 is described in detail. Figure 5 As shown, in the odd rows of pixels (the 1st to 15th row, the 3rd to 15th row, the 5th to 15th row, the 9th to 15th row, the 11th to 15th row, the 13th to 15th row), the 1st to 15th row is divided into three areas, B1, B2 and B3. B2 and B3 each correspond to 7 first anode traces 101. The first anode trace 101 corresponding to the B2 area extends along the column direction to between the first anode 11 in the 1st to 15th row and the first anode 11 in the 2nd to 15th row, and extends along the row direction to the second display area AA2. The three first anode traces 101 corresponding to B1 extend downward and then extend leftward to the second display area AA2.

[0072] In the third-to-last row, the first anode traces 101 corresponding to the 7 first anodes 11 on the left are arranged between the first anode 11 in the third-to-last row and the first anode 11 in the fourth-to-last row, and the first anode traces 101 corresponding to the 7 first anodes 11 from the 8th to the 14th on the left are arranged between the first anode 11 in the fourth-to-last row and the first anode 11 in the fifth-to-last row. There are 3 first anodes 11 remaining on the right side of the third-to-last row.

[0073] In the fifth-to-last row, the first anode traces 101 corresponding to the 7 first anodes 11 on the left are arranged between the first anode 11 in the fifth-to-last row and the first anode 11 in the sixth-to-last row, and the first anode traces 101 corresponding to the 7 first anodes 11 from the 8th to the 14th on the left are arranged between the first anode 11 in the sixth-to-last row and the first anode 11 in the seventh-to-last row. There are 3 first anodes 11 remaining on the right side of the fifth-to-last row.

[0074] In the 7th row from the bottom, the first anode traces 101 corresponding to the 7 first anodes 11 on the left are arranged between the first anode 11 in the 7th row from the bottom and the first anode 11 in the 8th row from the bottom, and the first anode traces 101 corresponding to the 5 first anodes 11 in the 8th to 12th row on the left are arranged between the first anode 11 in the 8th row from the bottom and the first anode 11 in the 9th row from the bottom. Since there are only 5 first anode traces 101 between the first anode 11 in the 8th row from the bottom and the first anode 11 in the 9th row from the bottom, the first anode traces 101 corresponding to the left first anode of the three first anodes 11 to the right of the first anode 11 in the 3rd row from the bottom and the left first anode of the three first anodes 11 to the right of the first anode 11 in the 5th row from the bottom can be routed upwards and led out along the row direction between the first anode 11 in the 8th row from the bottom and the first anode 11 in the 9th row from the bottom.

[0075] In the ninth row from the bottom, the first anode traces 101 corresponding to the seven first anodes 11 on the left are arranged between the first anode 11 in the ninth row from the bottom and the first anode 11 in the tenth row from the bottom, and the first anode traces 101 corresponding to the six first anodes 11 in the eighth to thirteenth row from the left are arranged between the first anode 11 in the tenth row from the bottom and the first anode 11 in the eleventh row from the bottom. Since there are only six first anode traces 101 between the first anode 11 in the tenth row from the bottom and the first anode 11 in the eleventh row from the bottom, the first anode trace 101 corresponding to the left first anode of the three first anodes 11 to the right of the first anode 11 in the seventh row from the bottom can be routed upwards and led out along the row direction between the first anode 11 in the tenth row and the first anode 11 in the eleventh row.

[0076] In the 11th row from the bottom, the first anode traces 101 corresponding to the 7 first anodes 11 on the left are arranged between the first anode 11 in the 11th row from the bottom and the first anode 11 in the 12th row from the bottom. The first anode traces 101 corresponding to the 4 first anodes 11 in the 8th to 11th row from the left are arranged between the first anode 11 in the 12th row from the bottom and the first anode 11 in the 13th row from the bottom. Since there are only 4 first anode traces 101 between the first anode 11 in the 12th row from the bottom and the first anode 11 in the 13th row from the bottom, the first anode trace 101 corresponding to the middle first anode among the three first anodes 11 to the right of the first anode 11 in the fifth row from the bottom, the seventh row from the bottom and the ninth row from the bottom can be routed upwards and led out along the row direction between the first anode 11 in the 12th row from the bottom and the first anode 11 in the 13th row from the bottom.

[0077] In the 13th row from the bottom, the first anode traces 101 corresponding to the 7 first anodes 11 on the left are arranged between the first anode 11 in the 13th row from the bottom and the first anode 11 in the 14th row from the bottom. The first anode traces 101 corresponding to the 3 first anodes 11 in the 8th to 10th row from the left are arranged between the first anode 11 in the 14th row from the bottom and the first anode 11 in the 15th row from the bottom. Since there are only 3 first anode traces 101 between the first anode 11 in the 14th row from the bottom and the first anode 11 in the 15th row from the bottom, the first anode traces 101 in the 11th row from the bottom are arranged between the first anode 11 in the 11th row from the bottom. The first anode trace 101 corresponding to the middle first anode among the three first anodes 11 on the right side of the electrode 11 can be routed upward to between the first anode 11 in the fourteenth row and the first anode 11 in the fifteenth row, and then led out in the row direction. The first anode trace 101 corresponding to the rightmost first anode 11 among the three first anodes 11 on the right side of the first anodes 11 in the fifth to last row, the seventh to last row, and the ninth to last row can be routed upward to between the first anode 11 in the fourteenth row and the first anode 11 in the fifteenth to last row, and then led out in the row direction.

[0078] In the 15th row from the bottom, the first anode wirings 101 corresponding to the 7 first anodes 11 are arranged between the first anode 11 in the 15th row from the bottom and the first anode 11 in the 16th row from the bottom, the first anode wirings 101 corresponding to the rightmost first anode among the three first anodes 11 to the right of the first anode 11 in the 11th row from the bottom and the 13th row from the bottom can be routed upwards to the upper side of the first anode 11 in the 16th row from the bottom and led out in the row direction, and the two first anode wirings 101 corresponding to the middle and rightmost first anodes 11 among the three first anodes 11 to the right of the first anode 11 in the 3rd row from the bottom can be routed upwards to the upper side of the first anode 11 in the 16th row from the bottom and led out in the row direction.

[0079] It should be noted that Figure 5 The description is made by taking an example that a maximum of 7 first anode traces 101 are accommodated between two adjacent rows of first anodes. In actual application, wiring is performed according to the wiring method disclosed in the present invention based on actual conditions.

[0080] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 9 As shown, the first display area AA1 is divided into four equal parts (M1, M2, M3 and M4) along the center line of the row direction X and the column direction Y, and the first anode wiring of each equal part adopts Figure 5 The arrangement of the first anode wiring 101 in the display substrate is shown.

[0081] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 9 As shown, the four equal parts include a first equal part M1, a second equal part M2, a third equal part M3 and a fourth equal part M4 arranged in a clockwise direction, the first equal part M1 and the second equal part M2 are symmetrically arranged about the center line of the column direction Y, the second equal part M2 and the third equal part M3 are symmetrically arranged about the center line of the row direction X, the third equal part M3 and the fourth equal part M4 are symmetrically arranged about the center line of the column direction Y, and the fourth equal part M4 and the first equal part M1 are symmetrically arranged about the center line of the row direction X.

[0082] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 9 As shown, the first row first anode H1 is closest to the fourth row M4 in the first equal part M1, the second row first anode H2 is closest to the first equal part M1 in the fourth equal part M4, and there is a first gap d1 between the first row first anode H1 and the second row first anode H2. The first anode wiring 101 corresponding to the first area B1 of the first row first anode H1 close to the second display area AA2 and the first anode wiring 101 corresponding to the first area B1 of the second row first anode H2 close to the second display area AA2 are both located in the first gap.

[0083] It should be noted that the transparent conductive layer in the embodiment of the present disclosure is two layers. To clearly illustrate the arrangement of the anode wiring of each transparent conductive layer, Figure 5 and Figure 9 Only the arrangement of the first anode wiring corresponding to the odd rows on one transparent conductive layer is shown. The arrangement of the first anode wiring corresponding to the even rows on the other transparent conductive layer is the same as the arrangement of the odd rows, but the orthographic projections of the wiring of the two layers are staggered.

[0084] Of course, in a specific implementation, the transparent conductive layer can also be only one layer, and the first anodes in each row of the first display area are all set with the same transparent conductive layer to set the first anode wiring and electrically connected to the second pixel circuit; the transparent conductive layer can also be three layers, and the first anode wirings of rows 1, 4, 7... are set on the first transparent conductive layer, the first anode wirings of rows 2, 5, 8... are set on the second transparent conductive layer, and the first anode wirings of rows 3, 6, 9... are set on the third transparent conductive layer, and so on. The same applies to the other multiple transparent conductive layers.

[0085] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, the material of the transparent conductive layer may be ITO.

[0086] Optionally, in the above-mentioned display substrate provided in the embodiment of the present disclosure, if Figure 2 As shown, the first display area AA1 is configured to install a photosensitive device, such as a camera module.

[0087] Since only the first light-emitting device exists in the first display area AA1 in the present disclosure, a larger light-transmitting area can be provided, which helps to adapt to a camera module of a larger size.

[0088] On the other hand, an embodiment of the present disclosure further provides a display panel, comprising the above-mentioned display substrate.

[0089] On the other hand, embodiments of the present disclosure further provide a display device comprising: a photosensitive device (eg, a camera module) and the above-mentioned display panel; wherein the photosensitive device is disposed in the first display area AA1 of the display substrate. Optionally, the photosensitive device may be a camera module.

[0090] The display device can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigation system, smart watch, fitness wristband, personal digital assistant, etc. Other essential components of the display device are well understood by those skilled in the art and are not described in detail here, nor should they be construed as limitations on the present invention. Furthermore, since the principles underlying the display device's solution are similar to those underlying the display panel described above, the implementation of the display device can be referenced to the embodiments of the display panel described above, and any repetitive details will not be repeated.

[0091] The embodiments of the present disclosure provide a display substrate, a display panel, and a display device, in which a second pixel circuit and a corresponding second light-emitting device are arranged in the second display area, and the first pixel circuit corresponding to the first display area with higher transmittance is not arranged in the first display area, and the density (i.e., pixel resolution) of the multiple first light-emitting devices in the first display area is the same as the density of the multiple second light-emitting devices in the second display area, so that the under-screen camera display area (i.e., the first display area) can display images with the same pixel resolution, improve the luminous brightness of the under-screen camera display area, reduce the brightness difference between the main display area (i.e., the second display area) and the under-screen camera display area (i.e., the first display area), and at the same time, expand the diameter of the hole in the under-screen camera display area, thereby achieving a better full-screen display effect and user experience.

[0092] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0093] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if such changes and modifications of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include such changes and modifications.

Claims

1. A display substrate, wherein: include: A base substrate having a display area and a frame area surrounding the display area, wherein the display area includes: a first display area and a second display area located at least to one side of the first display area, the second display area having a seventh region and an eighth region adjacent to the first display area, the seventh region and the eighth region being arranged opposite each other; wherein the light transmittance of the first display area is greater than that of the second display area; a driving circuit layer located on the base substrate; the driving circuit layer includes a plurality of first pixel circuits and a plurality of second pixel circuits, the plurality of first pixel circuits being located in the seventh region and the eighth region, the orthographic projection of the first pixel circuits on the base substrate not overlapping with the orthographic projection of the first display area on the base substrate, the second pixel circuits being located in the second display area, and the areas occupied by the second pixel circuits in the seventh region and the eighth region being smaller than the areas occupied by the second pixel circuits in the other second display areas; a light-emitting device layer, located on a side of the driving circuit layer away from the base substrate, the light-emitting device layer comprising a plurality of first light-emitting devices and a plurality of second light-emitting devices, the first light-emitting devices being located in the first display area, the second light-emitting devices being located in the second display area, each of the first light-emitting devices comprising an independently provided first anode, and each of the second light-emitting devices comprising an independently provided second anode; each of the plurality of first anodes being electrically connected to a corresponding respective one of the plurality of first pixel circuits, and each of the plurality of second anodes being electrically connected to a corresponding respective one of the plurality of second pixel circuits; wherein the density of the plurality of first light-emitting devices in the first display area is the same as the density of the plurality of second light-emitting devices in the second display area; At least one transparent conductive layer is located between the driving circuit layer and the light-emitting device layer; each of the at least one transparent conductive layer includes a plurality of first anode traces electrically connected to the first anode; the first anode trace includes at least a first portion extending along a column direction and a second portion extending along a row direction, the second portion of the plurality of first anode traces electrically connected to the first anode in the same row is located between two different adjacent rows of first anodes, and the second portion is led out to the outside of the first display area along the row direction, wherein the plurality of first anode traces contained in each transparent conductive layer do not overlap with each other, and the orthographic projections of the plurality of first anode traces contained in different transparent conductive layers on the base substrate are staggered with each other.

2. The display substrate according to claim 1, wherein: The at least one transparent conductive layer includes a first transparent conductive layer and a second transparent conductive layer that are stacked and insulated from each other; In every two adjacent rows of the first anodes, the first anode wiring corresponding to one row of the first anodes is located in the first transparent conductive layer, and the first anode wiring corresponding to the other row of the first anodes is located in the second transparent conductive layer.

3. The display substrate according to claim 2, wherein: The first transparent conductive layer and the second transparent conductive layer have the same pattern.

4. The display substrate according to claim 1, wherein: The number of first anode wirings between two adjacent first anodes in the column direction corresponding to each of the transparent conductive layers is not greater than a first number, and the number of first anode wirings between two adjacent first anodes in the row direction corresponding to each of the transparent conductive layers is not greater than a second number, and the first number is greater than the second number.

5. The display substrate according to claim 4, wherein: At least one row of the first anodes includes adjacent first, second and third regions, the first anode wiring corresponding to the first region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the second region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the third region is located between the same two adjacent rows of first anodes, and the first anode wiring corresponding to the first, second and third regions are located between different two adjacent rows of first anodes.

6. The display substrate according to claim 5, wherein: The first area is close to the second display area, the second area is located on a side of the first area away from the second display area, and the third area is located on a side of the second area away from the second display area; The number of first anode traces corresponding to the first region is no more than half of the first number, and the numbers of first anode traces corresponding to the second region and the third region are both the first number.

7. The display substrate according to claim 4, wherein: At least one row of the first anodes is divided into adjacent fourth, fifth and sixth regions, the first anode wiring corresponding to the fourth region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the fifth region is located between the same two adjacent rows of first anodes, the first anode wiring corresponding to the sixth region is located between different adjacent rows of first anodes, and the first anode wiring corresponding to the fourth, fifth and sixth regions is located between different adjacent rows of first anodes.

8. The display substrate according to claim 7, wherein: The fourth area is close to the second display area, the fifth area is located on a side of the fourth area away from the second display area, and the sixth area is located on a side of the fifth area away from the second display area; The number of first anode traces corresponding to the fourth region is the first number, the number of first anode traces corresponding to the fifth region is the first number, and the number of first anode traces corresponding to the sixth region is no more than half of the first number.

9. The display substrate according to claim 4, wherein: The first number is 11-15, and the second number is 2-6.

10. The display substrate according to claim 1, wherein An insulating layer is provided between the first anode and the transparent conductive layer. The insulating layer has a plurality of vias for electrically connecting the first anode and the first anode wiring. The orthographic projection of the first anode wiring on the base substrate does not overlap with the orthographic projection of the vias on the base substrate.

11. The display substrate according to claim 1, wherein: The plurality of first pixel circuits are located in the frame area adjacent to the first display area.

12. The display substrate according to claim 1, wherein The shape of the first display area is circular, elliptical, rectangular or polygonal.

13. The display substrate according to claim 12, wherein: The first display area is divided into four equal parts along the center lines of the row direction and the column direction, and the first anode wiring of each equal part adopts the arrangement method of the first anode wiring in the display substrate according to any one of claims 1-11.

14. The display substrate according to claim 13, wherein: The four equal parts include a first equal part, a second equal part, a third equal part and a fourth equal part arranged in a clockwise direction, the first equal part and the second equal part are symmetrically arranged about the center line of the column direction, the second equal part and the third equal part are symmetrically arranged about the center line of the row direction, the third equal part and the fourth equal part are symmetrically arranged about the center line of the column direction, and the fourth equal part and the first equal part are symmetrically arranged about the center line of the row direction.

15. The display substrate according to claim 14, wherein: The first anode of the first row is closest to the fourth equal part in the first equal part, the first anode of the second row is closest to the first equal part in the fourth equal part, and there is a first gap between the first anode of the first row and the first anode of the second row. The first anode wiring corresponding to the first area of ​​the first anode of the first row close to the second display area and the first anode wiring corresponding to the first area of ​​the first anode of the second row close to the second display area are both located in the first gap.

16. A display panel, wherein: The display substrate comprises the display substrate according to any one of claims 1 to 15.

17. A display device, wherein: include: A photosensitive device, and a display panel as claimed in claim 16; wherein the photosensitive device is arranged in the first display area of ​​the display substrate.

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