schottky barrier diode
By setting an annular trench and an insulating layer in a gallium oxide-based Schottky barrier diode, the electric field concentration is mitigated, the insulation damage caused by misalignment between the trench and the field insulating layer is solved, and the reverse withstand voltage and leakage current suppression are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TDK CORP
- Filing Date
- 2020-10-05
- Publication Date
- 2026-05-05
AI Technical Summary
In gallium oxide-based Schottky barrier diodes, misalignment between the trench and the field insulating layer leads to insulation failure, making it difficult to ensure reverse breakdown voltage and leakage current suppression.
A semiconductor substrate and a drift layer made of gallium oxide are used, with annular outer peripheral trenches and a central trench. An insulating film and a metal film are covered on the drift layer. The field insulating layer is arranged in a ring and extends into the trench. The metal film has the same potential as the anode electrode, which mitigates the concentration of the electric field.
It effectively prevents insulation failure, suppresses leakage current, improves reverse withstand voltage, and ensures device reliability.
Smart Images

Figure CN114830354B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a Schottky barrier diode, and more particularly to a Schottky barrier diode using gallium oxide. Background Technology
[0002] Schottky barrier diodes are rectifiers that utilize the Schottky barrier created by the junction of a metal and a semiconductor. Compared to conventional diodes with PN junctions, they feature lower forward voltage and faster switching speeds. Therefore, Schottky barrier diodes are sometimes used as switching elements in power devices.
[0003] When Schottky barrier diodes are used as switching elements in power devices, sufficient reverse breakdown voltage is required. Therefore, silicon carbide (SiC), gallium nitride (GaN), and gallium oxide (Ga2O3), which have larger band gaps, are sometimes used instead of silicon (Si). Among them, gallium oxide has a very large band gap of 4.8–4.9 eV and a large insulation breakdown electric field of approximately 8 MV / cm. Therefore, Schottky barrier diodes using gallium oxide are very promising as switching elements in power devices. Examples of Schottky barrier diodes using gallium oxide are described in Patent Documents 1 and 2.
[0004] The Schottky barrier diodes described in Patent Documents 1 and 2 have a field plate structure in which multiple trenches are formed in a gallium oxide layer, and a field insulating layer is formed between the gallium oxide layer and the outer periphery of the anode electrode. If multiple trenches are formed in this way in the gallium oxide layer, the mesa region between the trenches becomes a depletion layer when a reverse voltage is applied, thus pinching off the channel region of the drift layer. This significantly suppresses leakage current when a reverse voltage is applied. Furthermore, because of the field plate structure, the electric field concentration at the end of the anode electrode is mitigated.
[0005] Existing technical documents
[0006] Patent documents
[0007] Patent Document 1: Japanese Patent Application Publication No. 2017-199869
[0008] Patent Document 2: Japanese Patent Application Publication No. 2019-79984 Summary of the Invention
[0009] The technical problem that the invention aims to solve
[0010] However, the formation of the trench and the patterning of the field insulating layer are performed in separate processes, resulting in alignment deviations at their formation locations. Therefore, it is difficult to accurately align the end of the field insulating layer with the end of the trench. Furthermore, if the end of the field insulating layer is offset outwards from the end of the trench, the anode electrode and the semiconductor layer may come into direct contact in the outer region of the trench, potentially causing insulation failure in that area. On the other hand, if the end of the field insulating layer is offset inwards from the end of the trench, a portion of the field insulating layer is formed inside the trench. In this case, within the field insulating layer formed inside the trench, the electric field concentrates at the corner where the portion covering the sidewall of the trench and the portion covering the bottom of the trench form, potentially leading to insulation failure.
[0011] Therefore, the object of the present invention is to prevent insulation damage caused by misalignment between the trench and the field insulating layer in a Schottky barrier diode using gallium oxide.
[0012] Means for solving technical problems
[0013] The Schottky barrier diode of the present invention is characterized by comprising: a semiconductor substrate made of gallium oxide; a drift layer made of gallium oxide disposed on the semiconductor substrate; an anode electrode in Schottky contact with the drift layer; a cathode electrode in ohmic contact with the semiconductor substrate; an insulating film covering the inner wall of a trench disposed in the drift layer; a metal film covering the inner wall of the trench through the insulating film and electrically connected to the anode electrode; and a field insulating layer comprising: a first portion located between the upper surface of the drift layer and the anode electrode, and a second portion covering the inner wall of the trench through the metal film and the insulating film.
[0014] According to the present invention, the field insulating layer extends into the interior of the trench, therefore, the anode electrode and the drift layer are not directly in contact in the outer region of the trench. Furthermore, a metal film exists between the second portion of the field insulating layer and the insulating layer, and this metal film is at the same potential as the anode electrode, thus significantly mitigating the electric field applied to the second portion of the field insulating layer. This prevents insulation failure caused by misalignment between the trench and the field insulating layer.
[0015] In this invention, the trench may also include an annularly formed peripheral trench and a central trench formed in the region surrounded by the peripheral trench. A first portion of the field insulating layer is arranged annularly to surround the peripheral trench, and a second portion of the field insulating layer is disposed inside the peripheral trench. Thus, when a reverse voltage is applied, the mesa region defined by the central trench becomes a depletion layer, and the channel region of the drift layer is interrupted. Therefore, leakage current under reverse voltage conditions can be significantly suppressed.
[0016] In this invention, the first part and the second part may also be made of different insulating materials. This allows for the optimization of the materials used in the first and second parts of the field insulation layer.
[0017] The effects of the invention
[0018] Thus, according to the present invention, insulation damage caused by misalignment between the trench and the field insulating layer can be prevented in Schottky barrier diodes using gallium oxide. Attached Figure Description
[0019] Figure 1 This is a schematic top view illustrating the structure of a Schottky barrier diode 10 according to one embodiment of the present invention.
[0020] Figure 2 It is along Figure 1 The diagram shows a rough cross-section of line AA.
[0021] Figure 3 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0022] Figure 4 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0023] Figure 5 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0024] Figure 6 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0025] Figure 7 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0026] Figure 8 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0027] Figure 9 This is a process diagram illustrating the manufacturing method of the Schottky barrier diode 10.
[0028] Figure 10 This is a schematic cross-sectional view illustrating the structure of the Schottky barrier diode 10A in the modified example.
[0029] Figure 11 This is a schematic cross-sectional view used to illustrate the structure of the Schottky barrier diode used in the comparative example. Detailed Implementation
[0030] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0031] Figure 1 This is a schematic top view illustrating the structure of a Schottky barrier diode 10 according to one embodiment of the present invention. Furthermore, Figure 2 It is along Figure 1 The diagram shows a rough cross-section of line AA.
[0032] like Figure 1 and Figure 2 As shown, the Schottky barrier diode 10 of this embodiment includes a semiconductor substrate 20 and a drift layer 30, both made of gallium oxide (β-Ga₂O₃). Silicon (Si) or tin (Sn) is introduced as an n-type dopant in both the semiconductor substrate 20 and the drift layer 30. The concentration of the dopant is higher in the semiconductor substrate 20 than in the drift layer 30; therefore, the semiconductor substrate 20 acts as an n-type dopant. + The layer plays a role, with drift layer 30 acting as n - The layer plays a role.
[0033] The semiconductor substrate 20 is a substrate obtained by cutting a bulk crystal formed using methods such as melt growth, and its thickness is about 250 μm. There is no particular limitation on the planar dimensions of the semiconductor substrate 20. It is generally selected based on the amount of current flowing in the device. If the maximum forward current is about 20A, then a size of about 2.4 mm × 2.4 mm in top view is sufficient.
[0034] The semiconductor substrate 20 has an upper surface 21 that is located on the upper surface side during mounting and a back surface 22 that is located on the lower surface side during mounting, opposite to the upper surface 21. A drift layer 30 is formed on the entire surface of the upper surface 21. The drift layer 30 is a thin film obtained by epitaxial growth of gallium oxide on the upper surface 21 of the semiconductor substrate 20 using reactive sputtering, PLD, MBE, MOCVD, HVPE, or other methods. There is no particular limitation on the thickness of the drift layer 30; it is generally selected based on the reverse breakdown voltage of the device. To ensure a breakdown voltage of around 600V, it can be set to around 7μm, for example.
[0035] An anode electrode 40, in Schottky contact with the drift layer 30, is formed on the upper surface 31 of the drift layer 30. The anode electrode 40 is made of metals such as platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), molybdenum (Mo), and copper (Cu). The anode electrode 40 can also be a multilayer structure with different metal films stacked on it, such as Pt / Au, Pt / Al, Pd / Au, Pd / Al, Pt / Ti / Au, or Pd / Ti / Au. On the other hand, a cathode electrode 50, in ohmic contact with the semiconductor substrate 20, is provided on the back side 22 of the semiconductor substrate 20. The cathode electrode 50 is made of metals such as titanium (Ti). The cathode electrode 50 can also be a multilayer structure with different metal films stacked on it, such as Ti / Au or Ti / Al.
[0036] In this embodiment, trenches 61 and 62 are provided in the drift layer 30. Both trenches 61 and 62 are located at positions overlapping with the anode electrode 40 in a top view. Trench 61 is an annular outer peripheral trench, and trench 62 is a central trench formed in the area surrounded by the outer peripheral trench. The outer peripheral trench 61 and the central trench 62 do not need to be completely separated; they can be arranged as follows: Figure 1 As shown, the outer peripheral groove 61 is connected to the central groove 62.
[0037] Although not specifically limited, in this embodiment, when the width of the outer peripheral groove 61 is set to W1 and the width of the central groove 62 is set to W2, W1 is set to > W2. This is to prevent insulation failure at the bottom of the outer peripheral groove 61 where the electric field is particularly concentrated. That is, this is because when the width W1 of the outer peripheral groove 61 is increased, the radius of curvature at the bottom increases, or, when the outer peripheral groove 61 is viewed in cross-section, the edge portion formed by the bottom separates into two. As a result, insulation failure near the bottom of the outer peripheral groove 61 is less likely to occur. On the other hand, the depth of the outer peripheral groove 61 and the depth of the central groove 62 are the same.
[0038] The inner walls of trenches 61 and 62 are covered by an insulating film 63 composed of HfO2 or similar materials, and the surface of the insulating film 63 is covered by a metal film 64. That is, the inner walls of trenches 61 and 62 are covered by a laminated film of insulating film 63 and metal film 64. Besides HfO2, insulating materials such as Al2O3 can also be used as the material for the insulating film 63. There are no particular limitations on the material of the metal film 64; it can be the same material as the anode electrode 40, or it can be Cr with excellent adhesion, or it can be a metal material with excellent resistance to wet etching used in semiconductor processes, such as Pt, Au, or W.
[0039] The interiors of trenches 61 and 62 are filled with the same material as the anode electrode 40. In this embodiment, multiple trenches 61 and 62 are provided in the drift layer 30; therefore, the material of the anode electrode 40 can also be a material with a low work function, such as molybdenum (Mo) or copper (Cu). Furthermore, since multiple trenches 61 and 62 are provided in the drift layer 30, the doping concentration of the drift layer 30 can be increased to 5 × 10⁻⁶. 16 cm -3 about.
[0040] The portion of the drift layer 30 divided by trenches 61 and 62 constitutes a mesa region M. When a reverse voltage is applied between the anode electrode 40 and the cathode electrode 50, the mesa region M becomes a depletion layer, thus pinching off the channel region of the drift layer 30. This significantly suppresses leakage current under reverse voltage conditions.
[0041] Furthermore, a field insulating layer 70 is provided on the upper surface 31 of the drift layer 30, specifically on the portion located outside the peripheral groove 61 when viewed from above. The field insulating layer 70 can be made of various resins such as epoxy resin, acrylic resins like polymethyl methacrylate, polyurethane, polyimide, polyvinyl alcohol, fluoropolymers, and polyolefins, or inorganic oxides or nitrides such as silicon oxide, alumina, and silicon nitride. When using resin as the material for the field insulating layer 70, it can be formed by methods such as drying a resin solution after coating to form a resin film, polymerizing a resin monomer after coating or vapor deposition, or performing crosslinking treatment after film formation. Furthermore, when using inorganic materials as the material for the field insulating layer 70, it can be formed using vacuum processes such as sputtering or vapor deposition, or solution processes such as sol-gel methods.
[0042] like Figure 2 As shown, a portion of the field insulating layer 70 extends into the interior of the peripheral trench 61. Thus, the outer periphery and bottom portions of the inner wall of the peripheral trench 61 are covered by the field insulating layer 70 through the metal film 64 and the insulating film 63. Silicon oxide and other insulating materials can be used as the material for the field insulating layer 70. Here, the portion of the field insulating layer 70 that is annularly arranged on the upper surface 31 of the drift layer 30 surrounding the peripheral trench 61 constitutes the first portion 71, and the portion formed inside the peripheral trench 61 constitutes the second portion 72. The first portion 71 and the second portion 72 can be made of the same insulating material or different insulating materials. As an example, Al2O3 can be used as the material for the first portion 71, and SiO2 as the material for the second portion 72.
[0043] According to this structure, the outer periphery of the anode electrode 40 is formed on the first portion 71 of the field insulating layer 70. Furthermore, the portion of the anode electrode 40 that overlaps with the mesa region M is in Schottky contact with the drift layer 30. This results in a so-called field plate structure, thus further mitigating the electric field applied to the bottom of the peripheral trench 61. Furthermore, the second portion 72 of the field insulating layer 70 is not formed directly on the surface of the insulating film 63, but rather covers the insulating film 63 with a metal film 64 at the same potential as the anode electrode 40; therefore, no enhanced electric field is applied to the second portion 72 of the field insulating layer 70.
[0044] Next, the manufacturing method of the Schottky barrier diode 10 of this embodiment will be described.
[0045] Figures 3-9 These are process diagrams illustrating the manufacturing method of the Schottky barrier diode 10 in this embodiment, and they are all related to... Figure 2 The cross-section shown corresponds to this.
[0046] First, such as Figure 3As shown, a semiconductor substrate 20 made of gallium oxide is prepared, and a drift layer 30 made of gallium oxide is formed on its upper surface 21. As described above, the drift layer 30 can be formed by epitaxial growth of gallium oxide on the upper surface 21 of the semiconductor substrate 20 using reactive sputtering, PLD method, MBE method, MOCVD method, HVPE method, etc.
[0047] Next, as Figure 4 As shown, peripheral trenches 61 and central trenches 62 are formed in the drift layer 30 using dry etching with BCl3 or similar materials. Next, as... Figure 5 As shown, an insulating film 63 is formed on the surface of the drift layer 30. The insulating film 63 can be formed using conventional film deposition methods such as ALD. Then, the insulating film 63 on the mesa region M is removed using conventional processing methods such as wet etching, dry etching, or CMP. This results in the drift layer 30 being exposed on the mesa region M, and the inner walls of the trenches 61 and 62 being covered by the insulating film 63. At this point, a portion of the drift layer 30 on the mesa region M can also be removed.
[0048] Next, as Figure 6 As shown, a metal film 64 is formed over the entire surface. The metal film 64 can be formed using conventional film deposition methods such as sputtering and vapor deposition. Then, the metal film 64 on the mesa region M is removed using conventional processing methods such as wet etching, dry etching, and CMP. As a result, the drift layer 30 on the mesa region M is exposed, and the inner walls of the trenches 61 and 62 are covered by the metal film 64 through an insulating film 63. At this time, a portion of the drift layer 30 on the mesa region M can also be removed. Furthermore, the removal of the insulating film 63 formed on the mesa region M and the removal of the metal film 64 formed on the mesa region M can be performed simultaneously.
[0049] Next, as Figure 7 As shown, after the field insulating layer 70 is formed over the entire surface, a resist R is formed covering the outer periphery of the field insulating layer 70. The field insulating layer 70 can be formed using conventional film deposition methods such as CVD. The patterning of the resist R can be performed using photolithography. Here, the inner edge E0 of the resist R is designed to be located between the outer edge E1 and the inner edge E2 of the outer peripheral trench 61. That is, the opening diameter of the resist R is designed to be smaller than the outer diameter and larger than the inner diameter of the outer peripheral trench 61, with the inner edge E0 of the resist R located inside the outer peripheral trench 61. Thus, even if some alignment deviations occur, the portion of the upper surface 31 of the drift layer 30 located outside the outer peripheral trench 61 will be reliably covered by the resist R.
[0050] By etching in this state, such as Figure 8As shown, the portion of the field insulating layer 70 not covered by the resist R is removed. Thus, portions of the field insulating layer 70 formed on the mesa region M, within the central trench 62, and within the peripheral trench 61 are removed, leaving a first portion 71 on the upper surface 31 of the drift layer 30 located outside the peripheral trench 61, and a second portion 72 covering the outer peripheral wall and bottom of the peripheral trench 61. Therefore, in this embodiment, because a resist R with an opening smaller than the outer diameter of the peripheral trench 61 is used, the portion of the upper surface 31 of the drift layer 30 located outside the peripheral trench 61 is reliably covered by the first portion 71 of the field insulating layer 70.
[0051] Next, as Figure 9 As shown, after the anode electrode 40 is formed over the entire surface, the outer peripheral portion of the anode electrode 40 is removed. At this time, the outer peripheral edge E3 of the anode electrode 40 is designed to be on the outside compared to the outer edge E1 of the outer peripheral groove 61, thereby forming a field plate structure. The distance between edge E1 and edge E3, i.e., the field plate length, is preferably 10 μm or more.
[0052] Furthermore, the metal material filling the interior of trenches 61 and 62 can be different from the material of the anode electrode 40. In this case, the anode electrode 40 can be formed first, and then other metal materials can be filled into the interior of trenches 61 and 62, provided that no metal material different from the anode electrode 40 remains on the mesa region M. Alternatively, the interior of trenches 61 and 62 can be filled with a metal material different from the anode electrode 40 first. However, the metal film 64 located at least inside the outer peripheral trench 61 needs to be in contact with the anode electrode 40, or electrically connected to the anode electrode 40 via the metal material filled into the outer peripheral trench 61. Thus, the metal film 64 located at least inside the outer peripheral trench 61 becomes at the same potential as the anode electrode 40.
[0053] Then, by forming a cathode electrode 50 on the back side 22 of the semiconductor substrate 20, the Schottky barrier diode 10 of this embodiment is completed.
[0054] As explained above, in the Schottky barrier diode 10 according to this embodiment, even in the event of alignment misalignment, the portion of the upper surface 31 of the drift layer 30 located outside the peripheral trench 61 is reliably covered by the first portion 71 of the field insulating layer 70. Furthermore, because a metal film 64 exists between the second portion 72 of the field insulating layer 70 and the insulating film 63, and this metal film 64 is at the same potential as the anode electrode 40, the electric field applied to the second portion 72 of the field insulating layer 70 is significantly mitigated. Thus, insulation damage caused by alignment misalignment between the peripheral trench 61 and the field insulating layer 70 can be prevented.
[0055] Figure 10This is a schematic cross-sectional view illustrating the structure of the Schottky barrier diode 10A in the modified example.
[0056] Figure 10 The Schottky barrier diode 10A shown differs from the Schottky barrier diode 10 described above in that the outer peripheral trench 61 is filled with a field insulating layer 70. For example... Figure 10 As illustrated by the Schottky barrier diode 10A, the field insulating layer 70 can also be used to fill the interior of the peripheral trench 61, provided that the metal film 64 is at the same potential as the anode electrode 40.
[0057] The preferred embodiments of the present invention have been described above, but the present invention is not limited to the embodiments described above. Various modifications can be made without departing from the spirit of the present invention, and these modifications are of course included within the scope of the present invention.
[0058] Example
[0059] <Example 1>
[0060] Imagine having with Figure 1 and Figure 2 The simulation model of Embodiment 1, which has the same structure as the Schottky barrier diode 10 shown, simulates the electric field strength when a reverse voltage of 800V is applied between the anode electrode 40 and the cathode electrode 50. The doping concentration of the semiconductor substrate 20 is 1×10⁻⁶. 18 cm -3 The dopant concentration of the drift layer 30 is 1×10⁻⁶. 16 cm -3 The drift layer 30 has a thickness of 7 μm. Furthermore, the peripheral trench 61 has a width W1 of 10 μm, the central trench 62 has a width of 2 μm, and both have a depth of 3 μm. Additionally, the width of the drift layer 30 in contact with the anode electrode 40, i.e., the width of the mesa region M, is 2 μm. The insulating film 63 is a 50 nm thick HfO2 film, and the metal film 64 is a 100 nm thick Cr film. The field insulating layer 70 is a 320 nm thick SiO2 film, and the field plate length is 10 μm.
[0061] The simulation results Figure 2 In region A, i.e., the second portion 72 of the field insulation layer 70, the electric field at the corner of the boundary between the portion covering the sidewall of the outer peripheral trench 61 and the portion covering the bottom of the outer peripheral trench 61 is 1.2 MV / cm. Furthermore, Figure 2 The electric field in region B, which is the portion of the first part 71 of the field insulating layer 70 that is in contact with the outer peripheral end of the anode electrode 40, is 9.8 MV / cm. The insulation breakdown electric field strength of SiO2 constituting the field insulating layer 70 is 10 MV / cm. Therefore, the electric field strength in regions A and B is less than that in regions B.
[0062] <Example 2>
[0063] Imagine having with Figure 10 The simulation model of Embodiment 2, which has the same structure as the Schottky barrier diode 10A shown, simulates the electric field strength when an 800V reverse voltage is applied between the anode electrode 40 and the cathode electrode 50. The simulation model of Embodiment 2 has the same parameters as Embodiment 1, except that the outer peripheral trench 61 is filled with the field insulating layer 70. The simulation results show that the maximum electric field applied to the second portion 72 of the field insulating layer 70 is 1.2 MV / cm. Figure 10 The electric field in region B shown is 9.8 MV / cm.
[0064] <Example 3>
[0065] Imagine using Al2O3 as the material for the first portion 71 of the field insulating layer 70 and SiO2 as the material for the second portion 72 of the field insulating layer 70. A simulation model of Example 3, with the same parameters as Example 1, is used to simulate the electric field strength when an 800V reverse voltage is applied between the anode electrode 40 and the cathode electrode 50. The simulation results show that the electric field in region A is 0.4 MV / cm and the electric field in region B is 6.7 MV / cm.
[0066] <Comparative Example>
[0067] Imagine Figure 11 The comparative example simulation model shown simulates the electric field strength when a reverse voltage of 800V is applied between the anode electrode 40 and the cathode electrode 50. The comparative example simulation model omits the metal film 64, but otherwise has the same parameters as the simulation model of Example 1. The simulation results are applied to... Figure 11 The maximum electric field in region A shown is 11.2 MV / cm. Figure 11 The electric field in region B shown is 10.2 MV / cm, which exceeds the insulation breakdown electric field strength of SiO2, which is 10 MV / cm.
[0068] Explanation of symbols
[0069] 10, 10A Schottky barrier diode
[0070] 20 Semiconductor substrates
[0071] 21. Top surface of semiconductor substrate
[0072] 22. Back side of semiconductor substrate
[0073] 30 Drift Layers
[0074] 31. Upper surface of the drift layer
[0075] 40 Anode electrode
[0076] 50 Cathode Electrode
[0077] 61 Peripheral trench
[0078] 62 Central trench
[0079] 63 Insulating film
[0080] 64 metal film
[0081] 70 Field Insulation Layer
[0082] The first part of the 71 field insulation layer
[0083] The second part of the 72 field insulation layer
[0084] E0~E3 edge
[0085] M countertop area
[0086] R resist
Claims
1. A Schottky barrier diode, characterized in that, have: Semiconductor substrates made of gallium oxide; A drift layer made of gallium oxide is disposed on the semiconductor substrate; Anode electrode in contact with the Schottky drift layer; Cathode electrode in ohmic contact with the semiconductor substrate; An insulating film covering the inner wall of the annular outer peripheral groove of the drift layer; A metal film that covers the inner wall of the outer peripheral groove through the insulating film and is electrically connected to the anode electrode; as well as Field insulation layer, The field insulating layer comprises: a first portion located between the upper surface of the drift layer and the anode electrode, and a second portion covering at least a portion of the outer periphery and bottom of the inner wall of the outer peripheral trench, separated by the metal film electrically connected to the anode electrode and the insulating film.
2. The Schottky barrier diode as described in claim 1, characterized in that, The drift layer also includes a central groove formed in the region surrounded by the peripheral grooves. The first portion of the field insulation layer is arranged in a ring shape to surround the outer peripheral groove.
3. The Schottky barrier diode as described in claim 1 or 2, characterized in that, The first part and the second part are made of different insulating materials.
Citation Information
Patent Citations
Trench MOS schottky diode
JP2017199869A
Schottky barrier diode
JP2019079984A
Trench DMOS device with improved termination structure for high voltage applications
CN104145341A
Schottky barrier diode
US20150228809A1