Display panel and display device

Abstract

This invention discloses a display panel and a display device. The display panel includes a substrate and a crack detection structure disposed on the substrate. The substrate has a display area and a peripheral area surrounding the display area. The crack detection structure is located within the peripheral area and includes a detection line and at least two constant voltage signal lines. The detection line is located near the outer edge of the peripheral area and at least partially surrounds the display area. The constant voltage signal lines are located between the detection line and the display area. The detection line has a connecting terminal and an output terminal, and the connecting terminal is connected to at least two constant voltage signal lines. The display device includes the display panel. The detection line for PCD is disposed at the outer edge of the peripheral area, and the connecting terminal of the detection line is connected to at least two constant voltage signal lines, effectively reducing the resistive load of the detection line and avoiding a large voltage drop at the output terminal due to the resistance of the detection line itself, thus overcoming the problem of poor crack detection caused by a large voltage drop.

Description

Technical Field

[0001] This invention relates to the field of display-related technologies, and more specifically to a display panel and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels are widely used in various display devices such as mobile phones, televisions, and laptops due to their advantages such as self-illumination, small thickness, light weight, and high luminous efficiency.

[0003] During the manufacturing or transportation of OLED display panels, the edges are prone to developing hard-to-observe cracks under stress. The presence of these cracks can lead to moisture penetration and the formation of defects, affecting product yield.

[0004] Large and medium-sized OLED display panels have longer bezels, requiring longer Panel Crack Detection (PCD) traces. The resistance of the traces themselves can easily cause voltage drops, resulting in inaccurate detection results due to voltage drops in PCD traces on large and medium-sized OLED panels. Summary of the Invention

[0005] In view of the above-mentioned defects or deficiencies in the prior art, it is desirable to provide a display panel and a display device.

[0006] In a first aspect, embodiments of the present invention provide a display panel, comprising: a substrate and a crack detection structure disposed on the substrate, the substrate having a display area and a peripheral area surrounding the display area;

[0007] The crack detection structure is located in the peripheral area, and the crack detection circuit includes: a detection line and at least two constant voltage signal lines;

[0008] The detection line is located near the outer edge of the peripheral area and at least partially surrounds the display area, and the constant voltage signal line is located between the detection line and the display area;

[0009] The detection line has an adapter end and an output end, and the adapter end is connected to at least two constant voltage signal lines.

[0010] In some examples, the detection line further includes an input terminal, the detection line including a first portion located between the adapter terminal and the output terminal and a second portion located between the adapter terminal and the input terminal, the first portion being disposed along the outer edge of the peripheral region, and the second portion being located between the first portion and the constant voltage signal line.

[0011] In some examples, the display area includes a first display area and a second display area distributed on at least one side of the first display area. The second display area is provided with multiple first data lines and multiple first sub-pixels distributed in an array. Each column of first sub-pixels and each first data line are electrically connected in a one-to-one correspondence.

[0012] The crack detection structure further includes a switch signal line and a first switch module. The detection line, the switch signal line, and the plurality of first data lines are all electrically connected to the first switch module. The first switch module is configured to load the output signal provided by the output end of the detection line onto the first data line under the control of the turn-on signal provided by the switch signal line.

[0013] In some examples, along a first direction, a second display area is provided on each side of the first display area;

[0014] The surrounding area is provided with two detection lines, which correspond one-to-one with the two second display areas, and the two detection lines are symmetrical in the first direction.

[0015] The detection line includes a first segment extending along the first direction, a second segment extending longitudinally along the substrate, and a third segment extending along the first direction. The first segment, the second segment, and the third segment are connected sequentially, and the first segment and the third segment are located on opposite sides within the peripheral area. The end of the first segment away from the second segment is the transition end, and the end of the third segment away from the second segment is the output end. The first direction and the second direction are perpendicular to the thickness direction of the substrate.

[0016] The at least two constant voltage signal lines are connected to the adapter terminal via an adapter cable, which extends along the first direction and is located inside the first segment.

[0017] In some examples, the display area includes a stacked driving circuit layer and a light-emitting functional layer. The constant voltage signal line and the adapter line are both in the same layer and made of the same material as the source and drain metal layers in the driving circuit layer, and the detection line is in the same layer and made of the same material as the gate layer in the driving circuit layer.

[0018] In some examples, a gate driving circuit is also provided in the peripheral region of the substrate, and the gate driving circuit is located inside the constant voltage signal line;

[0019] The gate driving circuit includes multiple cascaded units, each cascaded unit includes at least two gate driving modules, each gate driving module corresponds one-to-one with each constant voltage signal line, and the constant voltage signal transmitted by the constant voltage signal line is a high-level signal or a low-level signal in the corresponding gate driving module.

[0020] In some examples, the first switching module includes a plurality of first switching transistors, each of which is electrically connected to each of the first data lines.

[0021] The gate of the first switching transistor is connected to the switching signal line, the first terminal of the first switching transistor is connected to the first data line, and the second terminal of the first switching transistor is connected to the output terminal of the detection line.

[0022] In some examples, the first display area is provided with an array of multiple second sub-pixels, multiple second data lines, data signal lines, and a second switch module;

[0023] Each column of the second sub-pixel and each of the second data lines are electrically connected in a one-to-one correspondence;

[0024] The data signal line, the plurality of second data lines, and the switch signal line are electrically connected to the second switch module. The second switch module is configured to load the signal transmitted by the data signal line onto the second data line under the control of the turn-on signal provided by the switch signal line.

[0025] In some examples, the second switching module includes a plurality of second switching transistors, each of which is electrically connected to each of the second data lines in a one-to-one correspondence;

[0026] The gate of the second switching transistor is connected to the switching signal line, the first terminal of the second switching transistor is connected to the second data line, and the second terminal of the second switching transistor is connected to the data signal line.

[0027] In some examples, the first display area has multiple second sub-pixels and multiple second data lines arranged in an array, with each column of second sub-pixels and each second data line electrically connected in a one-to-one correspondence; the input end of the second data line is configured to be floating.

[0028] Secondly, embodiments of the present invention provide a display device, including the display panel described above.

[0029] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0030] The display panel and display device provided in this embodiment of the invention are provided with a crack detection structure. The detection line for PCD is located at the outer edge of the peripheral area. The adapter end of the detection line is connected to at least two constant voltage signal lines, which effectively reduces the resistive load of the detection line and avoids a large voltage drop at the output end due to the resistance of the detection line itself, thus overcoming the problem of poor crack detection caused by a large voltage drop. The adapter end of the detection line is connected to at least two constant voltage signal lines, which can reduce the number of turns of the detection line and reduce the wiring space of the detection line, which is beneficial to the narrow bezel design of the display panel. Attached Figure Description

[0031] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0032] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0033] Figure 2 for Figure 1 A schematic diagram of the cross-section along the AA direction;

[0034] Figure 3 for Figure 1 Schematic diagram of the cross section in the middle BB direction;

[0035] Figure 4 This is a schematic diagram of the structure of a display panel provided in another embodiment of the present invention;

[0036] Figure 5 This is a schematic diagram of the structure of a display panel provided in another embodiment of the present invention;

[0037] Figure 6 This is a schematic diagram of the structure of a display panel provided in another embodiment of the present invention. Detailed Implementation

[0038] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0040] PCD traces are metal traces installed in the display panel to detect whether cracks appear at the edges of the display panel.

[0041] The display panel has horizontal and vertical dimensions, and includes a display area and a peripheral area surrounding the display area. Conventionally, the PCD traces are located within the peripheral area. The display area includes a first display area and second display areas distributed horizontally on both sides of the first display area. To detect whether there are cracked traces at the edges, the following settings are used in existing technology: when there are no cracks at the edges, both the first and second display areas are black; when cracks appear at the edges, the first display area is black, and the second display area is bright.

[0042] However, the PCD traces in medium and large-sized OLED display panels are often quite long. Due to the resistive load of the PCD traces themselves, the voltage at the output end of the PCD traces is insufficient to make the second display area black. Even if there are no cracks at the edge, the second display area may appear bright, which reduces the reliability of screen crack detection and ultimately leads to poor display quality of medium and large-sized OLED display panels.

[0043] like Figure 1 As shown in the figure, an embodiment of the present invention provides a display panel, including: a substrate 10 and a crack detection structure disposed on the substrate 10. The substrate 10 has an AA area and a peripheral area surrounding the display area (Active Area, abbreviated as AA area).

[0044] The crack detection structure is located in the peripheral area and includes: a detection line 20 and at least two constant voltage signal lines 22;

[0045] The detection line 20 is located near the outer edge of the peripheral area and at least partially surrounds the display area, while the constant voltage signal line 22 is located between the detection line 20 and the display area.

[0046] The detection line 20 has an input terminal PCD_IN, an adapter terminal 201, and an output terminal PCD_OUT. The adapter terminal 201 is connected to at least two constant voltage signal lines 22.

[0047] refer to Figure 1 The detection line 20 includes a first part located between the adapter terminal 201 and the output terminal PCD_OUT, and a second part located between the adapter terminal 201 and the input terminal PCD_IN. The first part is positioned along the outer edge of the peripheral area, and the second part is located between the first part and the constant voltage signal line 22. In other words, the first part connected to the output terminal PCD_OUT is located at the outermost edge of the peripheral area, which is beneficial for timely and accurate detection of whether cracks appear at the edge of the display panel.

[0048] In this embodiment, the adapter terminal 201 of the detection line 20 is connected to at least two constant voltage signal lines 22. That is, the PCD trace in the display panel can essentially be understood as the detection line 20 and at least two constant voltage signal lines 22 connected to the adapter terminal 201 of the detection line 20. This design can effectively reduce the resistive load of the PCD trace. Under normal detection conditions, it can effectively avoid the situation where the output voltage of the detection line PCD_OUT is too low, which may lead to a false judgment of the presence of cracks, thereby improving the reliability of crack detection.

[0049] In some embodiments, the AA area includes a first display area 11 and a second display area 12 at least distributed on one side of the first display area 11. The second display area 12 is provided with a plurality of first data lines 24 and a plurality of first sub-pixels distributed in an array. Each column of first sub-pixels and each first data line 24 are electrically connected in a one-to-one correspondence.

[0050] The crack detection structure also includes a switch signal line 21 and a first switch module 23. The detection line 20, the switch signal line 21, and multiple first data lines 24 are all electrically connected to the first switch module 23. The first switch module 23 is configured to load the output signal provided by the output terminal PCD_OUT of the detection line 20 to the first data line 24 under the control of the turn-on signal provided by the switch signal line 21.

[0051] That is, the first data line 24 of the second display area 12 receives the output signal provided by the output terminal PCD_OUT of the detection line 20. When the detection line 20 is normal and when a crack occurs, the second display area 12 will display different images respectively, so that the crack can be detected in time.

[0052] In some embodiments, the first switch module 23 includes a plurality of first switch transistors T1, each of which is electrically connected to each of the first data lines 24 in a one-to-one correspondence.

[0053] The gate of the first switching transistor T1 is connected to the switching signal line 21, the first terminal of the first switching transistor T1 is connected to the first data line 24, and the second terminal of the first switching transistor T1 is connected to the output terminal PCD_OUT of the detection line 20.

[0054] In some embodiments, the first display area 11 is provided with an array of multiple second sub-pixels, multiple second data lines 25, data signal lines 26 and a second switch module 27;

[0055] Each column's second sub-pixel and each second data line 25 are electrically connected in a one-to-one correspondence;

[0056] Data signal line 26, multiple second data lines 25 and switch signal line 21 are electrically connected to second switch module 27. Second switch module 27 is configured to load the signal transmitted by data signal line 26 onto second data line 25 under the control of the turn-on signal provided by switch signal line 21.

[0057] Furthermore, the second switch module 27 includes a plurality of second switch transistors T2, each of which is electrically connected to each of the second data lines 25 in a one-to-one correspondence.

[0058] The gate of the second switching transistor T2 is connected to the switching signal line 21, the first terminal of the second switching transistor T2 is connected to the second data line 25, and the second terminal of the second switching transistor T2 is connected to the data signal line 26.

[0059] Specifically, the input terminal SW of the switch signal line 21 receives an enable signal to control the first switch transistor T1 to turn on. When the first switch transistor T1 turns on, the output signal provided by the output terminal PCD_OUT of the detection line 20 is loaded onto the first data line 24 in the second display area 12.

[0060] The turn-on signal transmitted by the switch signal line 21 also controls the second switch transistor T2 to turn on. When the second switch transistor T2 turns on, the data signal received by the input terminal D1 of the data signal line 26 is loaded onto the second data line 25 in the first display area 11.

[0061] For example, this embodiment sets the following crack detection rules:

[0062] When the edges of the display panel are normal, both the first and second display areas display a black screen; when cracks appear on the edges of the display panel, the first display area displays a black screen and the second display area displays a bright screen (i.e., one of red, green, blue, or white).

[0063] For example, the data signal received by data signal line 26 causes the first display area 11 to display a black screen, while the output signal provided by the output terminal PCD_OUT of detection line 20 is different when the edge is normal and when the edge has a crack. Correspondingly, the image displayed in the second display area 12 is different when the edge is normal and when the edge has a crack, thus detecting whether there is a crack at the edge. In this way, based on the display images of the first display area 11 and the second display area 12, it can be determined whether the display panel has a crack.

[0064] In some embodiments, a gate on array (GOA) circuit (not shown) is also provided in the peripheral region of the substrate 10, and the gate on array circuit is located inside the constant voltage signal line 22;

[0065] The gate drive circuit includes multiple cascaded units, each cascaded unit includes at least two gate drive modules (i.e., GOA modules), each gate drive module corresponds one-to-one with each constant voltage signal line 22, and the constant voltage signal transmitted by the constant voltage signal line 22 is the high-level signal or low-level signal in the corresponding gate drive module.

[0066] Typically, the gate driving circuit of a small-sized OLED display panel includes a Gate GOA module and a Reset GOA module. The Gate GOA module outputs the horizontal scan signal, and the Reset GOA module outputs the reset signal. In contrast, the gate driving circuit of a medium-to-large-sized OLED display panel includes four GOA modules: Gate GOA, EM GOA, Reset1 GOA, and Reset2 GOA. The Gate GOA module outputs the horizontal scan signal, the EM GOA module outputs the light emission control signal, and the Reset1 and Reset2 GOA modules output the reset signal. Each GOA module has a high-level signal VGH and a low-level signal VGL. Of course, the number of gate driving modules in the gate driving circuit of a medium-to-large-sized OLED display panel can also be two, three, or more, depending on the specific circuit design.

[0067] In this embodiment, the constant voltage signal transmitted by the constant voltage signal line 22 is a high-level signal or a low-level signal from each gate driving module in the gate driving circuit. This avoids introducing new wiring, thereby reducing the area occupied by the peripheral region, which is beneficial for the narrow bezel design of medium and large-sized OLED display panels. At the same time, it can reduce the line resistance of the PCD traces and ensure the reliability of crack detection. (Reference) Figure 1 The adapter 201 connects to four constant voltage signal lines 22, namely VGH_Gate, VGH_EM, VGH_Reset1 and VGH_Reset2.

[0068] In some embodiments, the AA region includes a driving circuit layer and a light-emitting functional layer stacked together, wherein the driving circuit layer is a thin-film transistor array layer, including a plurality of thin-film transistors (not shown) distributed in an array.

[0069] If the thin-film transistor, the first switching transistor T1, and the second switching transistor T2 in the driving circuit layer are all N-type MOS transistors, the high-level signal is the gate voltage to turn on the N-type MOS transistor, and the low-level signal is the gate voltage to turn off the N-type MOS transistor.

[0070] Alternatively, if the thin-film transistor, the first switching transistor T1, and the second switching transistor T2 in the driving circuit layer are all P-type MOS transistors, the low-level signal is the gate voltage to turn on the P-type MOS transistor, and the high-level signal is the gate voltage to turn off the P-type MOS transistor.

[0071] In this embodiment, preferably, the thin-film transistor, the first switching transistor T1 and the second switching transistor T2 in the driving circuit layer are all P-type MOS transistors, the input terminal PCD_IN receives a high-level signal, and the four constant voltage signal lines 22 connected to the adapter terminal 201 are VGH_Gate, VGH_EM, VGH_Reset1 and VGH_Reset2, respectively.

[0072] Preferably, the second sub-pixels distributed in multiple arrays in the first display area 11 include red (R) sub-pixels, green (G) sub-pixels and blue (B) sub-pixels, and the first sub-pixels distributed in multiple arrays in the second display area 12 include G sub-pixels;

[0073] Preferably, the input terminal SW of the switch signal line 21 and the input terminal D1 of the data signal line 22 both receive low-level signals.

[0074] Thus, the first display area displays a black screen, the second display area displays a black screen when the edges are normal, and the second display area displays a green screen when cracks appear at the edges.

[0075] Furthermore, the first sub-pixels distributed in multiple arrays of 12 in the second display area include R sub-pixels. The second display area displays a black image when the edges are normal, and a red image when cracks appear at the edges; or...

[0076] The first sub-pixels distributed in multiple arrays of 12 in the second display area also include B sub-pixels. The second display area displays a black image when the edges are normal, and a blue image when cracks appear at the edges; or...

[0077] The first sub-pixels distributed in the array of 12 in the second display area include R sub-pixels, G sub-pixels and B sub-pixels. The second display area presents a black screen when the edges are normal and a white screen when cracks appear at the edges.

[0078] In some embodiments, refer to Figures 1 to 3 Along the first direction X, a second display area 12 is provided on both sides of the first display area 11;

[0079] Two detection lines 20 are provided in the surrounding area. The two detection lines 20 correspond one-to-one with the two second display areas 12, and the two detection lines 20 are symmetrical in the first direction X.

[0080] The detection line 20 includes a first segment 202 extending along the first direction X, a second segment 203 extending along the second direction Y, and a third segment 204 extending along the first direction X. The first segment 202, the second segment 203, and the third segment 204 are connected sequentially, and the first segment 202 and the third segment 204 are located on opposite sides within the peripheral area. The end of the first segment 202 away from the second segment 203 is the adapter end 201, and the end of the third segment 204 away from the second segment 203 is the output end PCD_OUT. The first direction X and the second direction Y are perpendicular to the thickness direction of the substrate.

[0081] At least two constant voltage signal lines 22 are connected to the adapter terminal 201 via an adapter cable 28, which extends along a first direction and is located inside the first segment 202.

[0082] In this embodiment, the display area 10 includes a first display area 11 and a second display area 12 distributed laterally on both sides of the first display area 11. Two detection lines 20 are arranged corresponding to the two second display areas 12. This arrangement of the second display areas 12 and the detection lines 20 facilitates the detection of whether there are cracks on the edge of the display panel.

[0083] refer to Figure 1 The first part of the detection line 20 includes a first segment 202, a second segment 203, and a third segment 204. To optimize the wiring, the input terminal PCD_IN and the output terminal PCD_OUT of the detection line 20 are both located on the lower side of the display panel, and the input terminal of the constant voltage signal line 22 is also located on the lower side of the display panel. Correspondingly, the constant voltage signal line at least wraps around the left and right sides and the bottom side of the AA area. An adapter line 28 extending along the first direction X connects at least two constant voltage signal lines 22 to the adapter terminal 201 of the detection line 20. This reduces the area occupied by the constant voltage signal line 22 in the peripheral area, which is beneficial for the narrow bezel design of the display panel.

[0084] In some embodiments, the driving circuit layer includes a gate layer, a gate insulating layer, a source / drain metal layer, and a passivation layer sequentially stacked on the substrate 10. The constant voltage signal line 22 and the adapter line 28 are both in the same layer and made of the same material as the source / drain metal layer in the driving circuit layer, and the detection line 20 is in the same layer and made of the same material as the gate layer in the driving circuit layer. This allows the constant voltage signal line, the adapter line, and the source / drain metal layer to be formed simultaneously in the same patterning process, and the detection line and the gate layer to be formed simultaneously in the same patterning process. This simplifies the manufacturing process of the display panel and reduces the manufacturing cost of the display panel.

[0085] refer to Figure 4 Another embodiment of the present invention provides a display panel. The detection line includes an adapter 201 and an output terminal PCD_OUT, with the adapter 201 multiplexed as the input terminal of the detection line 20.

[0086] This embodiment and Figure 1 The difference in the illustrated display panel is that the detection line only has the first part, while the PCD trace includes only the detection line with the first part and the constant voltage signal line 22; the remaining structure will not be described in detail here. Compared to Figure 1 The example display panel in this embodiment reduces the number of coils in the PCD traces, which helps to reduce the area occupied by the PCD traces in the surrounding area, thereby facilitating the narrow bezel design of medium and large-sized OLED display panels.

[0087] It is understood that the aforementioned crack detection rules also apply to this embodiment.

[0088] Regarding the above Figures 1 to 3 The example is a display panel, Figure 4 The crack detection rules for the example display panel include, but are not limited to, existing examples. Furthermore, the crack detection rules applicable to the above embodiments may also be:

[0089] When the edges of the display panel are normal, the first display area displays a white image and the second display area displays a black image; when cracks appear on the edges of the display panel, the second display area displays a bright image (i.e., one of a red, green, blue, or white image).

[0090] By properly setting the first sub-pixel, the second sub-pixel, the on signal provided by the switch signal line, and the data signal provided by the data signal line, it is possible to determine whether there are cracks in the panel based on the display screen in the display area under the corresponding crack detection rules.

[0091] refer to Figure 5 Another embodiment of the present invention provides a display panel. This embodiment is similar to... Figures 1 to 3 The difference in the example lies in the setting of the first display area. In this embodiment, the first display area 11 is provided with multiple second sub-pixels and multiple second data lines 25 arranged in an array. Each column of second sub-pixels and each second data line 25 are electrically connected in a one-to-one correspondence. The input end of the second data line 25 is configured to be floating. Here, floating means that the input end of the second data line 25 is not connected to any signal.

[0092] Correspondingly, the display panel provided in this embodiment eliminates the need for data signal lines, which further facilitates the narrow bezel design of medium and large-sized OLED display panels.

[0093] The following crack detection rules are set in this embodiment:

[0094] When the edges of the display panel are normal, the first display area displays a white image, and the second display area displays a black image; when cracks appear on the edges of the display panel, the second display area displays a bright image (one of red, green, blue, or white).

[0095] For example, the second sub-pixels distributed in multiple arrays within the first display area include R sub-pixels, G sub-pixels, and B sub-pixels. Because the input terminal of the second data line 25 is configured to be floating, the first display area always displays a white screen.

[0096] Preferably, the first sub-pixels distributed in multiple arrays in the second display area include R sub-pixels, G sub-pixels, and B sub-pixels. When the edges are normal, the second display area displays a black screen; when cracks appear at the edges, the second display area displays a white screen.

[0097] refer to Figure 6 In another embodiment of the present invention, a display panel is provided. Compared to Figures 1 to 3 In the example display panel, the detection line 20 in this embodiment includes an adapter 201 and an output terminal PCD_OUT. The detection line 20 only includes a first part, and the adapter 201 is multiplexed as the input terminal of the detection line 20. The first display area 11 is provided with an array of multiple second sub-pixels and multiple second data lines 25, and each column of second sub-pixels and each second data line 25 are electrically connected in a one-to-one correspondence. The input terminal of the second data line 25 is configured to be floating, which means that the input terminal of the second data line 25 is not connected to any signal.

[0098] The display panel provided in this embodiment is compared to Figures 1 to 3 The difference in the example display panel is that the detection line only includes the first part and does not include the second part, which reduces the number of coils of the PCD trace and also eliminates the need for data signal line arrangement, thus further facilitating the narrow bezel design of the display panel.

[0099] Based on the display panel provided in the above embodiments, the following crack detection method can be used to detect cracks.

[0100] Crack detection methods include:

[0101] Control the display panel to display;

[0102] Based on the display images of the second display area and the first display area, and according to the pre-set crack detection rules, it is determined whether the display panel has cracks.

[0103] Based on the technical concept of the present invention, the present invention also provides a display device, including the aforementioned display panel.

[0104] The display device provided in this embodiment can detect cracks on the edge of the panel, facilitating timely detection of defective products and improving yield. The display device can be an OLED display device, or any product or component with display function such as a smart bracelet, mobile phone, tablet computer, television, monitor, laptop computer, digital camera, or vehicle screen.

[0105] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0106] This invention uses terms such as "first," "second," etc., to describe various types of information, but these terms should not be limited to. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this invention, first information may also be referred to as second information, and similarly, second information may also be referred to as first information.

[0107] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0108] The above description is merely a preferred embodiment of the present invention and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention is not limited to the specific combination of the above-described technical features, but also includes other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions disclosed in this invention.

Claims

1. A display panel, characterized in that, Includes: a substrate and a crack detection structure disposed on the substrate, the substrate having a display area and a peripheral area surrounding the display area; The display area includes a driving circuit layer and a light-emitting functional layer stacked together; The crack detection structure is located in the peripheral region and includes a detection line and at least two constant voltage signal lines. A gate driving circuit is also provided in the peripheral region of the substrate, and the gate driving circuit is located inside the constant voltage signal lines. The gate driving circuit includes multiple cascaded units, each cascaded unit includes at least two gate driving modules, each gate driving module corresponds one-to-one with each constant voltage signal line, and the constant voltage signal transmitted by the constant voltage signal line is a high-level signal or a low-level signal in the corresponding gate driving module. The detection line is located near the outer edge of the peripheral area and at least partially surrounds the display area, and the constant voltage signal line is located between the detection line and the display area; The detection line has an adapter terminal and an output terminal. The at least two constant voltage signal lines are connected to the adapter terminal through an adapter wire. The constant voltage signal lines and the adapter wire are both in the same layer and made of the same material as the source and drain metal layers in the driving circuit layer. The detection line is in the same layer and made of the same material as the gate layer in the driving circuit layer. The detection line also includes an input terminal, and the detection line includes a first portion located between the adapter terminal and the output terminal and a second portion located between the adapter terminal and the input terminal. The first portion is disposed along the outer edge of the peripheral area, and the second portion is located between the first portion and the constant voltage signal line. The display area includes a first display area and a second display area distributed on at least one side of the first display area. The second display area is provided with multiple first data lines and multiple first sub-pixels distributed in an array. Each column of first sub-pixels and each first data line are electrically connected in a one-to-one correspondence. The crack detection structure further includes a switch signal line and a first switch module. The detection line, the switch signal line, and the plurality of first data lines are all electrically connected to the first switch module. The first switch module is configured to load the output signal provided by the output end of the detection line to the first data line under the control of the opening signal provided by the switch signal line. The first switching module includes a plurality of first switching transistors, and each first switching transistor is electrically connected to each of the first data lines in a one-to-one correspondence. The gate of the first switching transistor is connected to the switching signal line, the first terminal of the first switching transistor is connected to the first data line, and the second terminal of the first switching transistor is connected to the output terminal of the detection line. The first display area is provided with a plurality of second sub-pixels and a plurality of second data lines arranged in an array, and each column of second sub-pixels and each second data line are electrically connected in a one-to-one correspondence; the input end of the second data line is configured to be floating.

2. The display panel according to claim 1, characterized in that, Along the first direction, the second display area is provided on both sides of the first display area; The surrounding area is provided with two detection lines, which correspond one-to-one with the two second display areas, and the two detection lines are symmetrical in the first direction. The detection line includes a first segment extending along the first direction, a second segment extending along the second direction, and a third segment extending along the first direction. The first segment, the second segment, and the third segment are connected sequentially, and the first segment and the third segment are located on opposite sides within the peripheral area. The end of the first segment away from the second segment is the adapter end, and the end of the third segment away from the second segment is the output end. The first direction and the second direction are perpendicular to the thickness direction of the substrate. The adapter cable extends along the first direction and is located inside the first segment.

3. A display device, characterized in that, Includes the display panel as described in any one of claims 1-2.

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