Display module and display device

Abstract

The application provides a display module and a display device, which comprise a display panel and a printed circuit board electrically connected to the display panel, the printed circuit board comprising: a connector comprising a plurality of first pins; a timing controller electrically connected to the plurality of first pins; and a protection circuit, input and output ends of the protection circuit being electrically connected to the first pins, and the output end of the protection circuit being used for outputting a low-level signal according to a high-level signal received by the input end of the protection circuit. By adding the protection circuit between the first pins and the back-end components, when the signal voltage at the first pins is high, the output end of the protection circuit will output low to pull down the voltage at the first pins, thereby solving the problem of burning of the back-end components caused by misinsertion of the wires.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display module and a display device. BACKGROUND

[0002] The existing display module usually includes a printed circuit board and a display panel, the printed circuit board is integrated with a timing controller and connectors, different connectors need to be adapted to different connection lines, such as the panel of the LVDS interface needs to be adapted to the corresponding LVDS (Low-Voltage Differential Signaling) wire, and if the VBO (V-By-One, a digital interface for image information transmission) wire is inserted, it will cause the burning of components. SUMMARY

[0003] Embodiments of the present application provide a display module and a display device to solve the problem of burning of back-end components when the VBO wire is mistakenly inserted into the LVDS connector.

[0004] To solve the above problems, the technical scheme provided by embodiments of the present application is as follows:

[0005] A display module, comprising a display panel and a printed circuit board electrically connected to the display panel, the printed circuit board comprising:

[0006] a connector comprising a plurality of first pins;

[0007] a timing controller electrically connected to the plurality of first pins; and

[0008] a protection circuit, the input end and the output end of the protection circuit are electrically connected to the first pins, and the output end of the protection circuit is used to output a low-level signal according to a high-level signal received by the input end of the protection circuit.

[0009] According to a preferred embodiment of the present application, the protection circuit comprises a judgment module and an output module, the input end of the judgment module is electrically connected to the first pins as the input end of the protection circuit, the output end of the judgment module is electrically connected to the control end of the output module, the output end of the output module is electrically connected to the first pins as the output end of the protection circuit, the input end of the output module is used to load the low-level signal, and the judgment module is used to control the output module to output the low-level signal according to the received high-level signal.

[0010] According to a preferred embodiment of the present application, the judging module comprises a gate circuit, and the output module comprises a first protection output transistor, the gate circuit comprises a first input end, a second input end and a gate circuit output end, the first input end and the second input end are electrically connected to a first pin as the input end of the judging module, the gate circuit output end is electrically connected to the control end of the first protection output transistor as the output end of the judging module, the control end of the first protection output transistor serves as the control end of the output module, the first end of the first protection output transistor is electrically connected to the first pin as the output end of the output module, and the second end of the first protection output transistor is electrically connected to a ground wire as the input end of the output module.

[0011] According to a preferred embodiment of the present application, the gate circuit is an AND gate circuit, and the first protection output transistor is an N-type transistor.

[0012] According to a preferred embodiment of the present application, the gate circuit is a NAND gate circuit, and the first protection output transistor is a P-type transistor.

[0013] According to a preferred embodiment of the present application, the judging module comprises a comparator, and the output module comprises a second protection output transistor, the comparator comprises a comparator input end, a comparator reference end and a comparator output end, the comparator input end is electrically connected to a first pin as the input end of the judging module, the comparator reference end is electrically connected to a reference signal line, the comparator output end is electrically connected to the control end of the second protection output transistor as the output end of the judging module, the control end of the second protection output transistor serves as the control end of the output module, the first end of the second protection output transistor is electrically connected to a first pin as the output end of the output module, and the second end of the second protection output transistor is electrically connected to a ground wire as the input end of the output module.

[0014] According to a preferred embodiment of the present application, the voltage of the reference signal line is 3.3V.

[0015] According to a preferred embodiment of the present application, the printed circuit board further comprises a first protection diode array, two input ends of the first protection diode array are electrically connected to a first pin respectively, and the signal of the first pin is transmitted to the protection circuit, the first protection diode array and the time sequence controller in sequence.

[0016] According to a preferred embodiment of the present invention, the printed circuit board further includes a second protection diode array, and the connector further includes a plurality of second pins electrically connected to the timing controller. The two input terminals of the second protection diode array are respectively electrically connected to a second pin. The embodiments of the present invention also provide a display device, including the display module as described in any of the above claims.

[0017] The beneficial effects of this invention are as follows: by adding a protection circuit between the first pin and the back-end components, when the signal voltage at the first pin is high, the output of the protection circuit will output a low level to pull down the voltage at the first pin, thereby solving the problem of back-end components being burned out due to incorrect wire insertion. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Appendix Figure 1 This is a schematic diagram of the protection circuit of the present invention;

[0020] Appendix Figure 2 This is a schematic diagram of the protection circuit in one embodiment of the present invention;

[0021] Appendix Figure 3 This is a schematic diagram of the protection circuit in one embodiment of the present invention;

[0022] Appendix Figure 4 This is a schematic diagram of the protection circuit in one embodiment of the present invention;

[0023] Appendix Figure 5 This is a schematic diagram of the structure of the first protection diode array and the second protection diode array in one embodiment of the present invention. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0025] like Figure 1As shown, in the prior art, an LVDS connector may include 51 pins arranged in sequence. Among these 51 pins, the first three pins are, in order, a data input pin, a data input pin, and a ground pin. The first three signal lines corresponding to the LVDS cable are, in order, a data signal line, a data signal line, and a ground line. When the LVDS cable is inserted into the corresponding LVDS connector, the data signal line is connected to the data input pin, and the ground line is connected to the ground pin. The signal voltage on the data signal line is 3.3V (usually less than this). However, in a VBO cable, the first three signal lines are all power signal lines, and the signal voltage on the power signal line is usually 12V. Therefore, when a VBO cable is inserted into an LVDS connector, it will burn out the back-end components connected to the first three pins.

[0026] Based on this, embodiments of the present invention provide a display module to solve the problem that back-end components will be burned out when VBO cables are mistakenly inserted into LVDS connectors.

[0027] like Figure 1 As shown, the display module includes a display panel and a printed circuit board electrically connected to the display panel. The printed circuit board includes a connector 3, a protection circuit 1, and a timing controller 4. The connector 3 is provided with a plurality of first pins 31. The timing controller 4 is electrically connected to the plurality of first pins 31. It can be known that the first pins 31 can be used for data input or grounding. Specifically, in this embodiment, the connector 3 is a 51-pin connector, wherein the first three pins are the first pins 31. Among the three first pins 31, the first two first pins 31 are respectively used as the first data input pin 311 and the second data input pin 312 for data input, and the last first pin 31 is used as the first ground pin 313 for connection with the ground wire 5.

[0028] The protection circuit 1 includes an input terminal and an output terminal. Both the input terminal and the output terminal of the protection circuit 1 are electrically connected to the first pin 31. The output terminal of the protection circuit 1 is used to output a low-level signal according to the high-level signal received by the input terminal of the protection circuit 1.

[0029] The present invention solves the problem of back-end components being burned out due to incorrect wire insertion by adding a protection circuit 1 between the first pin 31 and the back-end components. When the signal voltage of the first pin 31 is high, the output of the protection circuit 1 will output a low level to pull down the voltage at the first pin 31.

[0030] In some embodiments, the protection circuit 1 can include a judging module 11 and an output module 12, an input end of the judging module 11 is electrically connected to the first pin 31 as the input end of the protection circuit 1, an output end of the judging module 11 is electrically connected to a control end of the output module 12, an output end of the output module 12 is electrically connected to the first pin 31 as the output end of the protection circuit 1, an input end of the output module 12 is used to load the low-level signal, and the judging module 11 is used to control the output module 12 to output the low-level signal according to the received high-level signal.

[0031] Specifically, the judging module 11 includes a gate circuit 111, and the output module 12 includes a first protection output transistor 121, the gate circuit 111 includes a first input end, a second input end and a gate circuit output end, the first input end and the second input end are respectively electrically connected to the first pin 31 as the input end of the judging module 11, the gate circuit output end is electrically connected to a control end of the first protection output transistor 121 as the output end of the judging module 11, the control end of the first protection output transistor 121 is used as the control end of the output module 12, a first end of the first protection output transistor 121 is electrically connected to the first pin 31 as the output end of the output module 12, and a second end of the first protection output transistor 121 is electrically connected to a ground wire 5 as the input end of the output module 12.

[0032] In the above embodiment, by using the comparison characteristics of the gate circuit 111, the signal level of the first pin 31 is judged through the first input end and the second input end of the gate circuit 111, and the corresponding signal level is output to the control end of the first protection output transistor 121, so as to control the conduction and the turn-off of the first protection output transistor 121, thereby controlling the connection between the first pin 31 and the ground wire 5.

[0033] It can be known that both the AND gate circuit and the NAND gate circuit in the gate circuit 111 can be used in the present application, but based on the characteristics of the AND gate and the NAND gate, the type of the first protection output transistor 121 needs to be changed correspondingly, and the specific changes are as follows:

[0034] As Figure 2As shown, when the gate circuit 111 is an AND gate circuit, because the normal input of the LVDS wire, the first three signal lines are data signal line, data signal line and ground signal line in turn, that is, the signal voltage of the three signal lines is 3.3V, 3.3V and 0 in turn, so the signal voltage of the first three pins of the connector 3 is 3.3V, 3.3V and 0 in turn, and after the VBO wire is inserted by mistake, the signal voltage of the first three pins is 12V, and because the AND gate circuit only outputs high level at the output end when both input ends input high level, in order to ensure that the protection circuit 1 does not affect the normal work of the connector 3, the first input end of the AND gate is electrically connected to the first data input pin 311 or the second data input pin 312, the second input end of the AND gate is electrically connected to the first ground pin 313, and the first protection output transistor 121 is an N-type transistor. When working normally, the signal levels of the second data input pin 312 (or the first data input pin 311) and the first ground pin 313 are 3.3V and 0 respectively, so the output end of the AND gate circuit outputs a low level signal to the control end of the first protection output transistor 121, and the first protection output transistor 121 remains off, when the wire is inserted incorrectly, the signal levels of the second data input pin 312 and the first ground pin 313 are 12V, the output end of the AND gate circuit outputs a high level signal to the control end of the first protection output transistor 121, and the first protection output transistor 121 is opened, so that the first pin 31 is grounded, so as to prevent the damage of the components connected to the first pin 31. It should be noted that because in the VBO wire, the signals of the first three signal lines come from the same signal line, so the first end of the first protection output transistor 121 is electrically connected to one of the signal lines, which can lower the voltage level of the three signal lines, so the first pin 31 connected to the first protection output transistor 121 is not limited here, that is, the first protection output transistor 121 can be electrically connected to the first data input pin 311 or the second data input pin 312 or the first ground pin 313.

[0035] As Figure 3As shown, the gate circuit 111 is a NAND gate circuit, since the NAND gate circuit only outputs a low level signal when both of the input ends output high level signals, the first input end and the second input end of the NAND gate circuit are electrically connected to the second data input pin 312 and the first ground pin 313 respectively, and the output transistor is a P-type transistor. In normal operation, the signal levels of the second data input pin 312 and the first ground pin 313 are 3.3V and 0V respectively, so the output end of the NAND gate circuit outputs a high level signal to the control end of the first protection output transistor 121, and the first protection output transistor 121 remains off. When the wire is inserted incorrectly, the signal levels of the second data input pin 312 and the first ground pin 313 are both 12V, the output end of the NAND gate circuit outputs a low level signal to the control end of the first protection output transistor 121, and the first protection output transistor 121 is turned on, grounding the first pin 31 to prevent the connected components from being damaged.

[0036] As Figure 4As shown, based on the above embodiments, it can be known that the comparator 112 can also implement the above judging function, thus, in some embodiments, the judging module 11 comprises the comparator 112, the output module 12 comprises the second protection output transistor 122, the comparator 112 comprises a comparator input end, a comparator reference end and a comparator output end, the comparator input end is electrically connected to the first data input pin 311 or the second data input pin 312 or the first ground pin 313 to serve as the input end of the judging module 11, the comparator reference end is electrically connected to the reference signal line 7, and the comparator output end is electrically connected to the control end of the second protection output transistor 122 to serve as the output end of the judging module 11, the control end of the second protection output transistor 122 serves as the control end of the output module 12, the first end of the second protection output transistor 122 is electrically connected to the first pin 31 to serve as the output end of the output module 12, and the second end of the second protection output transistor 122 is electrically connected to the ground wire 5 to serve as the input end of the output module 12. Specifically, based on the signal voltage on the first data input pin 311 or the second data input pin 312, which is usually not greater than 3.3V, the reference signal voltage on the reference signal line 7 is set to 3.3V, and the comparator input end is electrically connected to any first pin 31. When the connector 3 is normally inserted into the LVDS wire, the voltage of the comparator input end is less than that of the comparator reference end, the comparator output end outputs low level, when the wire is incorrectly inserted, the voltage of the comparator input end is greater than that of the comparator reference end, and the comparator output end outputs high level. As known from the above, in this embodiment, the type of the second protection output transistor 122 is N-type transistor. It should be noted that the comparator is also connected to a power signal line and a ground wire, which is a conventional setting of the comparator, and will not be described here.

[0037] As shown, Figures 1-3 In some embodiments, the printed circuit board further comprises a first protection diode array 2, two input ends of the first protection diode array 2 are electrically connected to the first pin 31 respectively, and specifically, the two input ends of the first protection diode array 2 are electrically connected to the first data input pin 311 and the second data input pin 312 respectively. It can be known that the ground end of the first protection diode array 2 is connected to the ground wire 5, and the signals of the first pin 31 are transmitted to the protection circuit 1, the first protection diode array 2 and the timing controller 4 in sequence.

[0038] As shown, Figure 4As shown, in some embodiments, the printed circuit board further includes a second protection diode array 6, and the connector 3 further includes a plurality of second pins 32 electrically connected to the timing controller 4. It can be known that the second pins 32 can be used for data input or grounding. Specifically, in this embodiment, the connector 3 is a 51-pin connector, wherein the last three pins are the second pins 32. Among the three second pins 32, the first two second pins 32 are respectively used as the third data input pin 321 and the fourth data input pin 322 for data input, and the last second pin 32 is used as the second grounding pin 323 for connection to the ground line 5.

[0039] The two input terminals of the second protection diode array 6 are electrically connected to a second pin 32, specifically, to a third data input pin 321 and a fourth data input pin 322, respectively. The ground terminal of the second protection diode array 6 is connected to the ground line 5, and the signal of the second pin 32 is transmitted sequentially to the second protection diode array 6 and the timing controller 4.

[0040] like Figure 5 As shown, specifically, both the first protection diode array 2 and the second protection diode array 6 may include two TVS diodes (Transient Voltage Suppressor, a high-efficiency protection device in diode form). One end of each TVS diode is an input terminal electrically connected to the first pin 31 and the second pin 32, and the other end of each TVS diode serves as a ground terminal electrically connected to ground wire 5. When the voltage in the first data input pin 311 or the second data input pin 312 exceeds the protection voltage of the TVS diodes in the first protection diode array 2 or the second protection diode array 6, the first protection diode array 2 or the second protection diode array 6 will ground the corresponding data input pin to protect downstream components. Using TVS diodes as circuit protection devices is a well-known technique among those skilled in the art and will not be elaborated upon here.

[0041] A display device includes a display module as described in any of the above embodiments. It is understood that the display device can be a device for displaying video or still images, including fixed terminals such as televisions, desktop computers, monitors, and billboards, and can also include mobile terminals such as mobile phones, tablet computers, mobile communication terminals, electronic notebooks, e-books, multimedia players, navigators, and laptops, and can also include wearable electronic devices such as smartwatches, smart glasses, virtual reality devices, and augmented reality devices.

[0042] In summary, although the present application has been disclosed with preferred embodiments as above, the preferred embodiments are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, and therefore the protection scope of the present application is defined by the scope of the claims.

Claims

1. A display module, characterized by The display panel and a printed circuit board electrically connected to the display panel, the printed circuit board comprising: a connector comprising a plurality of first pins; a timing controller electrically connected to the plurality of first pins; and a protection circuit, input and output ends of the protection circuit being electrically connected to the first pins, the output end of the protection circuit being configured to output a low-level signal according to a high-level signal received by the input end of the protection circuit; the connector is an LVDS connector; the protection circuit comprises a judging module and an output module, an input end of the judging module being electrically connected to the first pins as the input end of the protection circuit, an output end of the judging module being electrically connected to a control end of the output module, an output end of the output module being electrically connected to the first pins as the output end of the protection circuit, an input end of the output module being configured to load the low-level signal, the judging module being configured to control the output module to output the low-level signal according to the received high-level signal; the judging module comprises a gate circuit, the output module comprises a first protection output transistor, the gate circuit comprises a first input end, a second input end and a gate circuit output end, the first input end and the second input end being electrically connected to a first pin as the input end of the judging module respectively, the gate circuit output end being electrically connected to a control end of the first protection output transistor as the output end of the judging module, the control end of the first protection output transistor serving as the control end of the output module, a first end of the first protection output transistor being electrically connected to the first pin as the output end of the output module, a second end of the first protection output transistor being electrically connected to a ground wire as the input end of the output module; the first pins comprise a first data input pin, a second data input pin and a first ground pin, the first input end being electrically connected to the first data input pin or the second data input pin, the second input end being electrically connected to the first ground pin.

2. The display module of claim 1, wherein, the gate circuit is an AND gate circuit, and the first protection output transistor is an N-type transistor.

3. The display module of claim 1, wherein, the gate circuit is a NAND gate circuit, and the first protection output transistor is a P-type transistor.

4. The display module of claim 1, wherein, The judging module comprises a comparator, and the output module comprises a second protection output transistor; the comparator comprises a comparator input end, a comparator reference end and a comparator output end; the comparator input end is electrically connected to one of the first pins as the input end of the judging module; the comparator reference end is electrically connected to a reference signal line; the comparator output end is electrically connected to the control end of the second protection output transistor as the output end of the judging module; the control end of the second protection output transistor serves as the control end of the output module; the first end of the second protection output transistor is electrically connected to one of the first pins as the output end of the output module; and the second end of the second protection output transistor is electrically connected to a ground wire as the input end of the output module.

5. The display module of claim 4, wherein, The voltage of the reference signal line is 3.3 V.

6. The display module of claim 1, wherein, The printed circuit board further comprises a first protection diode array, two input ends of the first protection diode array are electrically connected to one of the first pins respectively, and signals of the first pins are transmitted to the protection circuit, the first protection diode array and the timing controller in sequence.

7. The display module of claim 1, wherein, The printed circuit board further comprises a second protection diode array, the connector further comprises a plurality of second pins electrically connected to the timing controller, two input ends of the second protection diode array are electrically connected to one of the second pins respectively, and signals of the second pins are transmitted to the second protection diode array and the timing controller in sequence.

8. A display device, characterized by comprising: The display module comprises the display module as claimed in any one of claims 1 to 7.

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