Display panel and display device

Abstract

This application discloses a display panel and a display device. The display panel has a first display area and a second display area, with the first display area having a higher light transmittance than the second display area. The display panel includes an array substrate and a light-emitting element layer. The array substrate includes a substrate and a driving circuit layer. The driving circuit layer includes multiple pixel circuits located in the second display area. Each pixel circuit includes a transistor, and a light-shielding metal layer is disposed between the transistor and the substrate. The orthogonal projection of the light-shielding metal layer onto the transistor at least covers the channel region of the transistor. The driving circuit layer includes a first transparent conductive layer located in the first display area. The light-emitting element layer includes multiple light-emitting units. The light-emitting units located in the light-transmitting area are electrically connected to the pixel circuits through a first trace. The first trace includes a first portion located in the second display area and a second portion located in the first transparent conductive layer, with a portion of the first portion located in the light-shielding metal layer. The display quality of the display panel provided by this application is improved.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel and a display device. Background Technology

[0002] As people's demands for screens increase, full-screen displays have become the mainstream of next-generation display panels, with under-display camera technology being a common means of achieving this. A display panel includes a main display area and an under-display camera area. To ensure transmittance, a transition area is usually set between the main display area and the under-display camera area. The pixel circuits corresponding to the light-emitting units of the under-display camera area are placed in the transition area and connected by wiring to further improve the light transmittance of the under-display camera area. However, the limited number of film layers available for forming these wirings makes wiring difficult, resulting in small spacing between adjacent wirings and large lateral capacitance between adjacent wirings, affecting display quality. Summary of the Invention

[0003] This application provides a display panel and a display device, which improves the display quality of the display panel.

[0004] An embodiment of a first aspect of this application provides a display panel having a first display area and a second display area, wherein the second display area at least partially surrounds the first display area, and the light transmittance of the first display area is greater than that of the second display area. The display panel includes:

[0005] An array substrate includes a substrate and a driving circuit layer on the substrate. The driving circuit layer includes a circuit region in a second display area and a light-transmitting region in a first display area. The circuit region includes a plurality of pixel circuits, each pixel circuit including a transistor. The circuit region includes a light-shielding metal layer located between the transistor and the substrate, and the orthogonal projection of the light-shielding metal layer on the transistor at least covers the channel region of the transistor. The light-transmitting region includes a first transparent conductive layer on the same layer.

[0006] The light-emitting element layer, located on the side of the driving circuit layer opposite to the substrate, includes multiple light-emitting units;

[0007] The light-emitting unit located in the light-transmitting area is electrically connected to the pixel circuit in the second display area through a first trace. The first trace includes a first portion located in the second display area and a second portion located in the first transparent conductive layer. A portion of the first portion is located in the light-shielding metal layer.

[0008] According to an embodiment of the first aspect of the present invention, the driving circuit layer includes a first metal layer, a second metal layer and a second transparent conductive layer located on the side of the light-shielding metal layer away from the substrate, wherein the light-shielding metal layer, the first metal layer, the second metal layer and the second transparent conductive layer are each provided with at least one first portion.

[0009] According to any of the foregoing embodiments of the first aspect of the present invention, the number of the first portions in the light-shielding metal layer, the first metal layer, the second metal layer, and the first transparent conductive layer is the same.

[0010] According to any of the foregoing embodiments of the first aspect of the present invention, the first transparent conductive layer and the second transparent conductive layer are disposed in the same layer. When the first portion is located in the light-shielding metal layer, the first metal layer or the second metal layer, the first portion and the second portion are connected by a first connecting portion, and the first connecting portion is at least partially located in a via extending along the thickness direction of the array substrate.

[0011] According to any of the foregoing embodiments of the first aspect of the present invention, the first transparent conductive layer and the second transparent conductive layer are made of a transparent conductive material;

[0012] Preferably, the first transparent conductive layer and the second transparent conductive layer are made of indium tin oxide, carbon nanotubes, metal oxides, metal nanowires, or conductive polymers.

[0013] According to any of the foregoing embodiments of the first aspect of the present invention, the pixel circuit includes a transistor, the transistor including a source and a drain, the first portion being connected to the source or drain of a transistor in the pixel circuit via a second connection portion, the second connection portion being at least partially located within a via extending along the thickness direction of the array substrate.

[0014] According to any of the foregoing embodiments of the first aspect of the present invention, the light-emitting units are arranged in rows and columns, and the first portions connected to the light-emitting units of the same color are located in the same layer.

[0015] According to any of the foregoing embodiments of the first aspect of the present invention, the first display area includes a plurality of first light-emitting units, a plurality of second light-emitting units, and a plurality of third light-emitting units, wherein each first light-emitting unit is located within a virtual quadrilateral, the virtual quadrilaterals are arranged in rows and columns, two opposite vertices of each virtual quadrilateral coincide with the centers of two second light-emitting units, and the other two opposite vertices coincide with the centers of two third light-emitting units, the ratio of the number of first light-emitting units, second light-emitting units, and third light-emitting units is 2:1:1, and a first portion connected to a portion of the first light-emitting units, another portion connected to a portion of the first light-emitting units, a first portion connected to a portion of the second light-emitting units, and a first portion connected to a portion of the third light-emitting units are disposed on different layers;

[0016] Preferably, the virtual quadrilateral is rectangular or trapezoidal. When the virtual quadrilateral is rectangular, the center of the first light-emitting unit coincides with the center of the rectangle; when the virtual quadrilateral is trapezoidal, the center of the first light-emitting unit deviates from the center of the trapezoid.

[0017] According to any of the foregoing embodiments of the first aspect of the present invention, the edge of the orthographic projection of a portion of the second portion on the substrate is wavy or straight.

[0018] An embodiment of the second aspect of this application also provides a display device, including any of the display panels provided in the first aspect of this application.

[0019] The display panel provided in this application embodiment includes a first display area and a second display area. The light transmittance of the first display area is greater than that of the second display area, thereby allowing the photosensitive element to be integrated on the side of the first display area away from the light-emitting surface, thus increasing the display area ratio of the display panel and simultaneously achieving the integration of the photosensitive element. The display panel includes an array substrate and a light-emitting element layer. The array substrate includes a substrate and a driving circuit layer. The driving circuit layer includes a circuit area located in the second display area and a light-transmitting area located in the first display area. The circuit area includes a light-shielding metal layer disposed on the side of the transistor away from the light-emitting surface of the display panel. The light-shielding metal layer is used to block the transistor channel area, preventing light from the side away from the light-emitting surface of the display panel from entering the channel area and affecting the photoelectric stability of the transistor. The light-transmitting area includes a first transparent conductive layer. The light-emitting unit located in the first display area is electrically connected to the pixel circuit located in the second display area through a first trace. The first trace includes a first portion located in the second display area and a second portion located in the first transparent conductive layer. Part of the first portion is located in the light-shielding metal layer. By disposing part of the first portion in the light-shielding metal layer, the wiring range of the first portion can be increased, facilitating wiring. Meanwhile, since the first section has a wider setting range, the line width of the first trace can be appropriately increased, and the line spacing between adjacent first sections can be increased, thereby reducing the capacitance between adjacent first sections and further improving the display quality of the display panel. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application;

[0022] Figure 2 yes Figure 1 Schematic diagram of the structure of the Q region;

[0023] Figure 3 yes Figure 1 A cross-sectional view along P-P';

[0024] Figure 4 This is a schematic diagram of another display panel structure provided in an embodiment of this application;

[0025] Figure 5 This is a partial cross-sectional view of another display panel provided in an embodiment of this application;

[0026] Figure 6This is a partial cross-sectional view of another display panel provided in an embodiment of this application;

[0027] Figure 7 This is a partial cross-sectional view of another display panel provided in an embodiment of this application;

[0028] Figure 8 This is a partial schematic diagram of a display panel provided in an embodiment of this application;

[0029] Figure 9 This is a partial schematic diagram of a display panel provided in an embodiment of this application;

[0030] Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.

[0031] In the attached image:

[0032] AA1 - First display area; AA2 - Second display area; AA3 - Transition area; 1 - Display panel; 11 - Array substrate; 111 - Substrate; 112 - Driving circuit layer; 1121 - Pixel circuit; 1122 - Light-shielding metal layer; 1123 - First metal layer; 1124 - Second metal layer; 1125 - First transparent conductive layer; 1126 - Second transparent conductive layer; 12 - Light-emitting element layer; 121 - Light-emitting unit; 1211 - First electrode; 1212 - First light-emitting unit; 1213 - Second light-emitting unit; 1214 - Third light-emitting unit; 13 - First trace; 131 - First section; 132 - Second section; 1127 - First insulating layer; 1128 - Semiconductor layer; 1129 - Gate insulating layer; 1130 - Second insulating layer; 1131 - Third insulating layer; 1132 - Fourth metal layer; 1133 - Buffer layer; 1134 - Fourth insulating layer; 1135 - Fifth insulating layer; 14 - First connecting part; 15 - Second connecting part; 2 - Display device; 2 - Display device. Detailed Implementation

[0033] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description in order to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples thereof.

[0034] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0035] The inventors discovered that the display yield of the under-display camera area in display panels using under-display camera technology is relatively poor. This is because the display panel includes a main display area, an under-display camera area, and a transition area between the under-display camera area and the main display area. The pixel circuits corresponding to the light-emitting units in the under-display camera area are located in the transition area, which helps to further improve the light transmittance of the under-display camera area, allowing the under-display camera to function better. However, when there are many light-emitting units in the under-display camera area, there are many connecting traces used to connect the light-emitting units in the under-display camera area to the pixel circuits in the transition area. However, there are few film layers in the display panel that can be used as connecting traces, and the fabrication of connecting traces requires a certain linewidth, resulting in problems with the traces not being properly routed. Furthermore, due to the limited number of film layers available for connecting traces, the spacing between the connecting traces is small, and the lateral capacitance between the connecting traces is large, affecting the display effect. Based on the research into these problems, the inventors provide a display panel and a display device to improve the display quality of the display panel.

[0036] To better understand this application, the following will be combined with... Figures 1 to 10 The display panel and display device according to embodiments of this application will be described in detail.

[0037] Please see Figure 1 This application provides a display panel 1, including a first display area AA1 and a second display area AA2, wherein the second display area AA2 at least partially surrounds the first display area AA1, and the light transmittance of the first display area AA1 is greater than the light transmittance of the second display area AA2.

[0038] like Figure 2 and Figure 3As shown, the display panel 1 includes an array substrate 11 and a light-emitting element layer 12. The array substrate 11 includes a substrate 111 and a driving circuit layer 112 located on the substrate 111. The driving circuit layer 112 includes a circuit region located in the second display area AA2 and a light-transmitting region located in the first display area AA1. The circuit region includes a plurality of pixel circuits 1121, each pixel circuit 1121 including a transistor. The circuit region includes a light-shielding metal layer 1122, which is located between the transistor and the substrate 111. The orthogonal projection of the light-shielding metal layer 1122 onto the transistor at least covers the channel region of the transistor. The light-transmitting region includes a first transparent conductive layer 1125. The light-emitting element layer 12 is located on the side of the driving circuit layer 112 facing away from the substrate 111 and includes a plurality of light-emitting units 121. The light-emitting unit 121 located in the light-transmitting area is electrically connected to the pixel circuit 1121 in the second display area AA2 through the first trace 13. The first trace 13 includes a first portion 131 located in the second display area AA2 and a second portion 132 located in the first transparent conductive layer 1125. Part of the first portion 131 is located in the light-shielding metal layer 1122.

[0039] The display panel 1 provided in this application includes a first display area AA1 and a second display area AA2. The light transmittance of the first display area AA1 is greater than that of the second display area AA2, thereby allowing the photosensitive element to be integrated on the side of the first display area AA1 away from the light-emitting surface, thus increasing the display area ratio of the display panel 1 and simultaneously achieving the integration of the photosensitive element. The display panel 1 includes an array substrate 11 and a light-emitting element layer 12. The array substrate 11 includes a substrate 111 and a driving circuit layer 112. The driving circuit layer 112 includes a circuit region located in the second display area AA2 and a light-transmitting region located in the first display area AA1. The circuit region includes a light-shielding metal layer 1122 disposed on the side of the transistor away from the light-emitting surface of the display panel 1. The light-shielding metal layer 1122 is used to block the transistor channel region to prevent light from the side away from the light-emitting surface of the display panel 1 from entering the channel region and affecting the photoelectric stability of the transistor. The light-transmitting region includes a first transparent conductive layer 1125. The light-emitting unit 121 located in the first display area AA1 is electrically connected to the pixel circuit 1121 located in the second display area AA2 via the first trace 13. The first trace 13 includes a first portion 131 located in the second display area AA2 and a second portion 132 located in the first transparent conductive layer 1125. Part of the first portion 131 is located in the light-shielding metal layer 1122. By placing part of the first portion 131 in the light-shielding metal layer 1122, the wiring range of the first portion 131 can be increased, facilitating wiring. At the same time, since the first portion 131 has a wider setting range, the line width of the first trace 13 can be appropriately increased, and the line spacing between adjacent first portions 131 can be increased, thereby reducing the capacitance between adjacent first portions 131 and further improving the display quality of the display panel 1.

[0040] In the above embodiments, such as Figure 4 As shown, the second display area AA2 includes a transition area AA3, which is located within the second display area AA2 adjacent to the first display area AA1. By placing the pixel circuit 1121, which drives the light-emitting unit 121 in the first display area AA1, in the transition area AA3, the light transmittance of the first display area AA1 can be improved.

[0041] In one feasible implementation, the light-emitting unit 121 includes a first electrode 1211, a fifth insulating layer 1135 is disposed between the first electrode 1211 and the first light-emitting material layer, and the first electrode 1211 is connected to the second portion 132 through a through hole penetrating the fifth insulating layer 1135.

[0042] In one feasible implementation, the driving circuit layer 112 includes a first metal layer 1123, a second metal layer 1124 and a second transparent conductive layer located on the side of the light-shielding metal layer 1122 away from the substrate 111. The light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124 and the second transparent conductive layer 1126 are each provided with at least one first portion 131.

[0043] In the above embodiment, at least one first portion 131 is provided in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124 and the second transparent conductive layer 1126, so that the first portion 131 in the display panel 1 is distributed in four conductive layers, which greatly improves the distribution range of the first portion 131 and simplifies the wiring of the first trace 13.

[0044] In one feasible implementation, the number of first portions 131 in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124, and the first transparent conductive layer 1125 is the same. This helps to ensure that the first portions 131 are evenly distributed in the aforementioned layers, thereby facilitating wiring and reducing the occurrence of situations where the first portions 131 in each layer cannot be properly routed. Simultaneously, because the first portions 131 are evenly distributed in the aforementioned layers, the linewidth of the first trace 13 can be appropriately increased, and the spacing between adjacent first portions 131 in each layer can be increased, thereby reducing the lateral capacitance between adjacent first portions 131 and further improving the display quality of the display panel 1.

[0045] In one feasible implementation, the first transparent conductive layer 1125 and the second transparent conductive layer 1126 are disposed in the same layer. When the first portion 131 is located in the light-shielding metal layer 1122, the first metal layer 1123 or the second metal layer 1124, the first portion 131 and the second portion 132 are connected by the first connecting portion 14. The first connecting portion 14 is at least partially located in a via extending along the thickness direction of the array substrate 11.

[0046] In the above embodiment, the circuit region in the driving circuit layer 112 includes a light-shielding metal layer 1122, a first metal layer 1123, a second metal layer 1124 and a first transparent conductive layer 1125, which are sequentially formed on the substrate 111 and are mutually insulated. The light-transmitting region includes a second transparent conductive layer 1126 disposed in the same layer as the first transparent conductive layer 1125. Since the first trace 13 includes a first portion 131 located in the transition region AA3 and a second portion 132 located in the second transparent conductive layer 1126, when the first portion 131 is located in the light-shielding metal layer 1122, the first metal layer 1123 or the second metal layer 1124, the distance between the first portion 131 and the substrate 111 is less than the distance between the second portion 132 and the substrate 111. That is, the first portion 131 and the second portion 132 have a first preset distance along the thickness direction of the array substrate 11. When the second portion 132 is connected to the first portion 131, it needs to be connected by the first connecting portion 14. The first connecting portion 14 extends along the thickness direction of the array substrate 11, thereby realizing the electrical connection between the first portion 131 and the second portion 132.

[0047] The circuit region of the driving circuit layer 112 includes a buffer layer 1133, a light-shielding metal layer 1122, a first insulating layer 1127, a semiconductor layer 1128, a gate insulating layer 1129, a first metal layer 1123, a second insulating layer 1130, a second metal layer 1124, a third insulating layer 1131, a fourth metal layer 1132, a fourth insulating layer 1134, and a first transparent conductive layer 1125, which are stacked along the direction away from the substrate 111.

[0048] like Figure 3 As shown, when the first portion 131 is located in the light-shielding metal layer 1122, the first connection portion 14 is located around the transistor and penetrates the first insulating layer 1127, the gate insulating layer 1129, the second insulating layer 1130, the third insulating layer 1131, and the fourth insulating layer 1134.

[0049] like Figure 5 As shown, when the first portion 131 is located in the first metal layer 1123, the first connection portion 14 is located around the transistor and penetrates the second insulating layer 1130, the third insulating layer 1131, and the fourth insulating layer 1134.

[0050] like Figure 6 As shown, when the first portion 131 is located in the second metal layer 1124, the first connection portion 14 is located around the transistor and penetrates the third insulating layer 1131 and the fourth insulating layer 1134.

[0051] like Figure 7As shown, when the first part 131 is located in the second transparent conductive layer 1126, since the first transparent conductive layer 1125 and the second transparent conductive layer 1126 are disposed in the same layer, the first part 131 and the second part 132 are located in the same layer, so they can be directly fabricated in the same layer to achieve electrical connection.

[0052] In one feasible embodiment, the first transparent conductive layer 1125 and the second transparent conductive layer 1126 are made of transparent conductive materials. The first transparent conductive layer 1125 is made of transparent conductive material, which can improve the light transmittance of the first display area AA1. The second transparent conductive layer 1126 is made of transparent conductive material so that it can be fabricated in the same layer as the first transparent conductive layer 1125, saving fabrication process.

[0053] Specifically, the first transparent conductive layer 1125 and the second transparent conductive layer 1126 are made of indium tin oxide, carbon nanotubes, metal oxides, metal nanowires, or conductive polymers. Alternatively, other transparent conductive materials may be used, and this application does not impose any particular limitation.

[0054] In one possible implementation, the pixel circuit 1121 includes a transistor, the transistor including a source and a drain, and a first portion 131 is connected to the source or drain of a transistor in the pixel circuit 1121 via a second connection portion 15, the second connection portion 15 being at least partially located within a via extending along the thickness direction of the array substrate 11.

[0055] The circuit region of the driving circuit layer 112 includes a light-shielding metal layer 1122, a first insulating layer 1127, a semiconductor layer 1128, a gate insulating layer 1129, a first metal layer 1123, a second insulating layer 1130, a second metal layer 1124, a third insulating layer 1131, a fourth metal layer 1132, a fourth insulating layer 1134, and a first transparent conductive layer 1125, which are stacked along the direction away from the substrate 111.

[0056] like Figure 3 As shown, when the first portion 131 is located in the light-shielding metal layer 1122, the second connection portion 15 is located around the transistor and penetrates the first insulating layer 1127, the gate insulating layer 1129, the second insulating layer 1130, the third insulating layer 1131 and the fourth insulating layer 1134.

[0057] like Figure 5 As shown, when the first portion 131 is located in the first metal layer 1123, the second connection portion 15 is located around the transistor and penetrates the second insulating layer 1130, the third insulating layer 1131 and the fourth insulating layer 1134.

[0058] like Figure 6As shown, when the first portion 131 is located in the second metal layer 1124, the second connection portion 15 is located around the transistor and penetrates the third insulating layer 1131 and the fourth insulating layer 1134.

[0059] like Figure 7 As shown, when the first portion 131 is located in the second transparent conductive layer 1126, the second connection portion 15 is located around the transistor and penetrates the fourth insulating layer 1134.

[0060] In one feasible implementation, the light-emitting units 121 are arranged in rows and columns, and the first portion 131 connected to the light-emitting units 121 of the same color is located on the same layer.

[0061] In the above embodiment, capacitance exists between the portion of the first section 131 extending in the row direction and the signal lines (e.g., first signal line PVDD, data line Data, etc.) extending in the column direction of the display panel 1. By placing the first section 131 connected to the same color light-emitting units 121 on the same layer, the capacitance between the same color light-emitting units 121 and the signal lines gradually changes from the direction closer to the first display area AA1 to the direction farther away from the first display area AA1, thereby improving the phenomenon of column stripes appearing in the first display area AA1. At the same time, by placing the first sections 131 connected to different colors of light-emitting units 121 on different layers, the spacing between adjacent first sections 131 can be increased, the lateral capacitance generated between adjacent first sections 131 can be reduced, thereby improving the display yield.

[0062] Specifically, the display panel 1 may include a red light-emitting unit 121, a green light-emitting unit 121, a blue light-emitting unit 121, and a white light-emitting unit 121. The first portions 131 connected to the red light-emitting unit 121, the green light-emitting unit 121, the blue light-emitting unit 121, and the white light-emitting unit 121 may be respectively disposed in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124, and the first transparent conductive layer 1125, so that the first portions 131 are evenly distributed in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124, and the first transparent conductive layer 1125, thereby helping to improve the generation of column display stripes and facilitating wiring, while also increasing the spacing between adjacent first portions 131.

[0063] In one feasible implementation, such as Figure 8 and Figure 9As shown, the first display area AA1 includes multiple first light-emitting units 1212, multiple second light-emitting units 1213, and multiple third light-emitting units 1214. Each first light-emitting unit 1212 is located within a virtual quadrilateral, which is arranged in rows and columns. Two opposite vertices of each virtual quadrilateral coincide with the centers of two second light-emitting units 1213, and the other two opposite vertices coincide with the centers of two third light-emitting units 1214. The ratio of the number of first light-emitting units 1212, second light-emitting units 1213, and third light-emitting units 1214 is 2:1:1. The first division 131 connected to some of the first light-emitting units 1212, the first division 131 connected to other parts of the first light-emitting units 1212, the first division 131 connected to the second light-emitting units 1213, and the first division 131 connected to the third light-emitting units 1214 are arranged on different layers.

[0064] Specifically, the virtual quadrilateral is rectangular or trapezoidal in shape, such as... Figure 8 As shown, when the virtual quadrilateral is a rectangle, the center of the first light-emitting unit 1212 coincides with the center of the rectangle; as Figure 9 As shown, when the virtual quadrilateral is a trapezoid, the center of the first light-emitting unit 1212 is offset from the center of the trapezoid.

[0065] In the above embodiment, the ratio of the number of the first light-emitting unit 1212, the second light-emitting unit 1213, and the third light-emitting unit 1214 is 2:1:1. This allows the first portion 131 connected to a portion of the first light-emitting unit 1212, the first portion 131 connected to another portion of the first light-emitting unit 1212, the first portion 131 connected to the second light-emitting unit 1213, and the first portion 131 connected to the third light-emitting unit 1214 to be arranged in different layers. Specifically, the number of first portions 131 in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124, and the first transparent conductive layer 1125 can be the same, thereby further facilitating the wiring of the first portions 131 and increasing the spacing of the first portions 131 in each layer.

[0066] Specifically, the first light-emitting unit 1212 can be a green light-emitting unit 121, the second light-emitting unit 1213 can be a red light-emitting unit 121, and the third light-emitting unit 1214 can be a blue light-emitting unit 121.

[0067] When the first display area AA1 or the display panel 1 adopts other light-emitting unit 121 arrangement, the red light-emitting unit 121, the green light-emitting unit 121 and the blue light-emitting unit 121 can be respectively connected to the first part 131, with some parts disposed in the light-shielding metal layer 1122, some in the first metal layer 1123, and some in the second metal layer 1124, and the other part disposed in the first transparent conductive layer 1125. This makes the first part 131 evenly distributed in the light-shielding metal layer 1122, the first metal layer 1123, the second metal layer 1124 and the first transparent conductive layer 1125, thereby facilitating wiring and increasing the spacing between adjacent first parts 131.

[0068] In one feasible implementation, such as Figure 8 and Figure 9 As shown, the edge of the orthographic projection of part of the second portion 132 onto the substrate 111 is wavy or straight.

[0069] In the above embodiment, the second part 132 is located in the first display area AA1. The camera module can be integrated on the side of the display panel 1 away from the light-emitting surface and opposite to the first display area AA1. When light passes through the first display area AA1 and shines on the camera module, diffraction is likely to occur. By setting the edge of the orthographic projection of the second part 132 on the substrate 111 to be wavy, the diffraction phenomenon can be reduced and the imaging quality of the camera module can be improved.

[0070] This application also provides a display device 2, such as... Figure 10 As shown, it includes any of the display panels 1 provided in the above embodiments of this application.

[0071] In the display panel 1 of the display device 2, the first section 131, which connects the light-emitting unit 121 in the first display area AA1 and the pixel circuit 1121 in the transition area AA3, has a wider wiring range, facilitating wiring. Simultaneously, due to the wider coverage of the first section 131, the line width of the first trace 13 can be appropriately increased, and the line spacing between adjacent first sections 131 can be increased, thereby reducing the capacitance between adjacent first sections 131 and further improving the display quality of the display panel 1. This results in better display performance for the display device 2.

[0072] Specifically, the display device 2 can be a mobile terminal such as a mobile phone or tablet computer, or a fixed terminal such as a monitor or television, or a wearable device such as a watch. This application does not make any special limitations.

[0073] The embodiments described above are not exhaustive and do not limit the invention to specific examples. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized by, The display panel has a first display area and a second display area, the second display area at least partially surrounds the first display area, the first display area has a higher light transmittance than the second display area, and the display panel comprises: An array substrate comprises a substrate and a drive circuit layer on the substrate, the drive circuit layer comprises a circuit region in the second display area and a light-transmitting region in the first display area, the circuit region comprises a plurality of pixel circuits, each pixel circuit comprises a transistor, the transistor comprises a source electrode and a drain electrode, the circuit region comprises a light-shielding metal layer between the transistor and the substrate, and a normal projection of the light-shielding metal layer on the transistor at least covers a channel region of the transistor, and the light-transmitting region comprises a second transparent conductive layer; A light-emitting element layer is on a side of the drive circuit layer away from the substrate and comprises a plurality of light-emitting units; The light-emitting unit on the light-transmitting region is electrically connected to the pixel circuit in the second display area through a first trace, the first trace comprises a first part in the second display area and a second part in the second transparent conductive layer, part of the first part is located on the light-shielding metal layer, the first part is connected to the source electrode or the drain electrode of the transistor in the pixel circuit through a second connecting part, and the second connecting part is at least partially located in a via hole extending in a thickness direction of the array substrate.

2. The display panel of claim 1, wherein, The drive circuit layer comprises a first metal layer, a second metal layer and a first transparent conductive layer on a side of the light-shielding metal layer away from the substrate, and the light-shielding metal layer, the first metal layer, the second metal layer and the first transparent conductive layer are respectively provided with at least one first part.

3. The display panel of claim 2, wherein, The number of the first parts in the light-shielding metal layer, the first metal layer, the second metal layer and the second transparent conductive layer is the same.

4. The display panel of claim 2, wherein, The second transparent conductive layer is provided in the same layer as the first transparent conductive layer, when the first part is located on the light-shielding metal layer, the first metal layer or the second metal layer, the first part is connected to the second part through a first connecting part, and the first connecting part is at least partially located in a via hole extending in a thickness direction of the array substrate.

5. The display panel of claim 2, wherein, The materials of the second transparent conductive layer and the first transparent conductive layer are transparent conductive materials.

6. The display panel of claim 5, wherein, The materials of the second transparent conductive layer and / or the first transparent conductive layer are indium tin oxide, carbon nanotubes, metal oxides, metal nanowires or conductive polymers.

7. The display panel of claim 1, wherein, The light-emitting units are arranged in rows and columns, and the first parts connected to the light-emitting units of the same color are located in the same layer.

8. The display panel of any of claims 1-7, wherein, The first display area comprises a plurality of first light emitting units, a plurality of second light emitting units and a plurality of third light emitting units, wherein each of the first light emitting units is located in a virtual quadrilateral, the virtual quadrilaterals are arranged in rows and columns, two opposite vertices of each of the virtual quadrilaterals coincide with the centers of two of the second light emitting units respectively, and the other two opposite vertices coincide with the centers of two of the third light emitting units respectively, the number ratio of the first light emitting units, the second light emitting units and the third light emitting units is 2:1:1, and the first sub-sections to which part of the first light emitting units are connected, the first sub-sections to which another part of the first light emitting units are connected, the first sub-sections to which the second light emitting units are connected and the first sub-sections to which the third light emitting units are connected are arranged on different layers.

9. The display panel of claim 8, wherein, The virtual quadrilaterals are in the shape of a rectangle or a trapezoid, when the virtual quadrilaterals are in the shape of a rectangle, the center of the first light emitting units coincides with the center of the rectangle, and when the virtual quadrilaterals are in the shape of a trapezoid, the center of the first light emitting units deviates from the center of the trapezoid.

10. The display panel of claim 1, wherein, The edges of the orthographic projections of part of the second sub-sections on the substrate are in the shape of a wave or a straight line.

11. A display device, characterized by comprising: The display panel comprises the display panel according to any one of claims 1-10.

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