A machine vision method for wafer inspection

Abstract

The present invention relates to the field of wafer detection technology, and discloses a machine vision method for wafer detection, comprising the following steps: step 1: pre-training an MAE model using an ImageNet1000 data set, and initially fine-tuning the MAE model using a public industrial data set; step 2: confirming wafer data to be detected; and performing secondary fine-tuning on the MAE model to obtain an improved MAE model; step 3: screening standard training samples; the standard training samples only contain qualified wafer samples; step 4: the improved MAE model performs feature extraction based on the standard training samples and constructs a memory library; step 5: feature extraction of the wafer data to be detected by the improved MAE model; step 6: comparing the standard Patch Embedding and the Patch Embedding of the wafer data to be detected according to the comparison strategy, and determining to obtain a qualified Patch of the wafer data to be detected; step 7: determining and segmenting the abnormal area of ​​the wafer data to be detected according to the qualified Patch. The present invention can accurately detect wafers, and has high recognition accuracy.

Description

Technical Field

[0001] The present invention relates to the technical field of wafer detection, and in particular to a machine vision method for wafer detection. Background Art

[0002] A wafer refers to the silicon chip used to make silicon semiconductor integrated circuits. Due to its round shape, it is called a wafer. Various circuit component structures can be processed on the silicon wafer to become IC products with specific electrical functions.

[0003] In the specific semiconductor manufacturing process, the wafer undergoes a series of semiconductor manufacturing processes to form a tiny circuit structure, and then is cut, packaged, and tested to form a chip. Usually, the wafer will be processed through multiple processes such as photolithography, etching, deposition, ion implantation, diffusion, and polishing. After each process, it is inevitable that defects such as foreign matter, scratches, and missing parts may be introduced into the corresponding layer on the surface of the wafer. In order to ensure the quality of the finished product, it is necessary to inspect the wafer after each process.

[0004] Conventional wafer inspection uses a scanning machine to scan and collect wafer images, and then uses manual visual observation to determine whether there are defects on the wafer surface and classify the defects. However, due to the complexity of the semiconductor manufacturing process, there are many types of defects that occur during the processing of wafers, which makes manual inspection difficult. In addition, identifying different types of defects depends largely on the professional knowledge level of the inspectors, and the professional knowledge levels of different inspectors are often uneven, which makes manual inspection less efficient and less accurate and reliable.

[0005] At present, with the development of machine vision methods, most wafer inspections are often carried out using machine vision, which has greatly improved the inspection efficiency. However, the existing machine vision algorithms, under the premise of keeping the image acquisition method unchanged, generally use machine learning methods to more accurately identify the collected image signals; this method needs to model each wafer product and each wafer defect when applied, and the pre-process steps are cumbersome to execute, and it cannot adapt to the increasing detection needs of defect types and high accuracy requirements. In addition, due to the small size of wafer products and the limitations of process restrictions and other factors, the variance between qualified wafer samples is large. At this stage, traditional machine learning methods are difficult to fit the distribution of data, and the defect segmentation task is also very difficult, and it is impossible to accurately divide the defect area.

[0006] Most of the other deep learning methods use supervised learning for image recognition and detection. The algorithm of this method requires a large amount of data with precise annotations as the basic data for learning. However, due to the wide variety of defect samples, the cost of manual annotation is high when annotating data, and the annotation of abnormal areas is easily affected by human factors, and the annotation accuracy is low. Moreover, more importantly, since the flaws and defects that constitute the wafer defect samples are sporadic, the number of defect samples collected is often unbalanced, and some defect samples may even be missing, which limits the performance of the supervised algorithm, making the deep learning method perform poorly in wafer detection, and the detection accuracy is still low. Summary of the invention

[0007] The present invention aims to provide a machine vision method for wafer detection, which can accurately detect wafers with high recognition accuracy.

[0008] The basic solution provided by the present invention is: a machine vision method for wafer inspection, comprising the following steps:

[0009] Step 1: Use the ImageNet1000 dataset to pre-train the MAE model, and use a public industrial dataset to perform initial fine-tuning on the MAE model;

[0010] Step 2: Confirm the wafer data to be tested; use the wafer data to be tested to perform secondary fine-tuning on the MAE model after the initial fine-tuning to obtain an improved MAE model;

[0011] Step 3: Screening standard training samples; the standard training samples only contain qualified wafer samples;

[0012] Step 4: The improved MAE model performs feature extraction based on the standard training samples and constructs a memory library; the memory library contains the standard Patch Embedding of the standard training samples;

[0013] Step 5: The improved MAE model is used to extract features of the wafer data to be inspected, and the Patch Embedding of each Patch of the wafer data to be inspected is obtained;

[0014] Step 6: Compare the standard Patch Embedding and the Patch Embedding of the wafer data to be tested according to the comparison strategy, and determine the qualified Patch of the wafer data to be tested;

[0015] Step 7: Determine and segment the abnormal area of ​​the wafer data to be inspected based on the qualified patch.

[0016] Among them, the MAE model (Masked Autoencoder) is a scalable self-supervised learner and a deep learning algorithm. It can use a mask mechanism similar to BERT to randomly erase some pixels from the image and let the model construct unknown pixels from known pixels, thereby forcing the model to learn the features in the image. The MAE model has good pixel reconstruction capabilities.

[0017] Patch refers to a pixel block, and each sample image can be divided into multiple pixel blocks. Patch Embedding refers to compressing each patch into a vector of a certain dimension through a neural network. It is an abstract vector representation of a pixel block, which contains the graphic information in each patch, as well as its content and position relationship with other patches.

[0018] The working principle and advantages of the present invention are as follows: first, the model is trained and adjusted using sample data in an industrial data set and the wafer data to be inspected, and an improved MAE model with better model performance is obtained; and the improved MAE model is used to construct a standard training sample, that is, a memory library of qualified wafer samples, and then by comparing the wafer data to be inspected with the standard data in the memory library, it is determined whether there is an abnormal area of ​​the wafer to be inspected, that is, whether there is a defective part, and the abnormal part existing in the wafer to be inspected, that is, the defective part, is segmented, and the inspection and processing of the wafer is completed, and the accurate segmentation of the abnormal part can be completed simultaneously, which is convenient for summarizing wafer defects.

[0019] In this solution, first, the sample data in the industrial data set is used to pre-train and initially fine-tune the model, and the wafer data to be inspected is used to perform secondary fine-tuning of the model; the initial MAE model can be adapted to the wafer data to be inspected in this solution, and the model performance is better and more targeted. It can subsequently process the wafer data to be inspected better, which helps to ensure a high wafer recognition accuracy.

[0020] Second, the standard training samples used in this scheme only contain qualified wafer samples and do not contain any defective wafer samples at all; the constructed memory library also only contains the data of qualified wafer samples; in the subsequent comparison to determine whether there are abnormal areas in the wafer data to be tested, only the wafer data to be tested is compared with the data of qualified wafer samples; that is, in this scheme, only qualified wafer samples, that is, positive samples, are used as the basis for model learning and detection comparison. This scheme is set up in this way, so that although this scheme uses deep learning models such as MAE models, it does not need to label the sample data for model learning and comparison like the conventional detection method of deep learning, because this scheme only uses positive sample data, and qualified positive sample data can be regarded as one category, and no labeling and classification is required. This scheme removes the labeling step from the root, simplifies the data processing steps, and simplifies the overall detection process. The scheme is more efficient and convenient.

[0021] In particular, this solution overcomes the technical bias of existing deep learning algorithms that require the use of negative samples, i.e. defect samples, in image learning and recognition. In existing solutions, the fixed mindset is that if you want to detect defects, you must identify and compare them, so you must set negative samples for the algorithm to learn about defects and determine defects based on both positive and negative samples. However, this type of method is not applicable to wafer inspection. Limited by the complex processing flow of wafers, the types of defects are also complex and numerous, up to hundreds of types, and it is impossible to set up all negative samples; limited by its miniature size and the recognition accuracy of the algorithm, some defects cannot be detected, and there are objective gaps in negative samples; and insufficient negative samples will hinder detection and judgment, which is one of the fundamental reasons why the detection accuracy of existing detection methods using deep learning cannot be improved.

[0022] This solution breaks through the limitations of the above fixed thinking, and only sets positive sample data (qualified wafer sample data) for model recognition and comparison, and is no longer restricted by negative samples. Most importantly, although this solution reduces the sample types and only includes qualified wafer samples, it can achieve high-precision wafer detection with a positive sample library (memory library) that only contains qualified wafer sample data. The reasons are as follows: first, this solution focuses on comparing the similarity between the test data and the positive sample data. The types of defects are ever-changing, but the standards for qualified samples are certain. The comparison standards are more stable and clear, and the comparison detection results are more accurate and reliable. Second, in this solution, the improved MAE model is used to extract features from the standard training samples and the wafer data to be tested. The extracted Patch Embedding is compared during the comparison. The wafer samples to be tested are compared with the qualified standard training samples in a high semantic space, and the image information is quantitatively compared. All defect information in the image samples can be accurately found, and the recognition accuracy is high.

[0023] Furthermore, the first fine-tuning and the second fine-tuning both include the following sub-steps:

[0024] Sub-step 1: using the industrial data set image or the wafer data image to be inspected as the initial image, and performing a mask operation on the initial image; the mask operation is to randomly erase part of the patches in the industrial data set image or the wafer data image to be inspected;

[0025] Sub-step 2: Take the unerased patches in the industrial dataset image after the mask operation or the wafer data image to be inspected as the input tensor and input it into the Encoder module of the MAE model;

[0026] Sub-step 3: The Encoder module of the MAE model extracts the Patch Embedding of the input tensor;

[0027] Sub-step 4: Combine the Patch Embedding extracted in sub-step 3 with the area erased in the mask operation to reconstruct the Patch structure and make the Patch structure consistent with the initial image; the area erased in the mask operation is represented by a blank Patch;

[0028] Sub-step 5: The Decoder module of the MAE model decodes the Patch structure reconstructed in sub-step 4 and obtains the restored image;

[0029] Sub-step 6: Calculate the MAE model loss based on the restored image and update the network parameters of the MAE model.

[0030] Among them, the Encoder module refers to the encoder in the MAE model, and the Decoder module refers to the decoder in the MAE model.

[0031] This scheme is set up in this way, using sample data in the industrial data set and the wafer data to be inspected, through image reconstruction operations, to pre-train and fine-tune the model, which can better exercise the model's image reconstruction ability and facilitate the optimization of model parameters.

[0032] Furthermore, in step 4 and step 5, the Encoder module of the improved MAE model performs feature extraction operations.

[0033] With this setting, the Encoder module can be used to map pixel information into feature vectors in the semantic space, and then perform feature extraction operations; and because the MAE model uses an asymmetric Encoder-Decoder architecture, that is, the Encoder module (encoder) can only see the unobstructed part of the pixel block information, it can effectively save computational overhead.

[0034] Furthermore, in step 4, when building the memory library, the following sub-steps are included:

[0035] S1: performing multiple non-overlapping mask operations on the standard training samples; the mask operation is to randomly erase part of the patches in the standard training samples;

[0036] S2: Input the mask operation result into the Encoder module of the improved MAE model for feature extraction, and extract the standard Patch Embedding; the mask operation result is the PatchEmbeddings that are not erased in the standard training sample.

[0037] With this setting, the memory bank contains sufficient feature vector information of standard training samples, which is convenient for subsequent analysis and comparison.

[0038] Furthermore, when constructing the memory bank, S3 is also included: importance sampling is performed on the memory bank according to the set capacity; only the data after the importance sampling is retained in the memory bank.

[0039] This setting selects the data in the memory bank, which can ensure the representativeness of the memory bank data, effectively reduce information redundancy and streamline storage space. In addition, when faced with a large gap between the actual qualified wafer samples to be tested and the standard samples in the memory bank (that is, when faced with the situation where there are differences between the elements in the actual qualified sample set), because this scheme specially sets up importance sampling, it can ensure that the data distribution in the memory bank can fit the actual distribution of normal samples to a great extent, and then this scheme can also effectively judge the above-mentioned differences without false alarms, and the overall detection accuracy is higher.

[0040] Furthermore, in S1, the mask operation is performed 4 times in total; and the mask ratio is set to 75%; and the patches that are not erased in each mask operation do not overlap.

[0041] The mask ratio is set to 75%, that is, 75% of the pixel blocks (i.e., patches) are erased (shielded) each time the mask is applied. This setting can reduce the redundant information between pixel blocks, making the entire task more challenging and forcing the model to learn the global features of the image rather than the local features, thereby obtaining better image reconstruction capabilities. Moreover, after four non-overlapping mask operations, the pixel blocks masked each time are different and the pixel blocks that are not erased in the four mask operations are sufficient to be spliced ​​into a complete image, which can provide sufficient information basis for image reconstruction.

[0042] Furthermore, in S3, the importance sampling is performed using a greedy core set selection algorithm.

[0043] The greedy core set selection algorithm means that when solving a problem, the local optimal solution is selected at each step, hoping to eventually obtain the global optimal solution. That is, the local optimal solution is found in the current state, and then the local optimal solution is sought again on this basis, replacing the global optimal solution with the process of repeatedly searching for the local optimal solution until convergence.

[0044] This scheme adopts a greedy algorithm for sampling, which is intuitive to operate, easy to understand and easy to code and implement; and, since the current decision in the greedy algorithm will not have any impact on the already calculated results, there is no need to check the existing local solutions, and the operation efficiency is high.

[0045] Further, in step 6, the comparison strategy is: calculate the distance between the Patch Embedding in the memory library and the Patch Embedding of the wafer data to be detected; and select the nearest several distance values ​​to calculate the distance expectation, and use the distance expectation as the anomaly score of the Patch; and compare the anomaly score with the preset threshold to determine whether the Patch is a qualified Patch.

[0046] With this setting, the distance between the comparison vectors is calculated to determine whether the patch meets the standard, and the pixel block comparison is accurately quantified, resulting in a higher judgment accuracy.

[0047] Further, in step 6, when determining qualified patches, when the anomaly score of a patch is greater than a preset threshold, the patch is determined to be an unqualified patch; when the anomaly score of a patch is less than or equal to the preset threshold, the patch is determined to be a qualified patch.

[0048] In this way, a preset threshold is set to assist in determining qualified patches and unqualified patches, and the determination is reliable. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 A schematic diagram of a process flow of an embodiment of a machine vision method for wafer inspection according to the present invention;

[0050] Figure 2 A schematic diagram of the method operation architecture of an embodiment of a machine vision method for wafer inspection according to the present invention;

[0051] Figure 3 A schematic diagram of a model fine-tuning process of an embodiment of a machine vision method for wafer inspection according to the present invention;

[0052] Figure 4 A schematic diagram of a memory library construction process of an embodiment of a machine vision method for wafer inspection of the present invention;

[0053] Figure 5The figure is a schematic diagram of mask operation of an embodiment of a machine vision method for wafer inspection according to the present invention. DETAILED DESCRIPTION

[0054] The following is a further detailed description through specific implementation methods:

[0055] The embodiment is basically as shown in the attached Figure 1 , Figure 2 As shown: A machine vision method for wafer inspection, comprising the following steps:

[0056] Step 1: Use industrial data sets to pre-train the MAE model and perform initial fine-tuning on the MAE model;

[0057] In this embodiment, the industrial datasets used include the ImageNet1000 dataset, the DAGM 2007 dataset, and the MVTec AD dataset, all of which are conventional industrial datasets that contain rich image data and can provide sufficient data for model training.

[0058] Step 2: Confirm the wafer data to be tested; use the wafer data to be tested to perform secondary fine-tuning on the MAE model after the initial fine-tuning to obtain an improved MAE model.

[0059] As attached Figure 3 As shown, the initial fine-tuning in step 1 and the secondary fine-tuning in step 2 both include the following sub-steps:

[0060] Sub-step 1: using the industrial data set image or the wafer data image to be inspected as the initial image, and performing a mask operation on the initial image; the mask operation is to randomly erase part of the patches in the industrial data set image or the wafer data image to be inspected.

[0061] Specifically, during the initial fine-tuning, only the industrial data set images are used for masking operations; during the secondary fine-tuning, only the wafer data images to be inspected are used for masking operations. Moreover, the masking operation here is only performed once. Before the masking operation, both the industrial data set images and the wafer data images to be inspected are divided into patches, that is, divided into pixel blocks, and the patch size is 2x2 pixels. In specific applications, the patch size can be determined according to the size of the abnormal area to be detected. If anomalies of 2x2 pixels or above are required to be detected, the patch size is 2x2 pixels. During the masking operation, the mask ratio is set to 75%.

[0062] Sub-step 2: Use the unerased patches in the industrial dataset image after mask operation or the wafer data image to be inspected as input tensors and input them into the Encoder module of the MAE model.

[0063] Sub-step 3: The Encoder module of the MAE model extracts the Patch Embedding of the input tensor.

[0064] Sub-step 4: Combine the Patch Embedding extracted in sub-step 3 with the area erased in the mask operation to reconstruct the Patch structure and make the Patch structure consistent with the initial image; the area erased in the mask operation is represented by a blank Patch.

[0065] Sub-step 5: The Decoder module of the MAE model decodes the Patch structure reconstructed in sub-step 4 and obtains the restored image.

[0066] Sub-step 6: Calculate the MAE model loss based on the restored image and update the network parameters of the MAE model.

[0067] Step 3: Screening standard training samples; the standard training samples only contain qualified wafer samples.

[0068] In this embodiment, the basic image acquisition of the wafer data to be inspected and the standard training sample data are both performed using a conventional wafer AOI equipment camera, and the image is a grayscale two-dimensional image. The image content is the processed wafer, which is the wafer after etching in this embodiment, and each die can be seen in the image. Die refers to a fully functional chip on a wafer, which is generally a few millimeters in size. Standard training samples can be selected according to specific product requirements. In this embodiment, the number of standard training samples is set to be greater than 200, and the number of positive samples is sufficient to provide a sufficient data basis for building a memory library.

[0069] Step 4: The Encoder module of the improved MAE model performs feature extraction based on the standard training samples and constructs a memory library; the memory library contains the standard Patch Embedding of the standard training samples.

[0070] As attached Figure 4 As shown, building a memory library includes the following sub-steps:

[0071] S1: Perform multiple non-overlapping masking operations on the standard training samples; the masking operation is to randomly erase some patches in the standard training samples; the masking operation is performed 4 times in total; and the masking ratio is set to 75%; the patches that are not erased in each masking operation do not overlap, as shown in the attached figure. Figure 5 shown.

[0072] S2: Input the mask operation result into the Encoder module of the improved MAE model for feature extraction, and extract the standard Patch Embedding; the mask operation result is the PatchEmbeddings that are not erased in the standard training sample.

[0073] S3: Importance sampling is performed on the memory bank according to the set capacity; only the data after importance sampling is retained in the memory bank. The importance sampling adopts the greedy core set selection algorithm for sampling, and the core set number ratio and the sample dimension reduction ratio are set values. This setting selects the data in the memory bank, which can ensure the representativeness of the memory bank data, and can effectively reduce information redundancy and streamline storage space.

[0074] Step 5: The Encoder module of the improved MAE model performs feature extraction on the wafer data to be inspected, and obtains the Patch Embedding of each Patch of the wafer data to be inspected.

[0075] Step 6: Compare the standard Patch Embedding and the Patch Embedding of the wafer data to be tested according to the comparison strategy, and determine the qualified Patch of the wafer data to be tested.

[0076] Specifically, the comparison strategy is: calculate the distance between the Patch Embedding in the memory and the Patch Embedding of the wafer data to be detected; when calculating, it is necessary to calculate the distance between the Patch Embedding of each Patch of the wafer data to be detected and all the Patch Embeddings in the memory; and select the nearest several distance values ​​to calculate the distance expectation. The nearest several distance values ​​specifically refer to the N values ​​with the closest distance (the smallest distance value) calculated in the previous step, where N is a set value, which can be adjusted according to actual needs. In this embodiment, the N value is taken as 9, which is a moderate value, so that the calculated distance expectation has a high reliability. The distance expectation is used as the anomaly score of the Patch; and the anomaly score is compared with the preset threshold to determine whether the Patch is a qualified Patch. In this embodiment, the comparison strategy is executed using the KNN algorithm, which can accurately calculate the distance expectation and has a good calculation effect.

[0077] When determining a qualified patch, when the anomaly score of a patch is greater than a preset threshold, the patch is determined to be an unqualified patch; when the anomaly score of a patch is less than or equal to the preset threshold, the patch is determined to be a qualified patch.

[0078] Specifically, the preset threshold is determined according to the anomaly score of each patch, and is adjusted according to the preset adjustment step starting from the average anomaly score of all patches. For example, when the average anomaly score of all patches is 2.2, the adjustment starts from 2.2, and the general adjustment step is 0.05. The preset threshold can be 2.25, 2.15, etc., that is, 2.2±0.05k; where k is a positive integer. The preset threshold is set in this way, which is more targeted and the judgment standard is more reliable.

[0079] Step 7: Determine and segment the abnormal area of ​​the wafer data to be inspected based on the qualified patch.

[0080] Specifically, when the patch is determined to be a qualified patch, it can be determined that there is no abnormal area and no segmentation is required. When the patch is determined to be an unqualified patch, it can be determined that there is an abnormal area, and the abnormal area of ​​the wafer data to be inspected can be further segmented.

[0081] The machine vision method for wafer detection provided in this embodiment can accurately detect wafers with high recognition accuracy. In this solution, only qualified wafer samples are used as the basis for model learning and detection comparison, and defective samples, i.e. negative samples, are not used. Although this solution uses deep learning models such as MAE models, it does not need to label the sample data for model learning and comparison like the conventional detection method using deep learning. The labeling step is removed from the root, the data processing steps are simplified, and the overall detection process is simplified. The solution is more efficient and more convenient. In addition, since this solution performs importance sampling in particular when constructing the memory library, it can ensure that the data distribution in the memory library can fit the actual distribution of normal samples to a great extent. When faced with the situation where there are differences between elements in the actual qualified sample set, it can also effectively determine the abnormality without false alarms, and the overall detection accuracy is high.

[0082] In addition, this solution also fundamentally solves the problem of low accuracy in wafer detection due to insufficient negative sample collection in conventional detection methods. Specifically, this solution overcomes the technical bias of existing deep learning algorithms that must set negative samples, that is, defective samples, in image learning and recognition. This solution no longer sets negative samples, and no longer relies on negative samples to confirm defects during comparison; instead, it focuses on comparing the similarity between the test data and the positive sample data, and uses the improved MAE model to extract features from the standard training samples and the wafer data to be tested, compares the wafer samples to be tested with the qualified standard training samples in a high semantic space, quantifies and compares the image information, and all defect information in the image samples can be accurately found, with high recognition accuracy.

[0083] In addition, the defect missed detection rate of this solution is low. Due to the small size of the wafer, high-magnification and high-precision imaging is often required when collecting its image. Under high-magnification and high-precision imaging, the image depth of field is shallow, and the etched wafer components will show height differences, and some areas within the components will be out of focus. For conventional detection algorithms, it is more difficult to detect abnormal conditions in such out-of-focus areas because it is difficult to accurately compare the images of the out-of-focus parts. In this solution, the wafer samples to be tested are compared with qualified standard training samples in a high semantic space, which is not limited to image performance and can effectively solve the above problems.

[0084] The above is only an embodiment of the present invention. The common sense such as the known specific structure and characteristics in the scheme is not described in detail here. The ordinary technicians in the relevant field know all the common technical knowledge in the technical field of the invention before the application date or priority date, can obtain all the existing technologies in the field, and have the ability to apply the conventional experimental means before that date. The ordinary technicians in the relevant field can improve and implement this scheme in combination with their own abilities under the enlightenment given by this application. Some typical known structures or known methods should not become obstacles for ordinary technicians in the relevant field to implement this application. It should be pointed out that for those skilled in the art, without departing from the structure of the present invention, several deformations and improvements can be made, which should also be regarded as the protection scope of the present invention, which will not affect the effect of the implementation of the present invention and the practicality of the patent. The protection scope required by this application shall be based on the content of its claims, and the specific implementation methods and other records in the specification can be used to interpret the content of the claims.

Claims

1. A machine vision method for wafer inspection, characterized in that: The following steps are involved: Step 1: Use the ImageNet1000 dataset to pre-train the MAE model, and use a public industrial dataset to perform initial fine-tuning on the MAE model; Step 2: Confirm the wafer data to be tested; use the wafer data to be tested to perform secondary fine-tuning on the MAE model after the initial fine-tuning to obtain an improved MAE model; The first fine-tuning and the second fine-tuning both include the following sub-steps: Sub-step 1: using the industrial data set image or the wafer data image to be inspected as the initial image, and performing a mask operation on the initial image; the mask operation is to randomly erase part of the patches in the industrial data set image or the wafer data image to be inspected; Sub-step 2: Take the unerased patches in the industrial dataset image after the mask operation or the wafer data image to be inspected as the input tensor and input it into the Encoder module of the MAE model; Sub-step 3: The Encoder module of the MAE model extracts the Patch Embedding of the input tensor; Sub-step 4: Combine the Patch Embedding extracted in sub-step 3 with the area erased in the mask operation to reconstruct the Patch structure and make the Patch structure consistent with the initial image; the area erased in the mask operation is represented by a blank Patch; Sub-step 5: The Decoder module of the MAE model decodes the Patch structure reconstructed in sub-step 4 and obtains the restored image; Sub-step 6: Calculate the MAE model loss based on the restored image and update the network parameters of the MAE model; Step 3: Screening standard training samples; the standard training samples only contain qualified wafer samples; Step 4: Improve the MAE model to extract features based on standard training samples and build a memory library; The memory bank contains standard Patch Embedding of standard training samples; Step 5: The improved MAE model is used to extract features of the wafer data to be inspected, and the Patch Embedding of each Patch of the wafer data to be inspected is obtained; Step 6: Compare the standard Patch Embedding and the Patch Embedding of the wafer data to be tested according to the comparison strategy, and determine the qualified Patch of the wafer data to be tested; Step 7: Determine and segment the abnormal area of ​​the wafer data to be inspected based on the qualified patch.

2. A machine vision method for wafer inspection according to claim 1, characterized in that: In step 4 and step 5, the Encoder module of the improved MAE model performs feature extraction operations.

3. A machine vision method for wafer inspection according to claim 1, characterized in that: In step 4, when building the memory library, the following sub-steps are included: S1: performing multiple non-overlapping mask operations on the standard training samples; the mask operation is to randomly erase part of the patches in the standard training samples; S2: Input the mask operation result into the Encoder module of the improved MAE model for feature extraction, and extract the standard Patch Embedding; the mask operation result is the PatchEmbeddings that are not erased in the standard training sample.

4. A machine vision method for wafer inspection according to claim 3, characterized in that: When building the memory library, S3 is also included: importance sampling is performed on the memory library according to the set capacity; only the data after importance sampling is retained in the memory library.

5. A machine vision method for wafer inspection according to claim 3, characterized in that: In S1, the mask operation is performed 4 times in total; and the mask ratio is set to 75%; and the patches that are not erased in each mask operation do not overlap.

6. A machine vision method for wafer inspection according to claim 4, characterized in that: In S3, the importance sampling is performed using a greedy core set selection algorithm.

7. A machine vision method for wafer inspection according to claim 1, characterized in that: In step 6, the comparison strategy is: calculate the distance between the Patch Embedding in the memory library and the Patch Embedding of the wafer data to be detected; and select the nearest several distance values ​​to calculate the distance expectation, and use the distance expectation as the anomaly score of the patch; and compare the anomaly score with the preset threshold to determine whether the patch is a qualified patch.

8. A machine vision method for wafer inspection according to claim 7, characterized in that: In step 6, when determining qualified patches, when the anomaly score of a patch is greater than a preset threshold, the patch is determined to be an unqualified patch; when the anomaly score of a patch is less than or equal to the preset threshold, the patch is determined to be a qualified patch.

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