Display panel and display device

Abstract

An embodiment of the present application provides a display panel and a display device. It relates to the field of display technology and is used to solve the technical problem that it is difficult to achieve a narrow border design for the display panel. The display panel includes: a display area and a non-display area surrounding at least part of the display area; a driving circuit group. In a first direction, multiple driving circuit groups are provided in the display area. In a second direction, each driving circuit group includes multiple pixel driving circuits, and the first direction intersects with the second direction; scanning lines extending along the second direction, and the scanning lines are used to provide scanning signals to the corresponding pixel driving circuits. Among them, in the first direction, the nth driving circuit group is correspondingly provided with the nth-level scanning line and the (n + m)th-level scanning line, where n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1; a transfer line, at least part of the transfer line is provided in the display area. In the first direction, the same-level scanning lines correspondingly arranged in different driving circuit groups are electrically connected through the transfer line.

Description

Technical Field

[0001] This application relates to the field of display technologies, and in particular, to a display panel and a display device. Background Art

[0002] An organic light-emitting diode (OLED) display panel is a display device that realizes display by using the self-luminous principle of organic electroluminescent materials. Compared with liquid crystal display devices, organic light-emitting diode display panels have many advantages such as self-luminance, fast response speed, low-voltage driving, high brightness, thinness, etc., and thus have gradually become the mainstream in the display field.

[0003] The display panel includes a display area and a non-display area. The display panel includes a scan driver and scan lines. The scan lines are electrically connected to the corresponding scan drivers. However, the scan lines occupy a large space in the non-display area, making it difficult for the display panel to achieve a narrow border design. Summary of the Invention

[0004] In view of the above problems, embodiments of the present application provide a display panel and a display device, which can effectively reduce the space occupied by the scan lines in the non-display area and are conducive to the display panel achieving a narrow border design.

[0005] To achieve the above object, embodiments of the present application provide the following technical solutions:

[0006] A first aspect of an embodiment of the present application provides a display panel, which includes:

[0007] A display area and a non-display area surrounding at least part of the display area;

[0008] A driving circuit group. In a first direction, a plurality of the driving circuit groups are provided in the display area. In a second direction, each driving circuit group includes a plurality of pixel driving circuits, and the first direction intersects with the second direction;

[0009] Scan lines, which extend along the second direction and are used to provide scan signals to the corresponding pixel driving circuits. Wherein, in the first direction, the nth driving circuit group corresponds to the nth level of scan lines and the (n + m)th level of scan lines, where n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1;

[0010] A jumper wire, at least part of the jumper wire is disposed in the display area. In the first direction, the scan lines of the same level corresponding to different driving circuit groups are electrically connected through the jumper wire.

[0011] In a possible implementation, the scan line and the adapter line are provided in different metal layers, so as to help avoid the problem of mutual interference between the scan line and the adapter line.

[0012] In a possible implementation, the display panel includes a first metal layer, a second metal layer, and a third metal layer, the scan line is arranged in the first metal layer, and the switching line is arranged in the third metal layer.

[0013] The adapter wire of the embodiment of the present application can be arranged on the third metal layer, so that the adapter wire can be arranged on the same layer as the data line, which is beneficial to reducing the processing difficulty of the adapter wire.

[0014] In a possible implementation manner, a plurality of the adapter wires are arranged in parallel along the second direction.

[0015] Arranging multiple adapter wires in parallel with each other is conducive to arranging the adapter wires on the same metal layer, making it easier to lay out the adapter wires in the display panel, while also making the adapter wires compact and regular, which is conducive to reducing occupied space.

[0016] In a possible implementation manner, the switching line extends along the first direction, and the switching line is perpendicular to the scan line.

[0017] When the scan lines of the same level corresponding to different driving circuit groups are connected through adapter wires, since the adapter wires are perpendicular to the scan lines, the length of the adapter wires can be minimized, which is beneficial to reducing the length of the adapter wires and further reducing the space occupied by the adapter wires.

[0018] In a possible implementation manner, along the first direction, the nth level scan line and the (n+m)th level scan line corresponding to the nth driving circuit group are arranged in parallel.

[0019] The scanning lines corresponding to each driving circuit group are arranged in parallel with each other, which is conducive to reducing the difficulty of wiring the scanning lines. At the same time, the scanning lines can be arranged compactly and regularly, which is conducive to reducing the occupied space.

[0020] In one possible implementation, the display panel also includes normal luminous pixels and virtual pixels, the display area is provided with the normal luminous pixels and the virtual pixels, the pixel driving circuit is used to drive the normal luminous pixels to emit light, and along the stacking direction of the display panel, the switching line corresponds to the virtual pixel setting.

[0021] The adapter line corresponds to the way the virtual pixel is set. The adapter line can avoid the routing area of the normal luminous pixel, which is conducive to reducing the wiring difficulty of the adapter line, and also avoids the interference problem between the adapter line and the routing related to the normal luminous pixel.

[0022] In a possible implementation, on both sides of the virtual pixel in the second direction, normal light-emitting pixels are respectively arranged.

[0023] In a possible implementation, the display panel further includes a scan driver, the scan driver is arranged in the non-display area, the nth scan line corresponding to the nth driving circuit group is connected to the nth scan driver, and the (n + m)th scan line is connected to the (n + m)th scan driver.

[0024] A second aspect of the embodiments of the present application provides a display device, which includes the display panel as described above.

[0025] In the display panel and the display device of the embodiments of the present application, a driving circuit group and corresponding scan lines are arranged in the display area. The scan lines of the same level corresponding to different driving circuit groups can be electrically connected across rows through jump wires. At least part of the jump wires are arranged in the display area, so that the space occupied by the jump wires in the non-display area can be reduced, and further the area of the non-display area of the display panel can be reduced, which is beneficial to the display panel to achieve a narrow bezel design. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 Schematic structural diagram of a pixel driving circuit provided by an embodiment of the present application;

[0028] Figure 2 Schematic structural diagram of a display panel provided by an embodiment of the present application;

[0029] Figure 3 Schematic partial structural diagram of a display panel provided by an embodiment of the present application;

[0030] Figure 4 Schematic partial structural diagram of a display panel provided by another embodiment of the present application;

[0031] Figure 5 Schematic partial structural diagram of a display panel provided by another embodiment of the present application;

[0032] Figure 6 Schematic partial structural diagram of a display panel provided by still another embodiment of the present application;

[0033] Figure 7Schematic diagram of a partial cross-sectional structure of a display panel provided by an embodiment of the present application;

[0034] Figure 8 Schematic diagram of the structure of a display device provided by an embodiment of the present application.

[0035] Explanation of reference numerals:

[0036] 10. Display panel;

[0037] 20. Driving circuit group;

[0038] 30. Pixel driving circuit;

[0039] 40. Scan line;

[0040] 50. Adapter line;

[0041] 60. Scan driver;

[0042] 70. Normal light-emitting pixel;

[0043] 80. Virtual pixel;

[0044] 90. First electrode;

[0045] 100. Light-emitting structure layer;

[0046] 110. Second electrode;

[0047] 120. Active layer;

[0048] 130. Gate;

[0049] 140. Source;

[0050] 150. Drain;

[0051] 200. Display device;

[0052] X. First direction;

[0053] Y. Second direction. Detailed implementation manners

[0054] After long-term research, the inventors found that in a display panel, a scan driver, multiple scan lines, a data driver, and multiple data lines are usually provided. The scan driver provides a scan signal for the scan lines. The data driver provides a data signal data for the data lines. The scan lines and the data lines may be arranged in a cross pattern. The scan lines and the data lines are used to input corresponding signals to the pixel driving circuit. The display panel includes a display area and a non-display area. The display area is used to provide image information to the user. The display area and the non-display area are adjacent to each other. A part of the trace of the scan lines may be arranged in the non-display area, resulting in a relatively large number and high density of traces in the non-display area, thereby increasing the area of the non-display area and making it difficult to achieve a narrow border design for the display panel.

[0055] It can be understood that the circuit structure of the pixel driving circuit in the display panel can be as Figure 1 shown. The pixel driving circuit includes a capacitor Cst, transistors T1, T2, T3, T4, T5, T6, and T7, which is a 7T1C circuit.

[0056] Among them, transistor T1 serves as the driving transistor. Specifically, the first pole of transistor T1 is connected to the first pole of transistor T5. The second pole of transistor T1 is connected to the first pole of transistor T6. The gate of transistor T1 is connected to the first pole of capacitor Cst.

[0057] The second pole of transistor T5 is connected to the voltage signal ELVDD. The gate of transistor T5 is connected to the emission control signal EM.

[0058] The second pole of transistor T6 is connected to the first end of the light-emitting diode. The gate of transistor T6 is connected to the emission control signal EM.

[0059] The first pole of transistor T2 is connected to the first pole of transistor T1. The second pole of transistor T2 is connected to the data line Vdata. The gate of transistor T2 is connected to the second scan line S2.

[0060] The first pole of transistor T3 is connected to the second pole of transistor T1. The second pole of transistor T3 is connected to the gate of transistor T1. The gate of transistor T3 is connected to the second scan line S2.

[0061] The first pole of transistor T4 is connected to the first pole of capacitor Cst. The second pole of transistor T4 is connected to the initialization signal Vref. The gate of transistor T4 is connected to the first scan line S1.

[0062] The first pole of transistor T7 is connected to the first end of the light-emitting diode. The second pole of transistor T7 is connected to the initialization signal Vref. The gate of transistor T7 is connected to the third scan line S3.

[0063] The second pole of the capacitor Cst is connected to the voltage signal ELVDD. The second terminal of the light-emitting diode is connected to the voltage signal ELVSS.

[0064] Exemplarily, the materials of the semiconductor layers of the transistors T3 and T4 in the pixel driving circuit are indium gallium zinc oxide (IGZO), while the materials of the semiconductor layers of the remaining transistors T1, T2, T5, T6, and T7 are polysilicon.

[0065] It should be noted that the circuit structure of the above pixel driving circuit is used for exemplary description and does not limit the protection scope of the present application.

[0066] In view of the above technical problems, the present application provides an improved technical solution. In this technical solution, a plurality of driving circuit groups are provided in the display area of the display panel. Each driving circuit group is correspondingly provided with scan lines of different levels. It should be noted that the scan lines of different levels refer to the scan lines that input scan signals in a time sequence. In different driving circuit groups, scan lines of the same level are correspondingly provided. The scan lines of the same level are electrically connected through jumpers, so that the scan lines of the same level can input scan signals to the corresponding pixel driving circuits in different driving circuit groups. It should be noted that the scan lines of the same level refer to the scan lines that are used to transmit the same scan signal at the same time. At least part of the jumpers are arranged in the display area, so that the connection traces between the scan lines of the same level can occupy less space in the non-display area, and thus the area of the non-display area can be reduced, which is beneficial to the display panel to achieve a narrow border design.

[0067] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be further described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0068] Figure 2 Schematically shows the structure of a display panel according to an embodiment of the present application. Refer to Figure 2 As shown, in the embodiment of the present application, the display panel 10 has a backlight surface and a light-emitting surface. The light-emitting surface of the display panel 10 is used to emit light to display image information. The display panel 10 includes a display area AA and a non-display area NA. The display panel 10 can form image information through the light emitted by the pixels provided in the display area AA. The non-display area NA can be an area without a display function. The non-display area NA surrounds at least part of the display area AA. For example, non-display areas NA can be provided around the four sides of the display area AA, that is, the display area AA is located within the area defined by the non-display areas NA.

[0069] When the size of the display panel 10 remains unchanged, the area of the non-display area NA affects the area of the display area AA. The smaller the area of the non-display area NA, the larger the area of the display area AA, thereby achieving a narrow border design for the display panel 10, which is beneficial to increasing the display area of the display panel 10.

[0070] Figure 3 Schematically shows a partial structure of the display panel 10 of the present application. Refer to Figure 3 As shown, in the first direction X, a plurality of driving circuit groups 20 are provided in the display area AA of the display panel 10. In the second direction Y, each driving circuit group 20 includes a plurality of pixel driving circuits 30. Among them, the first direction X and the second direction Y intersect. For example, the first direction X and the second direction Y can be perpendicular to each other. Exemplarily, refer to Figure 3 As shown, the first direction X can refer to the column direction, and the second direction Y can refer to the row direction. The pixel driving circuit 30 can drive the corresponding pixels in the display panel 10 to emit light. For example, the pixels can emit red, green, or blue light. The non-display area NA may not be provided with pixels.

[0071] The display panel 10 of the embodiment of the present application includes scan lines 40. The scan lines 40 are used to provide scan signals to the corresponding pixel driving circuits 30. The scan lines 40 can extend along the second direction Y. In the embodiment of the present application, two levels of scan lines 40 can be correspondingly provided for each driving circuit group 20. The two levels of scan lines 40 can provide corresponding scan signals to the corresponding pixel driving circuits 30 in the driving circuit group 20 at different times.

[0072] In the embodiment of the present application, in the first direction X, the nth driving circuit group 20 is correspondingly provided with the nth level scan line 40 and the (n + m)th level scan line 40, where n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1.

[0073] Exemplarily, refer to Figure 3 As shown, when m is equal to 1, in the first direction X, the first driving circuit group 20 is correspondingly provided with the first level scan line 40 and the second level scan line 40, and the second driving circuit group 20 is correspondingly provided with the second level scan line 40 and the third level scan line 40, the third driving circuit group 20 is correspondingly provided with the third level scan line 40 and the fourth level scan line 40, and the remaining driving circuit groups 20, and so on.

[0074] Exemplarily, Figure 4 Schematically shows a partial structure of the display panel 10 of the present application. Refer to Figure 4As shown, when m = 2, in the first direction X, the first driving circuit group 20 is correspondingly provided with the first-level scanning line 40 and the third-level scanning line 40, and the second driving circuit group 20 is correspondingly provided with the second-level scanning line 40 and the fourth-level scanning line 40. The third driving circuit group 20 is correspondingly provided with the third-level scanning line 40 and the fifth-level scanning line 40, and the remaining driving circuit groups 20 follow this pattern.

[0075] Exemplarily, Figure 5 Schematically shows a partial structure of the display panel 10 of the present application. Refer to Figure 5 As shown, when m = 12, in the first direction X, the first driving circuit group 20 is correspondingly provided with the first-level scanning line 40 and the thirteenth-level scanning line 40, and the second driving circuit group 20 is correspondingly provided with the second-level scanning line 40 and the fourteenth-level scanning line 40. The third driving circuit group 20 is correspondingly provided with the third-level scanning line 40 and the fifteenth-level scanning line 40, and the remaining driving circuit groups 20 follow this pattern.

[0076] In some examples, the value range of m can be from 9 to 12.

[0077] In the embodiments of the present application, since each driving circuit group 20 includes scanning lines 40 of different levels, the scanning lines 40 can reset the corresponding pixel driving circuits 30 in advance, thereby achieving staggered reset, advancing the reset time by m row periods compared to the data signal data input time, for example, 9 to 12 row periods, which is beneficial to extending the reset duration acting on the gates of the driving transistors, improving the reset effect, and enhancing the display effect of the display panel 10.

[0078] Refer to Figure 5 As shown, the display panel 10 of the embodiments of the present application further includes a jumper wire 50. At least part of the jumper wire 50 is disposed in the display area AA. Exemplarily, the entire jumper wire 50 can be disposed in the display area AA. In the first direction X, the scanning lines 40 of the same level correspondingly provided in different driving circuit groups 20 can be electrically connected through the jumper wire 50, so that the scanning lines 40 of the same level correspondingly provided in different driving circuit groups 20 can be used to transmit the same scanning signal to input the same scanning signal to the corresponding driving circuit groups 20 simultaneously.

[0079] In the display panel 10 of the embodiments of the present application, driving circuit groups 20 and corresponding scanning lines 40 are provided in the display area AA. The scanning lines 40 of the same level correspondingly provided in different driving circuit groups 20 can be electrically connected across rows through the jumper wire 50. At least part of the jumper wire 50 is disposed in the display area AA, so that the space occupied by the jumper wire 50 in the non-display area NA can be reduced, and further the area of the non-display area NA of the display panel 10 can be reduced, which is beneficial to the display panel 10 to achieve a narrow border design.

[0080] In some implementable ways, the scan lines 40 and the connection lines 50 can be disposed on different metal layers, that is, the same-level scan lines 40 correspondingly disposed by different driving circuit groups 20 and the connection lines 50 are located on different metal layers, which helps to avoid the problem of mutual interference between the scan lines 40 and the connection lines 50.

[0081] In some examples, the display panel 10 may include a substrate, a first metal layer (M1), a second metal layer (M2), and a third metal layer (M3). An insulating layer may be disposed between any two adjacent metal layers among the first metal layer (M1), the second metal layer (M2), and the third metal layer (M3). The scan lines 40 of the embodiments of the present application may be disposed on the first metal layer (M1).

[0082] In some examples, the third metal layer (M3) may be used to dispose data lines Vdata (not shown in the figure). The data lines are used to provide data signals data. The data lines may extend along the first direction X. The scan lines 40 may intersect with the data lines. The connection lines 50 of the embodiments of the present application may be disposed on the third metal layer (M3), so that the connection lines 50 and the data lines can be disposed on the same layer, which helps to simplify the processing process and reduce the processing difficulty of the connection lines 50.

[0083] Exemplarily, the connection lines 50 disposed on the third metal layer (M3) can be electrically connected to the scan lines 40 disposed on the first metal layer (M1) through vias on the insulating layer.

[0084] In some implementable ways, referring to Figures 3 to 5 As shown, along the second direction Y, multiple connection lines 50 can be disposed in parallel. There is a spacing between two adjacent connection lines 50. The multiple connection lines 50 are disposed in parallel with each other, which helps to dispose the connection lines 50 on the same metal layer, facilitates the layout of the connection lines 50 in the display panel 10, and also makes the layout of the connection lines 50 compact and regular, which helps to reduce the occupied space.

[0085] In some examples, along the second direction Y, among the multiple connection lines 50, the vertical spacing between each two adjacent connection lines 50 can be equal.

[0086] In some examples, referring to Figures 3 to 5 As shown, the connection lines 50 may extend along the first direction X. The connection lines 50 and the scan lines 40 may be perpendicular to each other. When the same-level scan lines 40 correspondingly disposed by different driving circuit groups 20 are connected through the connection lines 50, since the connection lines 50 and the scan lines 40 are perpendicular, the length of the connection lines 50 can be minimized, which helps to reduce the length of the connection lines 50 and further reduce the occupied space of the connection lines 50.

[0087] For example, the scan line 40 and the data line can be arranged perpendicular to each other. The adapter line 50 and the data line can be arranged parallel to each other, so that the adapter line 50 and the data line are arranged on the same metal layer in the display panel 10, which is conducive to reducing the wiring difficulty, and also makes the adapter line 50 and the data line arranged compactly and neatly, which is conducive to reducing the occupied space. The adapter line 50 and the data line do not overlap, which is conducive to avoiding the problem of interference between the adapter line 50 and the data line.

[0088] In some possible implementations, see Figures 3 to 5 As shown, along the first direction X, the nth level scan line 40 and the n+mth level scan line 40 corresponding to the nth driving circuit group 20 are arranged in parallel. Exemplarily, when m is equal to 12, the 1st level scan line 40 and the 13th level scan line 40 corresponding to the 1st driving circuit group 20 are arranged in parallel. The scan lines 40 corresponding to each driving circuit group 20 are arranged in parallel with each other, which is conducive to reducing the wiring difficulty of the scan lines 40, and also can realize the compact and regular arrangement of the scan lines 40, which is conducive to reducing the occupied space.

[0089] In some possible implementations, see Figures 3 to 5 As shown, the display panel 10 further includes a scan driver 60. The scan driver 60 may be disposed in the non-display area NA. The n-th level scan line 40 disposed corresponding to the n-th driving circuit group 20 is connected to the n-th scan driver 60, and the n+m-th level scan line 40 is connected to the n+m-th scan driver 60.

[0090] For example, see Figure 3 As shown, when m is equal to 1, the first level scan line 40 corresponding to the first drive circuit group 20 is connected to the first scan driver 60, the second level scan line 40 is connected to the second scan driver 60, and the second level scan line 40 corresponding to the second drive circuit group 20 is connected to the second scan driver 60, and the third level scan line 40 is connected to the third scan driver 60. The other corresponding drive circuit groups 20, scan lines 40 and scan drivers 60 can be deduced by analogy, and will not be repeated here. Exemplarily, the second level scan line 40 corresponding to the first scan driver 60 is electrically connected to the second level scan line 40 corresponding to the second scan driver 60 through the adapter 50.

[0091] For example, see Figure 5As shown, when m is equal to 12, the first-level scan line 40 corresponding to the first driving circuit group 20 is connected to the first scan driver 60, the 13th-level scan line 40 is connected to the 13th scan driver 60, and the second-level scan line 40 corresponding to the second driving circuit group 20 is connected to the second scan driver 60, the 14th-level scan line 40 is connected to the 14th scan driver 60. The other corresponding driving circuit groups 20, scan lines 40, and scan drivers 60 can be deduced by analogy.

[0092] In some implementable ways, Figure 6 Schematically shows a partial structure of the display panel 10 of the present application. Figure 7 Schematically shows a partial cross-sectional structure of the display panel 10 of the embodiment of the present application. Refer to Figure 6 and Figure 7 As shown, the display panel 10 further includes a normal light-emitting pixel 70 and a virtual pixel 80. The display area AA is provided with a normal light-emitting pixel 70 and a virtual pixel 80. It should be noted that the normal light-emitting pixel 70 refers to a pixel that can emit light normally under the drive of the pixel driving circuit 30. The virtual pixel 80 refers to a pixel that is not used for emitting light.

[0093] Exemplarily, the normal light-emitting pixel 70 may include a first electrode 90, a light-emitting structure layer 100, and a second electrode 110. The pixel driving circuit 30 is used to drive the normal light-emitting pixel 70 to emit light. The virtual pixel 80 may not include the first electrode 90 and the light-emitting structure layer 100. The first electrode 90 may refer to an anode, and the second electrode 110 may refer to a cathode.

[0094] Along the stacking direction of the display panel 10, the jumper wire 50 is arranged corresponding to the virtual pixel 80. In the way that the jumper wire 50 is arranged corresponding to the virtual pixel 80, the jumper wire 50 can avoid the wiring area of the normal light-emitting pixel 70, which is beneficial to reducing the wiring difficulty of the jumper wire 50 and also avoiding the problem of interference between the jumper wire 50 and the wiring related to the normal light-emitting pixel 70.

[0095] In some examples, the transistor corresponding to the normal light-emitting pixel 70 includes an active layer 120, a gate 130, a source 140, and a drain 150. The first electrode 90 of the normal light-emitting pixel 70 is electrically connected to the drain 150 of the transistor.

[0096] In some examples, refer to Figure 7 As shown, in the embodiment where the jumper wire 50 is arranged in the third metal layer (M3), the virtual pixel 80 corresponding to the jumper wire 50 may not be provided with the source 140 and the drain 150 of the transistor, thereby avoiding the problem of relatively large wiring difficulty of the jumper wire 50 caused by the fact that the source 140, the drain 150, and the jumper wire 50 are all located in the third metal layer (M3).

[0097] In some examples, referring to Figure 6 and Figure 7 as shown, in the second direction Y, normal light-emitting pixels 70 are respectively arranged on both sides of the virtual pixel 80. The light emitted by the normal light-emitting pixels 70 on both sides of the virtual pixel 80 can be used to form image information.

[0098] Figure 8 Schematically shows the structure of the display device 200 according to an embodiment of the present application. Referring to Figure 8 as shown, on the other hand, the present application provides a display device 200, which includes the display panel 10 of the above embodiment. The display device 200 of the present application can be an electronic device with a display function such as a mobile phone, a computer, a tablet computer, a monitor, or a smart wearable device.

[0099] In the description of this specification, the embodiments or implementation manners are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts among the various embodiments can be referred to each other.

[0100] In the description of this specification, the description with reference to terms such as "one implementation manner", "some implementation manners", "schematic implementation manner", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the implementation manner or example are included in at least one implementation manner or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same implementation manner or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more implementation manners or examples.

[0101] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the various embodiments of the present application.

Claims

1. A display panel, characterized in that, Comprising: A display area and a non-display area surrounding at least part of the display area; A driving circuit group. In a first direction, a plurality of the driving circuit groups are provided in the display area. In a second direction, each driving circuit group includes a plurality of pixel driving circuits, and the first direction intersects the second direction; Scan lines extending along the second direction, and the scan lines are configured to provide scan signals to corresponding pixel driving circuits. Wherein, in the first direction, the nth driving circuit group corresponds to the nth level of scan lines and the (n + m)th level of scan lines, where n is an integer greater than or equal to 1, and m is an integer greater than or equal to 1; Jumper wires, at least part of the jumper wires are provided in the display area. In the first direction, the scan lines of the same level corresponding to different driving circuit groups are electrically connected through the jumper wires; The display panel further includes normal-light-emitting pixels and virtual pixels. The display area is provided with the normal-light-emitting pixels and the virtual pixels. The pixel driving circuits are configured to drive the normal-light-emitting pixels to emit light. Along the stacking direction of the display panel, the jumper wires are arranged corresponding to the virtual pixels.

2. The display panel according to claim 1, wherein The scan lines and the jumper wires are provided on different metal layers.

3. The display panel according to claim 2, wherein, The display panel includes a first metal layer, a second metal layer, and a third metal layer. The scan lines are provided on the first metal layer, and the jumper wires are provided on the third metal layer.

4. The display panel according to claim 1, characterized in that, Along the second direction, a plurality of the jumper wires are arranged in parallel.

5. The display panel according to claim 4, wherein The jumper wires extend along the first direction, and the jumper wires are perpendicular to the scan lines.

6. The display panel according to claim 1, wherein Along the first direction, the nth level of scan lines and the (n + m)th level of scan lines corresponding to the nth driving circuit group are arranged in parallel.

7. The display panel according to any one of claims 1 to 6, characterized in that, In the second direction, normal-light-emitting pixels are respectively arranged on both sides of the virtual pixels.

8. The display panel according to any one of claims 1 to 6, characterized in that The display panel further includes a scan driver. The scan driver is provided in the non-display area. The nth level of scan lines corresponding to the nth driving circuit group are connected to the nth scan driver, and the (n + m)th level of scan lines are connected to the (n + m)th scan driver.

9. A display device, characterized in that, Comprising the display panel according to any one of claims 1 to 8.

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