Signaling number of sub-block merging candidates in video decoding

Abstract

An example method includes encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a different value than a value of the first syntax element; and encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

Description

[0001] This application claims priority to U.S. Patent Application No. 17 / 222,380, filed on April 5, 2021, and U.S. Provisional Application No. 63 / 006,569, filed on April 7, 2020, the entire contents of each of which are incorporated herein by reference. U.S. Patent Application No. 17 / 222,380, filed on April 5, 2021, claims the benefit of U.S. Provisional Application No. 63 / 006,569, filed on April 7, 2020. Technical Field

[0002] This disclosure relates to video encoding and video decoding. Background Art

[0003] Digital video capabilities can be incorporated into a wide variety of devices, including digital televisions, digital live broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones (so-called "smartphones"), video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques (such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 (Part 10, Advanced Video Coding (AVC)), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards). By implementing such video coding techniques, video devices can more efficiently send, receive, encode, decode, and / or store digital video information.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) can be partitioned into video blocks, which can also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in an intra-coded (I) slice of a picture are encoded using spatial prediction relative to reference samples in neighboring blocks in the same picture. Video blocks in an inter-coded (P or B) slice of a picture can use spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures. Pictures can be referred to as frames, and reference pictures can be referred to as reference frames. Summary of the Invention

[0005] In general, the present disclosure describes techniques for determining a maximum number of subblock-based merge candidates. When performing inter-frame prediction, a video coder (e.g., a video encoder and / or a video decoder) can construct a list of subblock-based merge candidates (e.g., subblockMergeCandList). For various considerations, it may be desirable to limit the number of candidates included in the subblock-based merge candidate list. In this way, when encoding video data, the video encoder can test encoding using a number of subblock-based merge candidates that is less than or equal to the maximum number of subblock-based merge candidates. The video encoder can signal a syntax element that specifies the maximum number of subblock-based merge candidates.

[0006] Instead of signaling a syntax element that directly specifies a maximum number, a video encoder may signal a syntax element that specifies a function of the maximum number of sub-block based merge candidates. For example, a video encoder may signal a syntax element that specifies 5 minus the maximum number of sub-block based merge candidates. A video decoder may determine the maximum number of sub-block based merge candidates by adding 5 to the value of the syntax element.

[0007] A video encoder can constrain the value of a syntax element that specifies a function of the maximum number of sub-block-based merge candidates. For example, a video encoder can constrain the value of a syntax element that specifies a function of the maximum number of sub-block-based merge candidates based on the value of a syntax element that specifies whether affine-based motion compensation is enabled. For example, a video encoder can constrain the value of a syntax element that specifies 5 minus the maximum number of sub-block-based merge candidates (e.g., five_minus_max_num_subblock_merge_cand) to be smaller than 5 minus the value of a syntax element that specifies whether affine-based motion compensation is enabled (e.g., sps_affine_enabled_flag). However, such a constraint can result in undesirable behavior. For example, in a scenario where the flag specifying whether affine-based motion compensation is enabled is 1 and the value of the syntax element specifying 5 minus the maximum number of sub-block-based merge candidates is 5, a video decoder can infer that the maximum number is zero, which can result in various undesirable behaviors (e.g., merging may be disabled for affine, regardless of other flags that would enable such a mode).

[0008] According to one or more techniques of the present disclosure, a video encoder can determine that the maximum number of sub-block-based merge candidates is within a range constrained by a value different from a syntax element indicating whether affine is enabled (e.g., different from sps_affine_enabled_flag). For example, a video decoder can constrain the value of a syntax element specifying the maximum number of sub-block-based merge candidates based on the value of a syntax element specifying whether a sub-block-based temporal motion vector predictor (SbTMVP) can be used to decode a picture of video data. By determining that the maximum number of sub-block-based merge candidates is within a range constrained by a value different from a syntax element indicating whether affine is enabled, the video decoder can allow affine merging to be disabled (e.g., turned off) when affine is used. By allowing affine merging to be disabled, the video decoder can avoid having to perform calculations and processing to support affine merging (e.g., inserting at least one affine merging candidate into a sub-block merge list). In this way, the techniques of the present disclosure achieve simplification of video compression.

[0009] In one example, a method includes encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0010] In another example, a device includes: a memory configured to store at least a portion of a video bitstream; a processing circuit configured to: encode a first syntax element in the video bitstream, the first syntax element specifying whether to enable affine model-based motion compensation; based on enabling affine model-based motion compensation, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0011] In another example, a device includes: a unit for encoding a first syntax element in the video bitstream, the first syntax element specifying whether to enable affine model-based motion compensation; a unit for encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and a unit for encoding a picture of the video data based on the maximum number of sub-block based merged motion vector prediction candidates.

[0012] In another example, a computer-readable storage medium stores instructions that, when executed, cause one or more processors to: encode a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; based on enabling affine model-based motion compensation, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0013] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims.

[0014] BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0016] Figure 2A and Figure 2B is a conceptual diagram illustrating an example quadtree binary tree (QTBT) structure and corresponding coding tree units (CTUs).

[0017] Figure 3 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0018] Figure 4 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0019] Figure 5 is a flowchart illustrating an example method for encoding a current block.

[0020] Figure 6is a flow chart illustrating an example method for decoding a current block.

[0021] Figure 7 is a flow chart illustrating an example technique for encoding a maximum number of sub-block based merge motion vector prediction candidates in accordance with one or more techniques of this disclosure. DETAILED DESCRIPTION

[0022] Figure 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of this disclosure. Generally speaking, the techniques of this disclosure relate to decoding (encoding and / or decoding) video data. Generally, video data includes any data used to process video. Thus, video data can include original, unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata (e.g., signaling data).

[0023] like Figure 1 , in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may include any of a variety of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as smartphones, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and destination device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0024] exist Figure 1 In the example of , source device 102 includes video source 104, memory 106, video encoder 200, and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120, and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of destination device 116 can be configured to apply a technique for determining a maximum number of sub-block merging candidates. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device can include other components or arrangements. For example, source device 102 can receive video data from an external video source such as an external camera. Similarly, destination device 116 can interface with an external display device rather than including an integrated display device.

[0025] like Figure 1 The illustrated system 100 is merely an example. In general, any digital video encoding and / or decoding device can implement the technique for determining the maximum number of sub-block merging candidates. Source device 102 and destination device 116 are merely examples of decoding devices, where source device 102 generates decoded video data for transmission to destination device 116. This disclosure refers to a "decoding" device as a device that performs decoding (e.g., encoding and / or decoding) of data. Thus, video encoder 200 and video decoder 300 represent examples of decoding devices (specifically, a video encoder and a video decoder, respectively). In some examples, source device 102 and destination device 116 can operate in a substantially symmetrical manner, such that each of source device 102 and destination device 116 includes video encoding and decoding components. Thus, system 100 can support one-way or two-way video transmission between source device 102 and destination device 116, for example, for video streaming, video playback, video broadcasting, or video telephony.

[0026] Typically, video source 104 represents a source of video data (i.e., raw, undecoded video data) and provides a sequential series of pictures (also referred to as "frames") of the video data to video encoder 200, which encodes the data for the pictures. Video source 104 of source device 102 may include a video capture device, such as a camera, a video archive unit containing previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As another alternative, video source 104 may generate computer graphics-based data as the source video, or a combination of real-time video, archived video, and computer-generated video. In each case, video encoder 200 may encode captured, pre-captured, or computer-generated video data. Video encoder 200 may rearrange the pictures from the order in which they were received (sometimes referred to as "display order") into a decoding order for decoding. Video encoder 200 may generate a bitstream comprising the encoded video data. Source device 102 may then output the encoded video data onto computer-readable medium 110 via output interface 108 to be received and / or retrieved by, for example, input interface 122 of destination device 116 .

[0027] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memory. In some examples, memories 106 and 120 can store raw video data, e.g., raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memories 106 and 120 can store software instructions executable by, for example, video encoder 200 and video decoder 300, respectively. Although memory 106 and memory 120 are shown as separate from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 can also include internal memory for functionally similar or equivalent purposes. Furthermore, memories 106 and 120 can store, for example, encoded video data output from video encoder 200 and input to video decoder 300. In some examples, portions of memories 106 and 120 can be allocated as one or more video buffers, e.g., to store raw decoded and / or encoded video data.

[0028] The computer-readable medium 110 can represent any type of medium or device capable of transmitting encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to send the encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 can demodulate the transmission signal including the encoded video data, and the input interface 122 can demodulate the received transmission signal. The communication medium can include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other device that can be useful for facilitating communication from the source device 102 to the destination device 116.

[0029] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0030] In some examples, source device 102 may output the encoded video data to a file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device capable of storing the encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Destination device 116 may access the encoded video data from file server 114 via any standard data connection, including an internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of the two suitable for accessing the encoded video data stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming transfer protocol, a download transfer protocol, or a combination thereof.

[0031] The output interface 108 and the input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where the output interface 108 and the input interface 122 include wireless components, the output interface 108 and the input interface 122 may be configured to transmit data (such as encoded video data) according to a cellular communication standard (such as 4G, 4G-LTE (Long Term Evolution), Advanced LTE, 5G, etc.). In some examples where the output interface 108 includes a wireless transmitter, the output interface 108 and the input interface 122 may be configured to transmit data (such as encoded video data) according to other wireless standards (such as IEEE 802.11 specifications, IEEE 802.15 specifications (e.g., ZigBee 5G), etc.). TM ),Bluetooth TM Standards, etc.) to transmit data (such as encoded video data). In some examples, source device 102 and / or destination device 116 may include corresponding system-on-chip (SoC) devices. For example, source device 102 may include a SoC device for performing the functions assigned to video encoder 200 and / or output interface 108, and destination device 116 may include a SoC device for performing the functions assigned to video decoder 300 and / or input interface 122.

[0032] The techniques of the present disclosure may be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission (such as Dynamic Adaptive Streaming over HTTP (DASH)), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0033] The input interface 122 of the destination device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communication medium, a storage device 112, a file server 114, etc.). The encoded video bitstream 110 may include signaling information such as syntax elements defined by the video encoder 200 (which are also used by the video decoder 300): the syntax elements have values ​​that describe the characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays the decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0034] Despite Figure 1 Although not shown, in some examples, the video encoder 200 and the video decoder 300 can each be integrated with an audio encoder and / or an audio decoder and can include appropriate MUX-DEMUX units or other hardware and / or software to process a multiplexed stream including both audio and video in a common data stream. If applicable, the MUX-DEMUX units can follow the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0035] The video encoder 200 and the video decoder 300 can each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-transitory computer-readable medium and use one or more processors to execute the instructions in hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, and any of the encoders or decoders can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device (e.g., a cellular phone).

[0036] The video encoder 200 and the video decoder 300 may operate in accordance with a video coding standard, such as the ITU-T H.265 (also known as the High Efficiency Video Coding (HEVC) standard) or an extension thereof, such as the multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate in accordance with other proprietary or industry standards, such as ITU-T H.266, also known as Versatile Video Coding (VVC). The latest draft of the VVC standard is described in “Versatile Video Coding (Draft 8)” (hereinafter referred to as “VVC Draft 8”) by Bross et al., at the 17th meeting of the Joint Video Experts Group (JVET) of ITU-TSG 16 WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, held in Brussels, Belgium, from January 7 to 17, 2020, as JVET-Q2001-vE. However, the technology of the present disclosure is not limited to any specific coding standard.

[0037] Typically, the video encoder 200 and video decoder 300 can perform block-based decoding of a picture. The term "block" generally refers to a structure that includes data to be processed (e.g., to be encoded, decoded, or otherwise used in the encoding and / or decoding process). For example, a block can include a two-dimensional matrix of samples of luma and / or chroma data. Typically, the video encoder 200 and video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, rather than decoding the red, green, and blue (RGB) data for samples of a picture, the video encoder 200 and video decoder 300 can decode luma and chroma components, where the chroma components can include both red and blue hue chroma components. In some examples, the video encoder 200 converts the received RGB formatted data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to an RGB format. Optionally, pre-processing and post-processing units (not shown) can perform these conversions.

[0038] The present disclosure may generally relate to the decoding (e.g., encoding and decoding) of a picture to include the process of encoding or decoding the data of the picture. Similarly, the present disclosure may relate to the decoding of a block of a picture to include the process of encoding or decoding the data for the block (e.g., prediction and / or residual decoding). A coded video bitstream generally includes a series of values ​​for syntax elements that represent decoding decisions (e.g., decoding modes) and the partitioning of a picture into blocks. Therefore, references to decoding a picture or block should generally be understood as decoding the values ​​of the syntax elements used to form the picture or block.

[0039] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as the video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder partitions the CTU and CU into four equal, non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without child nodes may be referred to as a "leaf node," and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further partition the PUs and TUs. For example, in HEVC, the residual quadtree (RQT) represents the partitioning of TUs. In HEVC, PU represents inter-frame prediction data, and TU represents residual data. An intra-predicted CU includes intra-frame prediction information, such as an intra-frame mode indication.

[0040] As another example, the video encoder 200 and the video decoder 300 can be configured to operate according to VVC. According to VVC, a video decoder (e.g., the video encoder 200) partitions a picture into multiple coding tree units (CTUs). The video encoder 200 can partition the CTUs according to a tree structure (e.g., a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure). The QTBT structure removes the concept of multiple partitioning types, such as the separation between CUs, PUs, and TUs of HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to coding units (CUs).

[0041] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) (also known as ternary tree (TT)) partitioning. A ternary tree or ternary tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, the ternary tree or ternary tree partitioning divides the block into three sub-blocks without dividing the original block through the center. The partitioning types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0042] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the respective chroma components).

[0043] The video encoder 200 and the video decoder 300 can be configured to use quadtree segmentation per HEVC, QTBT segmentation, MTT segmentation, or other segmentation structures. For the purpose of explanation, the technology of the present disclosure is described with respect to QTBT segmentation. However, it should be understood that the technology of the present disclosure can also be applied to video decoders configured to use quadtree segmentation or other types of segmentation.

[0044] In some examples, a CTU includes: a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture with three sample arrays, or a CTB of samples for a monochrome picture or a picture coded using three independent color planes and syntax structures for coding the samples. A CTB can be an NxN block of samples for some value of N, so that the partitioning of a component into multiple CTBs is a single partitioning. A component is an array or a single sample from one of the three arrays (luma and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or an array or a single sample of an array that makes up a picture in monochrome format. In some examples, a coding block is an MxN block of samples for some values ​​of M and N, so that the partitioning of a CTB into multiple coding blocks is a single partitioning.

[0045] Blocks (e.g., CTUs or CUs) can be grouped in a picture in various ways. As an example, a brick can refer to a rectangular area of ​​a CTU row within a particular tile in a picture. A tile can be a rectangular area of ​​a CTU within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular area of ​​a CTU with a height equal to the height of the picture and a width specified by a syntax element (e.g., such as in a picture parameter set). A tile row refers to a rectangular area of ​​a CTU with a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to the width of the picture.

[0046] In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. Tiles that are not partitioned into multiple bricks may also be referred to as bricks. However, bricks that are true subsets of a tile may not be referred to as tiles.

[0047] Tiles in a picture can also be arranged in slices. A slice can be an integer number of tiles of a picture that can be uniquely contained in a single Network Abstraction Layer (NAL) unit. In some examples, a slice includes multiple complete tiles or a continuous sequence of complete tiles of only one tile.

[0048] This disclosure may use "NxN" and "N by N" interchangeably to refer to the sample size of a block (such as a CU or other video block) in terms of the vertical and horizontal dimensions, for example, 16x16 samples or 16 by 16 samples. Typically, a 16x16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Likewise, an NxN CU typically has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily need to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include NxM samples, where M is not necessarily equal to N.

[0049] The video encoder 200 encodes video data representing prediction and / or residual information and other information for a CU. The prediction information indicates how the CU will be predicted in order to form a prediction block for the CU. The residual information typically represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0050] To predict a CU, the video encoder 200 may typically form a prediction block for the CU through inter-frame prediction or intra-frame prediction. Inter-frame prediction typically refers to predicting a CU based on data of a previously decoded picture, while intra-frame prediction typically refers to predicting a CU based on previously decoded data of the same picture. To perform inter-frame prediction, the video encoder 200 may use one or more motion vectors to generate a prediction block. The video encoder 200 may typically perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 may calculate a difference metric using the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), or other such difference calculations to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 may use unidirectional prediction or bidirectional prediction to predict the current CU.

[0051] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-frame prediction mode. In affine motion compensation mode, the video encoder 200 can determine two or more motion vectors representing non-translational motion (e.g., zooming in or out, rotation, perspective motion, or other irregular motion types).

[0052] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as planar mode and DC mode. Typically, the video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) based on which samples of the current block are to be predicted. Assuming that the video encoder 200 decodes CTUs and CUs in raster scan order (from left to right, from top to bottom), such samples may typically be above, above left, or to the left of the current block in the same picture as the current block.

[0053] The video encoder 200 encodes data indicating a prediction mode for the current block. For example, for inter-frame prediction mode, the video encoder 200 may encode data indicating which of various available inter-frame prediction modes to use, as well as motion information for the corresponding mode. For unidirectional or bidirectional inter-frame prediction, for example, the video encoder 200 may encode motion vectors using Advanced Motion Vector Prediction (AMVP) or Merge Mode. The video encoder 200 may use a similar mode to encode motion vectors for affine motion compensation mode.

[0054] After a prediction, such as intra-frame prediction or inter-frame prediction, for a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents the sample-by-sample difference between the block and a prediction block for the block, which is formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transformed data in a transform domain rather than a sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), etc., after the first transform. The video encoder 200 generates transform coefficients after applying the one or more transforms.

[0055] As described above, after any transform to produce transform coefficients, the video encoder 200 can perform quantization on the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to potentially reduce the amount of data used to represent them, thereby providing further compression. By performing the quantization process, the video encoder 200 can reduce the bit depth associated with some or all transform coefficients. For example, the video encoder 200 can round down an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 can perform a bitwise right shift of the value to be quantized.

[0056] After quantization, the video encoder 200 may scan the transform coefficients to produce a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan may be designed to place transform coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may scan the quantized transform coefficients using a predefined scan order to produce a serialized vector and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 may entropy encode the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy encode the values ​​of syntax elements used to describe metadata associated with the encoded video data for use by the video decoder 300 when decoding the video data.

[0057] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. The context may relate to, for example, whether the neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0058] The video encoder 200 may also generate syntax data (e.g., block-based syntax data, picture-based syntax data, and sequence-based syntax data) or other syntax data (e.g., sequence parameter set (SPS), picture parameter set (PPS), or video parameter set (VPS)) for the video decoder 300, for example, in a picture header, a block header, or a slice header. Similarly, the video decoder 300 may decode such syntax data to determine how to decode the corresponding video data.

[0059] In this way, the video encoder 200 can generate a bitstream that includes coded video data, such as syntax elements describing the partitioning of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Ultimately, the video decoder 300 can receive the bitstream and decode the coded video data.

[0060] In general, the video decoder 300 performs a process that is inverse to the process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of syntax elements for the bitstream in a manner substantially similar to, but inverse to, the CABAC encoding process of the video encoder 200. The syntax elements may define partitioning information for partitioning a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure (e.g., a QTBT structure) to define CUs of the CTU. The syntax elements may also define prediction and residual information for a block (e.g., a CU) of video data.

[0061] The residual information may be represented by, for example, quantized transform coefficients. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reconstruct a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame prediction or inter-frame prediction) and associated prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reconstruct the original block. The video decoder 300 may perform additional processing, such as a deblocking process to reduce visual artifacts along block boundaries.

[0062] In VVC draft 8, the maximum number of sub-block based merge motion vector prediction candidates is signaled in a sequence parameter set (SPS). Specifically, a video coder may signal a syntax element (e.g., five_minus_max_num_subblock_merge_cand syntax element) indicating the number (e.g., number) of sub-block based merge motion vector prediction candidates. As shown in the syntax table below, the presence of a syntax element indicating the number of sub-block based merge motion vector prediction candidates may be based on the value of a syntax element (e.g., sps_affine_enabled_flag syntax element) that specifies whether affine model-based motion compensation can be used for inter prediction. For example, when sps_affine_enabled_flag is 1, five_minus_max_num_subblock_merge_cand may be present, as shown below

[0063]

[0064] The corresponding semantics are as follows:

[0065] sps_affine_enabled_flag specifies whether affine-based motion compensation can be used for inter prediction. If sps_affine_enabled_flag is equal to 0, the syntax should be constrained so that affine-based motion compensation is not used in the coded layer video sequence (CLVS), and inter_affine_flag and cu_affine_type_flag are not present in the coding unit syntax of CLVS. Otherwise (sps_affine_enabled_flag is equal to 1), affine-based motion compensation can be used in CLVS.

[0066] five_minus_max_num_subblock_merge_cand specifies that the maximum number of sub-block based merge motion vector prediction candidates supported in the SPS is subtracted from 5. The value of five_minus_max_num_subblock_merge_cand shall be in the range of 0 to 5, inclusive.

[0067] When decoding a picture of video data, a video decoder (e.g., video decoder 300) may determine a maximum number of sub-block based merge candidates for the picture (e.g., MaxNumSubblockMergeCand). In VVC draft 8, the video coder may derive the maximum number of sub-block based merge candidates as follows (e.g., when processing a picture header (PH) of a picture of video data):

[0068]

[0069]

[0070] As shown above, in VVC draft 8, when sps_affine_enabled_flag is set to 1, the video decoder can derive the maximum number of sub-block based merge candidates for a picture (e.g., MaxNumSubblockMergeCand) directly from the syntax element indicating the number of sub-block based merge motion vector prediction candidates (e.g., five_minus_max_num_subblock_merge_cand).

[0071] Thus, VVC draft 8 allows a situation where sps_affine_enabled_flag = 1 and ffive_minus_max_num_subblock_merge_cand = 5. In this situation, the video decoder may infer the number of sub-block-based merge candidates MaxNumSubblockMergeCand to be 0, which may result in merging being turned off for affine and for sub-block-based temporal motion vector prediction (SbTMVP), regardless of the SbTMVP enable flag. Such a situation may be undesirable.

[0072] The 18th meeting of the Joint Video Experts Group (JVET) of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29 / WG 11, "AHG9: Max num of subblockmerge candidate signalling", JVET-R0215 by Yu et al. (hereinafter referred to as "JVET-R0215"), held by telephone from April 15 to 24, 2020, proposed to modify the range limit of five_minus_max_num_subblock_merge_cand to avoid the above-mentioned undesirable situation, and to infer the value of this syntax element to be 5 when it is not present.

[0073] Specifically, JVET-R0215 proposes to modify the semantics of five_minus_max_num_subblock_merge_cand as follows:

[0074] five_minus_max_num_subblock_merge_cand specifies the maximum number of subblock-based merge motion vector prediction candidates supported in the SPS, minus 5. The value of five_minus_max_num_subblock_merge_cand shall be in the range of 0 to 5 - sps_affine_enabled_flag, inclusive. If not present, the value of five_minus_max_num_subblock_merge_cand is inferred to be equal to 5.

[0075] The techniques proposed by JVET-R0215 may address the issue where the number of sub-block-based merge candidates, MaxNumSubblockMergeCand, is inferred to be 0, which turns off merging for affine as well as for SbTMVP, regardless of the SbTMVP enable flag. However, the techniques proposed by JVET-R0215 may also disable the functionality of turning off affine merging when sps_affine_enabled_flag is 1. This is due to the fact that when sps_affine_enabled_flag is 1, 5 – sps_affine_enabled_flag is 4. Therefore, the minimum number of sub-block-based merge candidates is 1. Note that even if sps_sbtmvp_enabled_flag && ph_temporal_mvp_enable_flag are true, SbTMVP is still not yet available. Therefore, as long as sps_affine_enabled_flag is 1, the video decoder will insert at least one affine merge candidate into the sub-block-based merge list. This may be undesirable.

[0076] According to one or more techniques of this disclosure, a video encoder may determine that the maximum number of sub-block-based merge candidates is within a range constrained by a value other than a syntax element indicating whether affine is enabled (e.g., other than sps_affine_enabled_flag). For example, a video decoder may determine that the range limit of the maximum number of sub-block-based merge candidates is constrained by the availability of SbTMVP. More specifically, the video decoder may set a lower limit on the maximum number of sub-block-based merge candidates equal to the maximum number of SbTMVP candidates.

[0077] In one example of the techniques of this disclosure, the semantics of five_minus_max_num_subblock_merge_cand in VVC may be modified as follows:

[0078] five_minus_max_num_subblock_merge_cand specifies the maximum number of subblock-based merge motion vector prediction candidates supported in the SPS, minus 5. The value of five_minus_max_num_subblock_merge_cand shall be in the range of 0 to 5 - sps_sbtmvp_enabled_flag, inclusive. If not present, the value of five_minus_max_num_subblock_merge_cand is inferred to be equal to 5.

[0079] The syntax of the flag indicating the availability of SbTMVP may be as follows:

[0080] sps_sbtmvp_enabled_flag equal to 1 indicates that the sub-block based temporal motion vector predictor can be used for decoding pictures in all slices with slice_type not equal to 1 in the CLVS. sps_sbtmvp_enabled_flag equal to 0 indicates that the sub-block based temporal motion vector predictor is not used in the CLVS. When sps_sbtmvp_enabled_flag is not present, it is inferred to be equal to 0.

[0081] By determining that the maximum number of sub-block-based merge candidates is within a range constrained by the different values ​​of the syntax element indicating whether affine is enabled, the video decoder can allow affine merging to be disabled (e.g., turned off) when affine is enabled. By allowing affine merging to be disabled, the video decoder can avoid having to perform calculations and processing to support affine merging (e.g., inserting at least one affine merging candidate into the sub-block merge list). In this way, the techniques of the present disclosure achieve simplification of video compression.

[0082] According to the techniques of this disclosure, a video coder (e.g., video encoder 200 and / or video decoder 300) may code, via a video bitstream, a first syntax element that specifies whether affine model-based motion compensation is enabled; when affine model-based motion compensation is enabled, code, via the video bitstream, a second syntax element that specifies a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and code a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0083] The present disclosure may generally refer to "signaling" certain information (such as syntax elements). The term "signaling" may generally refer to the transmission of values ​​for syntax elements and / or other data used to decode encoded video data. That is, video encoder 200 may signal values ​​for syntax elements in a bitstream. Generally, signaling refers to generating values ​​in a bitstream. As described above, source device 102 may transmit the bitstream to destination device 116 in substantially real time or in non-real time (e.g., as may occur when storing syntax elements to storage device 112 for later retrieval by destination device 116).

[0084] Figure 2A and Figure 2Bis a conceptual diagram showing an example quadtree binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132. Solid lines represent quadtree splits, while dashed lines indicate binary tree splits. In each split (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which split type (i.e., horizontal or vertical) is used, where, in this example, 0 indicates horizontal splitting and 1 indicates vertical splitting. For quadtree splitting, because the quadtree node splits a block horizontally and vertically into 4 sub-blocks of equal size, there is no need to indicate the split type. Thus, the video encoder 200 can encode, and the video decoder 300 can decode, the following: syntax elements (such as split information) for the region tree level (i.e., solid lines) of the QTBT structure 130, and syntax elements (such as split information) for the prediction tree level (i.e., dashed lines) of the QTBT structure 130. The video encoder 200 may encode video data (such as prediction and transform data) for the CU represented by the terminal leaf node of the QTBT structure 130 , and the video decoder 300 may decode the video data.

[0085] generally, Figure 2B The CTU 132 may be associated with parameters defining the size of blocks corresponding to nodes at the first and second levels of the QTBT structure 130. These parameters may include a CTU size (indicating the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, indicating the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, indicating the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, indicating the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, indicating the minimum allowed binary tree leaf node size).

[0086] The root node of the QTBT structure corresponding to the CTU can have four child nodes at the first level of the QTBT structure, each of which can be split according to a quadtree partitioning. That is, the nodes at the first level are leaf nodes (no child nodes) or have four child nodes. The example of the QTBT structure 130 represents such a node as including a parent node and child nodes with solid branches. If the node at the first level is not larger than the maximum allowed binary tree root node size (MaxBTSize), the node can be further partitioned by the corresponding binary tree. The binary tree splitting of a node can be iterated until the node resulting from the split reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having dotted branches. The binary tree leaf node is called a decoding unit (CU), which is used for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further partitioning. As discussed above, a CU can also be referred to as a "video block" or "block."

[0087] In one example of a QTBT partitioning structure, the CTU size is set to 128×128 (luminance sample and two corresponding 64×64 chroma samples), MinQTSize is set to 16×16, MaxBTSize is set to 64×64, MinBTSize (for both width and height) is set to 4, and MaxBTDepth is set to 4. Quadtree partitioning is first applied to the CTU to generate quadtree leaf nodes. Quadtree leaf nodes can have sizes from 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If the quadtree leaf node is 128×128, then because the size exceeds MaxBTSize (i.e., 64×64 in this example), the leaf quadtree node will not be further split by the binary tree. Otherwise, the quadtree leaf node will be further split by the binary tree. Therefore, the quadtree leaf node is also the root node for the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), no further splitting is allowed. When a binary tree node has a width equal to MinBTSize (4 in this example), it means that no further vertical splitting is allowed. Similarly, a binary tree node with a height equal to MinBTSize means that no further horizontal splitting is allowed for the binary tree node. As described above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further segmentation.

[0088] Figure 3 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 3This is provided for purposes of explanation and should not be considered limiting of the techniques generally exemplified and described in this disclosure. For purposes of explanation, this disclosure describes the video encoder 200 in accordance with the techniques of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure may be performed by video encoding devices configured for other video coding standards.

[0089] exist Figure 3 In the example of FIG, the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any one or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 can be implemented in one or more processors or in processing circuitry. For example, the units of the video encoder 200 can be implemented as one or more circuits or logic elements, as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Furthermore, the video encoder 200 can include additional or alternative processors or processing circuitry to perform these and other functions.

[0090] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 1 ) receives video data stored in the video data memory 230. The DPB 218 can act as a reference picture memory that stores reference video data for use when the video encoder 200 predicts subsequent video data. The video data memory 230 and the DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM) (including synchronous DRAM (SDRAM)), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The video data memory 230 and the DPB 218 can be provided by the same memory device or a separate memory device. In various examples, the video data memory 230 can be on-chip with other components of the video encoder 200 (as shown), or off-chip relative to those components.

[0091] In this disclosure, references to video data memory 230 should not be construed as limited to memory internal to the video encoder 200 (unless specifically described as such), or to memory external to the video encoder 200 (unless specifically described as such). Rather, references to video data memory 230 should be understood as reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data for a current block to be encoded). Figure 1 The memory 106 may also provide temporary storage for outputs from the various units of the video encoder 200 .

[0092] Shown Figure 3 The various units of the video encoder 200 are described to help understand the operations performed by the video encoder 200. These units can be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functions and are pre-set with respect to the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality with respect to the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the types of operations performed by fixed-function circuits are generally immutable. In some examples, one or more of the units can be different circuit blocks (fixed-function or programmable), and in some examples, one or more of the units can be integrated circuits.

[0093] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1 ) may store instructions (eg, object code) for software that the video encoder 200 receives and executes, or another memory (not shown) within the video encoder 200 may store such instructions.

[0094] The video data memory 230 is configured to store the received video data. The video encoder 200 can retrieve the picture of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 can be the original video data to be encoded.

[0095] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units that perform video prediction according to other prediction modes. For example, the mode selection unit 202 may include a palette unit, an intra-block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, and the like.

[0096] The mode selection unit 202 typically coordinates multiple encoding passes to test combinations of encoding parameters and the resulting rate-distortion values ​​for such combinations. The encoding parameters may include the partitioning of a CTU into CUs, the prediction mode used for a CU, the transform type used for the residual data of a CU, the quantization parameter used for the residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0097] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs and encapsulate one or more CTUs into a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may partition the CTUs according to the tree structure to form one or more CUs. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0098] Typically, mode select unit 202 also controls its components (e.g., motion estimation unit 222, motion compensation unit 224, and intra prediction unit 226) to generate a prediction block for the current block (e.g., the current CU, or, in HEVC, the overlapping portions of a PU and TU). To perform inter prediction on the current block, motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in DPB 218). Specifically, motion estimation unit 222 may calculate values ​​representing how similar potential reference blocks are to the current block, such as based on sum of absolute differences (SAD), sum of squared differences (SSD), mean absolute difference (MAD), mean squared difference (MSD), and the like. Motion estimation unit 222 may typically perform these calculations using sample-by-sample differences between the current block and the reference block under consideration. Motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0099] Motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in the current picture. Motion estimation unit 222 may then provide the motion vectors to motion compensation unit 224. For example, for unidirectional inter prediction, motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, motion estimation unit 222 may provide two motion vectors. Motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, motion compensation unit 224 may interpolate values ​​for the prediction block based on one or more interpolation filters. Furthermore, for bidirectional inter prediction, motion compensation unit 224 may retrieve data for two reference blocks identified by the respective motion vectors and combine the retrieved data, for example, by sample-by-sample averaging or weighted averaging.

[0100] As another example, for intra prediction or intra prediction decoding, the intra prediction unit 226 can generate a prediction block based on samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine the values ​​of adjacent samples and pad these calculated values ​​across the current block in a defined direction to produce a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average of the adjacent samples of the current block and generate a prediction block to include the obtained average for each sample of the prediction block.

[0101] Mode selection unit 202 provides the prediction block to residual generation unit 204. Residual generation unit 204 receives the original, unencoded version of the current block from video data memory 230 and the prediction block from mode selection unit 202. Residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, residual generation unit 204 may use residual differential pulse coded modulation (RDPCM) to generate the residual block using differences between sample values ​​in the residual block. In some examples, residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0102] In the example where the mode select unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As noted above, the size of a CU may refer to the size of the luma coding block of the CU, while the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming a particular CU size of 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N, or similar for inter prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning for PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter prediction.

[0103] In an example where the mode select unit does not further partition a CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder 200 and the video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0104] For other video coding techniques (such as intra-block copy mode coding, affine mode coding, and linear model (LM) mode coding, to name a few), mode selection unit 202 generates a prediction block for the current block being encoded via the corresponding unit associated with the coding technique. In some examples (such as palette mode coding), mode selection unit 202 may not generate a prediction block, but instead generate syntax elements that indicate how to reconstruct the block based on the selected palette. In such a mode, mode selection unit 202 may provide these syntax elements to entropy coding unit 220 for encoding.

[0105] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates a sample-by-sample difference between the prediction block and the current block.

[0106] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, such as a primary transform and a secondary transform (e.g., a rotation transform). In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0107] Quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. Quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a QP value associated with the current block. Video encoder 200 (e.g., via mode select unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in a loss of information, and therefore, the quantized transform coefficients may have lower precision than the original transform coefficients produced by transform processing unit 206.

[0108] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (albeit potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0109] Filter unit 216 may perform one or more filter operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0110] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in examples where the operation of the filter unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks in the DPB 218. In examples where the operation of the filter unit 216 is required, the filter unit 216 can store the filtered reconstructed blocks in the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture formed by the reconstructed (and potentially filtered) blocks from the DPB 218 to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks of the current picture in the DPB 218 to perform intra-frame prediction on other blocks in the current picture.

[0111] In general, entropy coding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy coding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy coding unit 220 may entropy encode prediction syntax elements (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from mode selection unit 202. Entropy coding unit 220 may perform one or more entropy encoding operations on syntax elements, another example of video data, to generate entropy-encoded data. For example, entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential Golomb coding operation, or another type of entropy encoding operation on the data. In some examples, entropy coding unit 220 may operate in a bypass mode in which syntax elements are not entropy encoded.

[0112] The video encoder 200 may output a bitstream including entropy-encoded syntax elements required for reconstructing blocks of a slice or picture. Specifically, the entropy encoding unit 220 may output a bitstream.

[0113] The above operations are described with respect to blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are the luma components and chroma components of a PU.

[0114] In some examples, the operations performed for luma coding blocks do not need to be repeated for chroma coding blocks. As an example, the operations for identifying the motion vector (MV) and reference picture for the luma coding block do not need to be repeated to identify the MV and reference picture for the chroma blocks. Specifically, the MV for the luma coding block can be scaled to determine the MV for the chroma blocks, and the reference picture can be the same. As another example, the intra prediction process can be the same for luma coding blocks and chroma coding blocks.

[0115] The video encoder 200 represents an example of a device configured to encode video data, the device comprising: a memory configured to store video data, and one or more processing units implemented in circuitry and configured to: encode a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; wherein / when affine model-based motion compensation is enabled, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0116] Figure 4 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 4 This is provided for purposes of explanation and does not limit the techniques generally illustrated and described in this disclosure. For purposes of explanation, this disclosure describes video decoder 300 based on the techniques of VVC (ITU-T H.266 under development) and HEVC (ITU-T H.265). However, the techniques of this disclosure can be performed by video coding devices configured for other video coding standards.

[0117] exist Figure 4In the example of FIG, video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of CPB memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and DPB 134 may be implemented in one or more processors or processing circuitry. For example, the units of video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Furthermore, video decoder 300 may include additional or alternative processors or processing circuitry to perform these and other functions.

[0118] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units that perform prediction according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra-block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0119] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be encoded from computer readable medium 110 ( Figure 1 ) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. Furthermore, CPB memory 320 may store video data other than syntax elements for decoded pictures, such as temporary data representing outputs from various units of video decoder 300. DPB 314 typically stores decoded pictures, which video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures in the coded video bitstream. CPB memory 320 and DPB 314 may be formed from any of a variety of memory devices, such as DRAM (including SDRAM), MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300 or off-chip relative to those components.

[0120] Additionally or alternatively, in some examples, the video decoder 300 may retrieve the video from the memory 120 ( Figure 1 ) to retrieve the decoded video data. That is, memory 120 may utilize CPB memory 320 to store data as discussed above. Similarly, when some or all of the functions of video decoder 300 are implemented in software to be executed by the processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0121] Shown Figure 4 The various units shown in FIG. 300 help understand the operations performed by the video decoder 300. These units can be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 3 , fixed-function circuitry refers to circuits that provide specific functionality and are pre-set with respect to the operations that can be performed. Programmable circuitry refers to circuits that can be programmed to perform various tasks and provide flexible functionality in terms of the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuitry can execute software instructions (e.g., to receive parameters or output parameters), but the type of operations performed by the fixed-function circuitry is generally immutable. In some examples, one or more of these units may be different circuit blocks (fixed-function or programmable), and in some examples, one or more of these units may be integrated circuits.

[0122] The video decoder 300 may include an ALU, an EFU, digital circuits, analog circuits, and / or a programmable core formed by programmable circuits. In examples where the operation of the video decoder 300 is performed by software executed on the programmable circuits, on-chip or off-chip memory may store instructions (e.g., object code) of the software that the video decoder 300 receives and executes.

[0123] The entropy decoding unit 302 may receive the encoded video data from the CPB and perform entropy decoding on the video data to reconstruct syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0124] Typically, the video decoder 300 reconstructs a picture block by block. The video decoder 300 may perform a reconstruction operation on each block individually (wherein a block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0125] The entropy decoding unit 302 may entropy decode syntax elements defining the quantized transform coefficients of the quantized transform coefficient block, as well as transform information such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization and, similarly, determine a degree of inverse quantization for the inverse quantization unit 306 to apply. The inverse quantization unit 306 may, for example, perform a bitwise left shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block comprising the transform coefficients.

[0126] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0127] In addition, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate a prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the position of the current block in the current picture. Motion compensation unit 316 may generally generate a prediction block in the same manner as described for motion compensation unit 224 ( Figure 3 ) is performed in a manner substantially similar to that described in the foregoing.

[0128] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as described with respect to the intra-prediction unit 226 ( Figure 3 The intra prediction process is performed in a manner substantially similar to that described in the preceding claims. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0129] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0130] The filter unit 312 may perform one or more filter operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0131] The video decoder 300 may store the reconstructed block in the DPB 314. For example, in examples where the operation of the filter unit 312 is not performed, the reconstruction unit 310 may store the reconstructed block to the DPB 314. In examples where the operation of the filter unit 312 is performed, the filter unit 312 may store the filtered reconstructed block to the DPB 314. As discussed above, the DPB 314 may provide reference information (such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation) to the prediction processing unit 304. In addition, the video decoder 300 may output a decoded picture (e.g., a decoded video) from the DPB 314 for use in, for example, Figure 1 Subsequent presentation on a display device such as display device 118.

[0132] In this manner, the video decoder 300 represents an example of a video decoding device comprising: a memory configured to store video data and one or more processing units implemented in circuitry and configured to: decode a first syntax element from a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; wherein / when affine model-based motion compensation is enabled, decode a second syntax element from the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and decode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0133] Figure 5 1 is a flowchart illustrating an example method for encoding a current block. The current block may include a current CU. Although with respect to the video encoder 200 ( Figure 1 and Figure 3 ) is described, but it should be understood that other devices may be configured to perform the same Figure 5 A similar approach to the one in the previous section.

[0134] In this example, the video encoder 200 initially predicts a current block (350). For example, the video encoder 200 may form a prediction block for the current block. The video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, the video encoder 200 may calculate the difference between the original, unencoded block and the prediction block for the current block. The video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (356). During or after the scan, the video encoder 200 may entropy encode the transform coefficients (358). For example, the video encoder 200 may encode the transform coefficients using CAVLC or CABAC. The video encoder 200 may then output the entropy encoded data for the block (360).

[0135] Figure 6 is a flowchart illustrating an example method for decoding a current block of video data. The current block may include a current CU. Although with respect to the video decoder 300 ( Figure 1 and Figure 4 ) is described, but it should be understood that other devices may be configured to perform the same Figure 6 A similar approach to the one in the previous section.

[0136] The video decoder 300 may receive entropy-encoded data for a current block (e.g., entropy-encoded prediction information and entropy-encoded data for transform coefficients of a residual block corresponding to the current block) (370). The video decoder 300 may entropy decode the entropy-encoded data to determine the prediction information for the current block and reconstruct the transform coefficients of the residual block (372). The video decoder 300 may predict the current block (374), for example, using an intra-frame or inter-frame prediction mode as indicated by the prediction information for the current block, to calculate a prediction block for the current block. The video decoder 300 may then inverse scan the reconstructed transform coefficients (376) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). The video decoder 300 may finally decode the current block by combining the prediction block and the residual block (380).

[0137] Figure 7 is a flowchart illustrating an example technique for encoding a maximum number of sub-block based merge motion vector prediction candidates according to one or more techniques of this disclosure. Figure 1 and Figure 3 ) is described, but it should be understood that other devices may be configured to perform the same Figure 7 Similar approach.

[0138] The video encoder 200 may encode a first syntax element specifying whether affine model-based motion compensation is enabled (702). For example, the mode selection unit 202 may cause the entropy coding unit 220 to encode a first syntax element (e.g., sps_affine_enabled_flag) in the video bitstream specifying whether affine model-based motion compensation is enabled.

[0139] Based on enabling affine model-based motion compensation ("yes" branch of 704), the video encoder 200 may encode a second syntax element that specifies a maximum number of sub-block-based merge motion vector prediction candidates (706). For example, the mode select unit 202 may cause the entropy coding unit 220 to encode a second syntax element in the video bitstream that specifies a maximum number of sub-block-based merge motion vector prediction candidates (e.g., five_minus_max_num_subblock_merge_cand). As discussed above and in accordance with one or more techniques of this disclosure, the video encoder 200 may constrain the value of the second syntax element based on a value different from the value of the first syntax element. For example, the video encoder 200 may signal a third syntax element (e.g., sps_sbtmvp_enabled_flag) that specifies whether sub-block-based temporal motion vector prediction values ​​(SbTMVP) may be used for decoding pictures of the video data, and constrain the value of the second syntax element based on the value of the third syntax element. In one example, the video encoder 200 may constrain the value of the second element so that the maximum value of the second syntax element is 5 minus the value of the third syntax element. In another example, the video encoder 200 may constrain the value of the second element so that the minimum value of the second syntax element is zero. Thus, in some examples, the video encoder 200 may constrain the value of five_minus_max_num_subblock_merge_cand to be within the inclusive range of 0 to 5-sps_sbtmvp_enabled_flag.

[0140] The video encoder 200 may encode the picture of the video data ( 708 ).For example, the mode selection unit 202 may encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates.

[0141] The following numbered examples may describe one or more aspects of the present disclosure:

[0142] Item 1A. A method of decoding video data, the method comprising: decoding, via a video bitstream, a first syntax element that specifies whether affine model-based motion compensation is enabled; when affine model-based motion compensation is enabled, decoding, via the video bitstream, a second syntax element that specifies a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and decoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0143] Clause 2A. A method according to clause 1A, wherein decoding a picture of video data based on a maximum number of sub-block based merge motion vector prediction candidates includes: when a first syntax element specifies enabling of affine model based motion compensation, avoiding inserting any affine merge candidate into a sub-block based merge list used to predict samples of the picture.

[0144] Clause 3A. The method of clause 1A or clause 2A, wherein the first syntax element comprises a sps_affine_enabled_flag syntax element.

[0145] Clause 4A. The method of any of clauses 1A-3A, wherein the second syntax element comprises a five_minus_max_num_subblock_merge_cand syntax element.

[0146] Clause 5A. A method according to any of clauses 1A-4A, wherein the value of the second syntax element is constrained based on the value of a third syntax element, wherein the third syntax element specifies whether the sub-block based temporal motion vector prediction value can be used to decode the picture of the video data.

[0147] Clause 6A. The method of clause 5A, wherein the third syntax element comprises a sps_sbtmvp_enabled_flag syntax element.

[0148] Clause 7A. The method of any of clauses 1A-6A, wherein deciphering comprises decoding.

[0149] Clause 8A. The method of any of clauses 1A-7A, wherein decoding comprises encoding.

[0150] Clause 9A. An apparatus for decoding video data, the apparatus comprising: one or more means for performing the method of any of clauses 1A-8A.

[0151] Clause 10A. The apparatus of Clause 9A, wherein the one or more units comprise: one or more processors implemented in circuitry.

[0152] Clause 11A. The apparatus of any of Clauses 9A and 10A, further comprising: a memory for storing the video data.

[0153] Clause 12A. The apparatus of any of Clauses 9A-11A, further comprising: a display configured to display the decoded video data.

[0154] Clause 13A. The device of any of clauses 9A-12A, wherein the device comprises one or more of: a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0155] Clause 14A. The apparatus of any of clauses 9A-13A, wherein the apparatus comprises a video decoder.

[0156] Clause 15A. The apparatus of any of clauses 9A-14A, wherein the apparatus comprises a video encoder.

[0157] Clause 16A. A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform the method of any of clauses 1A-8A.

[0158] Clause 1B. A method for encoding video data, the method comprising: encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; when affine model-based motion compensation is enabled, encoding a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0159] Clause 2B. A method according to clause 1B, wherein encoding a picture of the video data based on a maximum number of sub-block based merge motion vector prediction candidates includes: when the first syntax element specifies enabling of affine model based motion compensation, avoiding inserting any affine merge candidate into a sub-block based merge list used to predict samples of the picture.

[0160] Clause 3B. The method of clause 2B, wherein the first syntax element comprises a sps_affine_enabled_flag syntax element.

[0161] Clause 4B. The method of clause 3B, wherein the second syntax element comprises a five_minus_max_num_subblock_merge_cand syntax element.

[0162] Clause 5B. The method of clause 1B, wherein the value of the second syntax element is constrained based on the value of a third syntax element, the third syntax element specifying whether a sub-block based temporal motion vector prediction value can be used to decode a picture of the video data.

[0163] Clause 6B. The method of clause 5B, wherein the third syntax element comprises a sps_sbtmvp_enabled_flag syntax element.

[0164] Clause 7B. The method of clause 5B, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element.

[0165] Clause 8B. The method of clause 7B, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a minimum value of the second syntax element is zero.

[0166] Item 9B. A device for encoding video data, the device comprising: a memory configured to store at least a portion of a video bitstream; and processing circuitry configured to: encode a first syntax element in the video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; when affine model-based motion compensation is enabled, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein the value of the second syntax element is constrained based on a value different from the value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0167] Clause 10B. An apparatus according to clause 9B, wherein, in order to encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates, the processing circuit is configured to: when the first syntax element that enables affine model-based motion compensation is specified, avoid inserting any affine merge candidate into the sub-block based merge list used to predict samples of the picture.

[0168] Clause 11B. The apparatus of clause 10B, wherein the first syntax element comprises a sps_affine_enabled_flag syntax element.

[0169] Clause 12B. The apparatus of clause 11B, wherein the second syntax element comprises a five_minus_max_num_subblock_merge_cand syntax element.

[0170] Clause 13B. The apparatus of clause 9B, wherein the value of the second syntax element is determined based on a value of a third syntax element that specifies whether sub-block based temporal motion vector prediction can be used to decode a picture of the video data.

[0171] Clause 14B. The apparatus of clause 13B, wherein the third syntax element comprises a sps_sbtmvp_enabled_flag syntax element.

[0172] Clause 15B. The apparatus of clause 13B, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element.

[0173] Clause 16B. The apparatus of clause 15B, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a minimum value of the second syntax element is zero.

[0174] Clause 17B. A computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to: encode a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; based on enabling affine model-based motion compensation, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0175] Clause 18B. A computer-readable storage medium according to clause 17B, wherein the instructions that cause the one or more processors to encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates include instructions that cause the one or more processors to perform the following operations: when the first syntax element specifies that affine model-based motion compensation is enabled, avoid inserting any affine merge candidate into the sub-block based merge list used to predict samples of the picture, wherein the value of the second syntax element is constrained based on the value of a third syntax element, and the value of the third syntax element specifies whether sub-block based temporal motion vector prediction can be used to decode the picture of the video data.

[0176] Clause 19B. A computer-readable storage medium according to clause 18B, wherein the value of the second syntax element is determined based on the value of the third syntax element, such that a maximum value of the second syntax element is 5 minus the value of the third syntax element, and a minimum value of the second syntax element is zero.

[0177] Clause 20B. A device for encoding video data, the device comprising: a unit for encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; a unit for encoding a second syntax element in the video bitstream when affine model-based motion compensation is enabled, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and a unit for encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0178] Clause 1C. A method for encoding video data, the method comprising: encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0179] Clause 2C. A method according to clause 1C, wherein encoding the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates includes: based on the first syntax element specifying that affine model based motion compensation is enabled, not inserting any affine merge candidates into the sub-block based merge list used to predict samples of the picture.

[0180] Clause 3C. The method of clause 2C, wherein the first syntax element comprises a sps_affine_enabled_flag syntax element.

[0181] Clause 4C. The method of clause 3C, wherein the second syntax element comprises a five_minus_max_num_subblock_merge_cand syntax element.

[0182] Clause 5C. A method according to any one of clauses 1C-4C, wherein the value of the second syntax element is determined based on the value of a third syntax element, the value of the third syntax element specifying whether the sub-block based temporal motion vector prediction value can be used to decode the picture of the video data.

[0183] Clause 6C. The method of clause 5C, wherein the third syntax element comprises an sps_sbtmvp_enabled_flag syntax element.

[0184] Clause 7C. A method according to clause 5C or 6C, wherein the value of the second syntax element is constrained based on the value of the third syntax element so that the maximum value of the second syntax element is 5 minus the value of the third syntax element.

[0185] Clause 8C. The method of clause 7C, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a minimum value of the second syntax element is zero.

[0186] Item 9C. A device for encoding video data, the device comprising: a memory configured to store at least a portion of a video bitstream; and processing circuitry configured to: encode a first syntax element in the video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; based on enabling affine model-based motion compensation, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0187] Clause 10C. An apparatus according to clause 9C, wherein, to encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates, the processing circuit is configured to: based on the first syntax element specifying the enablement of affine model based motion compensation, not insert any affine merge candidate into the sub-block based merge list used to predict samples of the picture.

[0188] Clause 11C. The apparatus of clause 10C, wherein the first syntax element comprises a sps_affine_enabled_flag syntax element.

[0189] Clause 12C. The apparatus of clause 11C, wherein the second syntax element comprises a five_minus_max_num_subblock_merge_cand syntax element.

[0190] Clause 13C. An apparatus according to any of clauses 9C-12C, wherein the value of the second syntax element is determined based on the value of a third syntax element, the value of the third syntax element specifying whether sub-block based temporal motion vector prediction can be used to decode a picture of the video data.

[0191] Clause 14C. The apparatus of clause 13C, wherein the third syntax element comprises a sps_sbtmvp_enabled_flag syntax element.

[0192] Clause 15C. The apparatus of clause 13C or 14C, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element.

[0193] Clause 16C. The apparatus of clause 15C, wherein the value of the second syntax element is constrained based on the value of the third syntax element such that a minimum value of the second syntax element is zero.

[0194] Clause 17C. A computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to: encode a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; based on enabling affine model-based motion compensation, encode a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and encode a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0195] Clause 18C. A computer-readable storage medium according to clause 17C, wherein the instructions that cause the one or more processors to encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates include instructions that cause the one or more processors to perform the following operations: based on the first syntax element that specifies enabling affine model-based motion compensation, not inserting any affine merge candidates into the sub-block based merge list used to predict samples of the picture, wherein the value of the second syntax element is constrained based on the value of a third syntax element, the value of the third syntax element specifying whether sub-block based temporal motion vector prediction can be used to decode the picture of the video data.

[0196] Clause 19C. A computer-readable storage medium according to clause 18C, wherein the value of the second syntax element is determined based on the value of the third syntax element, such that a maximum value of the second syntax element is 5 minus the value of the third syntax element, and a minimum value of the second syntax element is zero.

[0197] Clause 20C. A device for encoding video data, the device comprising: a unit for encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; a unit for encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block-based merged motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value different from a value of the first syntax element; and a unit for encoding a picture of the video data based on the maximum number of sub-block-based merged motion vector prediction candidates.

[0198] Clause 1D. Any combination of Clauses 1A-20C.

[0199] It will be appreciated that, depending on the examples, certain actions or events of any of the techniques described herein may be performed in a different order, may be added, combined, or omitted entirely (e.g., not all described actions or events are necessary to implement the techniques). Furthermore, in some examples, actions or events may be performed concurrently rather than sequentially, such as through multithreading, interrupt handling, or multiple processors.

[0200] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted through a computer-readable medium as one or more instructions or codes and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media such as data storage media or communication media, including any media that facilitates the transfer of a computer program from one place to another, for example, according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media, or (2) communication media such as signals or carrier waves. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to obtain instructions, codes, and / or data structures for implementing the techniques described in this disclosure. A computer program product may include computer-readable media.

[0201] By way of example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. In addition, any connection is appropriately referred to as a computer-readable medium. For example, if instructions are transmitted from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (e.g., infrared, radio and microwave), the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology (e.g., infrared, radio and microwave) is included in the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals or other temporary media, but are instead directed to non-temporary tangible storage media. As used herein, disks and optical disks include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks and Blu-ray discs, wherein disks typically copy data magnetically, while optical discs use lasers to copy data optically. Combinations of the above should also be included within the scope of computer-readable media.

[0202] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Thus, the terms "processor" and "processing circuitry" as used herein may refer to any of the aforementioned structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Furthermore, the techniques may be implemented entirely in one or more circuits or logic elements.

[0203] The techniques of the present disclosure can be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in this disclosure to emphasize functional aspects of a device configured to perform the disclosed techniques, but do not necessarily need to be implemented by different hardware units. Specifically, as described above, the various units can be combined in a codec hardware unit, or provided by a collection of interoperable hardware units (including one or more processors as described above) in combination with appropriate software and / or firmware.

[0204] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for encoding video data, the method comprising: Encoding a first syntax element in a video bitstream, the first syntax element specifying whether to enable affine model-based motion compensation; encoding, based on enabling affine model-based motion compensation, a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merge motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value of a third syntax element different from the first syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element; as well as A picture of the video data is encoded based on the maximum number of sub-block based merge motion vector prediction candidates.

2. The method according to claim 1, wherein Encoding the picture of the video data based on the maximum number of sub-block based merged motion vector prediction candidates includes: Based on the first syntax element specifying that affine model-based motion compensation is enabled, no affine merge candidate is inserted into a sub-block-based merge list used for predicting samples of the picture.

3. The method according to claim 2, wherein: The first syntax element includes a sps_affine_enabled_flag syntax element.

4. The method according to claim 3, wherein: The second syntax element includes a five_minus_max_num_subblock_merge_cand syntax element.

5. The method according to claim 1, wherein The third syntax element specifies whether sub-block based temporal motion vector prediction can be used for decoding a picture of the video data.

6. The method according to claim 5, wherein: The third syntax element includes the sps_sbtmvp_enabled_flag syntax element.

7. The method according to claim 1, wherein A value of the second syntax element is constrained based on a value of the third syntax element such that a minimum value of the second syntax element is zero.

8. A device for encoding video data, the device comprising: a memory configured to store at least a portion of a video bitstream; as well as processing circuitry configured to: encoding a first syntax element in the video bitstream, the first syntax element specifying whether to enable affine model-based motion compensation; encoding, based on enabling affine model-based motion compensation, a second syntax element in the video bitstream, the second syntax element specifying a maximum number of sub-block-based merge motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value of a third syntax element different from the first syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element; as well as A picture of the video data is encoded based on the maximum number of sub-block based merge motion vector prediction candidates.

9. The apparatus according to claim 8, wherein To encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates, the processing circuit is configured to: Based on the first syntax element specifying that affine model-based motion compensation is enabled, no affine merge candidate is inserted into a sub-block-based merge list used for predicting samples of the picture.

10. The apparatus according to claim 9, wherein The first syntax element includes a sps_affine_enabled_flag syntax element.

11. The apparatus according to claim 10, wherein The second syntax element includes a five_minus_max_num_subblock_merge_cand syntax element.

12. The apparatus of claim 8, wherein: The third syntax element specifies whether sub-block based temporal motion vector prediction can be used for decoding a picture of the video data.

13. The apparatus according to claim 12, wherein The third syntax element includes the sps_sbtmvp_enabled_flag syntax element.

14. The apparatus according to claim 8, wherein A value of the second syntax element is constrained based on a value of the third syntax element such that a minimum value of the second syntax element is zero.

15. A computer-readable storage medium storing instructions that, when executed, cause one or more processors of a video encoding device to: Encoding a first syntax element in a video bitstream, the first syntax element specifying whether to enable affine model-based motion compensation; Based on enabling affine model-based motion compensation, a second syntax element is encoded in the video bitstream, the second syntax element specifying a maximum number of sub-block based merge motion vector prediction candidates, wherein The value of the second syntax element is constrained based on a value of a third syntax element different from the first syntax element, such that a maximum value of the second syntax element is 5 minus the value of the third syntax element; as well as A picture of the video data is encoded based on the maximum number of sub-block based merge motion vector prediction candidates.

16. The computer-readable storage medium of claim 15, wherein: The instructions that cause the one or more processors to encode the picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates include instructions that cause the one or more processors to: Based on the first syntax element specifying that affine model-based motion compensation is enabled, no affine merge candidate is inserted into a sub-block-based merge list used for predicting samples of the picture.

17. The computer-readable storage medium of claim 15, wherein: The third syntax element specifies whether sub-block based temporal motion vector prediction can be used for decoding a picture of the video data.

18. The computer-readable storage medium of claim 17, wherein: The third syntax element includes the sps_sbtmvp_enabled_flag syntax element.

19. The computer-readable storage medium of claim 15, wherein: A value of the second syntax element is constrained based on a value of the third syntax element such that a minimum value of the second syntax element is zero.

20. A device for encoding video data, the device comprising: means for encoding a first syntax element in a video bitstream, the first syntax element specifying whether affine model-based motion compensation is enabled; means for encoding a second syntax element in the video bitstream based on enabling affine model-based motion compensation, the second syntax element specifying a maximum number of sub-block-based merge motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value of a third syntax element different from the first syntax element such that a maximum value of the second syntax element is 5 minus the value of the third syntax element; as well as Means for encoding a picture of the video data based on the maximum number of sub-block based merge motion vector prediction candidates.

21. The apparatus according to claim 20, wherein The third syntax element specifies whether sub-block based temporal motion vector prediction can be used for decoding a picture of the video data.

22. The apparatus according to claim 21, wherein The third syntax element includes the sps_sbtmvp_enabled_flag syntax element.

23. The apparatus of claim 20, wherein: A value of the second syntax element is constrained based on a value of the third syntax element such that a minimum value of the second syntax element is zero.

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