Full-bridge inverter circuit and driving method thereof, high-voltage generator

Abstract

The application provides a full-bridge inverter circuit, a driving method thereof and a high-voltage generator. The driving method comprises the following steps: obtaining a first phase deviation of each MOSFET tube, wherein the first phase deviation is a phase deviation of an output signal of the MOSFET tube relative to a driving signal; determining a phase compensation value of each MOSFET tube according to the first phase deviation; determining a phase of the driving signal of each MOSFET tube according to the phase compensation value respectively; and generating a corresponding driving signal of the MOSFET tube according to the phase of the driving signal of each MOSFET tube respectively. The current sharing of each MOSFET tube is ensured under the driving of the driving signal of the compensated MOSFET tube.

Description

Technical Field

[0001] This invention relates to the field of inverter circuit technology, specifically to a full-bridge inverter circuit and its driving method, and a high-voltage generator. Background Technology

[0002] As an important component of high-voltage generators, inverter circuits can convert direct current (DC) to alternating current (AC). After passing through the transformer in the high-voltage generator, high-voltage AC power is output, which can be used by various types of equipment, maximizing the satisfaction of mobile power supply sites or high-voltage power consumption sites.

[0003] In existing inverter circuit structures, high-power devices often use multiple MOSFETs or IGBTs connected in parallel to achieve current inversion. However, using multiple MOSFETs or IGBTs in parallel can lead to current sharing differences due to distributed parameters. That is, at the same moment of conduction, the current flowing through adjacent MOSFETs or IGBTs in the inverter circuit is not the same, resulting in current shunting. This reduces the rated current of the inverter circuit, thereby reducing the actual power of the high-voltage generator. Summary of the Invention

[0004] Therefore, the present invention aims to solve the technical problem of current sharing differences in inverter circuits in the prior art, and thus provides a full-bridge inverter circuit and its driving method, as well as a high-voltage generator.

[0005] According to a first aspect, embodiments of the present invention provide a driving method for a full-bridge inverter circuit, the driving method comprising:

[0006] Obtain the first phase deviation of each MOSFET, where the first phase deviation is the phase deviation of the output signal of the MOSFET relative to the drive signal;

[0007] The phase compensation value for each MOSFET is determined based on the first phase deviation;

[0008] The phase of the drive signal for each MOSFET is determined according to the phase compensation value.

[0009] A corresponding drive signal for each MOSFET is generated based on the phase of the drive signal for each MOSFET.

[0010] Optionally, determining the phase compensation value for each MOSFET based on the first phase deviation includes:

[0011] Using the output signal phase of the MOSFET corresponding to the minimum phase deviation as a reference phase, the phase compensation value of the other MOSFETs among the plurality of MOSFETs is determined.

[0012] Alternatively, the output signal phase of the MOSFET corresponding to the maximum value of the first phase deviation can be used as a reference phase to determine other phase compensation values ​​among the plurality of MOSFETs;

[0013] Alternatively, the average phase of all the first phase deviations can be used as a reference phase to determine the phase compensation value for each of the plurality of MOSFETs.

[0014] Optionally, determining the phase of the drive signal for each MOSFET according to the phase compensation value includes:

[0015] Based on the stated phase compensation value, perform either leading phase compensation or lagging phase compensation to obtain the phase of the driving signal.

[0016] Optionally, after driving the plurality of MOSFETs with the phase-compensated driving signal, the second phase deviation between any two MOSFETs is less than a preset value, whereby the second phase deviation is the phase deviation between the output signals of any two MOSFETs.

[0017] According to a second aspect, embodiments of the present invention provide a full-bridge inverter circuit, comprising:

[0018] Each arm of the full-bridge inverter circuit includes multiple MOSFETs connected in parallel, and the full-bridge inverter circuit also includes multiple drive circuits that correspond one-to-one with the multiple MOSFETs.

[0019] The driving circuit is used to output the corresponding driving signal of the MOSFET. The phase of each driving signal is determined by a phase compensation value, which is determined based on the first phase deviation of the plurality of MOSFETs. The first phase deviation is the phase deviation of the output signal of the MOSFET relative to the driving signal.

[0020] Optionally, each of the MOSFETs adopts a TO-247-4 package structure, which includes a source, a gate, a drain, and a gate-emitter, and the gate-emitter is connected to the driving circuit.

[0021] Optionally, each of the MOSFETs, the driving circuit, and the connecting wires are symmetrically arranged on the PCB board.

[0022] Optionally, the MOSFET is a SiC MOSFET.

[0023] Optionally, the full-bridge inverter circuit further includes a drive control unit for controlling the drive circuit to generate the drive signals respectively.

[0024] According to a third aspect, embodiments of the present invention provide a high-voltage generator, including any of the full-bridge inverter circuits described above.

[0025] The technical solution of this invention has the following advantages:

[0026] In this embodiment of the invention, a phase compensation value for each MOSFET can be determined based on the first phase deviation of each MOSFET. The phase corresponding to the compensated drive signal for driving the MOSFET is then determined according to this phase compensation value. A compensated drive signal for the MOSFET is generated based on the phase corresponding to the compensated drive signal. Under the drive signal of the compensated MOSFET, the output signal of each MOSFET has the same phase or a phase within a preset range. By changing the phase of the drive signal corresponding to each MOSFET, the conduction phase of the MOSFET is changed. Consistent conduction phases indicate that the on-resistance of each MOSFET is the same at the same time. The same on-resistance ensures current sharing for each MOSFET, thereby increasing the rated current that the full-bridge inverter circuit can handle and preventing damage to the devices in the full-bridge inverter circuit from high current. Furthermore, it can also meet the needs of high-frequency, high-power equipment, achieving excellent characteristics such as low loss and high frequency. Attached Figure Description

[0027] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0028] Figure 1 This is a flowchart illustrating a specific example of a driving method for a full-bridge inverter circuit in Embodiment 1 of this application;

[0029] Figure 2 The waveform diagram is a specific example of the drive signal and the output signal of the MOSFET before compensation in Embodiment 1 of this application;

[0030] Figure 3The waveform diagram is a specific example of the compensated drive signal and the output signal of the MOSFET in Embodiment 1 of this application.

[0031] Figure 4 This is a structural diagram of a specific example of a full-bridge inverter circuit in Embodiment 2 of this application. Detailed Implementation

[0032] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0034] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0035] Furthermore, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0036] Example 1

[0037] This embodiment provides a driving method for a full-bridge inverter circuit. This driving method can be implemented by a drive control unit and other modules working in conjunction with a server or other equipment. The server or other equipment controls the drive control unit to drive the full-bridge inverter circuit, thereby achieving full-bridge inverter circuit driving. In this embodiment, each bridge arm can include multiple MOSFETs connected in parallel. These parallel MOSFETs can be SiC MOSFETs. SiC MOSFETs use wide bandgap materials and have extremely low on-resistance, offering advantages such as high voltage, high power, high frequency, and low power consumption. The driving method for the full-bridge inverter circuit is as follows: Figure 1 As shown, it includes the following steps:

[0038] Step S101: Obtain the first phase deviation of each MOSFET, wherein the first phase deviation is the phase deviation of the output signal of the MOSFET relative to the drive signal.

[0039] To intuitively describe the first phase deviation, this embodiment uses four MOSFETs connected in parallel in one bridge arm of a full-bridge inverter circuit as an example. Figure 2 The diagram shows the waveforms of the drive signals and output signals of the four MOSFETs connected in parallel in one arm of a full-bridge inverter circuit. DQA-1 to DQA-4 are the drive signals for each MOSFET, and VDS-1 to VDS-4 are the output signals for each MOSFET. The drive signal DQA-1 drives the corresponding MOSFET to output signal VDS-1, and the same applies to DQA-2 and VDS-2, DQA-3 and VDS-3, and DQA-4 and VDS-4.

[0040] Due to differences in the integrated parameters of MOSFETs, their on-resistance may vary. The on-resistance of a MOSFET changes with the on-voltage. As the on-voltage increases, the MOSFET operates in the saturation region with low on-resistance; as the on-voltage decreases, it operates in the cutoff region with high on-resistance. This high on-resistance results in a smaller current flow through the MOSFET, and vice versa. Therefore, under the same drive signal, different MOSFETs will have phase deviations during conduction. Taking the DQA-3 drive signal as an example, the MOSFET corresponding to the DQA-3 drive signal outputs the signal VDS-3. The rising edge of the output signal lags behind the falling edge of the drive signal; this phase lag is the first phase deviation. In this embodiment, it is necessary to obtain the first phase deviation for each parallel MOSFET in each bridge arm.

[0041] Step S102: Determine the phase compensation value for each MOSFET based on the first phase deviation.

[0042] Step S103: Determine the phase of the drive signal for each MOSFET according to the phase compensation value.

[0043] Step S104: Generate a corresponding drive signal for each MOSFET based on the phase of the drive signal for each MOSFET.

[0044] Steps S102 to S104 specifically include: taking the DQA-3 drive signal as an example, the phase value of the VDS-3 output signal lagging behind the DQA-3 drive signal can be used as the phase compensation value of the corresponding MOSFET. Alternatively, the output signal phase of the MOSFET corresponding to the minimum or maximum value among all the obtained first phase deviations can be used as the reference phase, or the average phase of the first phase deviations can be used as the reference phase. The difference between the phase corresponding to the VDS-3 output signal and the reference phase is used as the phase compensation value of the MOSFET. Further, the phase corresponding to the compensated DQA-3 drive signal is determined based on the phase compensation value.

[0045] Similarly, the drive signal corresponding to each MOSFET is compensated to determine the phase of the compensated drive signal. A compensated drive signal for the MOSFET is then generated based on the phase of the compensated drive signal. This compensated drive signal drives the corresponding MOSFET, thereby outputting the desired result. Figure 3 The current sharing waveforms of VDS-1 to VDS-4 are shown.

[0046] In this embodiment, a phase compensation value is determined for each MOSFET based on its first phase deviation. The phase of the compensated drive signal for the MOSFET is then determined according to this compensation value. A compensated drive signal for the MOSFET is generated based on the phase of the compensated drive signal. Under the drive signal of the compensated MOSFET, the output signal of each MOSFET has the same phase or a phase within a preset range. By changing the phase of the drive signal for each MOSFET, the conduction phase of the MOSFET is changed. Consistent conduction phases indicate that the on-resistance of each MOSFET is the same at any given time. This ensures current sharing for each MOSFET, thereby increasing the rated current that the full-bridge inverter circuit can handle and preventing damage to the devices in the full-bridge inverter circuit from high current.

[0047] Furthermore, the driving method of the full-bridge inverter circuit in this embodiment can meet the needs of high-frequency, high-power equipment and achieve excellent characteristics such as low loss and high frequency.

[0048] As an optional implementation, in this embodiment of the invention, determining the phase compensation value for each MOSFET based on the first phase deviation includes:

[0049] Using the output signal phase of the MOSFET corresponding to the minimum phase deviation as a reference phase, the phase compensation value of the other MOSFETs among the plurality of MOSFETs is determined.

[0050] Alternatively, the output signal phase of the MOSFET corresponding to the maximum value of the first phase deviation can be used as a reference phase to determine other phase compensation values ​​among the plurality of MOSFETs;

[0051] Alternatively, the average phase of all the first phase deviations can be used as a reference phase to determine the phase compensation value for each of the plurality of MOSFETs.

[0052] In this embodiment, a method is used to perform lead compensation or lag compensation on the phases of other MOSFETs when the output signal phase of the MOSFET corresponding to the minimum or maximum value of the first phase deviation is used as the reference phase, or when the average phase of the first phase deviation is used as the reference phase, to determine the phase compensation value of each MOSFET. Based on the phase compensation value of each MOSFET, the phase corresponding to the compensated drive signal for driving the MOSFET is determined, and the compensated drive signal for the MOSFET is generated and used to drive the corresponding MOSFET, thereby achieving current sharing for each MOSFET.

[0053] As an optional implementation, in this embodiment of the invention, determining the phase of the drive signal for each MOSFET according to the phase compensation value includes:

[0054] According to the phase compensation value, lead phase compensation or lag phase compensation is performed to obtain the phase corresponding to the compensated drive signal. For example, when the phase of the MOSFET output signal lags relative to the reference phase, lead phase compensation is performed on the drive signal corresponding to the MOSFET according to the phase compensation value; when the phase of the MOSFET output signal leads relative to the reference phase, lag phase compensation is performed on the drive signal corresponding to the MOSFET according to the phase compensation value.

[0055] As an optional implementation, in this embodiment of the invention, the second phase deviation between any two MOSFETs is less than a preset value after the phase-compensated driving signal is used to drive the plurality of MOSFETs, and the second phase deviation is the phase deviation between the output signals of any two MOSFETs.

[0056] Specifically, under the drive of the compensated MOSFET drive signal, the second phase deviation between the output signals of any two MOSFETs must be less than a preset value, such as 50ns.

[0057] Example 2

[0058] This embodiment provides a full-bridge inverter circuit, which can be used to execute the driving method of the full-bridge inverter circuit in Embodiment 1 above. The full-bridge inverter circuit is as follows: Figure 4 As shown.

[0059] Each arm of the full-bridge inverter circuit includes multiple MOSFETs connected in parallel, and the full-bridge inverter circuit also includes multiple drive circuits that correspond one-to-one with the multiple MOSFETs.

[0060] The driving circuit is used to output the corresponding driving signal of the MOSFET. The phase of each driving signal is determined by a phase compensation value, which is determined based on the first phase deviation of the plurality of MOSFETs. The first phase deviation is the phase deviation of the output signal of the MOSFET relative to the driving signal.

[0061] Specifically, in a full-bridge inverter circuit, each of the four bridge arms can connect multiple MOSFETs in parallel, and each MOSFET is connected to a driver circuit. For example... Figure 4 As shown, each MOSFET in each bridge arm is connected to a driving circuit, and each driving circuit receives a corresponding input driving signal, such as QDA-1 to QDA-n or QDB-1 to QDB-n. The driving circuit outputs a driving signal that can drive the MOSFET to turn on and off. By using the driving method of the full-bridge inverter circuit in Embodiment 1, the driving circuit can output a compensated driving signal for the corresponding MOSFET, ensuring current sharing for each MOSFET in each bridge arm.

[0062] For a detailed description of the determination method, please refer to the above method embodiment 1, which will not be repeated here.

[0063] As an optional implementation, in this embodiment of the invention, each of the MOSFETs adopts a TO-247-4 package structure, the TO-247-4 package structure includes a source, a gate, a drain, and a gate-emitter, the gate-emitter being connected to the driving circuit.

[0064] In this embodiment, each MOSFET is packaged in a TO-247-4 package. The drive circuit and the MOSFET are connected via the gate and emitter of the TO-247-4 package. This effectively suppresses the circulating current in the drive circuit when multiple MOSFETs are connected in parallel, reduces MOSFET switching losses, and increases the inverter frequency.

[0065] As an optional implementation, in this embodiment of the invention, each of the MOSFETs, the driving circuits, and the connecting wires are symmetrically arranged on the PCB board to ensure the stability of signal transmission.

[0066] As an optional implementation, in this embodiment of the invention, the MOSFET is a SiC MOSFET. SiC MOSFETs use a wide bandgap material, have extremely low on-resistance, and offer advantages such as high voltage, high power, high frequency, and low power consumption.

[0067] As an optional implementation, in this embodiment of the invention, the full-bridge inverter circuit further includes:

[0068] A drive control unit (not shown in the figure) is used to control the drive circuit to generate the drive signal.

[0069] In this embodiment, in the full-bridge inverter circuit, under the drive signal of the compensated MOSFET, the output signal of each MOSFET has the same phase or a phase within a preset range. By changing the phase of the drive signal corresponding to each MOSFET, the conduction phase of the MOSFET is changed. Consistent conduction phases of the MOSFETs indicate that the on-resistance of each MOSFET is the same at the same time. This ensures current sharing among the MOSFETs, thereby increasing the rated current that the full-bridge inverter circuit can handle and preventing damage to the devices in the full-bridge inverter circuit from high current. Furthermore, the full-bridge inverter circuit in this embodiment can meet the needs of high-frequency, high-power equipment, achieving excellent characteristics such as low loss and high frequency.

[0070] Example 3

[0071] This embodiment provides a high-voltage generator, which may include the full-bridge inverter circuit in Embodiment 2 above.

[0072] In this embodiment, the high-voltage generator includes the full-bridge inverter circuit described in Embodiment 2. In the full-bridge inverter circuit, under the drive of the compensated MOSFET drive signal, the output signal of each MOSFET has the same phase or a phase within a preset range. By changing the phase of the drive signal corresponding to each MOSFET, the conduction phase of the MOSFET is changed. Consistent conduction phases of the MOSFETs indicate that the on-resistance of each MOSFET is the same at the same time. The same on-resistance ensures current sharing among the MOSFETs, thereby increasing the rated current that the full-bridge inverter circuit can handle and preventing damage to the devices in the full-bridge inverter circuit from high current.

[0073] For a detailed description of the full-bridge inverter circuit, please refer to the above-described method embodiment 2, which will not be repeated here.

[0074] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A driving method for a full-bridge inverter circuit, characterized in that, Each arm of the full-bridge inverter circuit includes multiple MOSFETs connected in parallel, and the driving method includes: Obtain the first phase deviation of each MOSFET, where the first phase deviation is the phase deviation of the output signal of the MOSFET relative to the drive signal; The phase compensation value for each MOSFET is determined based on the first phase deviation; The phase of the drive signal for each MOSFET is determined according to the phase compensation value. Based on the phase of the driving signal of each MOSFET, a corresponding driving signal for the MOSFET is generated. After driving the plurality of MOSFETs using the phase-compensated driving signal, the second phase deviation between any two MOSFETs is less than a preset value. The second phase deviation is the phase deviation between the output signals of any two MOSFETs.

2. The driving method for the full-bridge inverter circuit according to claim 1, characterized in that, The step of determining the phase compensation value for each MOSFET based on the first phase deviation includes: Using the output signal phase of the MOSFET corresponding to the minimum phase deviation as a reference phase, the phase compensation value of the other MOSFETs among the plurality of MOSFETs is determined. Alternatively, the output signal phase of the MOSFET corresponding to the maximum value of the first phase deviation can be used as a reference phase to determine other phase compensation values ​​among the plurality of MOSFETs; Alternatively, the average phase of all the first phase deviations can be used as a reference phase to determine the phase compensation value for each of the plurality of MOSFETs.

3. The driving method for the full-bridge inverter circuit according to claim 1, characterized in that, Determining the phase of the drive signal for each MOSFET according to the phase compensation value includes: Based on the stated phase compensation value, perform either leading phase compensation or lagging phase compensation to obtain the phase of the driving signal.

4. A full-bridge inverter circuit, characterized in that, include: Each arm of the full-bridge inverter circuit includes multiple MOSFETs connected in parallel, and the full-bridge inverter circuit also includes multiple drive circuits that correspond one-to-one with the multiple MOSFETs. The driving circuit is used to output the corresponding driving signal of the MOSFET. The phase of each driving signal is determined by a phase compensation value, which is determined based on the first phase deviation of the plurality of MOSFETs. The first phase deviation is the phase deviation of the output signal of the MOSFET relative to the driving signal. After driving the plurality of MOSFETs with the phase-compensated driving signal, the second phase deviation between any two MOSFETs is less than a preset value. The second phase deviation is the phase deviation between the output signals of any two MOSFETs.

5. The full-bridge inverter circuit according to claim 4, characterized in that, Each of the MOSFETs adopts a TO-247-4 package structure, which includes a source, a gate, a drain, and a gate-emitter, and the gate-emitter is connected to the driving circuit.

6. The full-bridge inverter circuit according to claim 4, characterized in that, Each of the MOSFETs, along with each of the drive circuits and connecting wires, is symmetrically arranged on the PCB board.

7. The full-bridge inverter circuit according to claim 4, characterized in that, The MOSFET is a SiC MOSFET.

8. The full-bridge inverter circuit according to claim 4, characterized in that, Also includes: A drive control unit is used to control the drive circuit to generate the drive signal.

9. A high-voltage generator, characterized in that, Includes the full-bridge inverter circuit described in any one of claims 4-8 above.

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