Display panel, control method thereof, and display device

Abstract

Embodiments of the present application provide a display panel, a control method thereof, and a display device. In the display panel provided by the embodiments of the present application, by connecting a light-shielding structure to an independent adjustment signal, the electric field of the light-shielding structure can affect the active layer of the thin-film transistor, thereby independently adjusting the threshold voltage of each thin-film transistor. This can ensure the uniformity of the threshold voltage of the thin-film transistors in the display panel and thus guarantee the performance of the display panel.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a display panel, a control method thereof, and a display device. Background Art

[0002] Field effect transistors, represented by thin film transistors (TFTs), are widely used in display panels.

[0003] At present, due to the limitations of the manufacturing process, during the manufacturing process of the display panel, thin film transistors with threshold voltages that deviate from the set value exist in the display panel, resulting in differences in the threshold voltages of thin film transistors at different positions in the display panel. After the display panel is manufactured, the threshold voltage of the thin film transistor is fixed and unchanged, thereby affecting the uniformity of the threshold voltage of the thin film transistors in the display panel and affecting the performance of the display panel. Summary of the Invention

[0004] In view of the shortcomings of the existing methods, the present application proposes a display panel and a control method thereof, and a display device to solve the technical problem in the prior art that the threshold voltage of the thin film transistor in the display panel is difficult to adjust.

[0005] In a first aspect, an embodiment of the present application provides a display panel, comprising:

[0006] at least one light shielding structure, disposed on one side of the substrate;

[0007] At least one thin film transistor, each thin film transistor is configured with a shading structure, the thin film transistor is arranged on the side of the shading structure away from the substrate, and the orthographic projection of the shading structure on the substrate covers the orthographic projection of the active layer of the corresponding thin film transistor on the substrate; each shading structure is used to receive an independent adjustment signal to adjust the threshold voltage of the corresponding thin film transistor.

[0008] In a second aspect, an embodiment of the present application provides a display device, comprising: a display panel as provided in the first aspect.

[0009] In a third aspect, an embodiment of the present application provides a method for controlling a display panel, including:

[0010] collecting a threshold voltage of at least one thin film transistor in a display panel;

[0011] If the threshold voltage of the thin film transistor is outside the set voltage range, an adjustment signal is input to the light shielding structure corresponding to the thin film transistor to make the threshold voltage of the thin film transistor within the set voltage range.

[0012] The beneficial technical effects brought about by the technical solutions provided in the embodiments of the present application include:

[0013] In the display panel provided in the embodiment of the present application, by connecting the shading structure to an independent adjustment signal, the electric field of the shading structure can affect the active layer of the thin film transistor, so that the threshold voltage of each thin film transistor can be independently adjusted, thereby ensuring the uniformity of the threshold voltage of the thin film transistors in the display panel and ensuring the performance of the display panel.

[0014] Additional aspects and advantages of the present application will be given in part in the following description, which will become apparent from the following description, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0016] Figure 1 A schematic cross-sectional view of a display panel provided in an embodiment of the present application;

[0017] Figure 2 A schematic diagram of a top view of another display panel provided in an embodiment of the present application;

[0018] Figure 3 For the embodiments of this application Figure 2 The schematic diagram of the structure of the driving binding area in the display panel is shown;

[0019] Figure 4 A schematic diagram of the frame structure of a display device provided in an embodiment of the present application.

[0020] Description of reference numerals:

[0021] 100-display panel;

[0022] 110-display area; 120-non-display area; 1211-driver binding area; 1212-data binding area;

[0023] 101 - substrate; 102 - isolation layer; 103 - first insulating layer; 104 - second insulating layer;

[0024] 10-shading structure; 11-connection wiring;

[0025] 21-active layer; 22-gate; 23-first source and drain; 24-second source and drain;

[0026] 31- soldering pad;

[0027] 200-Control device. DETAILED DESCRIPTION

[0028] The following describes the embodiments of the present application in conjunction with the accompanying drawings. It should be understood that the embodiments described below in conjunction with the accompanying drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions of the embodiments of the present application.

[0029] Those skilled in the art will understand that, unless otherwise stated, the singular forms "a," "an," "said," and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of this application refers to the presence of the described features, integers, steps, and / or operations, but does not exclude the implementation of other features, information, data, steps, operations, and / or combinations thereof supported by the technical field. The term "and / or" used herein refers to at least one of the items defined by the term, for example, "A and / or B" can be implemented as "A," or as "B," or as "A and B."

[0030] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0031] First, the relevant technologies involved in this application are described:

[0032] Currently, a TFT typically consists of a gate, a gate insulating layer, an active layer, a source electrode, and a drain electrode. By varying the voltage applied to the gate, the conductivity of the active layer is adjusted, thereby controlling whether the source and drain electrodes are in an on-state or off-state. The threshold voltage is a key parameter in TFT performance. For example, when the voltage applied to the gate is greater than the threshold voltage, the source and drain electrodes are in an on-state; conversely, when the gate voltage is less than the threshold voltage, the source and drain electrodes are in an off-state.

[0033] At present, for TFTs integrated into display panels, the structure of the TFTs has been formed after the display panel is manufactured. Therefore, the threshold voltage of the TFTs is difficult to adjust. If there are a large number of TFTs in the display panel whose threshold voltage does not meet the requirements, the display panel will be scrapped, resulting in a decrease in the yield of the display panel and an increase in the production cost of the display panel.

[0034] Due to limitations in the manufacturing process, fluctuations in the manufacturing process during the production of the display panel will result in different electrical properties of thin-film transistors in different areas. In particular, the threshold voltages of the thin-film transistors located in the central and edge areas of the display panel are significantly different from the threshold voltages of the thin-film transistors in other areas of the display panel, thereby affecting the uniformity of the threshold voltages of the thin-film transistors in the display panel and thus affecting the performance of the display panel.

[0035] The array substrate, display panel, control method thereof, and display device provided in this application are aimed at solving the above technical problems in the prior art.

[0036] The following is a detailed description of the technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems with specific embodiments. It should be noted that the following embodiments can refer to, draw on, or combine with each other, and the same terms, similar features, and similar implementation steps in different embodiments will not be repeated.

[0037] The embodiment of the present application provides a display panel. The structural diagram of the display panel 100 is shown in FIG. Figure 1 As shown, it includes: at least one light shielding structure 10 and at least one thin film transistor.

[0038] In an embodiment of the present application, each thin film transistor is provided with a shading structure 10, the shading structure 10 is arranged on one side of the substrate 101, and the thin film transistor is arranged on the side of the shading structure 10 away from the substrate 101, and the orthographic projection of the shading structure 10 on the substrate 101 covers the orthographic projection of the active layer 21 of the corresponding thin film transistor on the substrate 101; each shading structure 10 is used to access an independent adjustment signal to adjust the threshold voltage of the corresponding thin film transistor.

[0039] In the display panel 100 provided in the embodiment of the present application, by connecting the shading structure 10 to an independent adjustment signal, the electric field of the shading structure 10 can affect the active layer 21 of the thin film transistor, so that the threshold voltage of each thin film transistor can be independently adjusted, thereby ensuring the uniformity of the threshold voltage of the thin film transistors in the display panel 100 and ensuring the performance of the display panel 100.

[0040] In the embodiment of this application, Figure 1 As shown, the light shielding structure 10 and the thin film transistor are arranged on one side of the substrate 101. Figure 1 A thin film transistor and a light-shielding structure 10 are exemplarily illustrated in the figure. The present application does not limit the specific number of light-shielding structures 10 and thin film transistors in the display panel 100. Those skilled in the art can set the required number according to actual needs, and only need to ensure that each thin film transistor is equipped with a light-shielding structure 10.

[0041] In the embodiment of this application, Figure 1 As shown, the orthographic projection of the light shielding structure 10 on the substrate 101 covers the orthographic projection of the active layer 21 on the substrate 101, thereby preventing light from reaching the active layer 21 and effectively reducing the threshold voltage bias of the thin film transistor caused by light. At the same time, the light shielding structure 10 can reduce the impact of the substrate 101 and the film layer disposed below the active layer 21 on the thin film transistor active layer 21.

[0042] Moreover, in the embodiment of the present application, each shading structure 10 is also used to access an independent adjustment signal. By controlling the size of the accessed adjustment signal, the change in the electric field applied by the shading structure 10 to the active layer 21 is controlled, thereby adjusting the threshold voltage of the corresponding thin film transistor.

[0043] In the embodiment of the present application, each shading structure 10 is configured to receive an independent adjustment signal, so that the threshold voltage of each thin film transistor in the display panel 100 can be adjusted, thereby ensuring the uniformity of the threshold voltage of all thin film transistors in the entire display panel 100 and ensuring the performance of the display panel 100.

[0044] In particular, significant differences in threshold voltages of thin film transistors in different regions of the display panel 100 caused by manufacturing process fluctuations can be reduced, thereby improving the yield of the display panel 100 and reducing the manufacturing cost of the display panel 100.

[0045] Optionally, in an embodiment of the present application, the thin film transistor may be a driving thin film transistor. For the driving thin film transistor, if the threshold voltage is too large, the driving capability of the driving thin film transistor will be reduced, resulting in reduced performance of the display panel 100. By controlling the size of the adjustment signal connected to the shading structure 10, the threshold voltage of the driving thin film transistor can be reduced, thereby improving the performance of the display surface.

[0046] Optionally, in an embodiment of the present application, the thin film transistor may be a switching thin film transistor. For the switching thin film transistor, if the threshold voltage is too small, the anti-interference ability of the switching thin film transistor is poor, which will also cause the performance of the display panel 100 to be reduced. By controlling the size of the adjustment signal connected to the shading structure 10, the threshold voltage of the switching thin film transistor can be increased, thereby improving the performance of the display surface.

[0047] In an embodiment of the present application, by connecting the shading structure 10 to an independent adjustment signal, the electric field of the shading structure 10 can affect the active layer 21 of the thin film transistor, thereby adjusting the threshold voltage of the thin film transistor, and avoiding the need to set a voltage compensation circuit to adjust the threshold voltage of the thin film transistor, thereby reducing the circuit design difficulty of the display panel 100 and reducing the production cost of the display panel 100.

[0048] In an embodiment of the present application, by connecting the shading structure 10 to an independent adjustment signal to adjust the threshold voltage of the thin film transistor, when the display panel 100 has problems such as uneven grayscale display, bright spots, and dark spots, the above problems can be solved by adjusting the threshold voltage of the corresponding thin film transistor, thereby further improving the display performance of the display panel 100 and extending the service life of the display panel 100.

[0049] Optionally, in the embodiment of the present application, the display panel 100 is an OLED (Organic Light-Emitting Diode) display panel 100. Optionally, the display panel 100 is an AMOLED (Active Matrix Organic Light Emitting Diode) display panel 100.

[0050] In one embodiment of the present application, the display panel 100 includes a display area 110 and a non-display area 120 surrounding the display area 110; the shading structure 10 is electrically connected to a pad 31 provided in the non-display area 120, and the pad 31 is used to transmit an adjustment signal to the shading structure 10.

[0051] In the embodiment of this application, Figure 1 and Figure 2 As shown, the display panel 100 includes a display area 110 and a non-display area 120 , and the non-display area 120 surrounds the display area 110 .

[0052] In the embodiment of this application, Figure 1 and Figure 2 As shown, the non-display area 120 is provided with a pad 31 , the light shielding structure 10 is electrically connected to the pad 31 , and the pad 31 is used to transmit an adjustment signal to the light shielding structure 10 so that the light shielding structure 10 can access the adjustment signal.

[0053] Optionally, in an embodiment of the present application, the shading structure 10 can also be electrically connected to other terminals arranged in the non-display area 120. It is only necessary to ensure that the shading structure 10 can access the adjustment signal, thereby improving the flexibility of the wiring design for realizing the electrical connection between the shading structure 10 and the terminals of the non-display area 120, and reducing the design difficulty and manufacturing difficulty of the display panel 100.

[0054] In one embodiment of the present application, the pad 31 is disposed in a bonding area of ​​the non-display area 120 .

[0055] In the embodiment of this application, Figure 2 As shown, a binding area is provided in the non-display area 120, which is used to connect the display panel 100 to an external control circuit. The external control circuit is used to output a regulation signal. Optionally, the external control circuit can be a PCB (Printed Circuit Boards), an FPC (Flexible Printed Circuit), etc. Optionally, the external control circuit is provided in the control device of the display device.

[0056] In the embodiment of the present application, by setting the pad 31 in the binding area, it is possible to avoid opening an additional area for setting the pad 31 in the non-display area 120, thereby reducing the design difficulty and manufacturing difficulty of the display panel 100.

[0057] In one embodiment of the present application, the binding area includes a data binding area 1212 and a driver binding area 1211 . Along the extension direction of the data binding area 1212 , driver binding areas 1211 are provided on both sides of the data binding area 1212 .

[0058] In the embodiment of this application, Figure 2 As shown, the binding area includes a data binding area 1212 and a driver binding area 1211. The extension direction of the data binding area 1212 is as shown in FIG. Figure 2 From left to right in the middle, driver binding areas 1211 are provided on both sides of the data binding area 1212 .

[0059] In the embodiment of the present application, pads 31 are provided in both the driver binding area 1211 and the data binding area 1212 . The driver binding area 1211 is a Driver Pad area for transmitting driver signals, and the data binding area 1212 is a Data Pad area for transmitting data signals.

[0060] In the embodiment of the present application, by setting a drive binding area 1211 on both sides of the data binding area 1212, the extension length of the wiring for transmitting data signals and the wiring for transmitting drive signals in the display panel 100 can be reduced, thereby reducing the design difficulty and manufacturing difficulty of the display panel 100.

[0061] In one embodiment of the present application, the pad 31 is a dummy pad 31 disposed in the driver binding area 1211 .

[0062] In the embodiment of this application, Figure 2 As shown, a plurality of pads 31 are provided in the driving binding area 1211 , and some of the plurality of pads 31 are used to transmit driving signals.

[0063] It is understood by those skilled in the art that the multiple pads 31 also include dummy pads 31, which have no electrical connection with other pads 31 in the drive binding area 1211. The dummy pads 31 are often provided to balance the manufacturing process and alleviate the warping in the drive binding area 1211. The dummy pads 31 usually do not participate in the transmission of electrical signals.

[0064] In the embodiment of the present application, by setting up an electrical connection between the shading structure 10 and the dummy pad 31 set in the driving binding area 1211, it is possible to avoid opening an additional area for setting the pad 31 in the non-display area 120, thereby reducing the design difficulty and manufacturing difficulty of the display panel 100.

[0065] At the same time, it can avoid occupying the pad 31 for transmitting the driving signal and avoid crosstalk between the driving signal and the adjustment signal, thereby ensuring the adjustment accuracy of the thin film transistor threshold voltage and the performance of the display panel 100.

[0066] Optionally, in the embodiment of the present application, the orthographic projection shape of the pad 31 on the substrate 101 is a square; optionally, the sizes of the three adjacent sides of the square pad 31 are 80 microns, 30 microns and 10 microns respectively.

[0067] Alternatively, as Figure 3 As shown, the pads 31 in the driving binding area 1211 include a driving pad 31a for transmitting a driving signal, a dummy pad 31b, and a Gout pad 31c. By providing a light shielding structure 10 electrically connected to the dummy pad 31b provided in the driving binding area 1211, crosstalk between the driving signal and the adjustment signal can be avoided.

[0068] Optionally, the driving pad 31a is a Drive pad, and the dummy pad 31b is a Dummy pad. Optionally, each driving bonding area 1211 may include 38 pads 31, and optionally, may include 15 driving pads 31a, 21 dummy pads 31b, and 2 Gout pads 31c.

[0069] In one embodiment of the present application, the thin film transistor further includes: a first source-drain electrode 23 and a second source-drain electrode 24, which are disposed on a side of the active layer 21 away from the substrate 101 and are respectively connected to the active layer 21 through vias; one end of the light shielding structure 10 is connected to one end of a connecting trace 11 through a via, and the other end of the connecting trace 11 is connected to a pad 31, and the connecting trace 11 is disposed on the same layer as the first source-drain electrode 23 and the second source-drain electrode 24. Optionally, the first source-drain electrode 23 is a source electrode, and the second source-drain electrode 24 is a drain electrode; alternatively, the first source-drain electrode 23 is a drain electrode, and the second source-drain electrode 24 is a source electrode.

[0070] In the embodiment of this application, Figure 1As shown, the display panel 100 further includes an isolation layer 102, a first insulating layer 103, and a second insulating layer 104. Optionally, the isolation layer 102 is a barrier layer made of an insulating material, the first insulating layer 103 is a GI (Gate Insulation) layer, and the second insulating layer 104 is a GI layer and an ILD (Inter-Layer Dielectric) layer.

[0071] like Figure 1 As shown, the thin film transistor further includes: a gate electrode 22, a first source-drain electrode 23, and a second source-drain electrode 24. In the display panel 100, the first insulating layer 103 and the second insulating layer 104 function to isolate the gate electrode 22, the first source-drain electrode 23, and the second source-drain electrode 24 in the thin film transistor, so that the gate electrode 22, the first source-drain electrode 23, and the second source-drain electrode 24 are insulated from each other; the isolation layer 102 functions to isolate the thin film transistor from the light shielding structure 10, so that the thin film transistor and the light shielding structure 10 are insulated from each other.

[0072] Alternatively, as Figure 1 As shown, the isolation layer 102 is arranged on the side of the shading structure 10 away from the substrate 101, and covers the area of ​​the substrate 101 not covered by the shading structure 10; the active layer 21 is arranged on the side of the isolation layer 102 away from the substrate 101, and the orthographic projection of the active layer 21 on the substrate 101 is located within the orthographic projection of the shading structure 10 on the substrate 101; the first insulating layer 103 is arranged on the side of the active layer 21 away from the substrate 101, and covers the area of ​​the isolation layer 102 not covered by the active layer 21; the gate 22 is arranged on the side of the first insulating layer 103 away from the substrate 101, and the orthographic projection of the gate 22 on the substrate 101 is located within the orthographic projection of the active layer 21 on the substrate 101; the second insulating layer 104 is arranged on the side of the gate 22 away from the substrate 101, and covers the area of ​​the first insulating layer 103 not covered by the gate 22.

[0073] like Figure 1 As shown, the first insulating layer 103 and the second insulating layer 104 are provided with communicating vias, the first source and drain 23 are connected to the active layer 21 through one via, and the second source and drain 24 are connected to the active layer 21 through another via.

[0074] Optionally, in an embodiment of the present application, the active layer 21 is a doped semiconductor material, the area where the active layer 21 is connected to the first source and drain electrodes 23 is a source region, the area where the active layer 21 is connected to the second source and drain electrodes 24 is a drain region, and the area between the source region and the drain region in the active layer 21 is a channel region; the doping concentrations of the source region and the drain region are greater than the doping concentration of the channel region.

[0075] Optionally, in an embodiment of the present application, the orthographic projection of the channel region of the active layer 21 on the substrate 101 is located within the orthographic projection of the shading structure 10 on the substrate 101; the orthographic projection of the gate 22 on the substrate 101 overlaps with the orthographic projection of the channel region of the active layer 21 on the substrate 101.

[0076] In the embodiment of this application, Figure 1 As shown, the display panel 100 further includes a connecting wire 11 , which is used to achieve electrical connection between the light shielding structure 10 and the pad 31 .

[0077] like Figure 1 As shown, the isolation layer 102 , the first insulating layer 103 and the second insulating layer 104 are provided with communicating via holes. One end of the connecting wire 11 is connected to the light shielding structure 10 through the via hole, and the other end of the connecting wire 11 is connected to the pad 31 .

[0078] In an embodiment of the present application, the connecting trace 11, the first source-drain electrode 23, and the second source-drain electrode 24 are arranged on the same layer. Optionally, the connecting trace 11, the first source-drain electrode 23, and the second source-drain electrode 24 are made of the same material, so that the connecting trace 11, the first source-drain electrode 23, and the second source-drain electrode 24 can be manufactured at the same time, which can simplify the manufacturing process of the display panel 100 and improve the manufacturing efficiency of the display panel 100.

[0079] In one embodiment of the present application, the orthographic projection of the light shielding structure 10 on the substrate 101 covers the orthographic projection of at least one of the first source / drain 23 and the second source / drain 24 on the substrate 101 .

[0080] Those skilled in the art understand that in order to prevent the influence of light, the substrate 101 and the isolation layer 102 disposed below the active layer 21 on the channel region of the active layer 21 , it is necessary to at least ensure that the shading structure 10 can cover the channel region of the active layer 21 .

[0081] In the embodiment of the present application, by setting the orthographic projection of the light-shielding structure 10 on the substrate 101 to cover the orthographic projection of at least one of the first source and drain 23 and the second source and drain 24 on the substrate 101, the isolation effect of the light-shielding structure 10 can be guaranteed. At the same time, it can be guaranteed that the electric field of the light-shielding structure 10 can completely affect the channel region, thereby ensuring the adjustment effect of the threshold voltage.

[0082] In the embodiment of the present application, while the threshold voltage of the thin film transistor is adjusted by the shading structure 10, since the shading structure 10 is electrically connected to the pad 31, the floating charge on the shading structure 10 can be reduced, thereby further ensuring the performance of the thin film transistor.

[0083] Based on the same inventive concept, the embodiment of the present application provides a display device. The frame structure diagram of the display device is as follows: Figure 4As shown, the display device includes: any display panel 100 provided in the above embodiments.

[0084] In the embodiment of the present application, since the display device adopts any one of the display panels 100 provided in the aforementioned embodiments, its principles and technical effects can be referred to in the aforementioned embodiments and will not be described in detail here.

[0085] Optionally, in the embodiment of the present application, the display device is a mobile phone, a tablet computer, a laptop computer, a smart TV, etc.

[0086] In one embodiment of the present application, the light shielding structure 10 of the display panel 100 is electrically connected to the control device 200 .

[0087] In the embodiment of this application, Figure 4 As shown, the display device includes a control device 200, which is electrically connected to the display panel 100. Optionally, the shading structure 10 is electrically connected to the control device 200 so that the shading structure 10 receives the adjustment signal. Optionally, the control device 200 is also electrically connected to the thin film transistor in the display panel 100.

[0088] Based on the same inventive concept, an embodiment of the present application provides a method for controlling a display panel. In one embodiment, the method includes the following steps S401-S401:

[0089] S401 , collecting a threshold voltage of at least one thin film transistor in a display panel.

[0090] S402 : If the threshold voltage of the thin film transistor is outside the set voltage range, input an adjustment signal to the light shielding structure corresponding to the thin film transistor so that the threshold voltage of the thin film transistor is within the set voltage range.

[0091] The control method for a display panel provided in the embodiment of the present application can be applied to a test process after the display panel is manufactured, or can be applied to a repair process of the display panel.

[0092] During the test process after the display panel is manufactured, the threshold voltage of at least one thin film transistor in the entire display panel is collected. If the threshold voltage of the thin film transistor is within the set voltage range, it is determined that the electrical properties of the thin film transistor meet the requirements; otherwise, it is determined that the electrical properties of the thin film transistor do not meet the requirements, and an adjustment signal needs to be determined based on the measured threshold voltage, and then the adjustment signal is input into the shading structure 10 so that the threshold voltage of the thin film transistor is within the set voltage range.

[0093] Optionally, the threshold voltages of multiple thin film transistors in representative areas of the display panel can be selected and measured. By using the above control method, the threshold voltages of multiple thin film transistors in the representative areas are outside the set voltage range, and the display panel can be determined to meet the usage requirements.

[0094] Optionally, in order to further improve the performance of the display panel, the threshold voltage of all thin film transistors in the display panel can be measured, and the adjustment signal that each shading structure 10 should transmit can be determined based on the threshold voltage of each thin film transistor. The corresponding adjustment signal is input to each shading structure 10 through the control device so that the threshold voltage of all thin film transistors in the display panel is within the set voltage range.

[0095] Optionally, when uneven grayscale display, bright spots, or dark spots occur in a certain area of ​​the display panel 100, the threshold voltage of the thin-film transistor in the area can be readjusted by the above-mentioned control method, so as to solve the above-mentioned problems in the area, thereby shortening the maintenance time of the display device, extending the service life of the display device, and improving the user experience.

[0096] By applying the embodiments of the present application, at least the following beneficial effects can be achieved:

[0097] In the display panel 100 provided in the embodiment of the present application, by connecting the shading structure 10 to an independent adjustment signal, the electric field of the shading structure 10 can affect the active layer 21 of the thin film transistor, so that the threshold voltage of each thin film transistor can be independently adjusted, thereby ensuring the uniformity of the threshold voltage of the thin film transistors in the display panel 100 and ensuring the performance of the display panel 100.

[0098] Those skilled in the art will appreciate that the steps, measures, and schemes in the various operations, methods, and processes discussed in this application may be interchanged, modified, combined, or deleted. Furthermore, other steps, measures, and schemes in the various operations, methods, and processes discussed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted. Furthermore, steps, measures, and schemes in the prior art that are similar to those disclosed in this application may also be interchanged, modified, rearranged, decomposed, combined, or deleted.

[0099] In the description of this application, the directions or positional relationships indicated by words such as "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", and "outside" are exemplary directions or positional relationships based on the accompanying drawings. They are intended to facilitate or simplify the description of the embodiments of this application, and do not indicate or imply that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on this application.

[0100] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of such features. Throughout this application, unless otherwise specified, "plurality" means two or more.

[0101] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0102] In the description of this specification, specific features, structures, materials or characteristics may be combined in an appropriate manner in any one or more embodiments or examples.

[0103] It should be understood that, although the various steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, the order of implementation of these steps is not limited to the order indicated by the arrows. Unless otherwise clearly stated herein, in some implementation scenarios of the embodiments of the present application, the steps in each process can be performed in other orders as required. Moreover, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on actual implementation scenarios. Some or all of these sub-steps or stages may be executed at the same time, or may be executed at different times in different scenarios at the execution time. The execution order of these sub-steps or stages may be flexibly configured as required, and the embodiments of the present application do not limit this.

[0104] The above is only part of the implementation methods of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the technical concept of the solution of the present application, other similar implementation methods based on the technical ideas of the present application also fall within the protection scope of the embodiments of the present application.

Claims

1. A display panel, characterized in that: include: at least one light shielding structure, disposed on one side of the substrate; At least one thin film transistor, each thin film transistor being configured with a light-shielding structure, the thin film transistor being disposed on a side of the light-shielding structure away from the substrate, the orthographic projection of the light-shielding structure on the substrate covering the orthographic projection of the active layer of the corresponding thin film transistor on the substrate; each light-shielding structure being configured to receive an independent adjustment signal to adjust the threshold voltage of the corresponding thin film transistor; comprising a display area and a non-display area surrounding the display area; The light shielding structure is electrically connected to a pad provided in the non-display area, and the pad is used to transmit the adjustment signal to the light shielding structure; The thin film transistor further includes: a first source-drain electrode and a second source-drain electrode, which are arranged on a side of the active layer away from the substrate and are respectively connected to the active layer through via holes; One end of the light-shielding structure is connected to one end of a connecting wire via a via hole, and the other end of the connecting wire is connected to the pad. The connecting wire is provided on the same layer as the first source and drain and the second source and drain.

2. The display panel according to claim 1, wherein: The pad is disposed in a binding area of ​​the non-display area.

3. The display panel according to claim 2, wherein: The binding area includes a data binding area and a driver binding area. Along the extension direction of the data binding area, the driver binding area is provided on both sides of the data binding area.

4. The display panel according to claim 3, wherein: The pad is a dummy pad provided in the driving binding area.

5. The display panel according to claim 1, wherein: The orthographic projection of the light-shielding structure on the substrate covers the orthographic projection of at least one of the first source and drain and the second source and drain on the substrate.

6. A display device, characterized in that: include: The display panel according to any one of claims 1 to 5.

7. The display device according to claim 6, wherein: The shading structure of the display panel is electrically connected to the control device.

8. A control method for a display panel according to any one of claims 1 to 5, characterized in that: include: collecting a threshold voltage of at least one thin film transistor in a display panel; If the threshold voltage of the thin film transistor is outside the set voltage range, an adjustment signal is input to the light shielding structure corresponding to the thin film transistor so that the threshold voltage of the thin film transistor is within the set voltage range.

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