Electroluminescent display device and driving method thereof

Abstract

An electroluminescent display device includes: pixels, including a driving element that generates a driving current; data lines, connected to the pixels to transmit a data voltage required to generate the driving current; reference voltage lines, connected to the pixels to transmit a first reference voltage and / or a second reference voltage required to generate the driving current; and a driving and sensing circuit, configured to integrate the driving current input through the reference voltage line, output the integration result to the data line, reduce the voltage of the data line from the data voltage to a shutdown voltage for shutting down the driving element, and detect the shutdown voltage of the driving element from the data line.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2021-0069418, filed on May 28, 2021, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to an electroluminescent display device and a driving method thereof. Background Art

[0004] In an electroluminescent display device having an active matrix form, a plurality of pixels each including a light emitting device and a driving element are arranged in a matrix type, and the brightness of an image realized by the pixel is adjusted based on the grayscale of the image data. The driving element controls the pixel current flowing in the light emitting device based on the voltage applied between its gate and source (hereinafter referred to as the gate-source voltage). The amount of light emitted by the light emitting device and the brightness of the screen are determined based on the pixel current.

[0005] Since the threshold voltage of the driving element determines the driving characteristics of the pixel, the threshold voltage should be the same in all pixels, but the driving characteristics between pixels may vary due to various reasons such as process characteristics and degradation characteristics. Such driving characteristic differences lead to brightness deviations, thus limiting the realization of desired images.

[0006] Compensation techniques for compensating for brightness deviations between pixels have been proposed, however, the compensation performance is not high due to noise occurring during the sensing process. Summary of the invention

[0007] In order to overcome the above problems of the prior art, the present disclosure may provide an electroluminescent display device and a driving method thereof for improving sensing performance and compensation performance.

[0008] To achieve these objectives and other advantages and in accordance with the purposes of the present disclosure, as specifically implemented and generally described herein, an electroluminescent display device includes: pixels, including a driving element that generates a driving current; data lines, connected to the pixels to transmit a data voltage required to generate the driving current; reference voltage lines, connected to the pixels to transmit a first reference voltage and / or a second reference voltage required to generate the driving current; and a driving and sensing circuit, configured to integrate the driving current input through the reference voltage line, output the integration result to the data line, reduce the voltage of the data line from the data voltage to a shutdown voltage for shutting down the driving element, and detect the shutdown voltage of the driving element from the data line.

[0009] In another aspect of the present disclosure, a driving method of an electroluminescent display device includes: supplying a data voltage required for generating a driving current to a data line connected to a pixel; supplying a first reference voltage and / or a second reference voltage required for generating the driving current to a reference voltage line connected to the pixel; integrating the driving current input through the reference voltage line, outputting the integration result to the data line, reducing the voltage of the data line from the data voltage to a shutdown voltage for shutting down a driving element, and detecting the shutdown voltage of the driving element from the data line, the electroluminescent display device including a pixel, the pixel including a driving element generating the driving current. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present disclosure includes accompanying drawings to provide a further understanding of the present disclosure, which are incorporated into and constitute a part of the present application, and which illustrate embodiments of the present disclosure and are used together with the description to explain the principles of the present disclosure. In the accompanying drawings:

[0011] Figure 1 is a diagram showing an electroluminescent display device according to an embodiment of the present disclosure;

[0012] Figure 2 It is shown Figure 1 A diagram of an example of a pixel array included in a display panel of FIG. 1 ;

[0013] Figure 3 is a diagram showing a method for improving sensing performance based on a driving and sensing circuit in an electroluminescent display device according to an embodiment of the present invention;

[0014] Figure 4 It is shown Figure 3 A diagram of a first embodiment of a connection structure between a pixel and a driving and sensing circuit included in FIG.

[0015] Figure 5 When Figure 4 A waveform diagram of a pixel and a driving and sensing circuit performing a sensing operation;

[0016] FIG. 6A to FIG. 6C It is shown in Figure 5 In the initialization period, sensing period and sampling period, Figure 4 a diagram of the operation of a pixel and drive and sense circuits;

[0017] Figure 7 It is shown Figure 3 A diagram of a second embodiment of a connection structure between pixels and driving and sensing circuits included in FIG.

[0018] Figure 8 When Figure 7 A waveform diagram of a pixel and a driving and sensing circuit performing a sensing operation;

[0019] Figures 9A to 9C It is shown in Figure 8 In the initialization period, sensing period and sampling period, Figure 7 a diagram of the operation of a pixel and drive and sense circuits;

[0020] Fig.10 It is shown Figure 3 A diagram of a third embodiment of a connection structure between a pixel and a driving and sensing circuit included in FIG.

[0021] Fig.11 When Fig.10 A waveform diagram of a pixel and a driving and sensing circuit performing a sensing operation;

[0022] Figures 12A to 12C It is shown in Fig.11 In the initialization period, sensing period and sampling period, Fig.10 Diagram of the operation of a pixel and the driving and sensing circuits. DETAILED DESCRIPTION

[0023] Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings showing exemplary embodiments of the present disclosure. However, the present disclosure can be implemented in a variety of different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided to make the present disclosure comprehensive and complete and to fully convey the concepts of the present disclosure to those skilled in the art.

[0024] The advantages and features of the present disclosure and the implementation methods thereof will be explained through the following embodiments described in conjunction with the accompanying drawings.In addition, the present disclosure is limited only by the scope of the claims.

[0025] The shapes, sizes, ratios, angles, and quantities disclosed in the drawings for describing the various embodiments of the present disclosure are merely exemplary, and the present disclosure is not limited thereto. The same reference numerals always refer to the same elements. Throughout the specification, the same reference numerals represent the same elements. As used herein, the terms "including", "having", and "comprising" etc. indicate that other components may be added, unless the term "only" is used. As used herein, the singular forms "a", "an", and "the" are intended to also include plural forms, unless the context clearly indicates otherwise.

[0026] Even if not explicitly described, elements in various embodiments of the present disclosure are construed as including an error range.

[0027] When describing a positional relationship, for example, when the positional relationship between two components is described as "on," "over," "below," and "beside," one or more components may be disposed between the two components unless "just" or "directly" is used.

[0028] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the present disclosure.

[0029] Throughout the specification, the same reference numerals refer to the same elements.

[0030] In the present specification, the pixel circuit provided on the substrate of the display panel may be implemented with a thin film transistor (TFT) having an n-type metal oxide semiconductor field effect transistor (MOSFET) structure, but is not limited thereto, and may be implemented with a TFT having a p-type MOSFET structure. The TFT may be a three-electrode element including a gate, a source, and a drain. The source may be an electrode that supplies carriers to the transistor. In the TFT, the carriers may flow from the source. The drain may be an electrode that enables the carriers to flow out of the TFT. That is, in the MOSFET, the carriers flow from the source to the drain. In an n-type TFT (NMOS), because the carriers are electrons, the source voltage may have a voltage lower than the drain voltage, so that the electrons flow from the source to the drain. In an n-type TFT, because the electrons flow from the source to the drain, the current may flow from the drain to the source. On the other hand, in a p-type TFT (PMOS), because the carriers are holes, the source voltage may be higher than the drain voltage, so that the holes flow from the source to the drain. In a p-type TFT, because holes flow from the source to the drain, current can flow from the source to the drain. It should be noted that the source and drain of a MOSFET are not fixed but switched between them. For example, the source and drain of a MOSFET can be switched between them.

[0031] Furthermore, in the present disclosure, the semiconductor layer of the TFT may be implemented with at least one of an oxide element, an amorphous silicon element, and a polysilicon element.

[0032] In the following description, when it is determined that the detailed description of related known functions or structures unnecessarily obscures the main points of the present disclosure, the detailed description will be omitted. Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0033] Figure 1 is a diagram showing an electroluminescent display device according to an embodiment of the present disclosure. Figure 2 It is shown Figure 1 A diagram of an example of a pixel array included in a display panel.

[0034] Reference Figure 1 and Figure 2The electroluminescent display device according to an embodiment of the present disclosure may include a timing controller 1, a display panel 10, a driver integrated circuit (IC) 20, a compensation IC 30, a host system 40, an access memory 50, and a power supply circuit 60. The gate driving circuit 15 included in the display panel 10 and the data driving circuit 25 embedded in the driver IC 20 may drive the pixels PXL included in the display panel 10.

[0035] The display panel 10 may include a plurality of pixel lines PNL1 to PNL4, and each of the pixel lines PNL1 to PNL4 may include a plurality of pixels PXL and a plurality of signal lines. The "pixel line" described herein may not be a physical signal line, and may represent a group of signal lines and pixels PXL that are adjacent to each other in the extension direction of the gate line. The signal line may include a plurality of data lines 140 for supplying display data voltages and sensing data voltages to the pixels PXL, a plurality of reference voltage lines 150 for supplying reference voltages to the pixels PXL, a plurality of gate lines 160 for supplying gate signals SCAN to the pixels PXL, and a plurality of first power lines PWL for supplying a first source voltage EVDD to the pixels PXL.

[0036] The pixels PXL of the display panel 10 may be arranged in a matrix type to constitute a pixel array. Figure 2 Each pixel PXL included in the pixel array may be connected to one of the data lines 140 , one of the reference voltage lines 150 , one of the first power lines PWL, and one of the gate lines 160 . Figure 2 Each pixel PXL included in the pixel array may be connected to a plurality of gate lines 160. Figure 2 Each pixel PXL included in the pixel array may also be supplied with a second source voltage from the power supply circuit 60. The power supply circuit 60 may supply the second source voltage to the pixel PXL through a low-level power supply line or a pad portion.

[0037] The timing controller 1 can generate a gate timing control signal for controlling the operation timing of the gate driving circuit 15 and a data timing control signal for controlling the operation timing of the data driving circuit 25 according to the timing signals (for example, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the dot clock signal DCLK, and the data enable signal DE) input from the host system 40.

[0038] The data timing control signal may include a source start pulse, a source sampling clock, and a source output enable signal, but is not limited thereto. The source start pulse may control the data sampling start timing of the drive voltage generating circuit. The gate timing control signal may include a gate start pulse and a gate shift clock, but is not limited thereto. The gate start pulse may be applied to a gate stage that generates a first gate output and may activate the operation of the gate stage. The gate shift clock may be input to the gate stage in common and may be a clock signal for shifting the gate start pulse.

[0039] The timing controller 1 can control the sensing driving timing and display driving timing of the pixel lines PNL1 to PNL4 of the display panel 10 based on a predetermined order, so that the display driving operation and the sensing driving operation can be implemented. The display driving operation and the sensing driving operation can be performed differently by the operation of the gate driving circuit 15 and the data driving circuit 25 based on the control of the timing controller 1.

[0040] The sensing drive may refer to an operation of applying a sensing data voltage to the pixels PXL included in the sensing target pixel line to sense a threshold voltage change of each corresponding pixel PXL and updating a compensation value for compensating for the threshold voltage change of each corresponding pixel PXL based on the sensing result data. In addition, the display drive may refer to an operation of correcting digital image data to be input to the corresponding pixel PXL based on the updated compensation value and applying a display data voltage corresponding to the corrected image data to the corresponding pixel PXL to display the input image on the screen (hereinafter referred to as screen reproduction).

[0041] The display driving operation may be performed in a vertical active period in which a data enable signal in one frame changes between a logic high level and a logic low level, and the sensing driving operation may be performed in a vertical blank period other than the vertical active period in one frame. In the vertical blank period, the data enable signal may continue to maintain a logic low level. The sensing driving operation may be performed in a power-on period after a system main power source is applied until before screen reproduction starts, or the sensing driving operation may be performed in a power-off period after screen reproduction ends until before the system main power source is released.

[0042] The gate driving circuit 15 may be embedded in the display panel 10. The gate driving circuit 15 may be disposed in a non-display area outside a display area where a pixel array is disposed. The gate driving circuit 15 may include a plurality of gate stages connected to a gate line 160 of the pixel array. The gate stage may generate a gate signal SCAN for controlling a switching element of the pixel PXL and may supply the gate signal SCAN to the gate line 160.

[0043] The data driving circuit 25 embedded in the driver IC 20 may include a plurality of driving and sensing circuits. Each of the driving and sensing circuits may generate a sensing data voltage required for sensing driving and a display data voltage required for display driving. Each of the driving and sensing circuits may be connected to the data line 140 and the reference voltage line 150, may supply a display data voltage or a sensing data voltage to the data line 140, and may supply a reference voltage input through the power supply circuit 60 to the reference voltage line 150. The display data voltage may be a digital-to-analog conversion result of the corrected image data input from the compensation IC 30, and may change the level of the display data voltage through the pixel circuit based on the grayscale value and the compensation value. According to the driving characteristics of the driving element that is changed based on the color realized by the light-emitting device of each pixel PXL, the sensing data voltage may be generated differently in the red (R) pixel, the green (G) pixel, the blue (B) pixel, and the white (W) pixel.

[0044] In display driving, a driving current may flow in a driving element of the pixel PXL based on a display data voltage and a reference voltage, and a light emitting device of the pixel PXL may emit light using the driving current, so that an image may be reproduced on a screen.

[0045] In the sensing drive, when the driving current flows in the driving element of the pixel PXL based on the sensing data voltage and the reference voltage, each of the driving and sensing circuits can integrate the driving current and can output the integration result to the data line 140, so that the voltage of the data line 140 can be reduced to a turn-off voltage lower than the sensing data voltage. The driving element can be turned off by the turn-off voltage of the data line 140, and then each of the driving and sensing circuits can detect the turn-off voltage of the data line 140. The turn-off voltage can be a standard for determining the threshold voltage of the driving element. In the sensing drive, the driving current flowing in the driving element may not contribute to the light emission of the light-emitting device, and can be applied only to the driving and sensing circuit through the reference voltage line 150. Therefore, in the sensing drive, the light-emitting device may not emit light.

[0046] Each of the driving and sensing circuits of the data driving circuit 25 may convert the detected threshold voltage of the driving element into digital sensing result data, and may supply the digital sensing result data to the access memory 50. The access memory 50 may be implemented as a flash memory, but is not limited thereto.

[0047] The compensation IC 30 may include a compensation circuit 31 and a compensation memory 32. The compensation memory 32 may transfer the digital sensing result data read from the access memory 50 to the compensation circuit 31. The compensation memory 32 may be a random access memory (RAM) (e.g., a double data rate synchronous dynamic RAM (DDR SDRAM), but is not limited thereto. The compensation circuit 31 may calculate a compensation offset and a compensation gain of each pixel based on the digital sensing result data, correct the digital image data input from the host system 40 based on the calculated compensation offset and compensation gain, and supply the corrected image data to the drive IC 20.

[0048] The power supply circuit 60 may generate a reference voltage required for generating a driving current, and may supply the reference voltage to the data driving circuit 25. The reference voltage may include a first reference voltage and / or a second reference voltage having different levels.

[0049] Figure 3 is a diagram illustrating a method for improving sensing performance based on driving and sensing circuits in an electroluminescent display device according to an embodiment of the present disclosure.

[0050] Reference Figure 3 , when the driving current flows in the driving element of the pixel PXL based on the sensing data voltage and the reference voltage in the sensing drive, the driving and sensing circuit 251 can constitute a feedback loop between the data line 140 and the reference voltage line 150, so that the gate-source voltage of the driving element can be reduced to the threshold voltage of the driving element in a short time. To this end, the driving and sensing circuit 251 can integrate the driving current and can output the integration result to the data line 140, so that the voltage of the data line 140 can be reduced to a turn-off voltage lower than the sensing data voltage, and the turn-off voltage can be detected. When the gate voltage of the driving element is changed from the sensing data voltage to the turn-off voltage based on the driving current, the source voltage of the driving element can maintain the reference voltage.

[0051] In addition, in order to detect the threshold voltage of the driving element, a method is known in which the gate voltage of the driving element is fixed to the sensing data voltage and the source voltage of the driving element is increased based on the driving current by using a source follower. This technology detects the voltage of the reference voltage line when the driving element is turned off. However, in such a technology, due to the parasitic capacitance of the reference voltage line connected to the source of the driving element, because the time taken until the driving element is turned off (hereinafter referred to as the sensing tack time) (i.e., the time taken to detect the threshold voltage of the driving element) is long, real-time sensing based on the vertical blank period is impossible.

[0052] On the other hand, in the following embodiments, by utilizing a feedback loop structure using a current integrator, the threshold voltage of the driving element can be quickly detected in a state where the influence of the parasitic capacitance of the reference voltage line is excluded. In the following embodiments, the current integrator can charge a feedback capacitor having a capacitance much smaller than the parasitic capacitance of the reference voltage line, so the sensing tact time can be greatly reduced. When the sensing tact time is reduced, real-time sensing and compensation can be performed, and the update period of the compensation value can be shorter, so the threshold voltage compensation performance of the driving element can be significantly improved.

[0053] [First embodiment]

[0054] Figure 4 It is shown Figure 3 FIG. 1 is a diagram of a first embodiment of a connection structure between pixels and driving and sensing circuits included in FIG.

[0055] Reference Figure 4 The pixel PXL may include a light emitting element EL, a driving element DT, switching elements ST1 and ST2, and a storage capacitor Cst. The driving element DT and the switching elements ST1 and ST2 may be implemented with NMOS transistors, but are not limited thereto.

[0056] The light emitting device EL may emit light using a driving current supplied from the driving element DT. The light emitting device EL may be implemented with an organic light emitting diode including an organic light emitting layer, or may be implemented with an inorganic light emitting diode including an inorganic light emitting layer. An anode of the light emitting device EL may be connected to the second node N2, and a cathode of the light emitting device EL may be connected to an input terminal of a second source voltage EVSS.

[0057] The driving element DT may generate a driving current based on its gate-source voltage. The gate of the driving element DT may be connected to the first node N1, the drain of the driving element DT may be connected to the input terminal of the high-level pixel voltage EVDD through the high-level power line PWL, and the source of the driving element DT may be connected to the second node N2.

[0058] The switching elements ST1 and ST2 may be turned on and may connect the gate of the driving element DT to the data line 140, connect the source of the driving element DT to the reference voltage line 150, and set the gate-source voltage of the driving element DT. The switching elements (e.g., the first switching element and the second switching element) ST1 and ST2 may be turned on based on the same gate signal SCAN.

[0059] The first switching element ST1 may be connected between the data line 140 and the first node N1, and may be turned on based on the gate signal SCAN from the gate line 160. The first switching element ST1 may be turned on in programming for display driving, and may also be turned on in sensing driving. When the first switching element ST1 is turned on, a sensing data voltage VSEN or a display data voltage VDIS may be applied to the first node N1. The gate of the first switching element ST1 may be connected to the gate line 160, the source of the first switching element ST1 may be connected to the data line 140, and the drain of the first switching element ST1 may be connected to the first node N1.

[0060] The second switching element ST2 may be connected between the reference voltage line 150 and the second node N2, and may be turned on based on the gate signal SCAN from the gate line 160. The second switching element ST2 may be turned on in programming for display driving and may apply the first reference voltage Vref to the second node N2. In sensing driving, the second switching element ST2 may be turned on, may apply the first reference voltage Vref to the second node N2, and may transmit the driving current generated by the driving element DT to the reference voltage line 150. The gate of the second switching element ST2 may be connected to the gate line 160, the drain of the second switching element ST2 may be connected to the second node N2, and the source of the second switching element ST2 may be connected to the reference voltage line 150.

[0061] The storage capacitor Cst may be connected between the first node N1 and the second node N2 and may store a gate-source voltage of the driving element DT.

[0062] Reference Figure 4 , the driving and sensing circuit 251 may be connected to the pixel PXL through the data line 140 and the reference voltage line 150 .

[0063] The driving and sensing circuit 251 may include a reference voltage output circuit VR, a digital-to-analog converter DAC, a first amplifier AMP1, a first capacitor C1, a second capacitor C2, a first switch SW1, a second switch SW2, a sampling switch SAM, and an analog-to-digital converter ADC.

[0064] The reference voltage output circuit VR may receive the first reference voltage Vref from the external power supply circuit 60 and may output the first reference voltage Vref. The reference voltage output circuit VR may be implemented with a voltage buffer.

[0065] The first switch SW1 may be connected between the reference voltage line 150 and the reference voltage output circuit VR. The first switch SW1 may be turned on in display driving and may be turned on in an initialization period of sensing driving, and may be turned off in a sensing period and a sampling period of sensing driving.

[0066] The digital-to-analog converter DAC may perform digital-to-analog conversion on the correction image data in display driving to generate a display data voltage. The digital-to-analog converter DAC may generate a sensing data voltage Vdata having a specific level in sensing driving.

[0067] The first amplifier AMP1 may include a first non-inverting input terminal (+) connected to the digital-to-analog converter DAC, a first output terminal connected to the data line 140, and a first inverting input terminal (−).

[0068] The first capacitor C1 may be connected between the first inverting input terminal (−) of the first amplifier AMP1 and the reference voltage line 150. The first capacitor C1 may fix the voltage of the reference voltage line 150 to the first reference voltage Vref in the sensing drive.

[0069] The second capacitor C2 may be connected between the output terminal of the first amplifier AMP1 and the reference voltage line 150. The second capacitor C2 may be used as a feedback capacitor for the current integrator. The capacitance of the second capacitor C2 may be one tenth to one hundredth smaller than the parasitic capacitance in the reference voltage line 150.

[0070] The second switch SW2 may be connected between the first inverting input terminal (-) and the output terminal of the first amplifier AMP1. The second switch SW2 may be used as a reset switch for the current integrator. The second switch SW2 may be turned on during the initialization period of the display drive and the sensing drive, and may be turned off during the sensing period and the sampling period of the sensing drive.

[0071] The second switch SW2 can be turned on, so the first amplifier AMP1 can be used as a voltage buffer in the display driving, and can buffer the display data voltage input through the first non-inverting input terminal (+) to output the buffered display data voltage to the data line 140.

[0072] When the second switch SW2 is turned on in the initialization period of the sensing drive, the first amplifier AMP1 may function as a voltage buffer and may buffer the sensing data voltage Vdata input through the first non-inverting input terminal (+) to output the buffered sensing data voltage to the data line 140. In addition, the second capacitor C2 may be initialized at the same time.

[0073] When the second switch SW2 is turned off in the sensing period of the sensing drive, the first amplifier AMP1 and the second capacitor C2 may function as a current integrator, and the driving current input through the reference voltage line 150 may be accumulated in the second capacitor C2. As the driving current is accumulated in the second capacitor C2, the voltage of the data line 140 may be reduced to a turn-off voltage for turning off the driving element DT.

[0074] The analog-to-digital converter ADC may detect a turn-off voltage of the driving element DT from the data line 140 and may analog-to-digital convert the turn-off voltage to output digital sensing data.

[0075] The sampling switch SAM may be connected between the data line 140 and the analog-to-digital converter ADC. The sampling switch SAM may be turned on only in a sampling period of the sensing drive, and may maintain an off state in other periods.

[0076] Figure 5 When Figure 4 Waveform diagram of the pixel and the driving and sensing circuits performing sensing operations. FIG. 6A to FIG. 6C It is shown in Figure 5 In the initialization period, sensing period and sampling period, Figure 4 Diagram of the operation of a pixel and the driving and sensing circuits.

[0077] Reference Figure 5 , in the sensing drive, a gate signal SCAN having an on level may be supplied to the gate line 160. When the first switching element ST1 and the second switching element ST2 are turned on in the scan-on period in which the gate signal SCAN has an on level, the gate of the driving element DT may be connected to the data line 140, and the source of the driving element DT may be connected to the reference voltage line 150. The scan-on period for the sensing drive may include an initialization period P1, a sensing period P2 after the initialization period P1, and a sampling period P3 after the sensing period P2.

[0078] Reference Figure 5 and Fig. 6A , in the initialization period P1, the first switch SW1 and the second switch SW2 may be turned on, and the sampling switch SAM may remain in an off state.

[0079] In the initialization period P1, the sensing data voltage Vdata may be supplied to the data line 140 and the gate of the driving element DT, and the first reference voltage Vref may be supplied to the reference voltage line 150 and the source of the driving element DT. At this time, the gate-source voltage "Vdata-Vref" of the driving element DT may be higher than the threshold voltage of the driving element DT, so the driving element DT may enter a conducting state.

[0080] Reference Figure 5 and Figure 6B , in the sensing period P2 , the first switch SW1 and the second switch SW2 may be turned off, and the sampling switch SAM may maintain an off state.

[0081] In the sensing period P2, A driving current Ipixel proportional to the square of can flow between the drain and source of the driving element DT. Here, The driving current Ipixel may be supplied to one electrode of the second capacitor C2 through the reference voltage line 150 .

[0082] As the driving current Ipixel accumulates in the second capacitor C2, the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT may be reduced from the sensing data voltage Vdata to the off voltage VOFF. When the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT are the off voltage VOFF, the driving element DT may be turned off, and the flow of the driving current Ipixel may be stopped.

[0083] In the sensing period P2 , the voltage V150 of the reference voltage line 150 and the source voltage VN2 of the driving element DT may maintain the first reference voltage Vref, and thus the sensing tact time may not be adversely affected by the parasitic capacitance of the reference voltage line 150 .

[0084] Reference Figure 5 and Figure 6C In the sampling period P3, the first switch SW1 and the second switch SW2 may maintain an off state, and the sampling switch SAM may be turned on.

[0085] In the sampling period P3, the analog-to-digital converter ADC may detect the off voltage VOFF from the data line 140. The difference between the off voltage VOFF and the first reference voltage Vref may be the threshold voltage of the driving element DT. Therefore, the off voltage VOFF can be used to determine the threshold voltage of the driving element DT. standards.

[0086] The level of the off voltage may vary based on the degree of degradation of the pixel PXL. Figure 5 In the embodiment, the level of the off voltage may be VOFF in the first pixel with a relatively small degree of degradation, and may be VOFF' which is higher than VOFF in the second pixel with a relatively large degree of degradation. In this case, the threshold voltage level of the first pixel may be The threshold voltage level of the second pixel may be also, Can be greater than Therefore, when the level of the off voltage is detected, the threshold voltage level of the corresponding pixel may be determined.

[0087] Furthermore, in the scan-on period for sensing driving, the light emitting device EL can be in a non-light emitting state, and thus the detection accuracy of the threshold voltage can be improved.

[0088] [Second embodiment]

[0089] Figure 7 It is shown Figure 3 FIG. 2 is a diagram of a second embodiment of a connection structure between pixels and driving and sensing circuits included in FIG.

[0090] Reference Figure 7 , the structure of the pixel PXL can be Figure 4 The descriptions are basically the same, so their repeated descriptions are omitted.

[0091] Reference Figure 7 , the driving and sensing circuit 251 may be connected to the pixel PXL through the data line 140 and the reference voltage line 150 .

[0092] The driving and sensing circuit 251 may include a digital-to-analog converter DAC, a second amplifier AMP2 , a third amplifier AMP3 , a third capacitor C3 , a fourth capacitor C4 , a third switch SW3 , a fourth switch SW4 , a sampling switch SAM and an analog-to-digital converter ADC.

[0093] The digital-to-analog converter DAC may perform digital-to-analog conversion on the correction image data in display driving to generate a display data voltage. The digital-to-analog converter DAC may generate a sensing data voltage Vdata having a specific level in sensing driving.

[0094] The second amplifier AMP2 may include a second non-inverting input terminal (+), a second output terminal connected to the data line 140, and a second inverting input terminal (-) connected to the second output terminal. The second amplifier AMP2 may be used as a voltage buffer in display driving and sensing driving.

[0095] The third switch SW3 can be connected between the digital-to-analog converter DAC and the second non-inverting input terminal (+) of the second amplifier AMP2. The third switch SW3 can be turned on in the display drive and can be turned on in the initialization period of the sensing drive. In addition, it can be turned off in the sensing period and sampling period of the sensing drive.

[0096] The third amplifier AMP3 may include a third non-inverting input terminal (+), a third inverting input terminal (-) connected to the reference voltage line 150, and a third output terminal connected to the first output node Na, and the second reference voltage Vinit is input from the power supply circuit 60 through the third non-inverting input terminal (+).

[0097] The fourth capacitor C4 and the fourth switch SW4 can be connected between the third inverting input terminal (-) and the third output terminal of the third amplifier AMP3. The fourth capacitor C4 can be used as a feedback capacitor for the current integrator. The capacitance of the fourth capacitor C4 can be one tenth to one hundredth smaller than the parasitic capacitance in the reference voltage line 150. The fourth switch SW4 can be used as a reset switch for the current integrator.

[0098] The fourth switch SW4 can be turned on in the initialization period of the display drive and the sensing drive, and can be turned off in the sensing period and the sampling period of the sensing drive. The fourth switch SW4 can be turned on, so the third amplifier AMP3 can be used as a voltage buffer in the display drive, so the reference voltage line 150 and the first output node Na can maintain the second reference voltage Vinit.

[0099] When the fourth switch SW4 is turned on in the initialization period of the sensing drive, the third amplifier AMP3 may function as a voltage buffer, and thus the reference voltage line 150 and the first output node Na may be initialized to the second reference voltage Vinit.

[0100] When the fourth switch SW4 is turned off in the sensing period of the sensing drive, the third amplifier AMP3 and the fourth capacitor C4 may function as a current integrator, and the driving current input through the reference voltage line 150 may be accumulated in the fourth capacitor C4. As the driving current accumulates in the fourth capacitor C4, the voltage of the first output node Na may decrease to the second reference voltage Vinit.

[0101] The third capacitor C3 may be connected between the second non-inverting input terminal (+) of the second amplifier AMP2 and the first output node Na. In the sensing period of the sensing drive, the third capacitor C3 may transmit the voltage change of the first output node Na based on the driving current to the data line 140 through the second amplifier AMP2. Based on the coupling through the third capacitor C3, the voltage of the data line 140 may be reduced to a turn-off voltage for turning off the driving element DT in the sensing period of the sensing drive.

[0102] The analog-to-digital converter ADC may detect a turn-off voltage of the driving element DT from the data line 140 and may analog-to-digital convert the turn-off voltage to output digital sensing data.

[0103] The sampling switch SAM may be connected between the data line 140 and the analog-to-digital converter ADC. The sampling switch SAM may be turned on only in a sampling period of the sensing drive, and may maintain an off state in other periods.

[0104] Figure 8 When Figure 7 Waveform diagram of the pixel and the driving and sensing circuits performing sensing operations. Figures 9A to 9C It is shown in Figure 8 In the initialization period, sensing period and sampling period, Figure 7 Diagram of the operation of a pixel and the driving and sensing circuits.

[0105] Reference Figure 8 , in the sensing drive, a gate signal SCAN having an on level may be supplied to the gate line 160. When the first switching element ST1 and the second switching element ST2 are turned on in the scan-on period in which the gate signal SCAN has an on level, the gate of the driving element DT may be connected to the data line 140, and the source of the driving element DT may be connected to the reference voltage line 150. The scan-on period for the sensing drive may include an initialization period P1, a sensing period P2 after the initialization period P1, and a sampling period P3 after the sensing period P2.

[0106] Reference Figure 8 and Fig.9A , in the initialization period P1, the third switch SW3 and the fourth switch SW4 may be turned on, and the sampling switch SAM may remain in an off state.

[0107] In the initialization period P1, the sensing data voltage Vdata may be supplied to the data line 140 and the gate electrode of the driving element DT, and the second reference voltage Vinit may be supplied to the reference voltage line 150 and the source of the driving element DT. At this time, the gate-source voltage "Vdata-Vinit" of the driving element DT may be higher than the threshold voltage of the driving element DT, so the driving element DT may enter a conducting state. In the initialization period P1, the voltage of the first output node Na may be the second reference voltage Vinit.

[0108] Reference Figure 8 and Fig. 9B , in the sensing period P2, the third switch SW3 and the fourth switch SW4 may be turned off, and the sampling switch SAM may maintain an off state.

[0109] In the sensing period P2, A driving current Ipixel proportional to the square of can flow between the drain and source of the driving element DT. Here, The driving current Ipixel may be supplied to one electrode of the fourth capacitor C4 through the reference voltage line 150 .

[0110] As the driving current Ipixel accumulates in the fourth capacitor C4, the voltage of the first output node Na may be gradually reduced from the second reference voltage Vinit. The voltage change of the first output node Na may be transmitted to the data line 140 through the third capacitor C3 and the second amplifier AMP2. The voltage V140 of the data line 140 may be reduced by the voltage change of the first output node Na. Therefore, the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT may be reduced from the sensing data voltage Vdata to the off voltage VOFF. When the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT are the off voltage VOFF, the driving element DT may be turned off, and the flow of the driving current Ipixel may be stopped.

[0111] In the sensing period P2 , the voltage V150 of the reference voltage line 150 and the source voltage VN2 of the driving element DT may maintain the second reference voltage Vinit, and thus the sensing tact time may not be adversely affected by the parasitic capacitance of the reference voltage line 150 .

[0112] Reference Figure 8 and Fig. 9C In the sampling period P3, the first switch SW1 and the second switch SW2 may maintain an off state, and the sampling switch SAM may be turned on.

[0113] In the sampling period P3, the analog-to-digital converter ADC may detect the off voltage VOFF from the data line 140. The difference between the off voltage VOFF and the second reference voltage Vinit may be the threshold voltage of the driving element DT. Therefore, the off voltage VOFF can be used to determine the threshold voltage of the driving element DT. standards.

[0114] The level of the off voltage may vary based on the degree of degradation of the pixel PXL. Figure 8 In the embodiment, the level of the off voltage may be VOFF in the first pixel with a relatively small degree of degradation, and may be VOFF' which is higher than VOFF in the second pixel with a relatively large degree of degradation. In this case, the threshold voltage level of the first pixel may be The threshold voltage level of the second pixel may be also, Can be greater than Therefore, when the level of the off voltage is detected, the threshold voltage level of the corresponding pixel may be determined.

[0115] Furthermore, in the scan-on period for sensing driving, the light emitting device EL can be in a non-light emitting state, and thus the detection accuracy of the threshold voltage can be improved.

[0116] [Third embodiment]

[0117] Fig.10 It is shown Figure 3 FIG. 3 is a diagram of a third embodiment of a connection structure between pixels and driving and sensing circuits included in FIG.

[0118] Reference Fig.10 , the structure of the pixel PXL can be Figure 4 The descriptions are basically the same, so their repeated descriptions are omitted.

[0119] Reference Fig.10 , the driving and sensing circuit 251 may be connected to the pixel PXL through the data line 140 and the reference voltage line 150 .

[0120] and Figure 4 Compared with the driving and sensing circuit 251, the difference is Fig.10 The driving and sensing circuit 251 may further include a current buffer CBuF connected between the reference voltage line 150 and the second output node Nb. The current buffer CBuF may separate the load to prevent the noise included in the driving current from being amplified by the current integrator, so that the reference voltage line 150 is not directly connected to the feedback capacitor C6 of the current integrator. The current buffer CBuF may remove the noise component included in the driving current, and may supply the driving current from which the noise is removed to the feedback capacitor C6 of the current integrator.

[0121] To provide a detailed description, the driving and sensing circuit 251 may include a reference voltage output circuit VR, a digital-to-analog converter DAC, a fourth amplifier AMP4, a fifth capacitor C5, a sixth capacitor C6, a fifth switch SW5, a sixth switch SW6, a sampling switch SAM, an analog-to-digital converter ADC and a current buffer CBuF.

[0122] The reference voltage output circuit VR may receive the first reference voltage Vref from the external power supply circuit 60 and may output the first reference voltage Vref. The reference voltage output circuit VR may be implemented with a voltage buffer.

[0123] The fifth switch SW5 may be connected between the second output node Nb and the reference voltage output circuit VR. The fifth switch SW5 may be turned on in display driving and may be turned on in an initialization period of sensing driving, and may be turned off in a sensing period and a sampling period of sensing driving.

[0124] The digital-to-analog converter DAC may perform digital-to-analog conversion on the correction image data in display driving to generate a display data voltage. The digital-to-analog converter DAC may generate a sensing data voltage Vdata having a specific level in sensing driving.

[0125] The fourth amplifier AMP4 may include a fourth non-inverting input terminal (+) connected to the digital-to-analog converter DAC, a fourth output terminal connected to the data line 140 , and a fourth inverting input terminal (−).

[0126] The fifth capacitor C5 may be connected between the fourth inverting input terminal (-) of the fourth amplifier AMP4 and the second output node Nb. The fifth capacitor C5 may fix the voltage of the second output node Nb to the first reference voltage Vref in the sensing driving.

[0127] The sixth capacitor C6 may be connected between the fourth output terminal of the fourth amplifier AMP4 and the second output node Nb. The sixth capacitor C6 may be used as a feedback capacitor of the current integrator. The capacitance of the sixth capacitor C6 may be one tenth to one hundredth smaller than the parasitic capacitance in the reference voltage line 150.

[0128] The sixth switch SW6 can be connected between the fourth inverting input terminal (-) and the fourth output terminal of the fourth amplifier AMP4. The sixth switch SW6 can be used as a reset switch of the current integrator. The sixth switch SW6 can be turned on in the initialization period of the display drive and the sensing drive, and can be turned off in the sensing period and the sampling period of the sensing drive.

[0129] The sixth switch SW6 may be turned on, and thus the fourth amplifier AMP4 may be used as a voltage buffer in display driving and may buffer the display data voltage input through the fourth non-inverting input terminal (+) to output the buffered display data voltage to the data line 140 .

[0130] When the sixth switch SW6 is turned on in the initialization period of the sensing drive, the fourth amplifier AMP4 may function as a voltage buffer and may buffer the sensing data voltage Vdata input through the fourth non-inverting input terminal (+) to output the buffered sensing data voltage to the data line 140. In addition, the sixth capacitor C6 may be initialized at the same time.

[0131] When the sixth switch SW6 is turned off in the sensing period of the sensing drive, the fourth amplifier AMP4 and the sixth capacitor C6 may function as a current integrator, and the driving current input through the second output node Nb may be accumulated in the sixth capacitor C6. As the driving current accumulates in the sixth capacitor C6, the voltage of the data line 140 may be reduced to a turn-off voltage for turning off the driving element DT.

[0132] The analog-to-digital converter ADC may detect a turn-off voltage of the driving element DT from the data line 140 and may analog-to-digital convert the turn-off voltage to output digital sensing data.

[0133] The sampling switch SAM may be connected between the data line 140 and the analog-to-digital converter ADC. The sampling switch SAM may be turned on only in a sampling period of the sensing drive, and may maintain an off state in other periods.

[0134] The current buffer CBuF may be connected between the reference voltage line 150 and the second output node Nb. The current buffer CBuF may include a buffer transistor TR connected between the reference voltage line 150 and the second output node Nb, and includes a buffer amplifier AMP5. The buffer amplifier AMP5 may include: a fifth non-inverting input terminal (+) connected to the reference voltage line 150; a fifth inverting input terminal (-) through which the second reference voltage Vinit is input; and a fifth output terminal connected to the gate of the buffer transistor TR.

[0135] The second reference voltage Vinit may be higher than the first reference voltage Vref, so that the current buffer CBuF is continuously kept in the turned-on state in the scan-on period of the sensing driving.

[0136] Fig.11 When Fig.10 Waveform diagram of the pixel and the driving and sensing circuits performing sensing operations. Figures 12A to 12C It is shown in Fig.11 In the initialization period, sensing period and sampling period, Fig.10 Diagram of the operation of a pixel and the driving and sensing circuits.

[0137] Reference Fig.11 , in the sensing drive, a gate signal SCAN having an on level may be supplied to the gate line 160. When the first switching element ST1 and the second switching element ST2 are turned on in the scan-on period in which the gate signal SCAN has an on level, the gate of the driving element DT may be connected to the data line 140, and the source of the driving element DT may be connected to the reference voltage line 150. The scan-on period for the sensing drive may include an initialization period P1, a sensing period P2 after the initialization period P1, and a sampling period P3 after the sensing period P2.

[0138] Reference Fig.11 and Fig. 12A , in the initialization period P1, the fifth switch SW5 and the sixth switch SW6 may be turned on, and the sampling switch SAM may remain in an off state.

[0139] In the initialization period P1, the sensing data voltage Vdata may be supplied to the data line 140 and the gate of the driving element DT, and the second reference voltage Vinit may be supplied to the reference voltage line 150 and the source of the driving element DT. At this time, the gate-source voltage "Vdata-Vref" of the driving element DT may be higher than the threshold voltage of the driving element DT, so the driving element DT may enter a conducting state. In the initialization period P1, the voltage of the second output node Nb may be the first reference voltage Vref.

[0140] Reference Fig.11 and Fig. 12B , in the sensing period P2 , the fifth switch SW5 and the sixth switch SW6 may be turned off, and the sampling switch SAM may maintain an off state.

[0141] In the sensing period P2, A driving current Ipixel proportional to the square of can flow between the drain and source of the driving element DT. Here, The driving current Ipixel may be supplied to one electrode of the sixth capacitor C6 through the reference voltage line 150 and the current buffer CBuF.

[0142] As the driving current Ipixel accumulates in the sixth capacitor C6, the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT may be reduced from the sensing data voltage Vdata to the off voltage VOFF. When the voltage V140 of the data line 140 and the gate voltage VN1 of the driving element DT are the off voltage VOFF, the driving element DT may be turned off and the flow of the driving current Ipixel may be stopped.

[0143] In the sensing period P2 , the voltage V150 of the reference voltage line 150 and the source voltage VN2 of the driving element DT may maintain the second reference voltage Vinit, and thus the sensing tact time may not be adversely affected by the parasitic capacitance of the reference voltage line 150 .

[0144] Reference Fig.11 and Fig. 12C , in the sampling period P3, the fifth switch SW5 and the sixth switch SW6 may maintain an off state, and the sampling switch SAM may be turned on.

[0145] In the sampling period P3, the analog-to-digital converter ADC may detect the off voltage VOFF from the data line 140. The difference between the off voltage VOFF and the second reference voltage Vinit may be the threshold voltage of the driving element DT. Therefore, the off voltage VOFF can be used to determine the threshold voltage of the driving element DT. standards.

[0146] The level of the off voltage may vary based on the degree of degradation of the pixel PXL. Fig.11 In the embodiment, the level of the off voltage may be VOFF in the first pixel with a relatively small degree of degradation, and may be VOFF' which is higher than VOFF in the second pixel with a relatively large degree of degradation. In this case, the threshold voltage level of the first pixel may be The threshold voltage level of the second pixel may be also, May be greater than Therefore, when the level of the off voltage is detected, the threshold voltage level of the corresponding pixel may be determined.

[0147] Furthermore, in the scan-on period for sensing driving, the light emitting device EL can be in a non-light emitting state, and thus the detection accuracy of the threshold voltage can be improved.

[0148] According to an embodiment of the present disclosure, according to a feedback loop structure based on a current integrator, the threshold voltage of a driving element can be quickly detected in a state where the influence of the parasitic capacitance of a reference voltage line is excluded. In an embodiment of the present disclosure, a current integrator can charge a feedback capacitor having a capacitance much smaller than the parasitic capacitance of a reference voltage line, thereby greatly reducing the sensing cycle time. When the sensing cycle time is reduced, real-time sensing and compensation can be performed, and the update period of the compensation value can be shortened, thereby greatly improving the threshold voltage compensation performance of the driving element.

[0149] The effects according to the present disclosure are not limited to the above examples, and other various effects may be included in the specification.

[0150] While the present disclosure has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the following claims.

Claims

1. An electroluminescent display device, comprising: A pixel including a driving element for generating a driving current; A data line connected to the pixel to transmit a data voltage required to generate the driving current; A reference voltage line connected to the pixel to transmit a first reference voltage and / or a second reference voltage required to generate the driving current; as well as a driving and sensing circuit configured to integrate the driving current input through the reference voltage line, output the integration result to the data line, reduce the voltage of the data line from the data voltage to a turn-off voltage for turning off the driving element, and detect the turn-off voltage of the driving element from the data line, Wherein, the driving and sensing circuit comprises: A reference voltage output circuit, configured to output the first reference voltage; A first switch connected between the reference voltage line and the reference voltage output circuit; a digital-to-analog converter configured to generate the data voltage; a first amplifier including a first non-inverting input terminal connected to the digital-to-analog converter, a first output terminal connected to the data line, and a first inverting input terminal; A first capacitor connected between the first inverting input terminal and the reference voltage line; a second capacitor connected between the first output terminal and the reference voltage line; a second switch connected between the first inverting input terminal and the first output terminal; an analog-to-digital converter configured to detect the off voltage of the driving element from the data line; and A sampling switch is connected between the data line and the analog-to-digital converter.

2. The electroluminescent display device according to claim 1, wherein: In a scan-on period, the gate of the driving element is connected to the data line, and the source of the driving element is connected to the reference voltage line, The scan-on period includes an initialization period, a sensing period after the initialization period, and a sampling period after the sensing period, In the initialization period, the first switch and the second switch are turned on, and the sampling switch is turned off. In the sensing period, the first switch, the second switch and the sampling switch are turned off, and During the sampling period, the first switch and the second switch are turned off, and the sampling switch is turned on.

3. The electroluminescent display device according to claim 1, wherein: The driving and sensing circuit forms a feedback loop between the data line and the reference voltage line.

4. An electroluminescent display device, comprising: A pixel including a driving element for generating a driving current; A data line connected to the pixel to transmit a data voltage required to generate the driving current; A reference voltage line connected to the pixel to transmit a first reference voltage and / or a second reference voltage required to generate the driving current; as well as a driving and sensing circuit configured to integrate the driving current input through the reference voltage line, output the integration result to the data line, reduce the voltage of the data line from the data voltage to a turn-off voltage for turning off the driving element, and detect the turn-off voltage of the driving element from the data line, Wherein, the driving and sensing circuit comprises: a digital-to-analog converter configured to generate the data voltage; a second amplifier including a second non-inverting input terminal, a second output terminal connected to the data line, and a second inverting input terminal connected to the second output terminal; a third switch connected between the digital-to-analog converter and the second in-phase input terminal; a third capacitor connected between the second non-inverting input terminal and the first output node; a third amplifier including a third non-inverting input terminal inputting the second reference voltage, a third inverting input terminal connected to the reference voltage line, and a third output terminal connected to the first output node; a fourth capacitor and a fourth switch connected in parallel between the third inverting input terminal and the third output terminal; an analog-to-digital converter configured to detect the off voltage of the driving element from the data line; and A sampling switch is connected between the data line and the analog-to-digital converter.

5. The electroluminescent display device according to claim 4, wherein: In a scan-on period, the gate of the driving element is connected to the data line, and the source of the driving element is connected to the reference voltage line, The scan-on period includes an initialization period, a sensing period after the initialization period, and a sampling period after the sensing period, In the initialization period, the third switch and the fourth switch are turned on, and the sampling switch is turned off. In the sensing period, the third switch, the fourth switch and the sampling switch are turned off, and In the sampling period, the third switch and the fourth switch are turned off, and the sampling switch is turned on.

6. The electroluminescent display device according to claim 4, wherein: The driving and sensing circuit forms a feedback loop between the data line and the reference voltage line.

7. An electroluminescent display device, comprising: A pixel including a driving element for generating a driving current; A data line connected to the pixel to transmit a data voltage required to generate the driving current; A reference voltage line connected to the pixel to transmit a first reference voltage and / or a second reference voltage required to generate the driving current; as well as a driving and sensing circuit configured to integrate the driving current input through the reference voltage line, output the integration result to the data line, reduce the voltage of the data line from the data voltage to a turn-off voltage for turning off the driving element, and detect the turn-off voltage of the driving element from the data line, Wherein, the driving and sensing circuit comprises: A reference voltage output circuit, configured to output the first reference voltage; a fifth switch connected between the second output node and the reference voltage output circuit; a digital-to-analog converter configured to generate the data voltage; a fourth amplifier comprising a fourth non-inverting input terminal connected to the digital-to-analog converter, a fourth output terminal connected to the data line, and a fourth inverting input terminal; a fifth capacitor connected between the fourth inverting input terminal and the second output node; a sixth capacitor connected between the fourth output terminal and the second output node; a sixth switch connected between the fourth inverting input terminal and the fourth output terminal; a current buffer connected between the reference voltage line and the second output node; an analog-to-digital converter configured to detect the off voltage of the driving element from the data line; and A sampling switch is connected between the data line and the analog-to-digital converter.

8. The electroluminescent display device according to claim 7, wherein: The current buffer comprises: a buffer transistor connected between the reference voltage line and the second output node; and The buffer amplifier includes a fifth non-inverting input terminal connected to the reference voltage line, a fifth inverting input terminal through which the second reference voltage is input, and a fifth output terminal connected to the gate of the buffer transistor.

9. The electroluminescent display device according to claim 8, wherein: In a scan-on period, the gate of the driving element is connected to the data line, and the source of the driving element is connected to the reference voltage line, The scan-on period includes an initialization period, a sensing period after the initialization period, and a sampling period after the sensing period, In the initialization period, the fifth switch and the sixth switch are turned on, and the sampling switch is turned off. In the sensing period, the fifth switch, the sixth switch and the sampling switch are turned off, and In the sampling period, the fifth switch and the sixth switch are turned off, and the sampling switch is turned on.

10. The electroluminescent display device according to claim 9, wherein: The second reference voltage is higher than the first reference voltage, and The buffer transistor maintains a turned-on state in the scan-on period.

11. The electroluminescent display device according to claim 7, wherein: The driving and sensing circuit forms a feedback loop between the data line and the reference voltage line.

12. A driving method for an electroluminescent display device according to any one of claims 1, 4 and 7, wherein the electroluminescent display device comprises a pixel, and the pixel comprises a driving element generating a driving current, and the driving method comprises: supplying a data voltage required to generate the driving current to a data line connected to the pixel; supplying a first reference voltage and / or a second reference voltage required to generate the driving current to a reference voltage line connected to the pixel; integrating the driving current input through the reference voltage line, outputting the integration result to the data line, reducing the voltage of the data line from the data voltage to a turn-off voltage for turning off the driving element, and The off voltage of the driving element is detected from the data line.

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