A method for updating the firmware of a solid-state drive without interrupting services

By designing hardware modules in a solid-state drive to receive read and write commands and cache these commands, combining multiple firmware slot recycling and processor sleep technology, the problem of SSDs interrupting business when updating firmware is solved, firmware updates that do not interrupt business are achieved, and the risk of update failure is reduced.

CN115454477BActive Publication Date: 2025-06-27SHANDONG SINOCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202211185772.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-09-28
Publication Date
2025-06-27
Estimated Expiration
2042-09-28

AI Technical Summary

Technical Problem

Existing solid-state drives need to interrupt business when updating firmware, which cannot meet the needs of uninterrupted business upgrades, and the original firmware may be lost when updating firmware fails.

Method used

By designing a hardware module to receive read and write commands sent by the host and cache these commands in memory, ensuring that the commands can be received normally when the firmware is updated. At the same time, multiple firmware slots are used to cycle. After downloading new firmware, update the slot number used for the next startup, and let the processor sleep before the firmware update, reducing the risk of update failure.

Benefits of technology

Achieves firmware updates that do not interrupt business, reduce the risk of update failures, and retains the original firmware by recycling the firmware slots to avoid the issue of firmware loss due to update failures.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a method for updating the firmware of a solid-state drive without interrupting services. The obtained commands are placed in the memory to ensure that read and write commands can be normally received during firmware update, thus achieving an upgrade without interrupting services. And during the upgrade, multiple firmware slots are used in a cyclic manner to ensure that even if the upgrade fails, the original firmware can be retained, effectively preventing the problem that the original firmware is lost due to upgrade failure. In addition, after the new firmware is downloaded, the slot number used for the next startup and operation is updated to further ensure the integrity of the firmware upgrade. Secondly, before the firmware update, the present invention adopts a method of putting the processor into sleep, which greatly reduces the risk of firmware update failure.
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Description

Technical Field

[0001] The present invention relates to a method for updating the firmware of a solid-state drive without interrupting the service, belonging to the technical field of solid-state drives. Background Art

[0002] For a solid-state drive applied to a data center, when there is a need to update the firmware, it is expected that the upgrade can be performed without interrupting the service, which can reduce the time occupied by the firmware update, improve the utilization rate, and also ensure that the service is not interrupted during the firmware update, reducing the impact brought by the firmware update. However, the traditional upgrade method requires interrupting the service and then updating the firmware, which cannot meet the requirements of such usage scenarios. Summary of the Invention

[0003] The object of the present invention is to provide a method for updating the firmware of a solid-state drive without interrupting the service, which realizes the upgrade without interrupting the service and reduces the risk of firmware update failure.

[0004] To achieve the above object, the present invention is realized through the following technical solutions:

[0005] S01) Receive the command to upgrade the firmware without interrupting the service, check the legality of the firmware, detect the slot used by the current firmware, download the firmware to the next free slot, and the slots are used in a cyclic manner and a non-volatile medium is used;

[0006] S02) After the download is successful, update the slot number for the next startup and operation; set the flag for upgrading the firmware without interrupting the service and store it in a fixed memory address;

[0007] S03) Turn on the hardware module to maintain the normal connection of the data link, receive commands, receive read / write command requests, and store them in a fixed memory address;

[0008] S04) The main processor sets the synchronization interaction request flag for each processor and saves the main processor context to a specific memory address;

[0009] S05) After other processors detect the synchronization interaction request flag, save the context for processing read / write commands, store it in a fixed memory in a fixed format, set the synchronization request response flag, and at the same time execute the processor sleep instruction to enter the sleep state;

[0010] S06) After the main processor detects that all other processors have returned the synchronization response requests, reload the first-stage boot program. After the first-stage boot program loads the new firmware according to the startup and operation slot number, wake up each processor in the sleep state and boot each processor to run the new firmware;

[0011] S07) After the new firmware is started, detect the flag for non-disruptive service upgrade. After detecting the flag for non-disruptive service upgrade, restore the context saved in the previous steps S04 and S05 from a specific memory.

[0012] S08) Clear the flag for non-disruptive service upgrade firmware, close the hardware receive command module, and process the read / write commands that have been received and placed in the fixed memory by this hardware module; the non-disruptive service firmware update is completed.

[0013] Preferably, the implementation method of the hardware module in step S03 is as follows:

[0014] The hardware module receives the data parsed by the link processing module. According to the data content, it identifies whether it is a host command. If it is a host command, it raises the enable signal for pushing the command into the hardware queue. The hardware module detects the enable signal for pushing the command, checks the head and tail pointers of the hardware queue. If there is a position in the hardware queue, it executes the action of pushing the command. Otherwise, it maintains the enable signal for pushing the command to ensure that a new command is pushed after waiting for the hardware queue to be idle.

[0015] Preferably, the depth of the hardware queue is defined by the parameters implemented by the hardware. When the tail pointer increases beyond the queue depth, it automatically returns to 0. When the queue is not full, the hardware continues to push host commands into the queue.

[0016] Preferably, the condition for the hardware queue to be empty is that the head pointer is equal to the tail pointer, and the condition for the hardware queue to be full is that the head pointer is equal to the tail pointer plus 1, and the number of host commands in the queue is less than the queue size when full.

[0017] Preferably, the storage location of the command queue is configured through hardware parameters. Modify the configuration register to set the base address of the hardware queue, including the internal buffer area and the external memory area of the hardware.

[0018] The advantages of the present invention are as follows: A hardware module receives the read / write commands sent by the host to the solid-state drive and places the obtained commands in the memory to ensure that read / write commands can be normally received during firmware update, thereby realizing non-disruptive service upgrade. And during the upgrade, multiple firmware slots are used for cyclic operation to ensure that even if the upgrade fails, the original firmware can be retained, effectively preventing the problem that the original firmware is lost due to upgrade failure. In addition, after downloading the new firmware, update the slot number used for the next startup and operation, further ensuring the integrity of the firmware upgrade. Secondly, before firmware update, the present invention adopts the method of putting the processor into sleep mode, greatly reducing the risk of firmware update failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention.

[0020] Figure 1 It is a schematic diagram of the process structure of the present invention.

[0021] Figure 2 It is a schematic diagram of the state machine for the operation of the hardware module.

[0022] Figure 3 It is a schematic diagram of the hardware queue structure.

[0023] Figure 4 It is a schematic diagram of the implementation block of the hardware module;

[0024] Figure 5 It is a schematic diagram of the result of the activated slot number; Detailed implementation manners

[0025] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts belong to the scope of protection of the present invention.

[0026] When the present invention updates the firmware, a hardware module is designed to receive the read and write commands sent by the host to the solid-state drive and place the obtained commands in the memory to ensure that the read and write commands can be normally received during the firmware update, thereby realizing the upgrade without interrupting the service. And during the upgrade, multiple firmware slots are used for cyclic operation to ensure that even if the upgrade fails, the original firmware can be retained, effectively preventing the problem that the original firmware is lost due to the upgrade failure. In addition, after the new firmware is downloaded, the slot number used for the next startup and operation is updated to further ensure the integrity of the firmware upgrade. Secondly, before the firmware update, the present invention adopts the method of putting the processor into sleep, which greatly reduces the risk of firmware update failure.

[0027] The startup steps are as follows:

[0028] S01) Receive the command to upgrade the firmware without interrupting the service; check the legality of the firmware, detect the slot used by the current firmware, and download the firmware to the next idle slot. The slots are used in a cyclic manner and non-volatile media is used.

[0029] Multiple firmware slots are used cyclically to ensure that even if the upgrade fails, the original firmware can be retained, effectively preventing the problem of the original firmware being lost due to a failed upgrade. At the same time, it can also ensure wear leveling of non-volatile media and extend the service life of non-volatile media. The firmware slots and the activated firmware slot numbers are stored separately. Only after downloading the firmware slots is the activated firmware slot number modified. Both the activated slot number and the firmware slots use integrity verification algorithms to ensure data integrity. Each firmware slot uses double backup, and only after the double backup is completely written will the activation of the slot number be updated. The activated slot number is also stored in a double-backup manner to ensure that the original firmware can be started normally even if an exception occurs during the update of the slot. At the same time, even if a part of the non-volatile media is damaged or a certain slot is damaged, this separate storage method can ensure that the damaged area can be skipped through the control of the slot number. This further extends the service life of the chip.

[0030] S02) After the download is successful, update the slot number for the next startup and operation; set the flag for upgrading the firmware without interrupting the service and store it in a fixed memory address.

[0031] S03) Turn on the hardware module to maintain the normal connection of the data link, receive commands, receive read / write command requests, and place them in a fixed memory address.

[0032] Use the hardware module to maintain the connection of the data link, receive the read / write commands sent by the host during the firmware upgrade process, store them in the memory, and mark the command cache status through the head and tail pointers, so as to achieve the function of uninterrupted service.

[0033] S04) The main processor sets the synchronization interaction request flag for each processor and saves its own context to a specific memory address.

[0034] After other processors detect the synchronization interaction request flag, they save the context for processing read / write commands, store it in a fixed memory in a fixed format, set the synchronization request response flag, and at the same time execute the processor sleep instruction to enter the sleep state to prevent problems from occurring during memory access operations during firmware updates.

[0035] S06) After the main processor detects that all other processors have returned the synchronization response requests, it reloads the FBL (the first-stage bootloader); after the FBL (the first-stage bootloader) loads the new firmware according to the slot number for startup and operation, it wakes up each processor in the sleep state and boots each processor to run the new firmware.

[0036] Compared with the traditional synchronization method, the method of using only one semaphore for synchronization additionally adds a response mechanism to ensure that the synchronization is completed only after all the synchronization requests of multiple processors have been responded to, further ensuring the synchronization of firmware updates. And after the processor task is executed, the processor is put into the sleep state, ensuring that the processor is not in the memory access operation, reducing part of the power consumption, and greatly reducing the risk of firmware update failure.

[0037] S07) After the new firmware is started, detect the set non-disruptive service upgrade flag. After detecting the non-disruptive service upgrade flag, restore the context saved in the previous steps S04 and S05 from a specific memory.

[0038] S08) After restoring the context, clear the flag for non-disruptive service upgrade firmware set in step S05, close the hardware receive command module in step S06, and process the read and write commands received and placed in the fixed memory by this hardware module; the non-disruptive service firmware update is completed.

[0039] Specifically, the implementation principle of the hardware module in step S03:

[0040] The hardware module receives the data parsed by the link processing module. According to the data content, it identifies whether it is a host command. If it is a host command, it raises the enable signal for pushing the command into the hardware queue. The hardware module detects the enable signal for pushing the command and checks the head and tail pointers of the hardware queue. If there is a position in the hardware queue, it executes the action of pushing the command. Otherwise, it maintains the enable signal for pushing the command to ensure that a new command is pushed only after the hardware queue is idle.

[0041] The working mode of the hardware queue is jointly maintained by software and hardware. The hardware is the producer of this queue, and the software is the consumer of this queue. The hardware uses the tail entry pointer to submit host commands to this queue, and the software obtains host commands from this queue through the head entry pointer.

[0042] The depth of the hardware queue is defined by the parameters implemented by the hardware and can hold several host commands. If the tail pointer increases beyond the queue depth, it automatically returns to 0. If the queue is not full, the hardware continues to push host commands into the queue.

[0043] The condition for the hardware queue to be empty is that the head pointer is equal to the tail pointer. The condition for the hardware queue to be full is that the head pointer is equal to the tail pointer plus 1, and the number of host commands in the queue (when full) is less than the size of this queue.

[0044] The storage location of the command queue can be flexibly configured through hardware parameters. The base address of the hardware queue can be set by modifying the configuration register. It can be placed in the internal cache area of the hardware or in the external memory area, providing more flexible usage, enhancing the ability to process commands normally, and ensuring that the hardware queue can cache host commands during the firmware upgrade process.

[0045] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for updating the firmware of a solid-state drive without interrupting services, characterized in that The specific steps are as follows: S01) The hardware module receives the command to continuously upgrade the firmware for the service, checks the legality of the firmware, detects the slot used by the current firmware, downloads the firmware to the next available slot, and the slots are used in a cyclic manner and non-volatile media is used; S02) After successful download, update the slot number for the next startup and operation; set the flag for non-interruptible service firmware upgrade and store it at a fixed memory address; S03) Enable the hardware module to maintain the normal connection of the data link, receive read / write command requests, and write them to a fixed memory address; S04) The main processor sets the synchronization interaction request flag for each processor and saves the main processor context to a specific memory address; S05) After other processors detect the synchronization interaction request flag, save the context for processing read / write commands, store it in a fixed memory in a fixed format, set the synchronization request response flag, and at the same time execute the processor sleep instruction to enter the sleep state; S06) After the main processor detects that all other processors have returned the synchronization response requests, load the first-stage boot program. The first-stage boot program loads the new firmware according to the slot number for startup and operation, wakes up each processor in the sleep state, and boots each processor to run the new firmware; S07) After the new firmware starts, detect the non-interruptible service upgrade flag. After detecting the non-interruptible service upgrade flag, restore the context saved in the previous steps S04 and S05 from a specific memory; S08) Clear the set flag for non-interruptible service firmware upgrade, close the hardware command receiving module, and process the read / write commands received and placed in the fixed memory by this hardware module. The non-interruptible service firmware update is completed.

2. The method for updating the firmware of the solid-state drive without interrupting services according to claim 1, wherein The implementation method of the hardware module in step S03 is as follows: The hardware module receives the data parsed by the link processing module. According to the data content, it identifies whether it is a host command. If it is a host command, it raises the enable signal for pushing the command into the hardware queue. The hardware module detects the enable signal for pushing the command, checks the head and tail pointers of the hardware queue. If there is a position in the hardware queue, it executes the action of pushing the command. Otherwise, it maintains the enable signal for this push command to ensure that a new command is pushed after waiting for the hardware queue to be idle.

3. The method for updating the firmware of the solid state drive without interrupting services according to claim 2, wherein The depth of the hardware queue is defined by the parameters implemented by the hardware. When the tail pointer increases beyond the queue depth, it automatically returns to 0. When the queue is not full, the hardware continues to push host commands into the queue.

4. The method for updating the firmware of the solid-state drive without interrupting services according to claim 2, wherein The condition for the hardware queue to be empty is that the head pointer is equal to the tail pointer. The condition for the hardware queue to be full is that the head pointer is equal to the tail pointer plus 1, and the number of host commands in the queue is less than the queue size when full.

5. The method for updating the firmware of the solid-state drive without interrupting services according to claim 3, wherein The storage location of the command is configured through hardware parameters. Modify the configuration register to set the base address of the hardware queue, including the internal buffer and external memory area of the hardware.