A power element
By placing the spike absorption capacitor between the upper and lower bridge arm switching devices in the power element, and using a parallel circuit design, the problems of low power element efficiency and high spike voltage are solved, achieving higher operating efficiency and reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SUZHOU XIZ TECH CO LTD
- Filing Date
- 2022-10-21
- Publication Date
- 2026-06-16
AI Technical Summary
Existing power components are inefficient in power electronic systems, and the high peak voltage of switching devices leads to reduced chip reliability.
Peak absorption capacitors are placed between the upper and lower bridge arm switching devices and between parallel chips. Inductance and voltage spikes are reduced through thermal insulation and parallel circuit design, thereby improving switching speed and reliability.
By reducing loop inductance, switching speed is increased, switching losses are reduced, chip spacing is increased to reduce thermal coupling effects, and the operating efficiency and mechanical reliability of power components are improved.
Smart Images
Figure CN115514206B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical technology, and more particularly to a power element. Background Technology
[0002] Power components are devices in an apparatus that reflect or detect the electrical power of a particular device or circuit. They are generally used in power electrical systems to form different circuit topologies and are the core components for realizing power conversion. To achieve higher power levels in power electronic systems, more switching devices are connected in parallel to achieve larger output current and power levels. Taking the basic unit of circuit topology, the half-bridge topology, as an example, each power device contains two chips. To reduce the main circuit size of the power component, a spike absorption capacitor is typically introduced on the component substrate, along with two switching devices connected in series to form a half-bridge circuit, and a capacitor connected in parallel with the two switching devices forming the half-bridge circuit.
[0003] In a typical half-bridge circuit formed by power components, the power loop consists of the half-bridge circuit and a spike absorption capacitor, with the spike absorption capacitor placed between the upper and lower switching devices (e.g., Figure 2 As shown in the diagram, this results in a longer power circuit and a larger corresponding circuit inductance. When the two switching devices operate as a half-bridge circuit, the voltage spikes generated when the power devices switch are higher, reducing the long-term reliability of the chip. To reduce these voltage spikes, it is generally necessary to reduce the current change rate of the power devices.
[0004] However, reducing the rate of change of current means that the switching speed of the switching devices slows down, leading to increased switching losses and reduced efficiency of power components in power electronic systems. Summary of the Invention
[0005] This application provides a power element that addresses the problem of low efficiency in power electronic systems. The technical solution provided in this application is as follows:
[0006] In a first aspect, this application provides a power element, including: an upper bridge arm switching device, a lower bridge arm switching device, a spike absorption capacitor, and an element substrate; wherein, the upper bridge arm switching device, the lower bridge arm switching device, and the spike absorption capacitor are mounted on the element substrate, and the upper bridge arm switching device and the lower bridge arm switching device are connected in series.
[0007] The upper bridge arm switching device is composed of two upper bridge arm switching transistor chips connected in parallel, and there is an envelope region between the two upper bridge arm switching transistor chips on the component substrate;
[0008] The lower bridge arm switching device is composed of two lower bridge arm switching transistor chips connected in parallel;
[0009] The spike absorption capacitor is located between the upper bridge arm switch and the lower bridge arm switch, and the mounting position of the spike absorption capacitor on the component substrate partially overlaps with the envelope region on the horizontal plane.
[0010] Optionally, when the upper bridge arm switching device or the lower bridge arm switching device is switched, a spike voltage will be generated across the positive and negative terminals of the switching device.
[0011] Accordingly, the spike absorption capacitor is used to absorb spike voltage when the upper bridge arm switching device or the lower bridge arm switching device is switched.
[0012] Optionally, the upper bridge arm switching chip includes a first chip and a second chip; the lower bridge arm switching chip includes a third chip and a fourth chip.
[0013] The first chip, the third chip, and the spike absorption capacitor constitute a first circuit;
[0014] The second chip, the fourth chip, and the spike absorption capacitor together form a second circuit.
[0015] Optionally, the first circuit and the second circuit are connected in parallel.
[0016] Optionally, the first loop and the second loop are symmetrical.
[0017] Optionally, a thermal insulation barrier is provided between the spike absorption capacitor and the first chip and the second chip.
[0018] Optionally, the thermal insulation partition refers to a partial partition.
[0019] Optionally, the chip impedance of the two upper bridge arm switching transistors is the same as that of the two lower bridge arm switching transistors.
[0020] Optionally, the impedance ratio between the capacitance of the spike absorption capacitor and the impedance of the chip is between 5nF / 20mΩ and 100nF / 20mΩ.
[0021] Optionally, the two upper bridge arm switching transistor chips and the two lower bridge arm switching transistor chips include at least one of the following: insulated gate bipolar transistors and metal-oxide-semiconductor field-effect transistors.
[0022] The beneficial effects of this application are as follows: an upper bridge arm switching device, a lower bridge arm switching device, a spike absorption capacitor, and a component substrate; wherein, the upper bridge arm switching device, the lower bridge arm switching device, and the spike absorption capacitor are mounted on the component substrate, and the upper bridge arm switching device and the lower bridge arm switching device are connected in series; the upper bridge arm switching device is composed of two upper bridge arm switching transistor chips connected in parallel, and there is an envelope region between the two upper bridge arm switching transistor chips on the component substrate; the lower bridge arm switching device is composed of two lower bridge arm switching transistor chips connected in parallel; the spike absorption capacitor is located between the upper bridge arm switching device and the lower bridge arm switching device, and the mounting position of the spike absorption capacitor on the component substrate partially overlaps with the envelope region on the horizontal plane. This can solve the problem of low efficiency of power components in power electronic systems. By placing the spike absorption capacitor between the two upper bridge arm switching transistor chips, the loop in the power component is reduced, thereby reducing the inductance. Without reducing the current rate in the loop, the switching speed of the switching device can be improved, thereby reducing the switching losses of the power component and improving the working efficiency of the power component in the power electronic system. Meanwhile, placing the spike absorption capacitor between the two upper bridge arm switching transistor chips can increase the distance between them, reduce the thermal coupling effect during operation, thereby lowering the operating temperature of the switching transistor chips and improving the mechanical reliability of the power components.
[0023] In addition, the first circuit is formed by the first chip, the third chip and the peak absorption capacitor; the second circuit is formed by the second chip, the fourth chip and the peak absorption capacitor. The first circuit and the second circuit are connected in parallel. On the one hand, the circuit length can be reduced, thereby reducing the inductance. On the other hand, connecting the first circuit and the second circuit in parallel can further reduce the inductance, thereby reducing the peak voltage.
[0024] In addition, a thermal insulation barrier is provided between the spike absorption capacitor and the first and second chips on the component substrate, which can reduce the impact of the heat generated by the first and second chips during operation on the spike absorption capacitor and improve the reliability of the spike absorption capacitor.
[0025] In addition, setting the impedance ratio between the capacitance of the peak absorption capacitor and the chip impedance to be between 5nF / 20mΩ and 100nF / 20mΩ can effectively suppress voltage spikes and improve the reliability of power components. Attached Figure Description
[0026] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0027] Figure 1 This is a circuit diagram of a conventional power element provided in one embodiment of this application;
[0028] Figure 2 This is a schematic diagram of the structure of a conventional power element provided in one embodiment of this application;
[0029] Figure 3 This is a circuit diagram of a power element provided in one embodiment of this application;
[0030] Figure 4 This is a schematic diagram of the structure of a power element provided in one embodiment of this application. Detailed Implementation
[0031] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. The application will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.
[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
[0033] In this application, unless otherwise stated, directional terms such as "upper," "lower," "top," and "bottom" are generally used in relation to the direction shown in the accompanying drawings, or in relation to the vertical, perpendicular, or gravitational direction of the component itself; similarly, for ease of understanding and description, "inner" and "outer" refer to the inner and outer contours of each component itself, but the above directional terms are not used to limit this application.
[0034] First, let me introduce some of the terms used in this application.
[0035] Peak voltage: In power electronic topology circuits, when a switching chip switches on and off, the current drops rapidly, and the voltage across the positive and negative terminals of the chip rises. At this time, due to the presence of the power circuit inductance, combined with the rapidly changing rate of current change, a higher peak voltage is generated across the chip.
[0036] In power components, large voltage spikes are generated during the switching process, subjecting the switching devices to high voltage stress. In severe cases, this can damage the switching devices, affecting the stability and safety of the power component. A schematic diagram of a typical existing power component is shown below. Figure 1 and Figure 2As shown, the capacitor is located in the middle of the two switching devices, and each switching device is composed of two switching transistor chips connected in parallel.
[0037] An Insulated Gate Bipolar Transistor (IGBT) is a composite, fully controllable, voltage-driven power semiconductor device composed of a Bipolar Junction Transistor (BJT) and an Insulated Gate Field-Effect Transistor (MOS). It combines the advantages of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) with the low on-state voltage drop of a Giant Transistor (GTR). GTRs have low saturation voltage and high current density, but require a large drive current; MOSFETs have very low drive power and fast switching speed, but a large on-state voltage drop and low current density. IGBTs combine the advantages of both devices, offering low drive power and low saturation voltage. They are ideally suited for applications in DC power conversion systems of 600V and above, such as AC motors, frequency converters, switching power supplies, lighting circuits, and traction drives. IGBTs are core components for energy conversion and transmission, commonly known as the "CPU" of power electronic devices. As a national strategic emerging industry, they are widely used in fields such as rail transit, smart grids, aerospace, electric vehicles, and new energy equipment.
[0038] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET): Generally, it is a metal-oxide-semiconductor field-effect transistor, or a metal-insulator-semiconductor transistor. G: Gate; S: Source; D: Drain. The source and drain of a MOSFET can be interchanged; they are both N-type regions formed in a P-type backgate. In most cases, these two regions are identical, and swapping them will not affect the device's performance. Such devices are considered symmetrical.
[0039] Impedance: In a circuit with resistance, inductance, and capacitance, the opposition to the flow of current is called impedance. Impedance is commonly represented by Z, a complex number. Its real part is called resistance, and its imaginary part is called reactance. The opposition of a capacitor to alternating current in a circuit is called capacitive reactance, and the opposition of an inductor to alternating current in a circuit is called inductive reactance. The combined opposition of capacitance and inductance to alternating current in a circuit is called impedance. The unit of impedance is the ohm. The concept of impedance exists not only in circuits but also in mechanical vibration systems.
[0040] Inductance: Inductance is a property of a closed circuit and a physical quantity. When current flows through a coil, it induces a magnetic field in the coil, which in turn generates an induced current that opposes the current flowing through the coil. It is a circuit parameter describing the induced electromotive force effect in the same coil or another coil caused by a change in coil current. Inductance is a general term for self-inductance and mutual inductance.
[0041] The power components provided in this application will be described in detail below.
[0042] like Figures 3 to 4 As shown, the power element provided in the embodiments of this application includes at least: an upper bridge arm switching device 110, a lower bridge arm switching device 120, a spike absorption capacitor 130, and a component substrate 140.
[0043] The upper bridge arm switch device 110, the lower bridge arm switch device 120 and the spike absorption capacitor 130 are mounted on the component substrate 140, and the upper bridge arm switch device 110 and the lower bridge arm switch device 120 are connected in series.
[0044] In this embodiment, the upper bridge arm switching device 110 is composed of two upper bridge arm switching transistor chips connected in parallel, and the lower bridge arm switching device 120 is composed of two lower bridge arm switching transistor chips connected in parallel. The chip types of the two upper bridge arm switching transistor chips and the two lower bridge arm switching transistor chips can be the same or different.
[0045] Optionally, the two upper bridge arm switching transistor chips and the two lower bridge arm switching transistor chips include at least one of the following: insulated gate bipolar transistors and metal-oxide-semiconductor field-effect transistors.
[0046] Optionally, the chip impedance of the two upper bridge arm switching transistors is the same as that of the two lower bridge arm switching transistors.
[0047] In this embodiment, the upper bridge arm switching device 110 and the lower bridge arm switching device 120 have the same structure. The upper bridge arm switching device 110 includes a first chip 1110 and a second chip 1120; correspondingly, the lower bridge arm switching device 120 includes a third chip 1130 and a fourth chip 1140.
[0048] refer to Figure 2In traditional power components, the mounting positions of the upper switching device, lower switching device, and capacitor are as follows: Figure 2 As shown (only the circuit layer is displayed), the long circuit between the upper and lower switching devices results in significant space wastage due to the single capacitor. Furthermore, the temperature of the internal switching transistors in both devices rises during operation. The close spacing between two parallel switching transistors within the same device leads to higher thermal resistance and thus higher chip temperatures, impacting long-term reliability.
[0049] In this embodiment, reference Figure 3 and Figure 4 The spike absorption capacitor 130 is located between the upper bridge arm switching device 110 and the lower bridge arm switching device 120, and there is an envelope region between the two upper bridge arm switching transistors on the component substrate 140. The mounting position of the spike absorption capacitor 130 on the component substrate 140 partially overlaps with the envelope region on the horizontal plane. In this way, on the one hand, the distance between the upper bridge arm switching device 110 and the lower bridge arm switching device 120 can be reduced, thus reducing the space wastage on the component substrate 140; on the other hand, the distance between the two upper bridge arm switching transistors can be increased, thereby reducing the thermal resistance of the two upper bridge arm switching transistors and lowering the operating temperature of the power device.
[0050] In addition, since the spike absorption capacitor 130 is mounted between the first chip 1110 and the second chip 1120, and the temperature of the first chip 1110 and the second chip 1120 will rise during operation, which will lead to a decrease in the reliability of the capacitor, in order to reduce the influence of the temperature of the first chip 1110 and the second chip 1120 on the spike absorption capacitor 130, a line groove is provided on the component substrate 140 between the spike absorption capacitor 130 and the first chip 1110 and the second chip 1120, so that the connecting metal line between the first chip 1110 and the second chip 1120 and the spike absorption capacitor 130 is narrow, thus forming a partially isolated heat insulation barrier.
[0051] For example: Reference Figure 4 Taking the heat insulation partition formed by partial partition as an example, the circuit board metal line between the first chip 1110 and the peak absorption capacitor 130 is recessed to partially isolate the first chip 1110 and the peak absorption capacitor 130; correspondingly, the circuit board metal line between the second chip 1120 and the peak absorption capacitor 130 is also recessed to partially isolate the second chip 1120 and the peak absorption capacitor 130.
[0052] When the upper arm switching device 110 or the lower arm switching device 120 is switched, the current in the power element decreases rapidly, and at the same time, the voltage across the positive and negative terminals of the chip in the upper arm switching device 110 or the lower arm switching device 120 rises. At this time, due to the presence of the loop inductance of the power element, combined with the rapidly changing rate of current change, a voltage spike is generated across the positive and negative terminals of the upper arm switching device 110. Based on this, the spike absorption capacitor 130 is used to absorb the voltage spike when the upper arm switching device 110 or the lower arm switching assembly 120 is switched.
[0053] In order to improve the absorption effect of the peak absorption capacitor 130 and effectively reduce voltage spikes, in this embodiment, the impedance ratio between the capacitance value of the peak absorption capacitor 130 and the chip impedance is between 5nF / 20mΩ and 100nF / 20mΩ.
[0054] In this embodiment, the peak voltage can be expressed by the following formula:
[0055]
[0056] In the formula, L is the inductance of the circuit of the power element. Where is the current rate, and Vspike is the peak voltage.
[0057] Because the upper and lower bridge arm switching transistors have voltage specifications, i.e. withstand voltage requirements, when the peak voltage Vspike is superimposed to exceed the voltage specification, it will lead to high voltage stress, which in turn will cause damage to the upper or lower bridge arm switching transistor.
[0058] Therefore, in this embodiment, a first circuit is formed by the first chip 1110, the third chip 1130, and the spike absorption capacitor 130; a second circuit is formed by the second chip 1120, the fourth chip 1140, and the spike absorption capacitor 130. The first and second circuits are connected in parallel. By connecting the first and second circuits in parallel, the inductance L in the circuit can be reduced, thereby reducing the spike voltage Vspike.
[0059] Optionally, the first loop and the second loop are symmetrical.
[0060] In summary, the power element provided in this embodiment includes: an upper bridge arm switching device, a lower bridge arm switching device, a spike absorption capacitor, and a component substrate. The upper bridge arm switching device, lower bridge arm switching device, and spike absorption capacitor are mounted on the component substrate, with the upper and lower bridge arm switching devices connected in series. The upper bridge arm switching device consists of two upper bridge arm switching transistors connected in parallel, with an envelope region between the two upper bridge arm switching transistors on the component substrate. The lower bridge arm switching device consists of two lower bridge arm switching transistors connected in parallel. The spike absorption capacitor is located between the upper and lower bridge arm switching devices, and its mounting position on the component substrate partially overlaps with the envelope region on a horizontal plane. This addresses the problem of low operating efficiency of the power element in the system. By placing the spike absorption capacitor between the two upper bridge arm switching transistors, the loop in the power element is reduced, thereby reducing inductance. Without reducing the current rate in the loop, the switching speed of the switching device can be increased, thus reducing the switching losses of the power element and improving its operating efficiency in power electronic systems. Meanwhile, placing the spike absorption capacitor between the two upper bridge arm switching transistor chips can increase the distance between them, reduce the operating temperature of the two upper bridge arm switching transistor chips, reduce losses, and improve the mechanical reliability of the power components.
[0061] In addition, the first circuit is formed by the first chip, the third chip and the peak absorption capacitor; the second circuit is formed by the second chip, the fourth chip and the peak absorption capacitor. The first circuit and the second circuit are connected in parallel. On the one hand, the circuit length can be reduced, thereby reducing the inductance. On the other hand, connecting the first circuit and the second circuit in parallel can further reduce the inductance, thereby reducing the peak voltage.
[0062] In addition, a thermal insulation barrier is provided between the spike absorption capacitor and the first and second chips on the component substrate, which can reduce the impact of the heat generated by the first and second chips during operation on the spike absorption capacitor and improve the reliability of the spike absorption capacitor.
[0063] In addition, setting the impedance ratio between the capacitance of the peak absorption capacitor and the chip impedance to be between 5nF / 20mΩ and 100nF / 20mΩ can effectively reduce voltage spikes and improve the reliability of power components.
[0064] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0065] Obviously, the embodiments described above are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, those skilled in the art can make other variations or modifications without creative effort, and all such variations or modifications should fall within the scope of protection of this application.
Claims
1. A power element, characterized in that, The power element includes: an upper bridge arm switching device, a lower bridge arm switching device, a spike absorption capacitor, and a component substrate; wherein, the upper bridge arm switching device, the lower bridge arm switching device, and the spike absorption capacitor are mounted on the component substrate, and the upper bridge arm switching device and the lower bridge arm switching device are connected in series. The upper bridge arm switching device is composed of two upper bridge arm switching transistor chips connected in parallel, and there is an envelope region between the two upper bridge arm switching transistor chips on the component substrate; The lower bridge arm switching device is composed of two lower bridge arm switching transistor chips connected in parallel; The spike absorption capacitor is located between the upper bridge arm switching device and the lower bridge arm switching device, and the mounting position of the spike absorption capacitor on the component substrate partially overlaps with the envelope region on the horizontal plane. The upper bridge arm switching transistor chip includes a first chip and a second chip; the lower bridge arm switching transistor chip includes a third chip and a fourth chip; the first chip, the third chip, and the spike absorption capacitor form a first circuit; the second chip, the fourth chip, and the spike absorption capacitor form a second circuit. A thermal insulation barrier is provided between the spike absorption capacitor and the first chip and the second chip.
2. The power element according to claim 1, characterized in that, When the upper bridge arm switching device or the lower bridge arm switching device is switched on, a spike voltage will be generated across the positive and negative terminals of the switching device. Accordingly, the spike absorption capacitor is used to absorb spike voltage when the upper bridge arm switching device or the lower bridge arm switching device is switched.
3. The power element according to claim 1, characterized in that, The first circuit and the second circuit are connected in parallel.
4. The power element according to claim 1, characterized in that, The first loop is symmetrical to the second loop.
5. The power element according to claim 1, characterized in that, The thermal insulation partition refers to a partial partition.
6. The power element according to claim 1, characterized in that, The chip impedance of the two upper bridge arm switching transistors is the same as that of the two lower bridge arm switching transistors.
7. The power element according to claim 6, characterized in that, The impedance ratio between the capacitance value of the spike absorption capacitor and the impedance of the chip is between 5nF / 20mΩ and 100nF / 20mΩ.
8. The power element according to claim 1, characterized in that, The two upper bridge arm switching transistor chips and the two lower bridge arm switching transistor chips include at least one of the following: insulated gate bipolar transistors and metal-oxide-semiconductor field-effect transistors.