Methods, devices, media, and terminals for transferring integrated circuit layout process information

By matching and replacing hierarchical information between wafer foundries, a target process layout is generated, solving the problem that layout data cannot be directly ported, and achieving efficient process porting and cost reduction.

CN115563924BActive Publication Date: 2026-06-30SHANGHAI ANLOGIC INFOTECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI ANLOGIC INFOTECH CO LTD
Filing Date
2022-10-09
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Inconsistent methods of representing integrated circuit layout layers between different wafer foundries make it impossible to directly transfer layout data, resulting in high redesign costs.

Method used

By acquiring and matching hierarchical information from different wafer foundries, converting it into language text format information, and replacing it, a target process layout is generated.

Benefits of technology

It enables rapid layout and process transfer, shortens design time, and reduces costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides a method, apparatus, medium, and terminal for transferring integrated circuit layout process information. The method includes: acquiring first-level information of each layer in a first layout and second-level information of each layer in a second layout; acquiring meaning information of the first-level information and the second-level information; matching the first-level information and the second-level information based on the meaning information to obtain multiple layer information pairs; exporting the first-level information as language text format information; matching the second-level information corresponding to the language text format information in the layer information pairs; replacing the language text format information according to the matched second-level information to obtain target text information; and generating a target process layout based on the target text information. This invention can quickly realize the process transfer of two integrated circuit layouts, improve layout transfer efficiency, and reduce costs.
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Citation Information

Patent Citations

  • Design method and device of layout of digital layout

    CN113792517A

  • Preparing device and translating device for circuit diagram

    JP1997016219A