Display panel and display device

Abstract

This application provides a display panel and a display device, relating to the field of display technology. The display panel includes a substrate and a driving circuit layer located on the substrate. The driving circuit layer includes a thin-film transistor (TFT) layer and an electrostatic shielding layer. The TFT layer includes a plurality of TFTs. The electrostatic shielding layer is located between the TFTs and the substrate, and the orthographic projection of the electrostatic shielding layer onto the substrate at least partially overlaps with the orthographic projection of at least one TFT onto the substrate. Applying a stable voltage to the electrostatic shielding layer enables electrostatic shielding, thereby protecting the TFTs and mitigating the impact of electrostatic charges from copper rod friction on the display panel performance.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically to a display panel and a display device having the display panel. Background Technology

[0002] With the continuous development of display technology, customers have increasingly higher performance requirements for display panels. Therefore, before the display panels leave the factory, a series of performance tests are conducted, such as the copper rod friction test. Specifically, the copper rod friction test involves using a copper rod to simulate a user's finger touching the display panel, and testing whether the static charge generated by the friction between the copper rod and the display panel affects the performance of the display panel. Currently, a green tinge has appeared on the display panels during the copper rod friction test.

[0003] Therefore, there is an urgent need to provide a new technical solution to improve the impact of static charge generated during copper rod friction testing on the performance of display panels. Summary of the Invention

[0004] A first aspect of this application provides a display panel including a substrate and a driving circuit layer located on the substrate. The driving circuit layer includes a thin-film transistor layer and an electrostatic shielding layer. The thin-film transistor layer includes a plurality of thin-film transistors. The electrostatic shielding layer is located between the thin-film transistor layer and the substrate, and the orthographic projection of the electrostatic shielding layer on the substrate at least partially overlaps with the orthographic projection of at least one thin-film transistor on the substrate.

[0005] In the above scheme, a stable voltage is configured on the electrostatic shielding layer, enabling the electrostatic shielding layer to effectively shield against static charges. Therefore, the portion where the electrostatic shielding layer overlaps with the thin-film transistor (TFT) spatially forms a protective film layer that protects the TFT, reducing the impact of static charges on the TFT performance and thus improving the greening phenomenon observed in the display panel during the copper rod friction test.

[0006] In conjunction with the first aspect, in some embodiments, the orthographic projection of the electrostatic shielding layer on the substrate covers the orthographic projection of at least one thin-film transistor on the substrate.

[0007] In the above scheme, the electrostatic shielding layer spatially covers the thin-film transistor, which can provide all-round protection for the side of the thin-film transistor facing the substrate, thereby effectively reducing the impact of electrostatic charge on the performance of the thin-film transistor.

[0008] In conjunction with the first aspect, in some embodiments, the electrostatic shielding layer includes a plurality of first signal lines and a plurality of second signal lines, the preset voltage of the first signal lines is a constant voltage, and the orthographic projection of the first signal lines on the substrate at least partially overlaps with the orthographic projection of at least one thin-film transistor on the substrate.

[0009] In the above scheme, the shielding of the first signal line against static charge is achieved by using a stable signal source in the display panel driving circuit, which eliminates the need for an external stabilizing signal and simplifies the design of the display panel.

[0010] In conjunction with the first aspect, in some embodiments, the first signal line includes a plurality of first sub-signal lines, wherein the orthographic projection of the first sub-signal lines on the substrate coincides with the orthographic projection of the thin-film transistor on the substrate, or the orthographic projection of the first sub-signal lines on the substrate covers the orthographic projection of the thin-film transistor on the substrate.

[0011] In the above scheme, the first signal line is configured with a structure with multiple branches, which not only enables the first signal line to flexibly protect multiple thin-film transistors, but also simplifies the design of the first signal line, thereby helping to reduce the layout of the display panel.

[0012] In conjunction with the first aspect, in some embodiments, the first signal line is configured to be connected to a power signal line, and the second signal line is configured to be connected to a data signal line.

[0013] In the above scheme, configuring the first signal line and the second signal line as relevant signal lines for driving the display panel can protect the thin-film transistor by utilizing the stability of the power signal line, while also not increasing the number of masking processes in the manufacturing process of the display panel.

[0014] In conjunction with the first aspect, in some embodiments, the plurality of thin-film transistors include a plurality of driving transistors, wherein the orthographic projection of at least one driving transistor on the substrate at least partially overlaps the orthographic projection of the first signal line on the substrate.

[0015] In the above solution, protecting the driving transistor can more effectively mitigate the impact of static charge on the display panel performance.

[0016] In conjunction with the first aspect, in some embodiments, the plurality of thin-film transistors further include a plurality of switching transistors, wherein the orthographic projection of at least one switching transistor on the substrate at least partially overlaps with the orthographic projection of the first signal line on the substrate. Further, the orthographic projection of the switching transistor connected to the gate of the driving transistor on the substrate at least partially overlaps with the orthographic projection of the first signal line on the substrate. Further, the first sub-signal line corresponding to the switching transistor is different from the first sub-signal line corresponding to the driving transistor.

[0017] In the above solution, both types of thin-film transistors included in the display panel are protected, which can more effectively reduce the impact of static charge on the performance of the display panel.

[0018] In conjunction with the first aspect, in some implementations, the driving transistor has a single-gate structure and the switching transistor has a dual-gate structure.

[0019] In the above scheme, setting the switching transistor as a dual-gate structure can reduce the impact of leakage current on the performance of the switching crystal, thereby improving the display effect of the display panel.

[0020] In conjunction with the first aspect, in some embodiments, the driving circuit layer further includes a conductive layer located on the side of the thin-film transistor layer opposite to the electrostatic shielding layer, and includes multiple third signal lines and multiple fourth signal lines. Further, the third signal lines are power signal lines, and the fourth signal lines are data signal lines.

[0021] In the above scheme, the electrostatic shielding layer and the conductive layer jointly transmit the power signal, which can reduce the resistance of the power signal transmission, thereby reducing the attenuation of the power signal line and improving the uniformity of the display panel.

[0022] In conjunction with the first aspect, in some embodiments, the driving circuit layer further includes a storage capacitor, which includes a first electrode and a second electrode disposed opposite to each other. The first electrode is on the same layer as the gate of the thin-film transistor, and the second electrode is located on the side of the conductive layer facing the electrostatic shielding layer. The electrostatic shielding layer also includes a connecting wire, one end of which is connected to an initialization signal line, and the other end of which is connected to the first electrode.

[0023] In the above scheme, the way the storage capacitor is set not only simplifies its connection with the power supply, but also eliminates the opening on the second electrode, thereby increasing the adjustment space of the second electrode area and thus increasing the adjustment margin of the storage capacitor area.

[0024] In conjunction with the first aspect, in some embodiments, the display panel further includes a display functional layer located on the side of the driving circuit layer opposite to the substrate. The display functional layer includes a plurality of light-emitting devices, each light-emitting device including an anode, and the orthographic projection of the anode of at least one light-emitting device onto the substrate falls within the orthographic projection of the conductive layer onto the substrate.

[0025] In the above solution, by increasing the surface area of ​​the conductive layer to spatially cover the anode, the flatness of the film layer beneath the anode can be improved, thereby enhancing the flatness of the anode and thus mitigating color shift issues in the display panel. Furthermore, the conductive layer not only participates in driving the display panel but also contributes to improving the flatness of the anode, achieving multiple functions and simplifying the display panel design.

[0026] In conjunction with the first aspect, in some embodiments, the third signal line includes a plurality of third sub-signal lines, the orthographic projection of the third sub-signal lines on the substrate covering the orthographic projection of the anode on the substrate; or, the fourth signal line includes a plurality of fourth sub-signal lines, the orthographic projection of the fourth sub-signal lines on the substrate covering the orthographic projection of the anode on the substrate.

[0027] In the above scheme, the third signal line and the fourth signal line are respectively set to a structure including multiple branches, which not only facilitates the design of improving the flatness of the anode, but also saves the layout of the display panel and simplifies the design of the driving circuit.

[0028] A second aspect of this application also provides a display device, which includes a display panel of any one of the first aspects described above.

[0029] In conjunction with the second aspect, in some embodiments, the display device includes a display area and a non-display area. The display area includes a first sub-display area and a second sub-display area, the first sub-display area being disposed around the second sub-display area, and the first sub-display area being provided with an electrostatic shielding layer.

[0030] In the above scheme, considering the diffusion of static charge along the outer edge of the display device, protecting the thin-film transistors in the display area near the outer edge of the display device can effectively improve the impact of static charge on the performance of the display device. Attached Figure Description

[0031] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below.

[0032] Figure 1 This is a layout diagram of a display panel according to an embodiment of this application.

[0033] Figure 2 Based on this application Figure 1 A cross-sectional view of the display panel at point M1N1.

[0034] Figure 3 This is a layout diagram of the electrostatic shielding layer of a display panel according to an embodiment of this application.

[0035] Figure 4 Based on this application Figure 1 A cross-sectional view of the display panel at point M2N2.

[0036] Figure 5 This is a layout view of the conductive layer of a display panel according to an embodiment of this application.

[0037] Figure 6 Based on this application Figure 1 A cross-sectional view of the display panel at point M3N3.

[0038] Figure 7 This is a layout view of the conductive layer and anode superimposed according to an embodiment of this application.

[0039] Figure 8 This is a 7T1C circuit diagram of a display panel according to an embodiment of this application.

[0040] Figure 9 This is a plan view of a display device according to an embodiment of the present application. Detailed Implementation

[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0042] In copper rod rubbing tests, after repeated rubbing of the glass substrate of the display panel with copper rods, a large amount of static charge accumulates on the glass substrate. This static charge is transferred along the outer edge of the display panel and eventually accumulates on the protective film of the display panel, which is positioned opposite the glass substrate. Therefore, an electric field is formed between the glass substrate and the protective film. This electric field affects the performance of the thin-film transistors (TFTs) in the display panel, causing shifts in the threshold voltage and source power supply voltage of the TFTs, thus resulting in a greenish tint on the screen during the copper rod rubbing test. Based on this, embodiments of this application provide a new display panel that protects the TFTs by providing an electrostatic shielding layer, thereby improving the greenish tint problem that occurs during the copper rod rubbing test.

[0043] This application provides a display panel, such as... Figure 1 , Figure 2 As shown, the display panel 10 includes a substrate 100 and a driving circuit layer 200 located on the substrate 100. The driving circuit layer 200 includes a thin-film transistor layer 210 and an electrostatic shielding layer 220. The thin-film transistor layer 210 includes a plurality of thin-film transistors 211. The electrostatic shielding layer 220 is located on the side of the thin-film transistor layer 210 facing the substrate 100, and the orthographic projection of the electrostatic shielding layer 220 on the substrate 100 at least partially overlaps with the orthographic projection of at least one thin-film transistor 211 on the substrate 100. By configuring a stable voltage on the electrostatic shielding layer 220, the electrostatic shielding layer 220 can effectively shield static charges. That is, the portion of the electrostatic shielding layer 220 that overlaps with the thin-film transistor 211 in space forms a protective film layer for protecting the thin-film transistor 211. This changes the state of the side of the thin-film transistor 211 facing the substrate 100 from having no protective film layer to having a protective film layer. This reduces the impact of static charges on the performance of the functional regions of the thin-film transistor 211 facing the substrate 100, namely the semiconductor channel region 2111, the source region 2112, and the drain region 2113. This reduces the impact of static charges generated by copper rod friction on the threshold voltage and source power supply voltage of the thin-film transistor 211, thereby improving the problem of greening of the screen.

[0044] As can be seen from the above description, the electrostatic shielding layer 220 can protect the main functional areas of the thin film transistor 211 in the direction from the substrate 100. According to the functional requirements of the display panel 10, the planar structure of the electrostatic shielding layer 220 can be designed to improve the flexibility of the electrostatic shielding layer 220 in the display panel 10.

[0045] In some embodiments, such as Figure 2 As shown, the electrostatic shielding layer 220 spatially covers the thin-film transistor layer 210, that is, the orthogonal projection of at least one thin-film transistor 211 on the substrate 100 falls within the orthogonal projection of the electrostatic shielding layer 220 on the substrate 100. This increases the coverage area of ​​the protective film layer formed by the electrostatic shielding layer 220 for the thin-film transistor 211, thereby enabling comprehensive protection of the side of the thin-film transistor 211 facing the substrate 100, and thus more effectively reducing the impact of electrostatic charge on the performance of the thin-film transistor 211.

[0046] There are various implementations for designing the electrostatic shielding layer 220 to protect the side of the thin-film transistor 211 facing the substrate 100. In some embodiments, such as... Figure 3 As shown, the electrostatic shielding layer 220 is not used as a single protective film layer, but also serves to drive certain signals to operate the display panel 10. Specifically, the electrostatic shielding layer 220 includes multiple first signal lines 221 and multiple second signal lines 222, which are respectively arranged throughout the entire surface of the display panel 10. The preset voltage of the first signal lines 221 is a constant voltage, and the preset voltage of the second signal lines 222 is a pulse voltage. That is, the stability of the preset voltage of the first signal lines 221 is greater than the stability of the preset voltage of the second signal lines 222. The first signal lines 221 with more stable preset voltages serve as a protective film layer for the thin-film transistors 211 that are spatially shielded. That is, the orthographic projection of the first signal lines 221 on the substrate 100 at least partially overlaps with the orthographic projection of at least one thin-film transistor 211 on the substrate 100. By using the first signal line 221 and the second signal line 222 as wires to connect and drive the display panel 10, and by enabling the first signal line 221 to shield static charge, a solution is achieved to protect the corresponding thin-film transistor 211. This simplifies the design of the display panel 10 and the design of the electrostatic shielding layer 220, thereby saving production costs.

[0047] Based on the design of the first signal line 221 and the second signal line 222 included in the electrostatic shielding layer 220 to drive the display panel 10, the first signal line 221 used to spatially shield the thin film transistor 211 can be further designed with reference to the layout design requirements and wiring design requirements of the display panel 10.

[0048] In some embodiments, such as Figure 3 The first signal line 221 is configured with multiple branches, which allows for flexible protection of more thin-film transistors 211. Specifically, the first signal line 221 includes multiple first sub-signal lines 2211. The orthographic projection of one of the first sub-signal lines 2211 used to protect the thin-film transistor 211 on the substrate 100 coincides with the orthographic projection of the corresponding thin-film transistor 211 on the substrate 100, or the orthographic projection of the first sub-signal line 2211 on the substrate 100 covers the orthographic projection of the corresponding thin-film transistor 211 on the substrate 100. This reduces wiring complexity and simplifies the scheme for the first signal line 221 to protect thin-film transistors 211 at multiple different locations.

[0049] Various signal lines are used to drive the display substrate, such as power signal lines, light emission control signal lines, data signal lines, reset control signal lines, and initialization signal lines. Based on the routing design of the various signal lines of the display panel 10 and the stability of the corresponding signal sources, the signal lines included in the electrostatic shielding layer 220 are further defined.

[0050] In some embodiments, such as Figure 2 and Figure 3 As shown, the first signal line 221 is electrically connected to the power signal line and has a relatively stable voltage, which can provide good electrostatic charge shielding. The second signal line 222 is connected to the data signal line and corresponds to a pulse signal. Thus, while using a stable power signal to protect the thin-film transistor 211 with the first signal line 221, the electrostatic shielding layer 220 is prepared without adding a masking step to the manufacturing process of the display panel 10, saving production costs.

[0051] Considering that the thin-film transistors 211 in the driving circuit of the display panel 10 are divided into different types with different functions, the thin-film transistors 211 of a certain type can be given priority protection based on the importance of the corresponding type of thin-film transistor 211 to the display effect of the display panel 10.

[0052] In some embodiments, such as Figure 1 and Figure 2As shown, the plurality of thin-film transistors 211 include a plurality of driving transistors 211A. The performance of the driving transistors 211A is related to the driving current flowing into the corresponding light-emitting devices in the display panel 10. The first signal line 221 spatially shields at least one driving transistor 211A. Specifically, the relationship between the orthographic projection of the driving transistor 211A on the substrate 100 and the orthographic projection of the corresponding first sub-signal line 2211 on the substrate 100 includes three embodiments: they at least partially overlap or coincide, or the former is covered by the latter. This protection of the driving transistors 211A can more effectively improve the effect of static charge on the display panel 10, that is, effectively improve the greening problem generated by the display device in the copper rod friction test.

[0053] In addition to the driving transistor 211A described above, the thin-film transistor 211 may include, in some embodiments, such as... Figure 1 and Figure 4 As shown, the plurality of thin-film transistors 211 also include a plurality of switching transistors 211B, and the first signal line 221 of the electrostatic shielding layer 220 protects not only the driving transistor 211A but also the switching transistors 211B, that is, the orthographic projection of at least one switching transistor 211B on the substrate 100 at least partially overlaps with the orthographic projection of the first signal line 221 on the substrate 100. In at least one embodiment, the orthographic projection of the switching transistor 211B connected to the gate of the driving transistor 211A on the substrate at least partially overlaps with the orthographic projection of the first signal line 221 on the substrate 100. This can further reduce the impact of electrostatic charge on the performance of the display panel.

[0054] There are various schemes for protecting the thin-film transistor from the first signal line. In some embodiments, such as... Figure 1 and 3 As shown, among the multiple first sub-signal lines 2211 included in the first signal line 221, two first sub-signal lines 2211 in different branch directions may partially overlap, coincide with, or cover the corresponding driving transistor 211A and switching transistor 211B in space. This protects both types of thin-film transistors 211 included in the display panel 10, more effectively reducing the impact of static charge on the display panel 10. In at least one embodiment, the first signal line 221 protects all driving transistors 211A and / or switching transistors 211B, meaning that it at least partially overlaps or covers them in space.

[0055] To better understand the protection of thin-film transistors in the drive circuit, a detailed explanation will be provided below using a conventional 7T1C circuit. Figure 2 , Figure 4 and Figure 6And the 7T1C circuit diagram, Figure 8 As shown, the driving circuit layer of the display panel includes seven thin-film transistors: a data writing transistor T1, a driving transistor T2, a compensation transistor T3, a first reset transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, and a second reset transistor T7. The driving transistor T2, compensation transistor T3, and first reset transistor T4 are protected by an electrostatic shielding layer 220. This design takes into account that the performance of the driving transistor T2 directly affects the stability of the driving current, thus directly affecting the display effect of the display panel. The compensation transistor T3 and the first reset transistor T4 are connected to the gate of the driving transistor T2 (i.e., the compensation transistor T3 and the first reset transistor T4 are switching transistors connected to the gate of the driving transistor), and the stability of their performance also affects the operation of the driving transistor T4. The working relationship between the thin-film transistors T2, T3, and T4 can be detailed in the following analysis.

[0056] Specifically, during the initialization phase, the light emission control signal EM on the light emission control line is high, and the first reset transistor T4 turns on in response to the low level of the signal SCAN1 on the second scan signal line, writing the initialization signal on the reference voltage signal line to the gate of the driving transistor T2, ensuring that the driving transistor T2 is in the on state at the initial moment of the next stage. During the data writing phase, the signal EM on the light emission control signal line is high, the signal SCAN1 on the second scan signal line is high, and the signal SCAN2 on the first scan signal line is low. The compensation transistor T3 turns on in response to the low level, writing the data signal Vdata on the data line to the gate of the driving transistor T2. During the light emission phase, the first light emission control transistor T5 and the second light emission control transistor T6 turn on in response to the low level of the light emission control signal EM, and the driving transistor T2 generates a driving current in response to the voltage of its gate, charging the first electrode, such as the anode, of the two light-emitting devices. Based on the above analysis, it can be seen that improving the stability of the performance of T3 and T4 among multiple switching transistors can also improve the stability of the driving transistor T4, thereby improving the stability of the display performance of the display panel. This argument has been confirmed in practice.

[0057] In some embodiments, such as Figure 1 As shown, the driving transistor 211A has a single-gate structure, and the switching transistor 211B has a double-gate structure. Based on the impact of leakage current on the performance of different types of thin-film transistors 211, the corresponding thin-film transistors 211 can be configured as single-gate or double-gate structures to reduce the impact of leakage current on the performance of the display panel. In at least one embodiment, referring to... Figure 8The compensation transistor T3 and the first reset transistor T4, which are connected to the gate of the driving transistor T2, can be configured as a dual-gate structure, which can further improve the performance stability of the display panel.

[0058] It should be understood that the type and number of thin-film transistors that spatially overlap with the electrostatic shielding layer in the display panel are not limited to the schemes in the above embodiments. They can be set for thin-film transistors in specific nodes in the driving circuit, and multiple thin-film transistors can include polysilicon transistors and oxide transistors. These can be limited according to the function of the display panel, and will not be elaborated here.

[0059] Considering the input of corresponding signals to the multiple first signal lines 221 and multiple second signal lines 222 on the electrostatic shielding layer 220, in some embodiments, such as Figure 2 and Figure 5 As shown, a conductive layer 230 is also provided in the driving circuit layer 200. The conductive layer 230 is located on the side of the thin film transistor 211 layer 210 away from the electrostatic shielding layer 220, and includes multiple third signal lines 231 and multiple fourth signal lines 232.

[0060] In at least one embodiment, such as Figure 4 , Figure 5 and Figure 6 As shown, the third signal line 231 is used as a power signal line, and the fourth signal line 232 is used as a data signal line. The connection between the two is achieved by setting a via in the film layer, such as the insulating layer, between the electrostatic shielding layer 220 and the conductive layer 230. That is, the signal obtained by the conductive layer 230 from the signal source is transmitted to the corresponding first signal line 221 and second signal line 222 in the electrostatic shielding layer 220. In this way, the power signal is transmitted by the electrostatic shielding layer 220 and the conductive layer 230, which can reduce the resistance of the power signal transmission, thereby reducing the attenuation of the power signal line and improving the uniformity of the display panel.

[0061] Based on the design of the electrostatic shielding layer and conductive layer described above, this embodiment also includes the design of the corresponding storage capacitor 240 in the driving circuit. In some embodiments, such as... Figure 1 , Figure 2 and Figure 4As shown, the storage capacitor 240 of the driving circuit layer 200 of the display panel 10 includes a first electrode 241 and a second electrode 242 disposed opposite to each other. The first electrode 241 is on the same layer as the gate 2114 of the thin-film transistor 211, and the second electrode 242 is located on the side of the conductive layer 230 facing the electrostatic shielding layer 220. The electrostatic shielding layer 220 also includes a connecting wire 223, one end of which is connected to an initialization signal line, and the other end is connected to the first electrode 241 of the storage capacitor 240. For example, by providing a through-hole in the film layer, such as an insulating layer, between the first electrode 241 and the electrostatic shielding layer 220, the connection between the two is achieved. This avoids the need to provide a through-hole on the second electrode 242 when the first electrode 241 needs to be connected to the initialization signal line of the conductive layer 230 located on the side of the second electrode 242 opposite to the first electrode 241. The capacitance of the storage capacitor is related to the area of ​​the overlap between the first electrode 241 and the second electrode 242 in space. Generally, the orthographic projection of the first electrode 241 on the substrate 100 covers the orthographic projection of the second electrode 242 on the substrate 100. Therefore, the above-mentioned design scheme of the storage capacitor 240 eliminates the design of the opening on the second electrode 242 that determines the effective area of ​​the storage capacitor 240, thereby increasing the area adjustment margin of the storage capacitor 240.

[0062] Based on the design of display panel 10, such as Figure 4 and Figure 7 As shown, the display panel 10 also includes a display function layer 300, which is located on the side of the driving circuit layer 200 facing away from the substrate 100. The display function layer 300 includes a plurality of light-emitting devices, and each light-emitting device includes an anode 310. A planarization layer 400 is also provided between the anode 310 and the driving circuit layer 200, and a pixel defining layer 320 is also provided on the side of the planarization layer 400 facing away from the substrate 100, defining a plurality of pixel openings. The area of ​​each pixel opening corresponding to the anode 310 is the light-emitting area of ​​the corresponding light-emitting device.

[0063] In the previous solution, a metal trace of a certain thickness was provided in a part of the area corresponding to the anode facing the substrate in the region corresponding to the pixel opening. The planarization layer was used to cover part of the metal trace. However, since the planarization layer was not thick enough and the anode was relatively thin, the resulting anode flatness was poor, such as the presence of arc-shaped protrusions. This caused the light output brightness of the light-emitting device in the same pixel opening to be uneven and symmetrical, affecting the display effect.

[0064] The improved display panel in this embodiment protects the thin-film transistors while also improving the flatness of the anode. (Refer to...) Figure 1 , Figure 4 and Figure 7As shown, the design of the storage capacitor 240 in the display panel 10 ensures that the anode 310 of the corresponding light-emitting device has a sufficiently large remaining space facing the substrate 100. Therefore, in some embodiments, the display function layer 300 located on the side of the driving circuit layer 200 away from the substrate 100 in the display panel 10 includes multiple light-emitting devices, and each light-emitting device includes an anode 310. The orthogonal projection of the anode 310 of at least one light-emitting device onto the substrate 100 falls within the orthogonal projection of the conductive layer 230 onto the substrate 100. That is, by increasing and / or widening the surface area of ​​the conductive layer 230, the anode 310 is covered in the space corresponding to the remaining space. This adjusts the film layer on the side of the anode 310 facing the substrate 100, giving it a higher flatness, thereby improving the color shift problem in the display panel 10. Furthermore, the conductive layer 230 not only participates in driving the display panel 10 but also participates in improving the flatness of the anode 310, realizing multiple functions and thus simplifying the structure of the display panel 10.

[0065] Based on the wiring design and layout area considerations of the display panel 10, the arrangement of the wires in the conductive layer 230 is designed in this embodiment. In some embodiments, such as Figure 5 and Figure 7 As shown, the third signal line 231 includes multiple third sub-signal lines 2311, and the fourth signal line 232 includes multiple fourth sub-signal lines 2321. The orthographic projection of the third sub-signal lines 2311 on the substrate 100 covers the orthographic projection of the anode 310 on the substrate 100. This not only improves the flatness of the anode 310 by utilizing the third sub-signal lines 2311, but also, considering that the power supply signal on the third sub-signal lines 311 is a constant voltage signal, it will not affect the anode signal, thereby improving the stability of the display panel performance.

[0066] In other embodiments, the fourth sub-signal line 2321 can also be used to increase the flatness of the anode, such as... Figure 5 As shown, the fourth signal line 232 is configured to include multiple fourth sub-signal lines 2321, and refer to... Figure 7 In this configuration, the fourth sub-signal line 232 can also be lengthened or widened, similar to the configuration of the third sub-signal line 2311, so that the orthogonal projection of the fourth sub-signal line 2321 on the substrate 100 covers the orthogonal projection of the anode 310 on the substrate 100. Setting the third signal line 231 and the fourth signal line 232 into structures with multiple branches not only facilitates the design of improving the flatness of the anode 310, but also saves the layout area of ​​the display panel 10 while simplifying the design of the driving circuit.

[0067] It should be understood that the configuration of the third and fourth signal lines is not limited to the method in the above example. It can be designed in various ways according to the layout and wiring design of the display panel, which will not be elaborated here.

[0068] This application also provides a display device, which includes the display panel of any of the above-mentioned embodiments.

[0069] In some embodiments, such as Figure 9 As shown, the display device 20 includes a display area 21 and a non-display area 22. The display area 21 includes a first sub-display area 211 and a second sub-display area 212. The first sub-display area 211 is disposed around the second sub-display area 212, and an electrostatic shielding layer is provided corresponding to the first sub-display area 211. Considering that static charge is concentrated at the outer edge of the display device, protecting the thin-film transistors in the display area near the outer edge of the display device can effectively improve the impact of static charge on the performance of the display device.

[0070] It should be understood that the above is merely an illustrative description of the relative positional relationship between the first sub-display area and the second sub-display area, and no limitations are made regarding their shape or relative size.

[0071] In at least one embodiment, the display device further includes an encapsulation layer and a touch layer disposed on the encapsulation layer. The touch layer includes a touch chip for implementing touch functionality and a flexible circuit board. To achieve a thinner and lighter touch display device, a touch sensor for implementing touch functionality is disposed in the encapsulation layer of the display device, and the touch chip is disposed on the flexible circuit board, transmitting signals to the touch sensor via touch signal lines.

[0072] In at least one embodiment, the display device can be any product or component with display and touch functions, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Implementation of this display device can refer to the embodiments of the display panel described above; repeated details will not be repeated.

[0073] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A display panel, characterized in that, Includes a substrate and a driving circuit layer located on the substrate, the driving circuit layer comprising: A thin-film transistor layer, comprising a plurality of thin-film transistors, wherein the thin-film transistors are polysilicon transistors or oxide transistors; and An electrostatic shielding layer is located between the thin-film transistor layer and the substrate, and the orthographic projection of the electrostatic shielding layer on the substrate at least partially overlaps with the orthographic projection of at least one thin-film transistor on the substrate; The display panel includes a display area and a non-display area. The display area includes a first sub-display area and a second sub-display area. The first sub-display area is arranged around the second sub-display area, and the electrostatic shielding layer is provided corresponding to the first sub-display area.

2. The display panel according to claim 1, characterized in that, The orthogonal projection of the electrostatic shielding layer on the substrate covers the orthogonal projection of at least one of the thin-film transistors on the substrate.

3. The display panel according to claim 1 or 2, characterized in that, The electrostatic shielding layer includes multiple first signal lines and multiple second signal lines. The preset voltage of the first signal lines is a constant voltage, and the orthographic projection of the first signal lines on the substrate at least partially overlaps with the orthographic projection of at least one thin-film transistor on the substrate.

4. The display panel according to claim 3, characterized in that, The first signal line includes multiple first sub-signal lines, and the orthographic projection of the thin-film transistor on the substrate does not exceed the orthographic projection of the first sub-signal lines on the substrate.

5. The display panel according to claim 3, characterized in that, The first signal line is configured to be connected to the power signal line, and the second signal line is configured to be connected to the data signal line.

6. The display panel according to claim 4, characterized in that, The plurality of thin-film transistors include a plurality of driving transistors, wherein the orthographic projection of at least one of the driving transistors on the substrate at least partially overlaps with the orthographic projection of the first signal line on the substrate.

7. The display panel according to claim 6, characterized in that, The plurality of thin-film transistors also include a plurality of switching transistors, wherein the orthographic projection of at least one of the switching transistors on the substrate at least partially overlaps with the orthographic projection of the first signal line on the substrate.

8. The display panel according to claim 7, characterized in that, The orthographic projection of the switching transistor connected to the gate of the driving transistor on the substrate at least partially overlaps with the orthographic projection of the first signal line on the substrate.

9. The display panel according to claim 7, characterized in that, The first sub-signal line corresponding to the switching transistor is different from the first sub-signal line corresponding to the driving transistor.

10. The display panel according to claim 7, characterized in that, The driving transistor has a single-gate structure, and the switching transistor has a dual-gate structure.

11. The display panel according to claim 5, characterized in that, The driving circuit layer further includes a conductive layer located on the side of the thin-film transistor layer away from the electrostatic shielding layer, and includes multiple third signal lines and multiple fourth signal lines.

12. The display panel according to claim 11, characterized in that, The third signal line is the power signal line, and the fourth signal line is the data signal line.

13. The display panel according to claim 11, characterized in that, The driving circuit layer further includes a storage capacitor, which includes a first electrode and a second electrode disposed opposite to each other. The first electrode is on the same layer as the gate of the thin-film transistor, and the second electrode is located on the side of the conductive layer facing the electrostatic shielding layer. The electrostatic shielding layer also includes a connecting wire, one end of which is connected to the initialization signal line and the other end of which is connected to the first electrode.

14. The display panel according to claim 11, characterized in that, It also includes a display function layer located on the side of the driving circuit layer away from the substrate. The display function layer includes a plurality of light-emitting devices, each of which includes an anode, and at least one of the anodes has its orthogonal projection onto the substrate falling within the orthogonal projection of the conductive layer onto the substrate.

15. The display panel according to claim 14, characterized in that, The third signal line includes multiple third sub-signal lines, the orthographic projection of the third sub-signal lines on the substrate covering the orthographic projection of the anode on the substrate; or, the fourth signal line includes multiple fourth sub-signal lines, the orthographic projection of the fourth sub-signal lines on the substrate covering the orthographic projection of the anode on the substrate.

16. A display device, characterized in that, The display panel includes any one of claims 1 to 15.

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