A switching circuit, device, method and test method
By designing adapter circuits and devices, and using address switching units to generate address signals to distinguish multiple PoE power adapters, accurate connection between the test equipment and the target equipment was achieved, improving production testing efficiency and reducing manpower and time costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHENZHEN HONOR ELECTRONICS
- Filing Date
- 2022-11-11
- Publication Date
- 2026-07-21
AI Technical Summary
When PoE power adapters produced in the same batch have the same slave address, existing testing equipment cannot distinguish between multiple PoE power adapters, resulting in low production testing efficiency.
Design a switching circuit including an access unit, an output unit, and a switching unit. An address switching unit generates an address signal to distinguish multiple switching circuits, enabling accurate connection between the test equipment and the target device under test. The output unit can connect to multiple devices under test simultaneously.
It improves the efficiency of PoE power adapter production testing, reduces manpower and time costs, simplifies the interface requirements of test equipment, and supports simultaneous testing of multiple devices under test.
Smart Images
Figure CN115684672B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of product testing technology, and in particular to a switching circuit, device, method, and testing method. Background Technology
[0002] PoE (Power Over Ethernet) power adapters need to pass testing after production before being released to the market. Currently, because PoE power adapters produced in the same batch share a single slave address, when multiple PoE power adapters are connected to testing equipment, the testing equipment cannot distinguish between each adapter. This makes it impossible for the testing equipment to identify the PoE power adapter that needs to be tested at any given time. Therefore, currently, only one power adapter can be connected and tested at a time on the production line, resulting in low production testing efficiency for PoE power adapters.
[0003] Therefore, when PoE power adapters produced in the same batch have the same slave address, how to improve the production testing efficiency of PoE power adapters is an urgent problem to be solved. Summary of the Invention
[0004] This application aims to provide an adapter circuit, device, method, and test method to solve the problem of how to improve the production and testing efficiency of PoE power adapters when they have the same slave address in the same batch of production.
[0005] The present application adopts the following solution to solve the above-mentioned technical problems.
[0006] In a first aspect, this application provides an adapter circuit, comprising:
[0007] Access unit, used to connect to test equipment;
[0008] The output unit includes multiple output interfaces, each of which is used to connect to the device under test; wherein the multiple output interfaces are communication interfaces of the same type.
[0009] A switching unit is disposed between the output unit and the access unit, and is used to selectively connect the access unit to a target output interface among the plurality of output interfaces.
[0010] In some embodiments of this application, the access unit includes a first access interface and a second access interface, wherein the first access interface is used to access the test equipment, and the second access interface is used to access other adapter circuits.
[0011] In some embodiments of this application, the switching circuit further includes an address switching unit connected to the switching unit; the address switching unit is configured to output a level signal to the switching unit to trigger the switching unit to output an address signal to the test device according to the level signal; wherein, the address signal is used to identify the switching circuit.
[0012] In some embodiments of this application, the switching unit has a receiving terminal, and the address switching unit includes a bias power supply and a bias resistor, with one end of the bias resistor connected to the bias power supply and the other end grounded;
[0013] The receiving terminal is connected to the connection point between the bias power supply and the bias resistor, or to the end of the bias resistor away from the bias power supply. The address switching unit is used to output the level signal to the switching unit through the receiving terminal. The switching unit is used to generate an address signal based on the level signals received by all the receiving terminals.
[0014] In some embodiments of this application, both the output interface and the first access interface are I2C communication interfaces; the second access interface is a cascaded interface.
[0015] In some embodiments of this application, the adapter circuit further includes a power access unit for connecting to the test equipment to supply power to the adapter unit; the power access unit includes a first power interface and a second power interface, the first power interface for connecting to the test equipment, and the second power interface for connecting to another adapter circuit.
[0016] In some embodiments of this application, the power access unit includes an indicator light, which is connected in series between the first power interface and the adapter unit, and whether the indicator light is lit corresponds to whether the power access unit is in a normal power supply state.
[0017] Secondly, this application also provides an adapter, wherein the aforementioned adapter circuit is integrated into the adapter.
[0018] Thirdly, this application also provides a switching method applied to the aforementioned switching device, wherein the testing method includes:
[0019] Receive test connection signals from the test equipment;
[0020] The test device is determined from a plurality of devices under test connected to the adapter based on the test connection signal, and the test device is connected to the target device under test.
[0021] Fourthly, this application also provides a testing method applied to a testing system.
[0022] The testing system includes testing equipment, multiple adapters as described above, and multiple devices under test connected to each adapter; the testing method includes:
[0023] The test equipment receives address signals sent by multiple switching devices and determines the target switching device from the multiple switching devices based on the address signals;
[0024] The testing equipment sends a test signal to the target adapter;
[0025] The target switching device receives the test signal and sends the test signal to the target device under test (DUT), so that the target DUT performs functional testing according to the test signal; wherein, the target DUT is the DUT determined by the target switching device from a plurality of DUTs connected to the target switching device after receiving the test connection signal sent by the test device, and the test connection signal is used to connect the test device to the target DUT.
[0026] This application provides a switching circuit, device, method, and testing method. The switching circuit includes an access unit for connecting to a test device, an output unit for connecting to a device under test (DUT), and a switching unit connecting the access unit and the output unit. The output unit in this application includes multiple output interfaces, allowing simultaneous connection to multiple DUTs. By setting the switching unit, the access unit can selectively connect to a target output interface among the multiple output interfaces, enabling the test device to accurately identify the target DUT from among the multiple DUTs and then connect to the target DUT to perform functional testing. Therefore, the technical solution provided in this application allows the test host to connect multiple DUTs with the same slave address at once and test each DUT separately, eliminating the need to manually connect each DUT to the test device individually. This effectively improves the testing efficiency of DUTs with the same slave address and reduces the time and labor costs associated with testing DUTs with the same slave address. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1A structural block diagram of a switching circuit provided in one embodiment of this application;
[0029] Figure 2 A structural block diagram of a switching circuit provided in another embodiment of this application;
[0030] Figure 3 For the purposes of this application Figure 2 A circuit diagram of the adapter circuit in one embodiment is provided;
[0031] Figure 4 For the purposes of this application Figure 2 A circuit diagram of the adapter circuit in another embodiment provided;
[0032] Figure 5 A structural block diagram of a switching circuit provided in another embodiment of this application;
[0033] Figure 6 This is a structural block diagram of the switching circuit in another embodiment of this application;
[0034] Figure 7 This is a structural block diagram of the switching circuit in yet another embodiment of this application;
[0035] Figure 8 A circuit diagram of a power access unit provided in one embodiment of this application;
[0036] Figure 9 A structural block diagram of a test system provided in one embodiment of this application;
[0037] Figure 10 A flowchart illustrating a switching method provided in one embodiment of this application;
[0038] Figure 11 A flowchart of a test method provided for an embodiment of this application.
[0039] Explanation of key component symbols:
[0040] 100-Adapter circuit, 110-Access unit, 111-First access interface, 112-Second access interface, 120-Adapter unit, 130-Output unit, 131-Output interface, 140-Address switching unit, 150-Power access unit, 151-First power interface, 152-Second power interface, 153-Transformer unit, 154-Indicator light, 200-Test equipment, 300-DUT, 400-Adapter equipment, 500-Test system. Detailed Implementation
[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0042] In this application, the term "exemplary" is used to mean "used as an example, illustration, or description." Any embodiment described as "exemplary" in this application is not necessarily to be construed as being more preferred or advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use this application. Details are set forth in the following description for purposes of explanation. It should be understood that those skilled in the art will find that this application can be implemented without using these specific details. In other embodiments, known structures and processes are not described in detail to avoid obscuring the description of this application with unnecessary detail. Therefore, this application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope of the principles disclosed in this application.
[0043] Currently, all power adapters must pass testing before being released to the market. To improve testing efficiency, there may be a need for a single testing device to test two power adapters simultaneously. However, for example, with PoE power adapters, those produced in the same batch share a single slave address, which cannot be changed. Therefore, if multiple PoE power adapters are connected simultaneously, the testing device cannot identify the PoE power adapter requiring production testing from among the multiple adapters.
[0044] In related technologies, two hosts can be set up, each connected to a different power adapter, thereby differentiating between the different hosts and their power adapters. However, this requires the testing equipment to have interface programming capabilities to identify the different hosts, making it difficult to operate in actual testing.
[0045] Based on this, this application improves the current adapter circuits, devices, methods, and test methods.
[0046] Please see Figure 1 This application provides an adapter circuit 100. The adapter circuit 100 includes an access unit 110, an output unit 130, and an adapter unit 120.
[0047] Access unit 110 is used to connect to test equipment 200. By connecting to test equipment 200 through access unit 110, signal transmission between test equipment 200 and adapter circuit 100 can be realized.
[0048] Output unit 130 includes multiple output interfaces 131, each of which is used to connect to a device under test (DUT) 300. The multiple output interfaces 131 are of the same type of communication interface. That is, multiple DUTs 300 can be connected by providing multiple output interfaces 131. Signal transmission between the DUT 300 and the adapter circuit 100 is achieved through the connection of the output interfaces 131 to the DUT 300. For example, the DUT 300 can be a PoE power adapter. Multiple power adapters can be connected to adapter unit 120 through different output interfaces 131, and thus connected to the test equipment 200.
[0049] It should be noted that in all embodiments provided in this application, "multiple" refers to two or more. For ease of subsequent description, the accompanying drawings of the relevant embodiments of this application will be used as an example to explain each output unit including two output interfaces 131. It should also be noted that although the adapter circuit 100 includes multiple output interfaces 131 in the embodiments of this application, it is not limited to each output interface 131 being connected to the device under test 300.
[0050] The adapter unit 120 is disposed between the output unit 130 and the access unit 110, and is used to selectively connect the access unit 110 to a target output interface among multiple output interfaces 131. That is, the adapter unit 120 can choose one of the multiple output interfaces 131 to establish a connection. More specifically, the test device 200 sends a command to the adapter unit 120 to connect to a certain device under test 300, and the adapter unit 120 selectively controls the output interface 131 connected to the device under test 300 to establish a connection with itself based on the command, thereby realizing the connection between the test device 200 and the specified device under test 300.
[0051] Currently, when multiple devices under test (DUTs) 300 are directly connected to the test equipment 200, it is impossible to test each DUT 300 individually without distinguishing and identifying them. Distinguishing and identifying multiple DUTs 300 requires programming the test equipment 200 with identification functions to identify the DUTs 300 on different interfaces, which is quite complex. Furthermore, the limited number of data interfaces on the test equipment 200 that connect to the DUTs 300 restricts the number of DUTs 300 that can be connected.
[0052] For example, when the test device 200 is a computer terminal, the data interface on the computer terminal itself does not have the ability to program and identify multiple connected test lines. Furthermore, the number of USB ports or other interfaces on the computer terminal is limited, thus restricting the number of devices under test 300 that can be connected.
[0053] In the embodiments of this application, by setting up a transition circuit 100, one end of which is connected to the test device 200 and the other end can be connected to multiple devices under test 300, the requirement for the number of interfaces of the test device 200 is reduced, and the difficulty of connecting the test device 200 to multiple devices under test 300 and testing them separately is reduced. Furthermore, the transition unit 120 can selectively connect the access unit 110 to one of the output interfaces 131, eliminating the need to identify different devices under test 300, further reducing the difficulty of connecting multiple devices under test 300 and testing them separately.
[0054] More specifically, for example, when testing a PoE power adapter or other similar power adapter, I2C communication is typically required. Therefore, an I2C conversion tool is needed between the test device 200 and the device under test 300. In current technology, a separate I2C conversion tool needs to be set between the test device 200 and each power adapter. However, in the embodiments of this application, only one I2C conversion tool needs to be connected between the access unit 110 and the test device 200, and multiple power adapters under test can be connected via the adapter circuit 100.
[0055] In one possible example, please see Figure 2 The access unit 110 includes a first access interface 111 and a second access interface 112. The first access interface 111 is used to connect to the test equipment 200, and the second access interface 112 is used to connect to other adapter circuits. That is, the second access interface 112 serves as a cascading interface; when cascading is required, multiple adapter circuits 100 can be cascaded using connecting cables to connect multiple adapter circuits 100 to the test equipment 200. In some embodiments, the structure of another adapter circuit can be the same as the structure of adapter circuit 100.
[0056] For example Figure 3 As shown, the switching unit 120 connects to the first access interface 111 (corresponding to...) Figure 3 The intermediate interface CON6) is connected to the test equipment 200. Another adapter circuit 100 connects to the second access interface 112 (corresponding to...). Figure 3 The test device 200 is connected to the first access interface 111 and the CON7 interface.
[0057] In some embodiments, the first access interface 111 may also be connected to another adapter circuit 100, and the second access interface 112 may also be connected to the test equipment 200; this is merely an illustrative example.
[0058] In one possible example, please see Figure 2 The adapter circuit 100 also includes an address switching unit 140. This address switching unit 140 is connected to the adapter unit 120. The address switching unit 140 is configured to output a level signal to the adapter unit 120 to trigger the adapter unit 120 to output an address signal to the test device 200 based on the level signal. The address signal is used to identify the adapter circuit 100 so that when another adapter circuit 100 is connected to the second access interface 112, the test device 200 can distinguish the adapter circuit 100 from the other adapter circuit using this address signal.
[0059] Currently, since the device under test (DUT) 300 is directly connected to the test equipment 200, the test equipment 200 needs to identify each DUT 300. In this embodiment, when multiple adapter circuits 100 are cascaded, if each adapter circuit 100 is not identified, the test equipment 200 will also be unable to establish a connection with the required adapter circuit 100. Therefore, in order for the test equipment 200 to distinguish each adapter circuit 100, the address switching unit 140 included in the adapter circuit 100 generates a level signal and sends it to the adapter unit 120. The adapter unit 120 generates an address signal based on the received level signal, and then sends the generated address signal to the test equipment 200. This allows the test equipment 200 to distinguish the multiple cascaded adapter circuits 100 based on the received address signal.
[0060] In some embodiments, the switching unit 120 has a receiving terminal. The address switching unit 140 includes a bias power supply and a bias resistor. One end of the bias resistor is connected to the bias power supply, and the other end is grounded. The address switching unit 140 has a preset number of parallel branches, and each parallel branch can be equipped with a pull-up resistor or a pull-down resistor, thereby generating a corresponding level signal on each parallel branch according to the set pull-up resistor or pull-down resistor. Each parallel branch is connected to a corresponding receiving terminal, which can be used to receive the level signal generated by the bias resistor on the corresponding branch. Finally, the switching unit 120 can determine the address signal corresponding to the switching branch 100 where the switching unit 120 is located based on the level signal received by each receiving terminal.
[0061] In some implementations, the corresponding receiving terminal on each parallel branch can be connected to the connection point between the bias power supply and the bias resistor on the current parallel branch, or to the end of the bias resistor on the current parallel branch that is furthest from the bias power supply. The switching unit 120 is used to receive the level signal output by the address switching unit 140 through the receiving terminal, and generate an address signal based on the received level signal.
[0062] Specifically, when the receiving terminal is electrically connected to the connection point between the bias power supply and the bias resistor, the bias resistor acts as a pull-up resistor, and the receiving terminal can receive a high-level signal. When the receiving terminal is electrically connected to the end of the bias resistor furthest from the bias power supply, the bias resistor acts as a pull-down resistor, and the receiving terminal can receive a low-level signal.
[0063] When multiple adapter circuits 100 are cascaded on the adapter circuit 100, each adapter circuit 100 can identify whether the signal of its own receiving terminal is a high-level or low-level signal, thereby triggering its respective adapter unit 120 to output different address signals. The test device 200 can distinguish between different adapter circuits 100 by receiving different address signals.
[0064] In one possible example, there are multiple bias resistors and receiving terminals. One end of each bias resistor is connected to a bias power supply, and the other end is connected to ground. Each receiving terminal is connected to a corresponding bias resistor, and the adapter unit 120 generates an address signal based on the level signal received by each receiving terminal.
[0065] For example, when multiple adapter circuits 100 are cascaded on adapter circuit 100, each adapter circuit 100 can identify whether the signal from its receiving terminal is a high-level or low-level signal. Multiple receiving terminals receive signals of different high and low levels, which then trigger the adapter unit 120 to generate an address signal. Thus, different adapter circuits 100 can generate different address signals for the test equipment 200 to identify and match.
[0066] In one implementation, the address switching unit 140 may include three parallel branches, each with a bias resistor. The switching unit 120 includes receiving terminals connected to each parallel branch. By determining the positional connection relationship between each receiving terminal in the switching unit 120 and the bias power supply and corresponding bias resistor on the corresponding parallel branch, eight high-low level combinations can be output, i.e., eight address signal configurations can be achieved. In other words, if different switching circuits 100 generate their own address signals based on the aforementioned address switching unit 140, eight different switching circuits 100 can be identified, meaning a maximum of eight switching circuits can be cascaded. Since the level signals generated on each branch are different, the address signals generated by the switching unit 120 are also different. The eight high-low level combinations that the three parallel branches can generate are shown in Table 1.
[0067] Table 1
[0068] Branch Road 1 Branch Road 2 Branch Road 3 Address signal high level high level high level Address signal 1 high level high level low level Address signal 2 high level low level high level Address signal 3 high level low level low level Address signal 4 low level high level high level Address signal 5 low level high level low level Address signal 6 low level low level high level Address signal 7 low level low level low level Address signal 8
[0069] For example, in Figure 3 In the shown adapter circuit 100, the adapter unit 120 is chip U2, where pins A0, A1, and A2 are receiving terminals. A 3.3V bias power supply is used; resistors R11, R12, and R13 are bias resistors, all connected to the same bias power supply. Pin A0 is connected to the end of resistor R11 furthest from the bias power supply, and pin A0 receives a low-level signal; pin A1 is connected to the end of resistor R12 furthest from the bias power supply, and pin A1 receives a low-level signal; pin A2 is connected to the end of resistor R13 furthest from the bias power supply, and pin A2 receives a low-level signal. Address signal a is formed based on the low-level signals received by pins A0, A1, and A2. When multiple adapter circuits 100 are connected, address signal a can be distinguished from the address signals of other adapter circuits 100, thereby enabling the test device 200 to address and identify a specific adapter circuit 100.
[0070] For example, in Figure 4 In the other adapter circuit 100 shown, with Figure 3 compared to Figure 4 The connection positions of the receiving terminal and the bias resistor are different; Figure 4 In the illustrated embodiment, resistors R18, R19, and R20 are bias resistors, all connected to the same bias power supply. Pin A0 is connected to the connection point of resistor R18 with the bias power supply, and pin A0 receives a high-level signal; pin A1 is connected to the connection point of resistor R19 with the bias power supply, and pin A1 receives a high-level signal; pin A2 is connected to the connection point of resistor R20 with the bias power supply, and pin A2 receives a high-level signal. Address signal b is generated based on the high-level signals received by pins A0, A1, and A2. Figure 4 In the embodiment shown, the address signal b is different from Figure 3 In the example shown, address signal a can be configured with different address signals when different adapter circuits 100 are connected to the test device 200, which helps the test device 200 to distinguish between different adapter circuits 100.
[0071] More specifically, the bias resistor in branch 1 can be set at R11 or R18, so that pin A0 can receive a low-level or high-level signal; the bias resistor in branch 2 can be set at R12 or R19, so that pin A1 can receive a low-level or high-level signal; the bias resistor in branch 3 can be set at R13 or R20, so that pin A2 can receive a low-level or high-level signal.
[0072] In the embodiments of this application, multiple adapter circuits 100 are cascaded, and connection to the test equipment 200 is achieved through one of the adapter circuits 100. Different adapter circuits output different address signals, which can be selected from address signal 1, address signal 2, ..., address signal 8 in the aforementioned embodiments.
[0073] In one possible example, please see Figure 1 The number of output interfaces 131 is two, which can simultaneously connect two devices under test 300. Figure 3 and Figure 4 Example circuit diagrams of the adapter circuit 100 are also shown. In this circuit, chip U2 serves as adapter unit 120, interfaces CON6 and CON7 serve as access units 110, and interfaces CON8 and CON9 serve as output interfaces 131. The signal flow is as follows: interface CON6 or interface CON7 receives commands from the test device 200 and triggers chip U2 to selectively establish a connection with interface CON8 or interface CON9 according to the command. It should be noted that the test device 200 issues different commands to establish connections with different output interfaces 131. Figure 3 and Figure 4 Both CON8 and CON9 interfaces are output interfaces 131. Combining the scheme in the previous embodiment that can cascade 8 adapter circuits 100, the test device 200 in this embodiment can simultaneously connect to 16 devices under test 300.
[0074] Among them, interface CON6 can be used as the first access interface 111 to connect with test equipment 200, and CON7 can be used as the second access interface 112 to connect with other adapters.
[0075] In some embodiments, please refer to Figure 5 The adapter circuit 100 also includes a power input unit 150, which is used to connect to the test equipment 200 to supply power to the adapter unit 120. In other words, the adapter circuit 100 can be directly connected to the test equipment 200 without the need for other external power supply devices.
[0076] For a more specific embodiment, please refer to Figure 6The power input unit 150 includes a first power interface 151 and a second power interface 152. The first power interface 151 is used to connect to the test equipment 200, and the second power interface 152 is used to connect to another adapter circuit. When other adapter circuits 100 are connected, power can be supplied to the other adapter circuits through the second power interface 152.
[0077] In another embodiment, multiple adapter circuits 100 are cascaded together, and one of the adapter circuits 100 is connected to the test equipment 200; the second power interface 152 on the one of the adapter circuits 100 can be connected to other adapter circuits 100 and used to supply power to the other adapter circuits 100.
[0078] In some embodiments of this application, both the output interface 131 and the first access interface 111 are I2C communication interfaces; the second access interface 112 is a cascaded interface.
[0079] For a more specific embodiment, please refer to Figure 7 The power input unit 150 may further include a transformer unit 153, which is disposed between the first power interface 151 and the second power interface 152, and is used to convert the voltage of the test equipment 200 into the voltage required by the adapter unit 120. For example, if the output voltage of the test equipment 200 is 5V, the voltage input to the adapter unit 120 after passing through the transformer unit 153 is 3.3V.
[0080] Figure 8 The circuit diagram of the power input unit 150 is shown, which includes a chip U1. In this embodiment, the chip U1 can be used as a transformer unit 153. For example, if the input voltage on one side of the chip U1 is 5V, the chip U1 converts the 5V to 3.3V and outputs it to the adapter unit 120.
[0081] In some possible examples, transformer unit 153 is electrically connected to test equipment 200 via a USB power supply line.
[0082] Please refer again to some embodiments of this application. Figure 7 The power input unit 150 may also include an indicator light 154, which is connected in series between the first power interface 151 and the adapter unit 120. Whether the indicator light 154 is lit is associated with whether the power input unit 150 is in a normal power supply state. That is, whether the power input unit 150 is powered normally can be detected by the on / off state of the indicator light 154.
[0083] For example, when indicator light 154 is on, power supply unit 150 is in a normal power supply state; when indicator light 154 is off, power supply unit 150 is in an abnormal power supply state. Thus, it is possible to determine whether power supply unit 150 is supplying power normally based on whether indicator light 154 is on or off.
[0084] In some possible embodiments, the indicator light 154 is an LED light (corresponding to...) Figure 8 LED1). The indicator light 154 is connected in series between the adapter unit 120 and the second power interface 152.
[0085] In some embodiments, the test device 200 is connected to the first access interface 111 and / or the second access interface 112 via an I2C system bus. Different output interfaces 131 are connected to their corresponding devices under test 300 via different I2C buses.
[0086] Based on the same inventive concept, please refer to Figure 9 In the embodiments of this application, an adapter device 400 is also provided, on which the aforementioned adapter circuit 100 is integrated.
[0087] Furthermore, the adapter 400 can be a plate-like structure.
[0088] In some embodiments, there are multiple adapter devices 400, which are cascaded together, and one of the adapter devices 400 is connected to the test device 200. Different adapter devices 400 generate different address signals, and the test device 200 distinguishes between them based on these address signals. Multiple adapter devices 400 are cascaded, each emitting a different address signal, and the test device 200 uses these address signals to address the designated adapter device 400 for data transmission.
[0089] Based on the same inventive concept, such as Figure 10 As shown in the figure, this application embodiment provides a flowchart of a switching method, which is applied to the aforementioned switching device. The testing method includes at least steps S110 to S120.
[0090] In step S110, a test connection signal is received from the test device 200.
[0091] Specifically, the test connection signal can be understood as a signal used to trigger the test device 200 and the target device under test 300. After receiving the test connection signal, the adapter 400 can determine which device under test 300 the test device 200 needs to connect to.
[0092] In step S120, the target device under test 300 is determined from the plurality of devices under test 300 connected to the adapter 400 according to the test connection signal, and the test device 200 is connected to the target device under test 300.
[0093] In this context, the target device under test (DUT) refers to the DUT 300 that the test device 200 intends to test among multiple DUTs 300. Specifically, upon receiving a test connection signal, the switching device 400 can identify the target DUT 300 from among the multiple DUTs 300 connected to it, and then control the test device 200 to connect to the target DUT 300, thus enabling communication between the test device 200 and the target DUT 300. After the test device 200 and the target DUT 300 are connected, the test device 200 can perform functional tests on the target DUT 300.
[0094] Based on the same inventive concept, such as Figure 11 As shown, an embodiment of this application also provides a flowchart of a testing method applied to a testing system 500. The testing system 500 includes a testing device 200, a plurality of the aforementioned adapter devices 400, and a plurality of devices under test 300 connected to each adapter device 400. The testing device 200 is connected to one of the plurality of cascaded adapter devices 400. The testing method includes at least steps S210 to S230.
[0095] In step S210, the test device 200 receives address signals sent by multiple switching devices 400, and determines the target switching device 400 from the multiple switching devices 400 according to the address signals.
[0096] In this context, the target switching device refers to the switching device 400 to which the device under test 300, which the test device 200 wants to test, is connected. Specifically, each switching device 400 can send an address signal to the test device 200 to identify itself, and the test device 200 can distinguish between different switching devices 400 based on the received address signal.
[0097] In step S220, the test device 200 sends a test signal to the target transfer device 400.
[0098] Specifically, after the target adapter 400 is determined, the test device 200 can send a test signal to the target adapter 400 to perform functional testing on the target device under test 300 connected to the target adapter 400.
[0099] In step S230, the target switching device 400 receives the test signal and sends the test signal to the target device under test 300 so that the target device under test 300 performs a functional test based on the test signal.
[0100] In this embodiment, the target device under test 300 is the device under test 300 that needs to be connected to the test device 200, determined by the target adapter device 400 from among a plurality of devices under test 300 connected to the target adapter device 400 after the target adapter device 400 receives the test connection signal sent by the test device 200. The test connection signal is used to connect the test device 200 and the target device under test 300.
[0101] When there is no cascaded adapter 400, i.e., only one adapter 400 exists, that adapter 400 is the target adapter, and steps S220 and S230 can be performed directly. That is, the test device 200 directly sends a test signal to the adapter 400; then the adapter 400 receives the test signal and sends it to the device under test 300, so that the device under test 300 can perform functional testing according to the test signal.
[0102] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the detailed descriptions of other embodiments above, which will not be repeated here.
[0103] The basic concepts have been described above. Obviously, for those skilled in the art, the detailed disclosure above is merely illustrative and does not constitute a limitation of this application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and corrections to this application. Such modifications, improvements, and corrections are suggested in this application, and therefore remain within the spirit and scope of the exemplary embodiments of this application.
[0104] Furthermore, this application uses specific terms to describe embodiments of the application. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of the application. Therefore, it should be emphasized and noted that "an embodiment," "one embodiment," or "an alternative embodiment" mentioned twice or more in different locations in this specification do not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of the application can be appropriately combined.
[0105] Similarly, it should be noted that, in order to simplify the description of the present application and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of the embodiments of the present application sometimes combines multiple features into a single embodiment, drawing, or description thereof. However, this disclosure method does not imply that the subject matter of the application requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of the single embodiments disclosed above.
[0106] Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, the numerical parameters should take into account a specified number of significant digits and employ a general method of digit preservation. Although the numerical ranges and parameters used to confirm their breadth of application in some embodiments of this application are approximate values, in specific embodiments, such values are set as precisely as feasible.
[0107] For each patent, patent application, patent application publication, and other material such as articles, books, specifications, publications, and documents referenced in this application, the entire contents of that patent application are incorporated herein by reference, except for historical application documents that are inconsistent with or conflict with the content of this application, and documents that limit the broadest scope of the claims of this application (currently or subsequently appended to this application). It should be noted that if there are any inconsistencies or conflicts between the descriptions, definitions, and / or terminology used in the supplementary materials of this application and the content of this application, the descriptions, definitions, and / or terminology used in this application shall prevail.
[0108] The technical solutions provided by the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A switching circuit, characterized in that, include: The access unit includes a first access interface and a second access interface, wherein the first access interface is used to access test equipment and the second access interface is used to access other adapter circuits. The output unit includes multiple output interfaces, each of which is used to connect to the device under test; wherein the multiple output interfaces are communication interfaces of the same type. A switching unit is disposed between the output unit and the access unit, and is used to selectively connect the access unit to a target output interface among the plurality of output interfaces; An address switching unit is connected to the adapter unit; the address switching unit is configured to output a level signal to the adapter unit to trigger the adapter unit to output an address signal to the test device according to the level signal; wherein, the address signal is used to identify the adapter circuit.
2. The adapter circuit according to claim 1, characterized in that, The switching unit has a receiving terminal, and the address switching unit includes a bias power supply and a bias resistor, with one end of the bias resistor connected to the bias power supply and the other end grounded. The receiving terminal is connected to the connection point between the bias power supply and the bias resistor, or to the end of the bias resistor away from the bias power supply. The address switching unit is used to output the level signal to the switching unit through the receiving terminal. The switching unit is used to generate an address signal based on the level signals received by all the receiving terminals.
3. The adapter circuit according to claim 1, characterized in that, Both the output interface and the first access interface are I2C communication interfaces; the second access interface is a cascaded interface.
4. The adapter circuit according to claim 1, characterized in that, The adapter circuit further includes a power input unit, which is used to connect to the test equipment to supply power to the adapter unit; the power input unit includes a first power interface and a second power interface, the first power interface is used to connect to the test equipment, and the second power interface is used to connect to another adapter circuit.
5. The adapter circuit according to claim 4, characterized in that, The power access unit includes an indicator light, which is connected in series between the first power interface and the adapter unit. Whether the indicator light is lit is associated with whether the power access unit is in a normal power supply state.
6. A switching device, characterized in that, The adapter circuit according to any one of claims 1-5 is integrated into the adapter device.
7. A switching method, characterized in that, The adapter method, applied to the adapter device of claim 6, comprises: Receive test connection signals from the test equipment; The test device is determined from a plurality of devices under test connected to the adapter based on the test connection signal, and the test device is connected to the target device under test.
8. A testing method, characterized in that, The system is applied to a testing system, which includes testing equipment, a plurality of adapters as described in claim 6, and a plurality of devices under test connected to each of the adapters; The testing method includes: The test equipment receives address signals sent by multiple switching devices and determines the target switching device from the multiple switching devices based on the address signals; The testing equipment sends a test signal to the target adapter; The target switching device receives the test signal and sends the test signal to the target device under test (DUT), so that the target DUT performs functional testing according to the test signal; wherein, the target DUT is the DUT determined by the target switching device from a plurality of DUTs connected to the target switching device after receiving the test connection signal sent by the test device, and the test connection signal is used to connect the test device to the target DUT.