A storage optimization method and system for randomized seeds of SSD data

Abstract

The present invention belongs to the technical field of SSD data management algorithm, and specifically provides a storage optimization method and system for randomized seeds of SSD data, wherein the method includes: selecting random numbers as the first-level interference data group through algorithm analysis; performing XOR operation on the first-level interference data group and the original seed to obtain a new effective seed; using the effective seed as the new original seed, repeating the above method to obtain a multi-level interference data group; selecting the seed in the original seed and the interference data in each level of interference data group, performing XOR operation on the seed and the interference data selected in each level of interference data group, and sending the data to a linear feedback shift register. By using some interference data and the original seed to perform XOR operation to obtain more new seeds, and using the grading method of interference data to obtain more new seeds, the space for storing seeds is reduced, and the utilization rate of SSD storage space is greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of SSD data management algorithms, and more specifically, to a storage optimization method and system for SSD data randomization seeds. Background Art

[0002] With the explosive growth of information and the continuous development and innovation of science and technology, various products have put forward higher reliability requirements for industrial-grade SSDs. For example, self-driving cars need to perform a large amount of data reading and writing (map updates, road conditions, etc.) during driving, requiring the SSD firmware backend (SSD controller) to perform more reliable data storage.

[0003] NAND reliability is generally measured by the raw bit error rate (RBER), which is highly dependent on the mode in which data is written to NAND. Therefore, randomizing the data written to NAND can effectively reduce the raw bit error rate. As the capacity of NAND FLASH continues to expand, more and more random number seeds are required, which puts higher requirements on data randomization.

[0004] The latest NANDFLASH requires that each page in a block needs to use a different random seed, and there are about 2,000 pages in a block, so at least 2,000 seeds are needed. The common practice is to find 2,000 random numbers as seeds, but this requires a lot of space to store these seeds, which wastes the chip's storage space. Summary of the invention

[0005] The present invention aims to solve the technical problem in the prior art that the randomized seed storage space in the SSD is huge, resulting in waste of storage space.

[0006] The present invention provides a storage optimization method for SSD data randomization seeds, comprising the following steps:

[0007] S100, obtaining a random number, performing XOR operation on the random number and the original seed and iterating to obtain a new seed, determining the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group if the requirements are met;

[0008] S200, performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed;

[0009] S300, taking the effective seed as the new original seed, repeating step S100 to obtain a second-level interference data group;

[0010] S400, repeating steps S100 to S300 to obtain a multi-level interference data group;

[0011] S500, storing the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into a chip memory, where L is a natural number;

[0012] S600, selecting a seed from the original seed and interference data from each level of interference data group, performing an XOR operation on the seed and the selected interference data from each level of interference data group, and sending the data to a linear feedback shift register.

[0013] Preferably, the S100 specifically includes:

[0014] S1, obtain a random number and perform an XOR operation with the original seed;

[0015] S2, judging whether the ratio of 0 to 1 in each new seed is between 0.4 and 0.6, if not, returning to step S1, if yes, proceeding to the next step;

[0016] S3, put K new seeds into the linear feedback shift register in turn for iteration. Each seed is iterated P times to obtain KxP data, where P represents the amount of data in a NAND page, and K and P are natural numbers.

[0017] S4, judging whether the proportion of each of the P connected data 0 and 1 is a preset value, if not, returning to step S1, if yes, the random number generated in step 1 is the required interference data.

[0018] Preferably, the S1 specifically includes:

[0019] Determine whether this random number is the same as the original seed number. If so, obtain a new random number.

[0020] Preferably, the S1 and S2 further include:

[0021] Determine whether the maximum number of consecutive 0s and / or the maximum number of consecutive 1s in each new seed is less than N. If not, return to step S1.

[0022] Preferably, the preset value in S4 is 50%.

[0023] Preferably, the process of selecting a seed in S600 specifically includes:

[0024] It is obtained by dividing the page address by the number of seeds and taking the remainder.

[0025] Preferably, the process of selecting interference data in each level of interference data group in S600 specifically includes:

[0026] The selection of interference data in the first-level interference data group is obtained by dividing the page address by the number of seeds and then by the number of the first-level interference data group to obtain the remainder. Similarly, the selection of interference data in the Lth-level interference data group can be obtained.

[0027] The present invention also provides a storage optimization system for SSD data randomization seeds, and the system is used to implement a storage optimization method for SSD data randomization seeds, which specifically includes:

[0028] A random number acquisition module is used to obtain a random number;

[0029] The interference data group calculation module is used to XOR the random number with the original seed and iterate to obtain a new seed, determine the proportion of 0 and 1 in the new seed, and select the random number as the first-level interference data group when the requirement is met; XOR the first-level interference data group with the original seed to obtain a new valid seed; use the valid seed as the new original seed and repeat step S100 to obtain a second-level interference data group; repeat this to obtain multiple levels of interference data groups;

[0030] The storage module is optimized to store the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into the chip memory, where L is a natural number; the seed in the original seed and the interference data in each level of interference data group are selected, and the seed is XOR-operated with the interference data selected in each level of interference data group, and the data is sent to the linear feedback shift register.

[0031] The present invention also provides an electronic device, including a memory and a processor, wherein the processor is used to implement the steps of a storage optimization method for randomizing seeds of SSD data when executing a computer management program stored in the memory.

[0032] The present invention also provides a computer-readable storage medium on which a computer management program is stored. When the computer management program is executed by a processor, the steps of the storage optimization method of the SSD data randomization seed are implemented.

[0033] Beneficial effect: The present invention provides a storage optimization method and system for randomized seeds of SSD data, wherein the method comprises: obtaining a random number, performing XOR operation on the random number and the original seed and iterating to obtain a new seed, judging the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group when the requirements are met; performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed; using the valid seed as the new original seed, repeating step S100 to obtain a second-level interference data group; repeating steps S100 to S300 to obtain multiple levels of interference data groups; storing the original seed, the first-level interference data group, the second-level interference data group, and up to the Lth-level interference data group into a chip memory, wherein L is a natural number; selecting a seed in the original seed and interference data in each level of interference data group, performing XOR operation on the seed and the interference data selected in each level of interference data group, and sending the data to a linear feedback shift register. By using some interference data and the original seeds to perform XOR to obtain more new seeds, and applying the interference data grading method to obtain more new seeds, the space for storing seeds is reduced, greatly improving the utilization of SSD storage space. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A flow chart of a storage optimization method for SSD data randomization seeds provided by the present invention;

[0035] Figure 2 A flow chart for finding interference data provided by the present invention;

[0036] Figure 3 A flow chart of the interaction between the seeds and interference data at various levels provided by the present invention;

[0037] Figure 4 A schematic diagram of the hardware structure of a possible electronic device provided by the present invention;

[0038] Figure 5 A schematic diagram of the hardware structure of a possible computer-readable storage medium provided by the present invention. DETAILED DESCRIPTION

[0039] The specific implementation of the present invention is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0040] like Figures 1 to 3 As shown, the present invention provides a storage optimization method for SSD data randomization seeds, comprising the following steps:

[0041] S100, obtaining a random number, performing XOR operation on the random number and the original seed and iterating to obtain a new seed, determining the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group if the requirements are met;

[0042] S200, performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed;

[0043] S300, taking the effective seed as the new original seed, repeating step S100 to obtain a second-level interference data group;

[0044] S400, repeating steps S100 to S300 to obtain a multi-level interference data group;

[0045] S500, storing the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into a chip memory, where L is a natural number;

[0046] S600, selecting a seed from the original seed and interference data from each level of interference data group, performing an XOR operation on the seed and the selected interference data from each level of interference data group, and sending the data to a linear feedback shift register.

[0047] The specific steps are as follows:

[0048] 1. Use software to generate a random number.

[0049] 2. Determine whether this random number is the same as the original seed. If so, return to step 1.

[0050] 3. Use the generated random number to perform an XOR operation with the original seed. If the original seed number is K, you can get K new seeds.

[0051] 4. Determine whether the maximum number of consecutive 0s and 1s in each new seed is less than N. If not, return to step 1.

[0052] 5. Further determine whether the ratio of 0 to 1 in each new seed is between 0.4 and 0.6. If not, return to step 1.

[0053] 6. Put the K new seeds into the linear feedback shift register in turn for iteration. Each seed is iterated P times (P represents the amount of data in a NAND page) to obtain KxP data.

[0054] 7. Connect the P data corresponding to each new seed to determine whether the maximum number of consecutive 0s and 1s is less than M. If not, return to step 1.

[0055] 8. Further determine whether the proportion of 0 and 1 in each connected P data is close to 50%. If not, return to step 1. If yes, the random number generated in step 1 is the required interference data.

[0056] 9. Repeat steps 1 to 8 to find the first level interference data.

[0057] 10. A new valid seed can be obtained by XORing the first-level interference data with the original seed. If the number of first-level interference data is R, KxR new valid seeds can be obtained.

[0058] 11. Take KxR data as the new original seed, repeat steps 1 to 8, and modify step 2 as follows: determine whether this random number is the same as the original seed and the first-level interference data, and you can get the second-level interference data. If the second-level interference data is S, you can get KxRxS new valid seeds.

[0059] 12. By analogy, more levels of interference data can be found as needed.

[0060] 13. Store the original seed, first-level interference data, second-level interference data, to L-th-level interference data into the chip memory.

[0061] By controlling the selection of the seed and each level of interference data, the original seed is XORed with each level of interference data, and the data is sent to the linear feedback shift register. Through each iteration, the iterated data is XORed with the data sent to the NAND.

[0062] 14. The selection of seeds can be obtained by dividing the page address by the number of seeds and taking the remainder. The selection of the first-level interference data can be obtained by dividing the page address by the number of seeds and then by the number of the first-level interference data and taking the remainder. Similarly, the selection of the Lth-level interference data can be obtained.

[0063] This solution can save the storage space of seeds to a great extent. For example, according to the conventional method, the storage of 2,000 seeds requires 20 seeds, 10 first-level interference data, and 10 second-level interference data if the present invention is adopted, so 20x10x10=2000 new seeds can be obtained.

[0064] The embodiment of the present invention further provides a storage optimization system for SSD data randomization seeds, wherein the system is used to implement a storage optimization method for SSD data randomization seeds, specifically comprising:

[0065] A random number acquisition module is used to obtain a random number;

[0066] The interference data group calculation module is used to XOR the random number with the original seed and iterate to obtain a new seed, determine the proportion of 0 and 1 in the new seed, and select the random number as the first-level interference data group when the requirement is met; XOR the first-level interference data group with the original seed to obtain a new valid seed; use the valid seed as the new original seed and repeat step S100 to obtain a second-level interference data group; repeat this to obtain multiple levels of interference data groups;

[0067] The storage module is optimized to store the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into the chip memory, where L is a natural number; the seed in the original seed and the interference data in each level of interference data group are selected, and the seed is XOR-operated with the interference data selected in each level of interference data group, and the data is sent to the linear feedback shift register.

[0068] See also Figure 4 Schematic diagram of an electronic device provided by an embodiment of the present invention. Figure 4 As shown, an embodiment of the present invention provides an electronic device, including a memory 1310, a processor 1320, and a computer program 1311 stored in the memory 1310 and executable on the processor 1320. When the processor 1320 executes the computer program 1311, the following steps are implemented: S100, obtaining a random number, performing XOR on the random number and an original seed and iterating to obtain a new seed, determining the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group when the requirement is met;

[0069] S200, performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed;

[0070] S300, taking the effective seed as the new original seed, repeating step S100 to obtain a second-level interference data group;

[0071] S400, repeating steps S100 to S300 to obtain a multi-level interference data group;

[0072] S500, storing the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into a chip memory, where L is a natural number;

[0073] S600, selecting a seed from the original seed and interference data from each level of interference data group, performing an XOR operation on the seed and the selected interference data from each level of interference data group, and sending the data to a linear feedback shift register.

[0074] See also Figure 5 Schematic diagram of an embodiment of a computer-readable storage medium provided by the present invention. Figure 5 As shown, this embodiment provides a computer-readable storage medium 1400, on which a computer program 1411 is stored. When the computer program 1411 is executed by a processor, the following steps are implemented: S100, obtaining a random number, performing XOR on the random number and an original seed and iterating to obtain a new seed, determining the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group when the requirement is met;

[0075] S200, performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed;

[0076] S300, taking the effective seed as the new original seed, repeating step S100 to obtain a second-level interference data group;

[0077] S400, repeating steps S100 to S300 to obtain a multi-level interference data group;

[0078] S500, storing the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into a chip memory, where L is a natural number;

[0079] S600, selecting a seed from the original seed and interference data from each level of interference data group, performing an XOR operation on the seed and the selected interference data from each level of interference data group, and sending the data to a linear feedback shift register.

[0080] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0081] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0082] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0083] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A storage optimization method for randomized seeds of SSD data, characterized in that: The following steps are involved: S100, obtaining a random number, performing XOR on the random number and the original seed and iterating to obtain a new seed, determining the proportion of 0 and 1 in the new seed, and selecting the random number as the first-level interference data group when the requirements are met; specifically comprising: S1, obtain a random number and perform an XOR operation with the original seed; S2, judging whether the ratio of 0 to 1 in each new seed is between 0.4 and 0.6, if not, returning to step S1, if yes, proceeding to the next step; S3, put K new seeds into the linear feedback shift register in turn for iteration. Each seed is iterated P times to obtain KxP data, where P represents the amount of data in a NAND page, and K and P are natural numbers. S4, determine whether the proportion of each of the P connected data 0 and 1 is a preset value, if not, return to step S1, if yes, the random number generated in step 1 is the required interference data; the preset value is 50%; Determine whether the maximum number of consecutive 0s and / or the maximum number of consecutive 1s in each new seed is less than N. If not, return to step S1; S200, performing XOR operation on the first-level interference data group and the original seed to obtain a new valid seed; S300, taking the effective seed as the new original seed, repeating step S100 to obtain a second-level interference data group; S400, repeating steps S100 to S300 to obtain a multi-level interference data group; S500, storing the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into a chip memory, where L is a natural number; S600 selects a seed in the original seed and interference data in each level of interference data group, performs an XOR operation on the seed and the selected interference data in each level of interference data group, and sends the data to a linear feedback shift register; Specifically, the process of selecting a seed includes: obtaining the remainder according to the page address divided by the number of seeds; The selection process of interference data in each level of interference data group specifically includes: the selection of interference data in the first level interference data group is obtained by dividing the page address by the number of seeds and then dividing by the number of first level interference data groups to obtain the remainder. Similarly, the selection of interference data in the Lth level interference data group can be obtained.

2. The storage optimization method for randomizing SSD data according to claim 1, characterized in that: The S1 specifically includes: Determine whether this random number is the same as the original seed number. If so, obtain a new random number.

3. A storage optimization system for randomized seeds of SSD data, characterized in that: The system is used to implement the storage optimization method for SSD data randomization seeds according to any one of claims 1-2, specifically comprising: A random number acquisition module is used to obtain a random number; The interference data group calculation module is used to XOR the random number with the original seed and iterate to obtain a new seed, determine the proportion of 0 and 1 in the new seed, and select the random number as the first-level interference data group when the requirement is met; XOR the first-level interference data group with the original seed to obtain a new valid seed; use the valid seed as the new original seed and repeat step S100 to obtain a second-level interference data group; repeat this to obtain multiple levels of interference data groups; The storage module is optimized to store the original seed, the first-level interference data group, the second-level interference data group, and up to the L-th-level interference data group into the chip memory, where L is a natural number; the seed in the original seed and the interference data in each level of interference data group are selected, and the seed is XOR-operated with the interference data selected in each level of interference data group, and the data is sent to the linear feedback shift register.

4. An electronic device, characterized in that: It comprises a memory and a processor, wherein the processor is used to implement the steps of the storage optimization method for randomizing seeds of SSD data as described in any one of claims 1 to 2 when executing a computer management program stored in the memory.

5. A computer-readable storage medium, characterized in that: A computer management program is stored thereon, and when the computer management program is executed by a processor, the steps of the storage optimization method for randomizing seeds of SSD data as described in any one of claims 1-2 are implemented.

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