Display substrate and display device

Abstract

The present disclosure provides a display substrate and a display device, and belongs to the technical field of display. The display substrate comprises a display area and a non-display area surrounding the display area at least partially, wherein the non-display area comprises a binding area, a plurality of first pads located in the binding area, the plurality of first pads are configured to be electrically connected with an external electrical test circuit in a panel test stage, and are configured to be bound with a circuit board, and in a display stage, the circuit board transmits electrical signals to the display area; a plurality of second pads located in the binding area, the plurality of second pads are configured to be bound with the circuit board, and in the display stage, the circuit board transmits electrical signals to the display area; the plurality of first pads and the plurality of second pads are arranged side by side in a first direction, and the width of the plurality of first pads in the first direction is greater than the width of at least part of the plurality of second pads in the first direction. The technical scheme of the present disclosure can improve the screen-to-body ratio of the display area.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Technology

[0002] OLED (Organic Light-Emitting Diode) display devices have been widely used in various fields such as televisions, smartphones, smart wearables, VR, and automotive displays due to their advantages such as thinness, light weight, wide viewing angle, active light emission, continuously adjustable emission color, low cost, fast response speed, low power consumption, low driving voltage, wide operating temperature range, simple manufacturing process, high luminous efficiency, and flexible display.

[0003] With the development of OLED display products, "screen-to-body ratio" has become a very popular term in the appearance of OLED smart products such as smartphones and wearable devices. However, the size of the products cannot grow indefinitely, and the only way to achieve a higher screen-to-body ratio is to reduce the bezels of the display screen. Therefore, as consumers pursue portability and viewing angle effects in display products, ultra-narrow bezels and even full-screen displays have become a new trend in the development of OLED products. Summary of the Invention

[0004] Embodiments of this disclosure provide a display substrate including a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area.

[0005] Multiple first pads are located in the bonding area. The multiple first pads are configured to be electrically connected to an external electrical test circuit during the panel testing phase and are configured to be bonded to the circuit board, transmitting electrical signals from the circuit board to the display area during the display phase.

[0006] Multiple second pads are located in the bonding area and are configured to bond to the circuit board to transmit electrical signals from the circuit board to the display area during the display phase.

[0007] The plurality of first pads and the plurality of second pads are arranged side by side in a first direction, and the width of the plurality of first pads in the first direction is greater than the width of at least a portion of the plurality of second pads in the first direction.

[0008] In some embodiments, in a first direction, the distance between two adjacent first pads is greater than the distance between at least some of the adjacent second pads, wherein the display area and the bonding area are arranged sequentially in a second direction, and the first direction intersects the second direction.

[0009] In some embodiments, the extending directions of the plurality of first pads and the plurality of second pads are substantially parallel to the second direction.

[0010] In some embodiments, the orthographic projections of the plurality of first pads and the plurality of second pads on the display substrate are rectangular.

[0011] In some embodiments, lengths of the plurality of first pads in the second direction are greater than lengths of at least part of the plurality of second pads in the second direction.

[0012] In some embodiments, the plurality of first pads comprises a first sub-pad group and a second sub-pad group, the first sub-pad group comprises a plurality of first sub-pads, the second sub-pad group comprises a plurality of second sub-pads, and the plurality of second pads is between the first sub-pad group and the second sub-pad group.

[0013] In some embodiments, the plurality of second pads comprises a third sub-pad group, a fourth sub-pad group, and a fifth sub-pad group, the third sub-pad group comprises a plurality of third sub-pads, the fourth sub-pad group comprises a plurality of fourth sub-pads, the fifth sub-pad group comprises a plurality of fifth sub-pads, and the fifth sub-pad group is between the third sub-pad group and the fourth sub-pad group; or

[0014] the third sub-pad group and the fourth sub-pad group are between the fifth sub-pad group.

[0015] In some embodiments, widths of the plurality of third sub-pads and the plurality of fourth sub-pads in the first direction are greater than widths of at least part of the plurality of fifth sub-pads in the first direction.

[0016] In some embodiments, the plurality of third sub-pads and the plurality of fourth sub-pads are configured to be electrically connected with external electrical testing circuits in a panel testing stage, and are configured to be bonded with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage.

[0017] In some embodiments, the display area comprises a first boundary, a second boundary, a third boundary, and a fourth boundary arranged in sequence, and the bonding area is located in the non-display area close to the fourth boundary.

[0018] The display substrate further comprises a first power line (VDD), a first power pin, and a second power pin, the first power line is connected with the first power pin and the second power pin.

[0019] The first power line extends along the first direction and is located in the non-display area between the display area and the bonding area.

[0020] The first power pin is located on a side of the plurality of first sub-pads away from the plurality of second pads, and the second power pin is located on a side of the plurality of second sub-pads away from the plurality of second pads.

[0021] In some embodiments, the display substrate further comprises a second power line (VSS), a third power pin, and a fourth power pin, the second power line and the third power pin, the fourth power pin are connected;

[0022] The second power line is located in the non-display area and at least partially surrounds the first boundary, the second boundary, and the third boundary, and the third power pin and the fourth power pin are located in the non-display area close to the fourth boundary.

[0023] The third power pin is located on a side of the first power pin away from the plurality of second pads, and the fourth power pin is located on a side of the third power pin away from the plurality of second pads.

[0024] In some embodiments, the first power pin, the second power pin, the third power pin, and the fourth power pin are configured to be electrically connected with an external electrical test circuit in a panel test stage, and are configured to be bound with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage.

[0025] In some embodiments, the plurality of first sub-pads are located between the first power pin and the third power pin, and the plurality of second sub-pads are located between the second power pin and the fourth power pin.

[0026] In some embodiments, the plurality of first sub-pads are located on a side of the third power pin away from the first power pin, and the plurality of second sub-pads are located on a side of the fourth power pin away from the second power pin.

[0027] In some embodiments, the first power line is a positive voltage power line, and the second power line is a negative voltage power line.

[0028] In some embodiments, a width of at least one of the first power pin, the second power pin, the third power pin, and the fourth power pin in the first direction is greater than a width of the plurality of first pads or the plurality of second pads in the first direction.

[0029] In some embodiments, the first pad is configured to transmit at least one of a gate driving signal, a multiplexer signal, and an electrical test signal.

[0030] In some embodiments, the third sub-pad and the fourth sub-pad are configured to transmit high-level signals and low-level signals, respectively, and the fifth sub-pad is configured to transmit a data signal.

[0031] In some embodiments, a plurality of input pins and a plurality of output pins are further included, the plurality of input pins and the plurality of output pins are located between the display area and the plurality of second pads, and the plurality of input pins are located on a side of the plurality of output pins away from the display area.

[0032] The plurality of input pins and the plurality of output pins are configured to be bonded with a driving IC.

[0033] The plurality of input pins are connected to the plurality of second pads by wires.

[0034] Embodiments of the present disclosure further provide a display device including the display substrate as described above, and the display device further includes a circuit board, and the plurality of first pads and the plurality of second pads are bonded with the circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 FIG. 1 is a schematic diagram of an outline of an OLED display product;

[0036] Figure 2 FIG. 2 is a schematic diagram of a structure of a display substrate according to an embodiment of the present disclosure;

[0037] Figures 3-6 FIG. 3 is a schematic diagram of a structure of a bonding area according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0038] In order to make the technical problems, technical solutions and advantages to be solved by embodiments of the present disclosure more clear, the following will be described in detail with reference to the accompanying drawings and specific embodiments.

[0039] In the process of the display substrate, before the circuit board is bonded, an electrical test is generally performed to detect whether there are foreign matters, mura, bright spots, dark spots and the like in the display substrate, so as to ensure that the layout and display function of the display substrate are intact, such as Figure 1 As shown in FIG. 1, an electrical test pad area 01 is arranged on the display substrate, and when the electrical test is performed, the probe of the electrical test circuit is connected to the electrical test pad of the electrical test pad area 01 to perform the electrical test. Figure 1 As shown in FIG. 1, a circuit board pad area 02 is further arranged on the display substrate, and the circuit board pad area 02 includes a plurality of circuit board pads for bonding with the driving circuit board.

[0040] The width Dx of the lower frame of the display substrate is closely related to the width of the left and right frames L / R of the display substrate. As shown in FIG. 1, Figure 1As shown, the circuit board pad area 02 and the electrical test pad area 01 are arranged at the lower frame of the display substrate, which causes the width Dx of the lower frame of the display substrate to be relatively large, and the width of the left and right frames L / R of the display substrate is also increased, especially for small-size display products. If the area of the circuit board pad area 02 and the electrical test pad area 01 is too large, the width Dx of the lower frame of the display substrate is much larger than the width of the display area, which further increases the width of the left and right frames and reduces the screen-to-body ratio of the display area.

[0041] The display substrate and the display device provided by the embodiments of the present disclosure can improve the screen-to-body ratio of the display area.

[0042] The display substrate provided by the embodiments of the present disclosure includes a display area and a non-display area surrounding the display area at least partially,

[0043] A plurality of first pads are arranged in the binding area, and the plurality of first pads are configured to be electrically connected with an external electrical test circuit in a panel test stage and configured to be bound with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage.

[0044] A plurality of second pads are arranged in the binding area, and the plurality of second pads are configured to be bound with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage.

[0045] The plurality of first pads and the plurality of second pads are arranged side by side in a first direction, and the width of the plurality of first pads in the first direction is greater than the width of at least part of the plurality of second pads in the first direction.

[0046] In the embodiments, the first pads can be electrically connected with an external electrical test circuit in a panel test stage, and can also be bound with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage. That is, the first pads can be used as electrical test pads and also as circuit board pads. In this way, a special area for placing electrical test pads is not needed, the total area occupied by the circuit board pad area 02 and the electrical test pad area 01 can be reduced, the width Dx of the lower frame of the display substrate can be reduced, and the width of the left and right frames of the display substrate can be reduced, thereby improving the screen-to-body ratio of the display area and achieving a narrow frame.

[0047] In the panel testing stage, the external electrical testing circuit is electrically connected with the first pads to electrically test the display substrate, detect whether there are foreign matters, mura, bright spots, dark spots and other defects in the display substrate, and ensure that the layout and display function of the display substrate are intact. After the display substrate is manufactured and electrically tested, the driving circuit board is bound with the first pads and the second pads, so that in the display stage, the circuit board can transmit electrical signals to the display area through the first pads and the second pads to drive the display area to display. The first pad has two boundaries perpendicular to the first direction, and the shortest distance between the two boundaries is the width of the first pad in the first direction; the second pad has two boundaries perpendicular to the first direction, and the shortest distance between the two boundaries is the width of the second pad in the first direction.

[0048] In this embodiment, as shown in FIG. 1, the first pad 031 in the circuit board pad is multiplexed as an electrical testing pad. When electrical testing is performed, the first pad 031 needs to be connected with the probe of the electrical testing circuit. Since the size of the probe of the electrical testing circuit is large, the width of the first pad 031 in the first direction should be greater than the width of at least part of the second pad 032 in the first direction, so as to ensure the electrical connection between the first pad 031 and the probe of the electrical testing circuit. Figures 3-6 In addition, the distance between adjacent first pads 031 also needs to be designed to be relatively large, so that short circuit between adjacent probes can be avoided when electrical testing is performed. The second pad 032 is used to input electrical signals to the display area. In order to reduce the area occupied by the circuit board pad, the distance between adjacent second pads 032 can be set to be relatively small. Therefore, in the first direction, the distance between two adjacent first pads is greater than the distance between at least part of two adjacent second pads, wherein the display area and the binding area are arranged in the second direction in sequence, and the first direction intersects the second direction.

[0049] In some embodiments, the extension direction of the plurality of first pads 031 and the plurality of second pads 032 is substantially parallel to the second direction. In this embodiment, the layout of the display area and the non-display area can be changed without changing the display substrate of the related art. The non-display area of the display substrate includes the binding area located in the lower frame of the display substrate, the circuit unit located in the upper half of the left and right frames of the display substrate, and the clock multiplexing circuit, the fan-out area and the like located in the lower half of the left and right frames of the display substrate. In this embodiment, only the distance and / or size of part of the circuit board pads in the binding area are adjusted to multiplex part of the circuit board pads as electrical testing pads, which is low in cost and easy to promote.

[0050]

[0051] Figure 2 ​A structural schematic of a display substrate is shown in an embodiment of the present disclosure. The display substrate includes a substrate, which includes a display area 10 and a non-display area 11 surrounding the display area 10.

[0052] A plurality of sub-pixels P, a plurality of data lines DATA and a plurality of gate lines are arranged in the display area 10. The display substrate further includes a plurality of first power lines VD in the display area 10 and a first power bus VDD in the non-display area 11 close to the first boundary (lower boundary) of the display area 10, which are electrically connected. In the display area 10, each column of sub-pixels P is electrically connected to one first power line VD, and the plurality of first power lines VD electrically connected to the plurality of columns of sub-pixels P are led out from the display area 10 to be connected to the first power bus VDD in the non-display area 11.

[0053] The display area 10 includes a first boundary 101, a second boundary 102, a third boundary 103 and a fourth boundary 104 (for example, a lower boundary, a left boundary, an upper boundary and a right boundary) connected in sequence, wherein the binding area 40 is located in the non-display area 11 close to the first boundary (lower boundary) of the display area 10. In this embodiment, the number of first pads depends on the test requirements, and the number of first pads needs to be determined according to the electrical test requirements; the total number of circuit board pads depends on the resolution of the display substrate and the attribute of the driving circuit board. Therefore, in this embodiment, before the display substrate is made, the total number of circuit board pads can be determined according to the resolution of the display substrate and the attribute of the driving circuit board, then the number of first pads is determined according to the electrical test requirements, the number of second pads is determined according to the total number of circuit board pads and the number of first pads; then the spacing between the first pads and the spacing of the second pads are determined according to the space of the lower frame of the display substrate and the process conditions, so that the spacing of the first pads meets the electrical test requirements, and the spacing of the second pads meets the input electrical signal requirements, so that the first pads act as electrical test pads when the display substrate is electrically tested, and the first pads and the second pads jointly act as circuit board pads to transmit the electrical signals of the driving circuit board to the display area after the display substrate is bound with the driving circuit board.

[0054] In a specific embodiment, the number of first pads can be 10-50, such as 21; the width of the first pad in the first direction can be 50-500 um, when the first pad is used to connect with the VDD signal line and the VSS signal line, the width of the first pad in the first direction can be 50-500 um, such as 280 um; when the first pad is used to connect with other signal lines, the width of the first pad in the first direction can be 20-200 um, such as 90 um.

[0055] The number of the second pads can be 20-1000, such as 104; the width of the second pads in the first direction can be 10-100um, such as 57um.

[0056] The first pads are connected to the electrical test circuit of the display substrate through the wires, and the electrical test circuit is connected to the signal lines of the AA area (display area), which is used to test whether the display substrate can display normally; the second pads are connected to the IC PIN (pin of the driving circuit board) of the input end of the display substrate through the wires, and the signal is transmitted to the IC on the display substrate for processing, and then transmitted to the data lines of the AA area through the IC PIN of the output end to display the corresponding picture. When electrical testing is performed, only the test probe is placed on the first pad to test the signal, and after the test is completed, the first pad used for electrical testing is not damaged, so it can still be used to bind the FPC (flexible circuit board) without being affected.

[0057] It should be noted that the display substrate here refers to the structure before the driving circuit board is bound in the binding area during the production of the display device. Before the circuit board is bound, the display substrate can be detected through the external electrical test circuit and the first pad to determine whether the display substrate is abnormal, and only the display substrate with normal substrate detection can be further bound to the circuit board, thereby improving the production yield of the product.

[0058] In some embodiments, the first pad has two boundaries substantially perpendicular to the second direction, and the shortest distance between the two boundaries is the length of the first pad in the second direction; the second pad has two boundaries substantially perpendicular to the second direction, and the shortest distance between the two boundaries is the length of the second pad in the second direction.

[0059] The orthographic projection of the plurality of first pads 031 and the plurality of second pads 032 on the display substrate is a rectangle, which can match the probe of the external electrical test circuit and the pin of the circuit board, wherein the orthographic projection being a rectangle means that the width of the first pad in the first direction is less than the length in the second direction; the orthographic projection being a rectangle means that the width of the second pad in the first direction is less than the length in the second direction.

[0060] Since the size of the probe of the electrical test circuit is large, in some embodiments, the length of the plurality of first pads 031 in the second direction is greater than the length of at least part of the plurality of second pads 032 in the second direction. In this way, the electrical connection between the first pad 031 and the probe of the electrical test circuit can be ensured.

[0061] In some embodiments, as shown in FIG. 1, the first pads 031 and the second pads 032 are arranged in a staggered manner. Figure 3As shown, the plurality of first pads 031 include a first sub-pad group and a second sub-pad group. The first sub-pad group includes a plurality of first sub-pads 0311, and the second sub-pad group includes a plurality of second sub-pads 0312. The plurality of second pads 032 are located between the first sub-pad group and the second sub-pad group.

[0062] In some embodiments, such as Figures 3-6 As shown, the plurality of second pads 032 include a third sub-pad group, a fourth sub-pad group, and a fifth sub-pad group. The third sub-pad group includes a plurality of third sub-pads 0323, the fourth sub-pad group includes a plurality of fourth sub-pads 0324, and the fifth sub-pad group includes a plurality of fifth sub-pads 0325.

[0063] Some or all of the fifth sub-pad group may be located between the third sub-pad group and the fourth sub-pad group; or

[0064] In some embodiments, the third sub-pad group and the fourth sub-pad group are located between the fifth sub-pad group.

[0065] like Figure 6 As shown, all of the third and fourth sub-pad groups may be located between the fifth sub-pad group; some of the third sub-pads may be located between the fifth sub-pad groups, while others may be located outside the fifth sub-pad group; some of the fourth sub-pads may be located between the fifth sub-pad groups, while others may be located outside the fifth sub-pad group; and both the third and fourth sub-pad groups may be located outside the fifth sub-pad group.

[0066] In a specific example, such as Figure 3 As shown, the third sub-pad group is located between the fifth sub-pad groups, but the fourth sub-pad group is located outside the fifth sub-pad group.

[0067] In another specific example, such as Figures 4-5 As shown, the third sub-pad group and the fourth sub-pad group are both located outside the fifth sub-pad group.

[0068] In some embodiments, the width of the plurality of third sub-pads 0323 and the plurality of fourth sub-pads 0324 in the first direction is greater than the width of at least a portion of the fifth sub-pad 0325 in the first direction.

[0069] In some embodiments, since the width of the third sub-pad 0323 and the fourth sub-pad 0324 in the first direction is relatively large, which meets the requirements for probe connection with the external electrical test circuit, the plurality of third sub-pads 0323 and the plurality of fourth sub-pads 0324 are configured to be electrically connected to the external electrical test circuit during the panel testing phase, and are configured to be bonded to the circuit board, so as to transmit the electrical signals of the circuit board to the display area during the display phase.

[0070] In some embodiments, the display area includes a first boundary, a second boundary, a third boundary, and a fourth boundary arranged sequentially, and the binding area is located in the non-display area near the fourth boundary;

[0071] like Figure 3 As shown, the display substrate also includes a first power line 038 (VDD), a first power pin 033, and a second power pin 034, wherein the first power line 038 is connected to the first power pin 033 and the second power pin 034.

[0072] The first power line 038 extends along the first direction and is located in the non-display area between the display area and the bonding area;

[0073] The first power pin 033 is located on the side of the plurality of first sub-pads 0311 away from the plurality of second pads 032, and the second power pin 034 is located on the side of the plurality of second sub-pads 0312 away from the plurality of second pads.

[0074] In some embodiments, such as Figure 3 As shown, the display substrate also includes a second power line 037 (VSS), a third power pin 035 and a fourth power pin 036, and the second power line 037 is connected to the third power pin 035 and the fourth power pin 036.

[0075] The second power line 037 is located in the non-display area and at least partially surrounds the first boundary, the second boundary and the third boundary, and the third power pin 035 and the fourth power pin 036 are located in the non-display area near the fourth boundary;

[0076] The third power pin 035 is located on the side of the first power pin 033 away from the plurality of second pads 032, and the fourth power pin 036 is located on the side of the third power pin 034 away from the plurality of second pads 032.

[0077] In some embodiments, the first power pin 033, the second power pin 034, the third power pin 035, and the fourth power pin 036 are configured to be electrically connected to an external electrical test circuit during the panel testing phase, and are configured to be bonded to the circuit board, transmitting electrical signals from the circuit board to the display area during the display phase. Thus, the first power pin 033, the second power pin 034, the third power pin 035, and the fourth power pin 036 can serve as circuit board pins, and can also be reused as electrical test pins, reducing the number of pins in the bonding area.

[0078] In some embodiments, such as Figure 4 As shown, the plurality of first sub-pads 0311 are located between the first power pin 033 and the third power pin 035, and the plurality of second sub-pads 0312 are located between the second power pin 034 and the fourth power pin 036.

[0079] In some embodiments, such as Figure 5 As shown, the plurality of first sub-pads 0311 are located on the side of the third power pin 035 away from the first power pin 033, and the plurality of second sub-pads 0312 are located on the side of the fourth power pin 036 away from the second power pin 034.

[0080] In the above embodiments, the first power line 038 can be a positive voltage power line, and the second power line 037 can be a negative voltage power line.

[0081] In some embodiments, to ensure the reliability of the electrical connection, at least one of the first power pin 033, the second power pin 034, the third power pin 035, and the fourth power pin 036 has a width in the first direction that is greater than the width of the plurality of first pads or the plurality of second pads in the first direction.

[0082] In some embodiments, the first pad 031 is configured to transmit at least one of a gate drive signal, a multiplexer signal, and an electrical test signal.

[0083] In some embodiments, the third sub-pad 0323 and the fourth sub-pad 0324 are configured to transmit high-level signals and low-level signals, respectively, and the fifth sub-pad 0325 is configured to transmit data signals.

[0084] In some embodiments, such as Figure 3 As shown, along the first direction, the first pad 031 is symmetrically positioned at both ends of the bonding area. During electrical testing, electrical test signals need to be input to both sides of the display area in the first direction via the first pad. To facilitate trace routing, the first pad is positioned at both ends of the bonding area.

[0085] Before the display substrate is prepared and not yet bound with the driving circuit board, the display substrate only has input pins and output pins to be bound with the driving circuit board, and some embodiments, as shown in Figures 4-6 the display substrate further includes a plurality of input pins 041 and a plurality of output pins 042, the plurality of input pins 041 and the plurality of output pins 042 are located between the display area and the plurality of second pads 032, the plurality of input pins 041 are located on the side away from the display area of the plurality of output pins 042;

[0086] the plurality of input pins 041 and the plurality of output pins 042 are configured to be bound with the driving IC;

[0087] the plurality of input pins 041 are connected with the plurality of second pads 032 through the conductive wires 039.

[0088] Embodiments of the present disclosure further provide a display device including the display substrate as described above, the display device further includes a circuit board, the plurality of first pads and the plurality of second pads are bound with the circuit board.

[0089] The display device includes, but is not limited to, a radio frequency unit, a network module, an audio output unit, an input unit, a sensor, a display unit, a user input unit, an interface unit, a memory, a processor, and a power supply, and the like. Those skilled in the art can understand that the structure of the display device described above does not constitute a limitation on the display device, and the display device can include more or fewer components described above, or combine certain components, or different component arrangements. In the embodiments of the present disclosure, the display device includes, but is not limited to, a display, a mobile phone, a tablet computer, a television, a wearable electronic device, a navigation display device, and the like.

[0090] The display device can be a television, a display, a digital photo frame, a mobile phone, a tablet computer, or any product or component with display function, wherein the display device further includes a flexible circuit board, a printed circuit board, and a back plate.

[0091] Embodiments of the present disclosure further provide a manufacturing method of a display substrate, the display substrate includes a display area and a non-display area at least partially surrounding the display area, the non-display area includes a binding area, and the manufacturing method further includes:

[0092] forming a plurality of first pads in the binding area, the plurality of first pads are configured to be electrically connected with an external electrical test circuit in a panel test stage, and are configured to be bound with a circuit board, and transmit electrical signals of the circuit board to the display area in a display stage;

[0093] A plurality of second pads are formed in the bonding area, and the plurality of second pads are configured to bond to the circuit board, so as to transmit electrical signals of the circuit board to the display area during the display phase;

[0094] The plurality of first pads and the plurality of second pads are arranged side by side in a first direction, and the width of the plurality of first pads in the first direction is greater than the width of at least a portion of the plurality of second pads in the first direction.

[0095] In this embodiment, the first pad can be electrically connected to an external electrical test circuit during the panel testing stage, and can also be bonded to the circuit board. During the display stage, it transmits the electrical signals of the circuit board to the display area. That is, the first pad can be used as an electrical test pad and also as a circuit board pad. This eliminates the need to set up a special area to place the electrical test pad, which can reduce the total area occupied by the circuit board pad area 02 and the electrical test pad area 01, reduce the width Dx of the bottom bezel of the display substrate, and thus reduce the width of the left and right bezels of the display substrate, improve the screen ratio of the display area, and achieve a narrow bezel.

[0096] During the panel testing phase, an external electrical testing circuit is electrically connected to the first pad to perform electrical testing on the display substrate. This tests detect defects such as foreign objects, uneven brightness (mura), bright spots, and dark spots within the substrate, ensuring the integrity of the substrate's layout, wiring, and display function. After the display substrate is fabricated and electrical testing is performed, the driver circuit board is bonded to the first and second pads. During the display phase, the circuit board can transmit electrical signals to the display area via the first and second pads, driving the display area to perform the display.

[0097] The first pad has two boundaries that are approximately perpendicular to the first direction, and the shortest distance between the two boundaries is the width of the first pad in the first direction; the second pad has two boundaries that are approximately perpendicular to the first direction, and the shortest distance between the two boundaries is the width of the second pad in the first direction.

[0098] In this embodiment, as Figures 3-6 As shown, the first pad 031 in the circuit board pads is reused as an electrical test pad. When performing electrical tests, the first pad 031 needs to be connected to the probe of the electrical test circuit. Since the probe of the electrical test circuit is large in size, the width of the first pad 031 in the first direction should be greater than at least part of the width of the second pad 032 in the first direction. This can ensure the electrical connection between the first pad 031 and the probe of the electrical test circuit.

[0099] In addition, the distance between adjacent first pads 031 also needs to be designed to be relatively large, so that short circuit between adjacent probes can be avoided during electrical testing. The second pads 032 are used to input electrical signals to the display area. In order to reduce the area occupied by the circuit board pads, the distance between adjacent second pads 032 can be set to be relatively small. Therefore, in the first direction, the distance between two adjacent first pads is greater than the distance between at least part of two adjacent second pads, wherein the display area and the binding area are arranged in the second direction in sequence, and the first direction intersects the second direction.

[0100] In some embodiments, the extension direction of the plurality of first pads 031 and the plurality of second pads 032 is substantially parallel to the second direction.

[0101] In the embodiment, the layout of the display area and the non-display area can not need to be changed compared with the display substrate of the related art. The non-display area of the display substrate includes the binding area located in the lower frame of the display substrate, the circuit unit located in the upper half of the left and right frames of the display substrate, and the clock multiplexing circuit, the fan-out area, etc. located in the lower half of the left and right frames of the display substrate. In the embodiment, only the distance and / or size of part of the circuit board pads in the binding area are adjusted to realize the multiplexing of part of the circuit board pads as electrical test pads, which is low in cost and easy to promote.

[0102] In some embodiments, forming the plurality of first pads and the plurality of second pads comprises:

[0103] determining the number and size of the first pads for connecting with the external electrical test circuit, manufacturing the first pads in the binding area according to the number and size, and manufacturing the second pads in the binding area according to the size of the circuit board pads, wherein the sum of the first pads and the second pads is equal to the number of the required circuit board pads.

[0104] In the embodiment, the number of the first pads depends on the test requirement, and the number of the first pads is determined according to the requirement of the electrical test; the total number of the pads of the circuit board depends on the resolution of the display substrate and the attribute of the driving circuit board. Therefore, in the embodiment, before the display substrate is manufactured, the total number of the pads of the circuit board can be determined according to the resolution of the display substrate and the attribute of the driving circuit board, the number of the first pads is determined according to the requirement of the electrical test, the number of the second pads is determined according to the total number of the pads of the circuit board and the number of the first pads; the interval between the first pads and the interval of the second pads are determined according to the space of the lower frame of the display substrate and the process condition, so that the interval between the first pads meets the requirement of the electrical test, and the interval of the second pads meets the requirement of the input electrical signal. In this way, when the display substrate is subjected to the electrical test, the first pads serve as the electrical test pads, and after the display substrate is bonded with the driving circuit board, the first pads and the second pads jointly serve as the pads of the circuit board to transmit the electrical signal of the driving circuit board to the display area.

[0105] In an embodiment, the number of the first pads can be 10-50, such as 21; the width of the first pad in the first direction can be 50-500 um, when the first pad is used to be connected with the VDD signal line and the VSS signal line, the width of the first pad in the first direction can be 50-500 um, such as 280 um; when the first pad is used to be connected with other signal lines, the width of the first pad in the first direction can be 20-200 um, such as 90 um.

[0106] The number of the second pads can be 20-1000, such as 104; the width of the second pad in the first direction can be 10-100 um, such as 57 um.

[0107] The first pad is connected with the electrical test circuit of the display substrate through the wire, and the electrical test circuit is connected with the signal line of the AA area (display area) to test whether the display substrate can display normally; the second pad is connected with the IC PIN (pin of the driving circuit board) of the input end of the display substrate through the wire, transmits the signal to the IC processing bonded on the display substrate, and then transmits the signal to the data line of the AA area through the IC PIN of the output end to display the corresponding picture. When the electrical test is performed, only the test probe is placed on the first pad to test the signal, and after the test is completed, the first pad used for the electrical test is not damaged, and therefore can still be used to perform the bonding FPC (flexible circuit board) without being affected.

[0108] It should be noted that the display substrate herein refers to a structure in a display device production process before a driving circuit board is bonded in a bonding area. Before the driving circuit board is bonded, the display substrate can be detected by an external electrical test circuit and the first bonding pad to determine whether the display substrate is abnormal. Only the display substrate that is normal in substrate detection can be further bonded with the driving circuit board, thereby facilitating improvement of product production yield.

[0109] In some embodiments, the first bonding pad has two boundaries substantially perpendicular to the second direction, and a shortest distance between the two boundaries is a length of the first bonding pad in the second direction; and the second bonding pad has two boundaries substantially perpendicular to the second direction, and a shortest distance between the two boundaries is a length of the second bonding pad in the second direction.

[0110] The orthographic projection of the plurality of first bonding pads 031 and the plurality of second bonding pads 032 on the display substrate is a rectangle, which can match a probe of the external electrical test circuit and a pin of the circuit board. The orthographic projection being a rectangle means that a width of the first bonding pad in the first direction is less than a length of the first bonding pad in the second direction; and the orthographic projection being a rectangle means that a width of the second bonding pad in the first direction is less than a length of the second bonding pad in the second direction.

[0111] Since the probe of the electrical test circuit has a large size, in some embodiments, the length of the plurality of first bonding pads 031 in the second direction is greater than the length of at least part of the plurality of second bonding pads 032 in the second direction. In this way, the electrical connection between the first bonding pad 031 and the probe of the electrical test circuit can be ensured.

[0112] Embodiments of the present disclosure also provide a test method of a display substrate, applied to the display substrate as described above, and the test method comprises:

[0113] In the panel test stage, the electrical test circuit sends an electrical test signal to the first bonding pad.

[0114] It should be noted that the display substrate herein refers to a structure in a display device production process before a driving circuit board is bonded in a bonding area. Before the driving circuit board is bonded, the display substrate can be detected by an external electrical test circuit and the first bonding pad to determine whether the display substrate is abnormal. Only the display substrate that is normal in substrate detection can be further bonded with the driving circuit board, thereby facilitating improvement of product production yield.

[0115] It should be noted that each of the embodiments in the present specification is described in a progressive manner, and the same or similar parts between each embodiment can be mutually referred to, and each embodiment focuses on the difference from other embodiments. In particular, for the embodiments, since they are basically similar to the product embodiments, they are described more simply, and the relevant parts can be referred to the part of the product embodiments.

[0116] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning of those skilled in the art to which the present disclosure pertains. The terms "first", "second", and similar terms used in the present disclosure do not denote any order, quantity, or importance, but are used to distinguish different components. The terms "include", "comprise", and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and equivalents thereof, and do not exclude other elements or objects. The terms "connected" or "coupled" and similar terms do not limit to physical or mechanical connections or couplings, but can include electrical connections or couplings, whether direct or indirect. The terms "upper", "lower", "left", "right", and the like are used only to indicate relative positions, and when the absolute positions of the described objects are changed, the relative positions can also be changed accordingly.

[0117] It can be understood that when an element such as a layer, a film, a region, or a substrate is referred to as being "on" or "under" another element, it can be "directly" on or under the other element, or one or more intervening elements can also be present.

[0118] In the description of the above-described embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0119] The above description is merely illustrative of the disclosure, and the protection scope of the disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, and all such changes and replacements should be encompassed within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display substrate, characterized in that, It includes a display area and a non-display area that at least partially surrounds the display area, the non-display area including a binding area. Multiple first pads are located in the bonding area. The multiple first pads are configured to be electrically connected to an external electrical test circuit during the panel testing phase and are configured to be bonded to the circuit board, transmitting electrical signals from the circuit board to the display area during the display phase. Multiple second pads are located in the bonding area and are configured to bond to the circuit board. During the display phase, the electrical signals of the circuit board are transmitted to the display area. The multiple second pads include a third sub-pad group and a fourth sub-pad group. The third sub-pad group includes multiple third sub-pads, and the fourth sub-pad group includes multiple fourth sub-pads. The multiple third sub-pads and multiple fourth sub-pads are configured to be electrically connected to an external electrical test circuit during the panel testing phase and are configured to bond to the circuit board. During the display phase, the electrical signals of the circuit board are transmitted to the display area. The plurality of first pads and the plurality of second pads are arranged side by side in a first direction, and the width of the plurality of first pads in the first direction is greater than the width of at least a portion of the plurality of second pads in the first direction; The number of the first pads is 10-50. When the first pads are used to connect with VDD signal lines and VSS signal lines, the width of the first pads in the first direction is 50-500um; when the first pads are used to connect with other signal lines, the width of the first pads in the first direction is 20-200um. The number of the second pads is 20-1000, and the width of the second pads in the first direction is 10-100um; In the first direction, the distance between two adjacent first pads is greater than the distance between at least partially adjacent second pads; The display area and the binding area are arranged sequentially in the second direction, and the first direction intersects with the second direction; The display area includes a first boundary, a second boundary, a third boundary, and a fourth boundary arranged sequentially, and the binding area is located in the non-display area near the fourth boundary; The display substrate further includes a first power line, a first power pin, and a second power pin, wherein the first power line is connected to the first power pin and the second power pin. The display substrate further includes a second power line, a third power pin, and a fourth power pin, wherein the second power line is connected to the third power pin and the fourth power pin; The first power pin, the second power pin, the third power pin, and the fourth power pin are configured to be electrically connected to an external electrical test circuit during the panel testing phase, and are configured to be bonded to the circuit board to transmit electrical signals from the circuit board to the display area during the display phase. At least one of the first power pin, the second power pin, the third power pin, and the fourth power pin has a width in the first direction that is greater than the width of the plurality of first pads or the plurality of second pads in the first direction.

2. The display substrate according to claim 1, characterized in that, The extension directions of the plurality of first pads and the plurality of second pads are substantially parallel to the second direction.

3. The display substrate according to claim 1, characterized in that, The orthographic projection of the plurality of first pads and the plurality of second pads on the display substrate is rectangular.

4. The display substrate according to claim 1, characterized in that, The length of the plurality of first pads in the second direction is greater than the length of at least a portion of the plurality of second pads in the second direction.

5. The display substrate according to claim 1, characterized in that, The plurality of first pads include a first sub-pad group and a second sub-pad group. The first sub-pad group includes a plurality of first sub-pads, and the second sub-pad group includes a plurality of second sub-pads. The plurality of second pads are located between the first sub-pad group and the second sub-pad group.

6. The display substrate according to claim 1, characterized in that, The plurality of second pads further includes a fifth sub-pad group, the third sub-pad group includes a plurality of third sub-pads, the fourth sub-pad group includes a plurality of fourth sub-pads, and the fifth sub-pad group includes a plurality of fifth sub-pads, the fifth sub-pad group being located between the third sub-pad group and the fourth sub-pad group; or The third sub-pad group and the fourth sub-pad group are located between the fifth sub-pad group.

7. The display substrate according to claim 6, characterized in that, The width of the plurality of third sub-pads and the plurality of fourth sub-pads in the first direction is greater than the width of at least a portion of the fifth sub-pad in the first direction.

8. The display substrate according to claim 6, characterized in that, The plurality of third sub-pads and the plurality of fourth sub-pads are configured to be electrically connected to an external electrical test circuit during the panel testing phase and are configured to be bonded to the circuit board, transmitting electrical signals from the circuit board to the display area during the display phase.

9. The display substrate according to claim 5, characterized in that, The first power line extends along the first direction and is located in the non-display area between the display area and the bonding area; The first power pin is located on the side of the plurality of first sub-pads away from the plurality of second pads, and the second power pin is located on the side of the plurality of second sub-pads away from the plurality of second pads.

10. The display substrate according to claim 9, characterized in that, The second power line is located in the non-display area and at least partially surrounds the first boundary, the second boundary, and the third boundary, and the third power pin and the fourth power pin are located in the non-display area near the fourth boundary; The third power pin is located on the side of the first power pin away from the plurality of second pads, and the fourth power pin is located on the side of the third power pin away from the plurality of second pads.

11. The display substrate according to claim 10, characterized in that, The plurality of first sub-pads are located between the first power pin and the third power pin, and the plurality of second sub-pads are located between the second power pin and the fourth power pin.

12. The display substrate according to claim 10, characterized in that, The plurality of first sub-pads are located on the side of the third power pin away from the first power pin, and the plurality of second sub-pads are located on the side of the fourth power pin away from the second power pin.

13. The display substrate according to claim 10, characterized in that, The first power line is a positive voltage power line, and the second power line is a negative voltage power line.

14. The display substrate according to claim 1, characterized in that, The first pad is configured to transmit at least one of a gate drive signal, a multiplexer signal, and an electrical test signal.

15. The display substrate according to claim 6, characterized in that, The third and fourth sub-pads are configured to transmit high-level signals and low-level signals, respectively, and the fifth sub-pad is configured to transmit data signals.

16. The display substrate according to any one of claims 1-15, characterized in that, It also includes multiple input pins and multiple output pins, which are located between the display area and the multiple second pads, with the multiple input pins located on the side of the multiple output pins away from the display area; The plurality of input pins and the plurality of output pins are configured to be bound to a driver IC; The plurality of input pins are connected to the plurality of second pads via wires.

17. A display device, characterized in that, The display device includes a display substrate as described in any one of claims 1-16, and further includes a circuit board, wherein the plurality of first pads and the plurality of second pads are bonded to the circuit board.

Images