Display substrate, manufacturing method thereof, display module and display device

Abstract

A display substrate has a display area and a peripheral area adjacent to the display area; the display substrate comprises: a substrate; an antenna trace arranged on one side of the substrate; the antenna trace is located in the peripheral area, and the antenna trace is arranged around the display area. At least one conductive layer is arranged on one side of the substrate; wherein the antenna trace and the at least one conductive layer are arranged in the same layer.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display substrate and its manufacturing method, a display module, and a display device. Background Technology

[0002] Radio Frequency Identification (RFID) is a wireless communication technology that can identify specific targets and read and write related data through radio signals without requiring mechanical or optical contact between the identification system and the specific target.

[0003] Radio signals transmit data from tags attached to objects via electromagnetic fields tuned to radio frequencies, enabling automatic identification and tracking. Some tags draw power from the electromagnetic field emitted by the reader during identification, eliminating the need for batteries; others are powered and actively emit radio waves (electromagnetic fields tuned to radio frequencies). The tags contain electronically stored information and can be identified within a range of several meters. Unlike barcodes, RFID tags do not need to be within the reader's line of sight and can be embedded within the object being tracked. Summary of the Invention

[0004] On one hand, a display substrate is provided. The display substrate has a display area and a peripheral area adjacent to the display area; the display substrate includes a substrate, an antenna trace disposed on one side of the substrate, and at least one conductive layer disposed on one side of the substrate; the antenna trace is located in the peripheral area and is disposed around the display area. The antenna trace and the at least one conductive layer are disposed on the same layer.

[0005] In some embodiments, the at least one conductive layer includes a first touch electrode layer and a second touch electrode layer, the second touch electrode layer being located on the side of the first touch electrode layer away from the substrate; the antenna trace includes a first portion disposed in the same layer as the second touch electrode layer.

[0006] In some embodiments, the at least one conductive layer further includes a first source / drain electrode layer and a second source / drain electrode layer, the second source / drain electrode layer being located between the first source / drain electrode layer and the first touch electrode layer; the antenna trace further includes a second portion disposed in the same layer as the second source / drain electrode layer; the second portion and the first portion are connected in parallel through at least one first via on at least one insulating layer between the second touch electrode layer and the second source / drain electrode layer.

[0007] In some embodiments, the antenna trace further includes a third portion disposed on the same layer as the first touch electrode layer, the third portion being connected in parallel with the first portion through at least one second via on at least one insulating layer located between the first touch electrode layer and the second touch electrode layer, the first via also penetrating the first touch electrode layer.

[0008] In some embodiments, the first via and the second via are arranged alternately along the extension direction of the antenna trace.

[0009] In some embodiments, the display substrate further includes an encapsulation layer located on the side of the first touch electrode layer near the substrate; all the first vias and all the second vias are projected onto the substrate outside the projection of the encapsulation layer onto the substrate.

[0010] In some embodiments, the display substrate further includes a voltage signal line located in the peripheral region and surrounding the display area; the voltage signal line is disposed in the same layer as the first source / drain electrode layer and / or the second source / drain electrode layer; the orthogonal projection of the antenna trace on the substrate is located on the side of the orthogonal projection of the voltage signal line on the substrate away from the display area.

[0011] In some embodiments, the display substrate further includes touch traces, which are disposed in the same layer as the first touch electrode layer and / or the second touch electrode layer; at least a portion of the orthographic projection of the antenna trace on the substrate is located on the side of the orthographic projection of the touch trace on the substrate that is away from the display area.

[0012] In some embodiments, there is a first overlapping region between the orthographic projection of the antenna trace on the substrate and the orthographic projection of the plurality of touch traces on the substrate, and the antenna trace and the plurality of touch traces are disposed on different layers at the corresponding first overlapping region.

[0013] In some embodiments, the display substrate further includes at least one first blocking dam, the at least one first blocking dam being located in the peripheral area and disposed around the display area; the orthogonal projection of the antenna trace on the substrate is located on the side of the orthogonal projection of the at least one first blocking dam on the substrate away from the display area; or, the orthogonal projection of the antenna trace on the substrate overlaps with the orthogonal projection of the first blocking dam farthest from the display area among all the first blocking dams on the substrate.

[0014] In some embodiments, the display substrate further includes an inorganic insulating layer and a second barrier dam; the inorganic insulating layer is located on a side surface of the substrate near the conductive layer; the inorganic insulating layer extends from the display area to the peripheral area, and the portion of the inorganic insulating layer away from the display area includes at least one groove; the second barrier dam has an orthographic projection on the substrate that overlaps with the orthographic projection of the at least one groove on the substrate.

[0015] In some embodiments, the antenna trace forms a coil around the display area; the coil extends at least from one side of the display area to the opposite side of one side of the display area.

[0016] In some embodiments, the antenna trace includes a multi-turn coil arranged in a spiral along a direction away from the display area; the coil closest to the display area among the multi-turn coils is a first coil; the antenna trace also includes an extension portion connected to the open end of the first coil, and the orthographic projection of the extension portion on the substrate and the orthographic projection of at least one second coil (excluding the first coil) among the multi-turn coils on the substrate have a second overlapping region, and at the corresponding second overlapping region, the extension portion and the second coil are on different layers.

[0017] In some embodiments, the distance from the orthogonal projection of the antenna trace onto the substrate to the display area is greater than or equal to approximately 20 μm.

[0018] In some embodiments, the display substrate further includes a bonding area located on the side of the peripheral area away from the display area; the display substrate further includes two antenna pins located in the bonding area; the input end of the antenna trace is connected to one of the antenna pins, and the output end of the antenna trace is connected to the other antenna pin.

[0019] On the other hand, a display module is provided. The display module includes: a display substrate as described in any of the above embodiments and a flexible circuit board bonded to the display substrate. The flexible circuit board has a matching circuit coupled to the antenna traces and a near-field communication chip coupled to the matching circuit.

[0020] In some embodiments, the display module further includes a microcontroller unit coupled to the near-field communication chip.

[0021] In another aspect, a display device is provided. The display device includes a display module as described in any of the above embodiments and a power module. The power module is configured to supply power to the display module.

[0022] In another aspect, a method for manufacturing a display substrate is provided. The display substrate includes a display area and a peripheral area adjacent to the display area. The method for manufacturing the display substrate includes: providing a substrate; forming an antenna trace on one side of the substrate; the antenna trace is located in the peripheral area and is disposed around the display area; forming at least one conductive layer on one side of the substrate; wherein the antenna trace and the at least one conductive layer are fabricated in the same layer. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0024] Figure 1 This is a structural diagram of a display substrate according to some embodiments;

[0025] Figure 2A This is a structural diagram of another display substrate according to some embodiments;

[0026] Figure 2B This is a structural diagram of another display substrate according to some embodiments;

[0027] Figure 3 This is a structural diagram of another display substrate according to some embodiments;

[0028] Figure 4 This is a structural diagram of a display area according to some embodiments;

[0029] Figure 5 This is a structural diagram of another display substrate according to some embodiments;

[0030] Figure 6 This is a top view of a display substrate according to some embodiments;

[0031] Figure 7 This is a top view of another display substrate according to some embodiments;

[0032] Figure 8 This is a top view of yet another display substrate according to some embodiments;

[0033] Figure 9 This is a structural diagram of another display substrate according to some embodiments;

[0034] Figure 10This is a structural diagram of another display substrate according to some embodiments;

[0035] Figure 11 This is a structural diagram of another display substrate according to some embodiments;

[0036] Figure 12 This is a structural diagram of another display substrate according to some embodiments;

[0037] Figure 13 This is a structural diagram of another display substrate according to some embodiments;

[0038] Figure 14 This is a structural diagram of another display substrate according to some embodiments;

[0039] Figure 15 This is a structural diagram of another display substrate according to some embodiments;

[0040] Figure 16 This is a structural diagram of a display module according to some embodiments;

[0041] Figure 17 This is a structural diagram of another display module according to some embodiments;

[0042] Figure 18 This is a structural diagram of a display device according to some embodiments;

[0043] Figure 19 This is a flowchart of a method for manufacturing a display substrate according to some embodiments. Detailed Implementation

[0044] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0045] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0046] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0047] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0048] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0049] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0050] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0051] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0052] As used herein, “approximately” or “about” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0053] "Same layer" refers to a layer structure formed using the same film deposition process to create a specific pattern, and then using the same photomask to form a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0054] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0055] like Figure 1 , Figure 2A and Figure 2B As shown, some embodiments of this disclosure provide a display substrate 10, which has a display area A and a peripheral area B adjacent to the display area A. The display substrate 10 includes a substrate 1, an antenna trace 2 disposed on one side of the substrate 1, and at least one conductive layer 3 located on one side of the substrate 1. The antenna trace 2 is located in the peripheral area B and is disposed around the display area A. The antenna trace 2 is disposed in the same layer as the at least one conductive layer 3.

[0056] The substrate 1 can be made of glass.

[0057] "Antenna trace 2 is disposed on the same layer as at least one conductive layer 3" can mean that antenna trace 2 is disposed on the same layer as one conductive layer 3 (e.g., ...). Figure 2A (As shown), or the antenna trace 2 and the multilayer conductive layer 3 can be set on the same layer (e.g. Figure 2B (As shown). It is worth noting that, as Figure 2A and Figure 2B As shown, when the display substrate 10 includes multiple conductive layers 3, there is at least one insulating layer 4 between each two adjacent conductive layers 3.

[0058] In some embodiments of this disclosure, the antenna trace 2 is integrated into the display substrate 10 and located within the peripheral area B of the display substrate 10. This enables the display device using the display substrate 10 to not only perform normal display functions but also to perform Near Field Communication (NFC) functions. Furthermore, by placing the antenna trace 2 on the same layer as at least one conductive layer 3, the manufacturing process of the display device is simplified, reducing costs. Compared to related technologies where the antenna trace is placed on substrates other than the display substrate in the display device, this arrangement also reduces the complexity of the wiring in the display device. Additionally, compared to related technologies where the antenna trace is placed on substrates other than the display substrate in the display device, in some embodiments of this disclosure, placing the antenna trace 2 within the display substrate 10 allows for a closer distance between the antenna trace 2 and the sensing point during NFC identification, resulting in better sensing performance.

[0059] In some embodiments, the display substrate 10 may be a touch display substrate. In some examples, such as Figure 2A As shown, the display substrate 10 may include a touch electrode layer 5. In this case, the at least one conductive layer 3 includes the touch electrode layer 5. The antenna trace 2 may be disposed on the same layer as the touch electrode layer 5.

[0060] In other examples, such as Figure 2B As shown, the display substrate 10 may include a first touch electrode layer 51 and a second touch electrode layer 52. The second touch electrode layer 52 is located on the side of the first touch electrode layer 51 away from the substrate. In this case, the at least one conductive layer 3 may include the first touch electrode layer 51 and the second touch electrode layer 52. The antenna trace 2 includes a first portion 21 disposed on the same layer as the second touch electrode layer 52.

[0061] For example, the materials of the first touch electrode layer 51 and the second touch electrode layer 52 can be metals, such as aluminum (Al), silver (Ag), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta), neodymium (Nd), or scandium (Sc). Alternatively, the materials of the first touch electrode layer 51 and the second touch electrode layer 52 can be alloys or nitrides of any of the above metals, or combinations of at least two of the above metal materials.

[0062] For example, the display substrate 10 may further include a fifth insulating layer 53 located between the first touch electrode layer 51 and the second touch electrode layer 52, and a sixth insulating layer 54 located on the side of the second touch electrode layer 52 away from the first touch electrode layer 51. The materials of the fifth insulating layer 53 and the sixth insulating layer 54 may be inorganic materials, such as silicon oxide (SiO2). x ), silicon nitride (SiN) x Materials such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum pentoxide (Ta2O5), hafnium dioxide (HfO2), and tin oxide (ZnO2) can be used. Alternatively, the materials of the fifth insulating layer 53 and the sixth insulating layer 54 can be organic materials, such as propylene, polyolefins, polyimide (PI), polyurethane, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polybutylene terephthalate (PBT), and polyethersulfone (PES).

[0063] The fifth insulating layer 53 is used to insulate the first touch electrode layer 51 and the second touch electrode layer 52 from each other. The sixth insulating layer 54 is used to protect the second touch electrode layer 52 and prevent moisture and oxygen from corroding it.

[0064] For example, the first touch electrode layer 51 and / or the second touch electrode layer 52 may include touch electrodes in a grid pattern.

[0065] With this configuration, the antenna trace 2 is integrated into the touch display substrate, enabling the display substrate 10 to achieve near-field communication functionality while simultaneously enabling touch control. Furthermore, since the antenna trace 2 includes a first portion 21 disposed on the same layer as the second touch electrode layer 52, the distance between the antenna trace 2 and the sensing point is closer, resulting in better sensing performance and higher sensitivity.

[0066] In some embodiments, the display substrate 10 can be an organic light-emitting diode (OLED) display substrate. In this case, as... Figure 2A , Figure 2B and Figure 3As shown, the display substrate 10 may include a circuit structure layer 6 located on one side of the substrate 1 and a light-emitting functional layer 7 located on the side of the circuit structure layer 6 away from the substrate 1. In other embodiments, the display substrate 10 may be a liquid crystal display (LCD) substrate, in which case the display substrate 10 may include a circuit structure layer, a pixel electrode layer, a common electrode layer, a liquid crystal layer, and an opposing substrate arranged sequentially away from the substrate 1.

[0067] When the display substrate is an OLED display substrate, multiple pixel driving circuits can be formed in the circuit structure layer 6. Each pixel driving circuit can include multiple thin-film transistors and storage capacitors. In some examples, the thin-film transistors can be top-gate thin-film transistors. In other examples, the thin-film transistors can be bottom-gate thin-film transistors. The thin-film transistor can include a semiconductor layer, a gate, a source, and a drain.

[0068] In some examples, such as Figure 2B As shown, when the thin film transistor is a top-gate thin film transistor, the circuit structure layer 6 may include a semiconductor layer 61, a first insulating layer 62, a gate layer 63, a second insulating layer 64, a source / drain electrode layer 65, and a third insulating layer 66, which are sequentially located away from the substrate 1.

[0069] In other examples, such as Figure 3 As shown, when the thin-film transistor is a top-gate thin-film transistor, the circuit structure layer 6 may further include a semiconductor layer 61, a first insulating layer 62, a gate layer 63, a second insulating layer 64, a first source / drain electrode layer 67, a third insulating layer 66, a second source / drain electrode layer 68, and a fourth insulating layer 69, which are sequentially located away from the substrate 1.

[0070] In some other examples, when the thin-film transistor is a bottom-gate thin-film transistor, the circuit structure layer 5 may include a gate layer, a gate insulating layer, a semiconductor layer, a source / drain electrode layer, and a planarization layer, which are sequentially located away from the substrate 1.

[0071] The gate layer 63 can be made of a metal, such as molybdenum (Mo). The source / drain electrode layer 55 can be a single-layer or multi-layer structure. For example, the source / drain electrode layer 65 may include a titanium metal layer, an aluminum metal layer, and a titanium metal layer stacked sequentially. For example, the first source / drain electrode layer 67 may include a titanium metal layer, an aluminum metal layer, and a titanium metal layer stacked sequentially. The second source / drain electrode layer 68 may include a titanium metal layer, an aluminum metal layer, and a titanium metal layer stacked sequentially.

[0072] For example, such as Figure 2A , Figure 2B and Figure 3As shown, the light-emitting functional layer 7 may include an anode layer 71, an organic light-emitting layer 72, and a cathode layer 73, arranged sequentially away from the circuit structure layer 6. For example, the anode layer 71 may be made of a metal, such as silver (Ag). Alternatively, the light-emitting functional layer 7 may include an anode layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, and a cathode layer, arranged sequentially away from the circuit structure layer 6. Or, the light-emitting functional layer 7 may include an anode layer, a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, an electron injection layer, and a cathode layer, arranged sequentially away from the circuit structure layer 6.

[0073] like Figure 2A and Figure 2B and Figure 3 As shown, the light-emitting functional layer 7 further includes a pixel defining layer 74, which has multiple through-holes for exposing multiple anode patterns in the anode layer 71. For example, the organic light-emitting layer 72 includes multiple organic light-emitting portions located in the multiple through-holes. The cathode layer 73 may simultaneously cover both the multiple organic light-emitting portions and the pixel defining layer 74.

[0074] Among them, such as Figure 3 As shown, a plurality of light-emitting devices 75 are formed in the light-emitting functional layer 7, and each light-emitting device 75 is located in a sub-pixel area A1 of the display area A. For example, a light-emitting device 75 can emit red light, or the light-emitting device 75 can emit blue light, or the light-emitting device 75 can emit green light, or the light-emitting device 75 can emit white light.

[0075] like Figure 4 As shown, the multiple sub-pixel regions A1 in the display area A can be divided into multiple pixel units A2. In some embodiments, each pixel unit A2 may include three sub-pixel regions A1, and the three sub-pixel regions A1 emit three primary color rays respectively. Alternatively, in other embodiments, each pixel unit A2 may include four sub-pixel regions A1, and the four sub-pixel regions A1 emit green light, red light, blue light, and white light respectively.

[0076] In some embodiments, such as Figure 3 and Figure 5 As shown, at least one conductive layer 3 further includes a first source / drain electrode layer 67 and a second source / drain electrode layer 68, with the second source / drain electrode layer 68 located between the first source / drain electrode layer 67 and the first touch electrode layer 51. The antenna trace 2 also includes a second portion 22 disposed on the same layer as the second source / drain electrode layer 68. The second portion 22 and the first portion 21 are connected in parallel through at least one first via 41 on at least one insulating layer 4 between the second touch electrode layer 52 and the second source / drain electrode layer 68.

[0077] This disclosure does not limit the number or shape of the first vias 41. For example, the number of first vias 41 may be 5 or 6. For example, the orthographic projection of the first vias 41 on the substrate 1 may be approximately circular or approximately rectangular.

[0078] For example, "at least one insulating layer 4" may include an insulating layer located between the first touch electrode layer 51 and the second touch electrode layer 52, and an insulating layer between the first touch electrode layer 51 and the light-emitting functional layer 7.

[0079] In this way, the first portion 21 of the antenna trace 2 and the second touch electrode layer 52 are disposed on the same layer, and the second portion 22 of the antenna trace 2 is disposed on the same layer as the second source / drain electrode layer 68. This allows the first portion 21 and the second touch electrode layer 52 to be formed in a single patterning process, and the second portion 22 and the second source / drain electrode layer 68 to be formed in a single patterning process. This simplifies the manufacturing process of the display substrate 10 including the antenna trace 2 and reduces costs. The parallel connection of the first portion 21 and the second portion 22 also reduces the resistance of the antenna trace 2, decreases the power consumption of the antenna trace 2, and improves the detection sensitivity of the antenna trace 2.

[0080] In some embodiments, such as Figure 3 and Figure 5 As shown, the antenna trace 2 also includes a third part 23 disposed on the same layer as the first touch electrode layer 51. The third part 23 and the first part 21 are connected in parallel through at least one second via 42 on at least one insulating layer 4 located between the first touch electrode layer 51 and the second touch electrode layer 52. The first via 41 also penetrates the first touch electrode layer 51.

[0081] This disclosure does not limit the number or shape of the second vias 42. For example, the number of second vias 42 may be 5 or 6. For example, the orthographic projection of the second vias 42 on the substrate 1 may be approximately circular or approximately rectangular.

[0082] For example, "at least one insulating layer 4" may include a fifth insulating layer located between the first touch electrode layer 51 and the second touch electrode layer 52.

[0083] In this way, the first part 21 is disposed on the same layer as the second touch electrode layer 52, and the third part 23 is disposed on the same layer as the first touch electrode layer 51. The first part 21 and the second touch electrode layer 52 can be formed in a single patterning process, and the third part 23 and the first touch electrode layer 51 can be formed in a single patterning process, thereby simplifying the manufacturing process of the display substrate 10 including the antenna trace 2 and reducing costs. The parallel arrangement of the first part 21 and the third part 23 can also reduce the resistance of the antenna trace 2, reduce the power consumption of the antenna trace 2, and improve the detection sensitivity of the antenna trace 2.

[0084] When the antenna trace 2 includes the first part 21, the second part 22 and the third part 23 mentioned above, the first part 21 and the second part 22 are connected in parallel through at least one first via 41, and the first part 21 and the third part 23 are connected in parallel through at least one second via 42, thereby further reducing the resistance of the antenna trace 2, reducing the power consumption of the antenna trace 2, and improving the detection sensitivity of the antenna trace 2.

[0085] It is worth mentioning that the second part 22, which is disposed on the same layer as the second source / drain electrode layer 68, and the third part 23, which is disposed on the same layer as the first touch electrode layer 51, are not directly connected in parallel through vias. Instead, they are connected in parallel through the first part 21, which is disposed on the same layer as the second touch electrode layer 52. This reduces the etching of at least one insulating layer 4 between the second source / drain electrode layer 68 and the first touch electrode layer 51, thereby allowing less moisture and oxygen to enter the light-emitting functional layer 7, ensuring that the light-emitting functional layer emits light normally. At the same time, this arrangement can also simplify the manufacturing process of the display substrate 10, save manufacturing time, and reduce the manufacturing cost of the display substrate 10.

[0086] For example, along the extension direction of antenna trace 2, the first via 41 and the second via 42 are arranged alternately. The alternating arrangement of the first via 41 and the second via 42 enables a more uniform distribution of the connection points between the first part 21 and the second part 22, and also a more uniform distribution of the connection points between the first part 21 and the third part 23, ensuring a more reliable connection between the first part 21 and the second part 22, and between the first part 21 and the third part 23, further reducing the resistance on antenna trace 2.

[0087] In some embodiments, such as Figure 3 As shown, the display substrate 10 may further include an encapsulation layer 8, which is located on the side of the first touch electrode layer 51 closest to the substrate 1. The encapsulation layer 8 can encapsulate the light-emitting functional layer 7 on the substrate 1, and at the same time, the encapsulation layer 8 can also prevent moisture and oxygen from entering the light-emitting functional layer 7, thus preventing the light-emitting functional layer 7 from failing to emit light normally due to moisture and oxygen corrosion.

[0088] In some examples, encapsulation layer 8 can be a single-layer structure. In other examples, encapsulation layer 8 can be a multi-layer structure. For example, ... Figure 3 As shown, when the encapsulation layer 8 is a multilayer structure, the encapsulation layer 8 may include a first inorganic insulating layer 81, an organic insulating layer 82, and a second inorganic insulating layer 83 that are sequentially located away from the light-emitting functional layer 7.

[0089] In some embodiments, such as Figure 3As shown, the orthographic projections of all first vias 41 and all second vias 42 on the substrate 1 are located outside the orthographic projection of the encapsulation layer 8 on the substrate 1. In this way, when etching to form the first vias 41 and the second vias 42, damage to the encapsulation layer 8 can be avoided, preventing moisture and oxygen from entering the light-emitting functional layer 7, and preventing the light-emitting functional layer from failing to emit light normally due to moisture and oxygen erosion.

[0090] In some embodiments, such as Figure 5 As shown, the display substrate 10 also includes a voltage signal line 9, which is located in the peripheral region B and surrounds the display region A. The voltage signal line 9 is disposed in the same layer as the first source / drain electrode layer 67 and / or the second source / drain electrode layer 68. The orthographic projection of the antenna trace 2 on the substrate 1 is located on the side of the orthographic projection of the voltage signal line 9 on the substrate 1 that is away from the display region A.

[0091] For example, voltage signal line 9 is used to provide a low-level (VSS) signal to the pixel driving circuit.

[0092] This configuration ensures that there is no overlap between the orthographic projection of antenna trace 2 on substrate 1 and the orthographic projection of voltage signal line 9 on substrate 1, thus preventing the generation of induced capacitance between antenna trace 2 and voltage signal line 9, which would affect the sensing performance of antenna trace 2 and the normal operation of pixel driving circuit.

[0093] The voltage signal line 9 is disposed on the same layer as the first source / drain electrode layer 67 or the second source / drain electrode layer 68, so that the voltage signal line 9 and the first source / drain electrode layer 67 or the second source / drain electrode layer 68 can be formed in one patterning process, simplifying the manufacturing process of the display substrate 10 and reducing costs.

[0094] In some embodiments, such as Figure 6 and Figure 7 As shown, the display substrate 10 may further include touch traces 55, which are disposed in the same layer as the first touch electrode layer 51 and / or the second touch electrode layer 52. At least a portion of the orthographic projection of the antenna trace 2 onto the substrate 1 is located on the side of the orthographic projection of the touch trace 55 onto the substrate 1 that is away from the display area A.

[0095] Among them, the orthogonal projection of antenna trace 2 on substrate 1 can all be located on the side of the orthogonal projection of touch trace 55 on substrate 1 that is far away from display area A (e.g., Figure 6 (As shown). Alternatively, a portion of the antenna trace 2 in the orthographic projection on the substrate 1 is located on the side of the touch trace 55 in the orthographic projection on the substrate 1 that is furthest from the display area (e.g.). Figure 7 and Figure 8 (As shown).

[0096] This configuration ensures that the antenna trace 2 is far from the display area A, preventing the antenna trace 2 from blocking the light emitted from the display area A and causing poor image display.

[0097] In some embodiments, see Figure 7 and Figure 9 There is a first overlapping region C between the orthographic projection of the antenna trace 2 on the substrate 1 and the orthographic projection of the multiple touch traces 55 on the substrate 1. At the corresponding first overlapping region C, the antenna trace 2 and the multiple touch traces 55 are set on different layers.

[0098] In this way, while setting the antenna trace 2 to enable the display substrate to achieve near-field communication, the antenna trace 2 is prevented from being electrically connected to the touch trace 55, ensuring that the touch signal transmitted on the touch trace 55 and the sensing signal on the antenna trace 2 can be transmitted accurately.

[0099] In some embodiments, see Figure 5 and Figure 10 The display substrate 10 also includes at least one first barrier dam 101. The at least one first barrier dam 101 is located in the peripheral region B and is disposed around the display region A. The orthogonal projection of the antenna trace 2 onto the substrate 1 is located on the side of the orthogonal projection of the at least one first barrier dam 101 onto the substrate 1 away from the display region A (e.g., ...). Figure 10 (As shown). Alternatively, the orthographic projection of antenna trace 2 on substrate 1 overlaps with the orthographic projection of the first blocking dam 101 furthest from display area A among all the first blocking dams 101 on substrate 1 (e.g. Figure 5 (As shown).

[0100] The at least one first barrier dam 101 can prevent the material of the organic insulating layer 82 from diffusing to the edge portion of the display substrate 10 during the fabrication of the encapsulation layer 8.

[0101] This arrangement ensures that the antenna trace 2 is far from the display area A, preventing the antenna trace 2 from blocking the light emitted from the display area and affecting the display effect.

[0102] In some embodiments, such as Figure 10 As shown, the display substrate 10 further includes an inorganic insulating layer 102 and a second barrier dam 103. The inorganic insulating layer 102 is located on the side surface of the substrate 1 near the conductive layer 3. The inorganic insulating layer 102 extends from the display area A to the peripheral area B, and the portion of the inorganic insulating layer 102 away from the display area A includes at least one groove 1021. The orthographic projection of the second barrier dam 103 on the substrate 1 overlaps with the orthographic projection of the at least one groove 1021 on the substrate 1.

[0103] The portion of the inorganic insulating layer 102 away from the display area A may include a groove 1021, or the portion of the inorganic insulating layer 102 away from the display area may include multiple grooves 1021.

[0104] In this way, during the fabrication of the display substrate 10, the groove 1021 can prevent the outer crack from propagating inward and affecting the display area. This improves the reliability of the display substrate 10. The second barrier dam 103 can further prevent the crack from propagating inward and affecting the display area.

[0105] In some embodiments, such as Figure 6 and Figure 8 As shown, the antenna trace 2 forms a coil 24 around the display area A, and the coil 24 extends at least from one side of the display area A to the opposite side of the display area A.

[0106] This arrangement ensures that the antenna trace 2, when placed on the display substrate 10, does not affect the normal display of the display area A of the display substrate 10. Furthermore, compared to placing the antenna trace 2 on one side of the display area A, extending the antenna trace 2 from one side of the display area A around the display area A to the opposite side allows for a larger area around the coil 21, thereby increasing the magnetic flux during antenna trace 2 detection and improving the NFC recognition performance of the display substrate 10 provided in this disclosure.

[0107] In some embodiments, such as Figure 1 and Figure 9 Antenna trace 2 includes a multi-turn coil 24 arranged in a spiral along the direction away from display area A. The coil 24 closest to display area A is the first coil 25. Antenna trace 2 also includes an extension 26, which is connected to the open end 251 of the first coil 25. The orthographic projection of the extension 26 on the substrate 1 and the orthographic projection of at least one second coil 27 (excluding the first coil 25) on the substrate 1 have a second overlap region D. At the second overlap region D, the extension 26 and the second coil 27 are on different layers.

[0108] In this way, at the second overlapping area D, the extension 26 and the second coil 27 are on different layers, avoiding the situation where the extension 26 and the second coil 27 are short-circuited and the antenna trace 2 cannot transmit sensing signals outward.

[0109] In some embodiments, when only one turn of coil 24 is provided, the linewidth of coil 24 can be approximately 700 μm. Here, "approximately 700 μm" means that it can fluctuate by 5% above or below 700 μm.

[0110] In some embodiments, such as Figure 1As shown, the antenna trace 2 includes a multi-turn coil 24, which is spirally arranged in a direction away from the display area A. Thus, providing the multi-turn coil 24 on the display substrate 10 can also help improve the sensing sensitivity of the antenna trace 2.

[0111] The antenna trace 2 includes a multi-turn coil 24, which may include a three-turn coil 24 or a four-turn coil 24. For example, when the width and length of the display substrate 10 are 30mm, the inductance of the four-turn coil 24 can reach 1.4μH, and the inductance of the three-turn coil 24 can reach 0.89μH. This disclosure does not limit the number of coils 24 included in the antenna trace 2, as long as the inductance of the coil 24 can reach between 0.3μH and 3μH, and the quality factor is greater than 5.

[0112] For example, when designing the number of turns of coil 24, factors such as the width of the peripheral area B of display substrate 10, the width of coil 24, the spacing between two adjacent coils 24, the material of coil 24, and the film structure where antenna trace 2 is located can also be considered.

[0113] In some embodiments, such as Figure 11 As shown, the multi-turn coil 24 is disposed on the same layer as a conductive layer 3. In other embodiments, such as Figure 12 As shown, at least one turn of the multi-turn coil 24 is disposed in the same layer as the multi-layer conductive layer 3.

[0114] In some other embodiments, such as Figure 13 As shown, the antenna trace 2 includes a multi-turn coil 24, which is spirally arranged along a direction perpendicular to the substrate 1. Adjacent coils 24 are connected in series through at least one via on at least one insulating layer 4.

[0115] With this configuration, the number of turns of the coil 24 included in the antenna trace 2 can be reduced in the direction parallel to the substrate 1, and the area occupied by the orthogonal projection of the antenna trace 2 on the substrate 1 is smaller. This allows for a smaller width of the peripheral region B of the display substrate 10, facilitating the narrow bezel design of the display device using the display substrate 10 provided in this disclosure. By providing multiple turns of coil 24 in the direction perpendicular to the substrate 1, this disclosure not only reduces the area of ​​the orthogonal projection of the antenna trace 2 on the substrate 1 but also increases the number of turns of the coil 24, which is beneficial for improving the sensing sensitivity of the antenna trace 2.

[0116] In some embodiments, such as Figure 14As shown, the antenna trace 2 includes a multi-turn coil 24, which is disposed on the same layer as the multi-layer conductive layers 3. There is at least one insulating layer between each pair of adjacent conductive layers 3. The multi-turn coil 24 includes at least two parts connected in series, wherein one part is arranged in a spiral shape along a direction away from the display area A, and the other part is arranged in a spiral shape along a direction perpendicular to the substrate 1.

[0117] In this way, the antenna trace 2 can include not only a multi-turn coil 24 spirally arranged in the direction away from the display area A, but also a multi-turn coil 24 spirally arranged in the direction perpendicular to the substrate 1. Thus, in the direction parallel to the substrate 1, the coil 24 near the display area A can pass through different layers across other coils 24 and extend to the side of other coils 24 away from the display area A, which helps to simplify the design of the antenna trace 2.

[0118] In some embodiments, the linewidth of the antenna trace 2 is approximately 50 μm to approximately 700 μm, and the spacing between two adjacent turns of coil 24 along a direction parallel to the substrate 1 is approximately 50 μm to approximately 700 μm.

[0119] For example, the linewidth of antenna trace 2 can be 50μm, 200μm, 350μm, or 700μm. For example, the spacing between two adjacent turns 24 along the direction parallel to substrate 1 can be 50μm, 200μm, 350μm, or 700μm.

[0120] "Approximately 50μm" means that the value can fluctuate by 5% above or below 50μm. "Approximately 700μm" means that the value can fluctuate by 5% above or below 700μm.

[0121] The linewidth of antenna trace 2 is approximately 50μm to approximately 700μm. On the one hand, this can improve the problem that the small linewidth of antenna trace 2 leads to a large resistance of antenna trace 2. On the other hand, it can also improve the problem that the large linewidth of antenna trace 2 leads to a large width of the peripheral area B of the display substrate 10, which affects the narrow bezel design of the display device using the display substrate 10.

[0122] The spacing between two adjacent coils 24 along the direction parallel to the substrate 1 is approximately 50 μm to approximately 700 μm. On the one hand, this avoids the problem of connection points in the two coils 24 due to a small spacing between them. On the other hand, it avoids the problem of a large spacing between two adjacent coils 24, which would result in a large width of the peripheral area B of the display substrate 10 and affect the narrow bezel design of the display device using the display substrate 10.

[0123] When only a single-turn coil 24 is provided, the line width of coil 24 can be larger, thereby reducing the resistance of coil 24. When multiple turns of coil 24 are provided along a direction away from display area A, the width of coil 24 can be appropriately reduced, or the spacing between coils 24 can be adjusted.

[0124] In some embodiments, such as Figure 15 As shown, the distance d from the orthographic projection of antenna trace 2 onto display area A on substrate 1 is greater than or equal to approximately 20 μm. Here, "approximately 20 μm" means that it can fluctuate by 5% above or below 20 μm. This setting ensures that antenna trace 2 is at a greater distance from display area A, preventing antenna trace 2 from interfering with the normal display of display area A.

[0125] In some embodiments, see Figure 6 and Figure 8 The display substrate 10 also includes a bonding area M located on the side of the peripheral area B away from the display area A. The display substrate 10 also includes two antenna pins 28 located in the bonding area M. The input terminal 201 of the antenna trace 2 is connected to one antenna pin 28, and the output terminal 202 of the antenna trace 2 is connected to the other antenna pin 28.

[0126] The two antenna pins 28 can be disposed on the same layer as the first source / drain electrode layer 67 and the second source / drain electrode layer 68, or the two antenna pins 28 can also be disposed on the same layer as the gate layer 63. The positions of the two antenna pins 28 in this disclosure are not limited to these.

[0127] like Figure 16 As shown, some embodiments of this disclosure also provide a display module 100, which includes a display substrate 10 provided in any of the above embodiments and a flexible circuit board 20 bonded to the display substrate 10. The flexible circuit board 20 has a matching circuit 30 coupled to the antenna trace 2 and a near-field communication chip 40 coupled to the matching circuit 30.

[0128] In some embodiments, such as Figure 17 As shown, the display module 100 also includes a microcontroller unit 50. The microcontroller unit 50 is coupled to the near-field communication chip 40.

[0129] In some embodiments of this disclosure, the near-field communication chip 40 is integrated onto the flexible circuit board 20, so that the near-field communication chip 40 can be directly connected to the microcontroller unit 50.

[0130] The technical effects that the display module 100 provided in some embodiments of this disclosure can achieve are the same as the technical effects that the display substrate 10 can achieve, and will not be repeated here.

[0131] like Figure 18As shown, some embodiments of this disclosure also provide a display device 200, including the display module 100 and power module 300 described in any of the above embodiments. The power module 300 is configured to supply power to the display module 100.

[0132] The aforementioned display device 200 can be any component with display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, or navigator.

[0133] like Figure 19 As shown, some embodiments of this disclosure provide a method for manufacturing a display substrate 10, wherein the display substrate 10 includes a display area A and a peripheral area B adjacent to the display area A. The method for manufacturing the display substrate 10 includes:

[0134] S1, Provide substrate 1.

[0135] S2. An antenna trace 2 is formed on one side of the substrate 1. The antenna trace 2 is located in the peripheral area B and surrounds the display area A.

[0136] S3. At least one conductive layer 3 is formed on one side of the substrate 1. The antenna trace 2 is fabricated in the same layer as the at least one conductive layer 3.

[0137] The technical effects achievable by the manufacturing method of the display substrate 10 provided in some embodiments of this disclosure are the same as those achievable by the display substrate 10 described above, and will not be repeated here.

[0138] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A display substrate having a display area and a peripheral area adjacent to the display area; the display substrate comprising: Substrate; Antenna traces are disposed on one side of the substrate; The antenna trace is located in the peripheral area and is arranged around the display area; At least one conductive layer is located on one side of the substrate; wherein the antenna trace is disposed in the same layer as the at least one conductive layer; the at least one conductive layer includes a first touch electrode layer and a second touch electrode layer, wherein the second touch electrode layer is located on the side of the first touch electrode layer away from the substrate; The antenna trace includes a first portion disposed on the same layer as the second touch electrode layer; The at least one conductive layer further includes a first source / drain electrode layer and a second source / drain electrode layer, wherein the second source / drain electrode layer is located between the first source / drain electrode layer and the first touch electrode layer. The antenna trace also includes a second portion disposed on the same layer as the second source / drain electrode layer; the second portion and the first portion are connected in parallel through at least one first via on at least one insulating layer between the second touch electrode layer and the second source / drain electrode layer.

2. The display substrate according to claim 1, wherein, The antenna trace also includes a third portion disposed on the same layer as the first touch electrode layer. The third portion and the first portion are connected in parallel through at least one second via on at least one insulating layer located between the first touch electrode layer and the second touch electrode layer. The first via also penetrates the first touch electrode layer.

3. The display substrate according to claim 2, wherein, Along the extension direction of the antenna trace, the first via and the second via are arranged alternately.

4. The display substrate according to claim 2, further comprising: An encapsulation layer is located on the side of the first touch electrode layer closest to the substrate; All the first vias and all the second vias are projected onto the substrate outside the projection of the encapsulation layer onto the substrate.

5. The display substrate according to claim 1, further comprising: A voltage signal line is located in the peripheral area and surrounds the display area; the voltage signal line is disposed in the same layer as the first source / drain electrode layer and / or the second source / drain electrode layer. The orthogonal projection of the antenna trace on the substrate is located on the side of the orthogonal projection of the voltage signal line on the substrate that is away from the display area.

6. The display substrate according to claim 1, further comprising: The touch traces are disposed on the same layer as the first touch electrode layer and / or the second touch electrode layer; At least a portion of the orthographic projection of the antenna trace onto the substrate is located on the side of the orthographic projection of the touch trace onto the substrate that is furthest from the display area.

7. The display substrate according to claim 6, wherein, There is a first overlapping area between the orthographic projection of the antenna trace on the substrate and the orthographic projection of the multiple touch traces on the substrate. At the corresponding first overlapping area, the antenna trace and the multiple touch traces are disposed on different layers.

8. The display substrate according to claim 1, further comprising: At least one first barrier dam is located in the surrounding area and is arranged around the display area; The orthogonal projection of the antenna trace on the substrate is located on the side of the orthogonal projection of the at least one first blocking dam on the substrate that is far from the display area; or, the orthogonal projection of the antenna trace on the substrate overlaps with the orthogonal projection of the first blocking dam that is farthest from the display area among all the first blocking dams.

9. The display substrate according to claim 1, further comprising: An inorganic insulating layer is located on the surface of the substrate near the conductive layer. The inorganic insulating layer extends from the display area to the peripheral area, and the portion of the inorganic insulating layer away from the display area includes at least one groove; The second barrier dam, the orthographic projection of the second barrier dam on the substrate overlaps with the orthographic projection of the at least one groove on the substrate.

10. The display substrate according to claim 1, wherein, The antenna trace forms a coil around the display area; The coil extends at least from one side of the display area around the display area to the opposite side of one side of the display area.

11. The display substrate according to claim 1, wherein, The antenna trace includes a multi-turn coil arranged in a spiral shape along the direction away from the display area; The coil closest to the display area in the multi-turn coil is the first coil; The antenna trace also includes an extension portion connected to the open end of the first coil. The orthographic projection of the extension portion on the substrate and the orthographic projection of at least one second coil (excluding the first coil) on the substrate have a second overlapping region. At the corresponding second overlapping region, the extension portion and the second coil are on different layers.

12. The display substrate according to claim 1, wherein, The distance from the orthogonal projection of the antenna trace onto the substrate to the display area is greater than or equal to 19 μm.

13. The display substrate according to any one of claims 1 to 12, further comprising: The binding area located on the side of the peripheral area away from the display area; The two antenna pins are located in the bonding area; The input terminal of the antenna trace is connected to one of the antenna pins, and the output terminal of the antenna trace is connected to the other antenna pin.

14. A display module, comprising: The display substrate as described in any one of claims 1 to 13; A flexible circuit board bonded to the display substrate, the flexible circuit board having a matching circuit coupled to the antenna traces and a near-field communication chip coupled to the matching circuit.

15. The display module according to claim 14, further comprising: The microcontroller unit is coupled to the near-field communication chip.

16. A display device, comprising: The display module as described in claim 14 or 15; and, A power module is configured to supply power to the display module.

Images