Pixel structure and display device
By designing different color subpixel arrangement patterns and staggered thin-film transistor electrodes in the edge display area of the TFT-LCD display, the problems of light leakage and rainbow patterns in the narrow bezel design are solved, achieving better display uniformity and ease of fabrication.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2021-09-10
- Publication Date
- 2026-06-19
Smart Images
Figure CN115793330B_ABST
Abstract
Description
Technical Field
[0001] This disclosure belongs to the field of display technology, and specifically relates to a pixel structure and display device. Background Technology
[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) is an important type of flat panel display device. With the development of display technology, high resolution, high transmittance, large size, low power consumption, and low cost have become the future development direction of the display field. Summary of the Invention
[0003] The present invention aims to solve at least one of the technical problems existing in the prior art, and to provide a pixel structure and display device.
[0004] In a first aspect, embodiments of this disclosure provide a pixel structure including a plurality of pixel units; the plurality of pixel units form a plurality of first pixel groups arranged side-by-side along a first direction, and the pixel units within any first pixel group are arranged side-by-side along a second direction; each of the plurality of pixel units includes a plurality of sub-pixels, and at least some of the plurality of sub-pixels are different colors; the pixel structure is divided into a central display area and edge display areas located on two opposite sides of the central display area in the first direction; wherein...
[0005] For the first pixel group located in the edge display area, at least some of the subpixels that are adjacent in the second direction have different colors.
[0006] The subpixel arrangement pattern is the same in each of the pixel units located in the edge display area and arranged side by side in the first direction.
[0007] In the edge display area, within the first pixel group, the subpixel arrangement patterns are the same in the odd-numbered pixel units and the same in the even-numbered pixel units.
[0008] In the edge display area, within the first pixel group, some subpixels arranged side by side in the second direction have the same color.
[0009] In the edge display area, within the first pixel group, the subpixels arranged side by side in the second direction are all different in color.
[0010] The subpixels in each pixel unit arranged side by side in the first direction follow the same arrangement pattern.
[0011] In the intermediate display area, the sub-pixels in each pixel unit arranged side by side in the first direction have the same arrangement pattern; and the sub-pixels arranged side by side in the second direction have the same color.
[0012] The pixel structure also includes multiple gate lines and multiple data lines;
[0013] Each of the sub-pixels arranged side by side in the first direction is connected to the same gate line;
[0014] The subpixels arranged side by side in the second direction form a first subpixel group; the odd-numbered subpixels in the i-th first subpixel group and the even-numbered subpixels in the (i+1)-th first subpixel group are connected to the same data line; or, the even-numbered subpixels in the i-th first subpixel group and the odd-numbered subpixels in the (i+1)-th first subpixel group are connected to the same data line; where i is an integer greater than or equal to 1.
[0015] Each of the sub-pixels includes a thin-film transistor and a pixel electrode; the pixel electrodes of the sub-pixels arranged side by side in the second direction form a pixel electrode group; the pixel electrode group includes a first side and a second side arranged opposite to each other in the first direction;
[0016] In the second direction, the thin-film transistors in the two adjacent sub-pixels are located, one on the first side of the pixel electrode group and the other on the second side of the pixel electrode.
[0017] In each of the subpixels arranged side by side in the first direction, the thin-film transistors are located on the first side or the second side of the pixel electrode group within the first subpixel group to which they belong.
[0018] Each pixel unit contains subpixels, including red subpixels, green subpixels, and blue subpixels.
[0019] This disclosure also provides a pixel structure including a plurality of pixel units; the plurality of pixel units form a plurality of first pixel groups arranged side by side along a first direction, and the pixel units in any first pixel group are arranged side by side along a second direction; each of the plurality of pixel units includes a plurality of sub-pixels, and at least some of the sub-pixels are different colors; each sub-pixel includes at least a pixel electrode;
[0020] The pixel structure is divided into a central display area and edge display areas located on two opposite sides of the central display area in the first direction; both the central display area and the edge display areas include multiple pixel regions, with one pixel unit disposed within each pixel region; each pixel region includes multiple sub-pixel regions arranged side-by-side along the first direction; wherein...
[0021] For each pixel unit in the first pixel group located in the edge display area, at least a portion of the pixel electrodes in the sub-pixels are located within at least two sub-pixel regions.
[0022] Each pixel electrode includes multiple sub-electrodes; the sub-electrodes located in the same sub-pixel region are arranged side by side along a second direction.
[0023] Each of the sub-electrodes located within the same sub-pixel region belongs to a different sub-pixel.
[0024] In each pixel region, the number of sub-pixel regions and sub-pixels is the same; each sub-pixel also includes a thin-film transistor, and one thin-film transistor is disposed in one sub-pixel region; the pixel structure also includes gate lines and data lines; each sub-electrode closest to the gate line in each pixel unit belongs to a different sub-pixel;
[0025] The gates of the thin-film transistors arranged side-by-side in the sub-pixel region in the first direction are connected to the same gate line; the drain of each thin-film transistor is connected to the sub-electrode closest to the gate line to which the gate of the thin-film transistor is connected.
[0026] The sub-electrodes arranged side by side in the second direction constitute a sub-electrode group; the sub-electrode group includes a first side and a second side arranged opposite to each other along the first direction;
[0027] In the second direction, two thin-film transistors in the two adjacent sub-pixel regions are located, one on the first side of the sub-electrode group and the other on the second side of the sub-electrode group;
[0028] In each of the sub-pixel regions arranged side by side in the first direction, a thin-film transistor is located on the first or second side of the sub-electrode group in which it is located.
[0029] The subpixel arrangement pattern is the same in each of the pixel units.
[0030] Each pixel unit contains subpixels, including red subpixels, green subpixels, and blue subpixels.
[0031] Secondly, embodiments of this disclosure provide a display device including at least one display panel; wherein any of the display panels includes any of the pixel structures described above. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of an exemplary pixel structure;
[0033] Figure 2 for Figure 1 A schematic diagram of a subpixel in the pixel structure shown;
[0034] Figure 3 This is a schematic diagram of a pixel structure according to an embodiment of the present disclosure;
[0035] Figure 4 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure;
[0036] Figure 5 This is a schematic diagram of another pixel structure according to an embodiment of the present disclosure;
[0037] Figure 6 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure;
[0038] Figure 7 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure;
[0039] Figure 8 This is a schematic diagram of another pixel structure in this embodiment;
[0040] Figure 9 This is a schematic diagram of another pixel structure according to an embodiment of the present disclosure;
[0041] Figure 10 This is a schematic diagram of the region distribution of the pixel structure according to an embodiment of the present disclosure;
[0042] Figure 11 for Figure 9 An enlarged view of a pixel unit in the pixel structure;
[0043] Figure 12 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure. Detailed Implementation
[0044] To enable those skilled in the art to better understand the technical solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0045] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.
[0046] Figure 1 This is a schematic diagram of an exemplary pixel structure; such as Figure 1 As shown, the pixel structure includes multiple pixel units 10, multiple gate lines GL, and multiple data lines DL; each pixel unit 10 includes multiple sub-pixels 100. In this embodiment, the sub-pixels 100 in each pixel unit 10 are denoted as red sub-pixel R, green sub-pixel G, and blue sub-pixel B, respectively. The sub-pixels 100 in the pixel units 10 arranged side-by-side in the first direction X follow the same arrangement pattern. For example, the sub-pixels 100 in the first row of pixel units 10 (from left to right) are arranged in the pattern of red sub-pixel R, green sub-pixel G, and blue sub-pixel B, while the sub-pixels 100 in the second row of pixel units 10 (from left to right) are arranged in the pattern of green sub-pixel G, blue sub-pixel B, and red sub-pixel R. (Continuing to refer to...) Figure 1 In this pixel structure, the sub-pixels 100 arranged side by side in the second direction Y have the same color. For example, the sub-pixels 100 arranged side by side in the second direction Y are all red sub-pixels R.
[0047] It should be noted that the color of subpixel 100 depends on the color of the filter in subpixel 100. If the filter in subpixel 100 is red, then subpixel 100 is called red subpixel R. Similarly, if the filter in subpixel 100 is green, then subpixel 100 is called green subpixel G. If the filter in subpixel 100 is blue, then subpixel 100 is called blue subpixel B.
[0048] Figure 2 for Figure 1 A schematic diagram of a subpixel in the pixel structure shown; as follows Figure 2As shown, the sub-pixel 100 includes a thin-film transistor (TFT), a pixel electrode 20, and a common electrode 40 disposed on a first substrate 11, a color filter 50 (shown as a red filter in the figure) and a black matrix BM disposed on a second substrate 11', and liquid crystal molecules 30 located between the pixel electrode 20 and the common electrode 40. The gate of the TFT is connected to a gate line GL, the source of the TFT is connected to a data line DL, and the drain of the TFT is connected to the pixel electrode 20. When a working level is applied to the gate line GL, the TFT is turned on, and the data voltage written on the data line DL is applied to the pixel electrode 20. The electric field generated between the pixel electrode 20 and the common electrode 40 drives the liquid crystal molecules 30 to deflect. Light emitted from the backlight passes through the pixel electrode 20, the layer containing the liquid crystal molecules 30, the common electrode 40, and the red filter and is emitted, at which point the sub-pixel 100 emits red light. When the above pixel structure is applied to a display panel, a printed circuit board (PCB) needs to be bonded to the first substrate to provide driving signals for signal lines such as the gate line GL. In the bonding process, bonding marks are needed on the edge of the first substrate. When the lower polarizer is attached to the first substrate, it must avoid these bonding marks. Otherwise, the lower polarizer cannot adhere to the edge of the first substrate. With the narrowing of display panels, this easily leads to light leakage. To avoid light leakage, ink is usually applied to the edge of the first substrate (the area without the lower polarizer). However, ink has poor adhesion. To avoid delamination, the bonding area between the backlight module's bezel and the display panel must avoid the ink as much as possible. Therefore, the backlight module is 0.25mm larger than the display panel. The bezel is only 0.87-0.97mm. At this size, the bezel encroaches on the display area. Furthermore, due to the straightness of the bezel and the bonding accuracy, the obstruction distance in some areas will vary. Figure 1 As shown, the sub-pixels 100 arranged side by side in the second direction Y in the pixel structure have the same color. At this time, the macroscopic display is a rainbow line, and the colors displayed on the left and right sides of the display panel are inconsistent.
[0049] To address the aforementioned issues, the following technical solutions are provided in the embodiments disclosed herein.
[0050] Firstly, Figure 3 This is a schematic diagram of a pixel structure according to an embodiment of the present disclosure; as shown Figure 3As shown, this disclosure provides a pixel structure including a plurality of pixel units 10; the plurality of pixel units 10 form a plurality of first pixel groups 1 arranged side by side along a first direction X, and the pixel units 10 in any first pixel group 1 are arranged side by side along a second direction Y; each pixel unit 10 includes a plurality of sub-pixels 100, and at least some of the sub-pixels 100 are different colors. For example, each pixel unit 10 includes 3 sub-pixels 100, namely a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B; or, for example, each pixel unit 10 includes 4 sub-pixels 100, of which 2 are green sub-pixels G, 1 is red sub-pixel R, and 1 is blue sub-pixel B. In this disclosure, each pixel unit 10 is described using the example of 3 sub-pixels 100, namely a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B.
[0051] The pixel structure is divided into a central display area Q1 and two opposite edge display areas Q2 located on the first direction X of the central display area Q1. For the first pixel group 1 located in the edge display area Q2, at least some of the sub-pixels 100 arranged adjacent to each other in the second direction Y have different colors. For example, any sub-pixels 100 arranged side by side in the second direction Y constitute a first sub-pixel group 100, and each first pixel group 1 includes three first sub-pixel groups 100. For the three first sub-pixel groups 100 in each first pixel group 1 located in the edge display area Q2, in one first sub-pixel group 100, red sub-pixels R and blue sub-pixels B are alternately arranged (from top to bottom), in another first sub-pixel group 100, blue sub-pixels B and red sub-pixels R are alternately arranged (from top to bottom), and in yet another first sub-pixel group 100, only green sub-pixels G are included.
[0052] In this embodiment of the present disclosure, within any first pixel group 1 located in the edge display area Q2, at least some of the sub-pixels 100 adjacent to each other in the second direction Y have different colors. That is, within any first pixel group 1 located in the edge display area Q2, at least some of the sub-pixels 100 adjacent to each other in the second direction Y have different arrangement patterns. For example, in one pixel unit 10, the red sub-pixel R, green sub-pixel G, and blue sub-pixel B are arranged sequentially from left to right, while in another pixel unit 10, the blue sub-pixel B, green sub-pixel G, and red sub-pixel R are arranged sequentially from left to right. When the pixel structure of this embodiment is applied to a display panel, even if the bezel partially obscures the edge display area Q2, the risk of concentrated obscuring of multiple sub-pixels 100 of the same color continuously arranged in the second direction Y is reduced, thereby reducing the range of rainbow patterns.
[0053] The pixel structure in the embodiments of this disclosure is described below with reference to specific examples. It should be noted that in the following examples, each pixel unit 10 includes a red subpixel R, a green subpixel G, and a blue subpixel B. Multiple subpixels 100 arranged side-by-side in the second direction Y constitute a first subpixel group 100.
[0054] First example: (Refer to) Figure 3 The pixel array includes multiple first pixel groups 1 arranged side-by-side along a first direction X. Each first pixel includes multiple pixel units 10 arranged side-by-side along a second direction Y. Each pixel unit 10 includes three sub-pixels 100 arranged side-by-side along the first direction X, namely a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. Any sub-pixels 100 arranged side-by-side along the second direction Y constitute a first sub-pixel group 100. The pixel structure is divided into a central display area Q1 and two opposite edge display areas Q2 located on the two sides of the central display area Q1 in the first direction X. In any first pixel group 1 of the edge display area Q2, for any two adjacent pixel units 10 arranged in the second direction Y, one includes a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B arranged from left to right; the other includes a blue sub-pixel B, a green sub-pixel G, and a red sub-pixel R arranged from left to right. In other words, for the three first sub-pixel groups 100 within the first pixel group 1 located in the edge display area Q2, two groups consist of alternating red sub-pixels R and blue sub-pixels B, while the remaining group includes only green sub-pixels G. For the first pixel group 1 located in the middle display area Q1, the arrangement pattern of the pixel units 10 within each first pixel group 1 is the same as that within the first pixel group 1 of the edge display area Q2. That is, the arrangement pattern of the sub-pixels 100 in each pixel unit 10 arranged side-by-side in the first direction X is the same. This not only reduces the range of rainbow patterns caused by the border obscuring the edge display area Q2, but also facilitates the fabrication of the pixel structure.
[0055] In some examples, Figure 4 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure, such as... Figure 4As shown, the pixel structure includes not only multiple pixel units 10, but also multiple gate lines GL and multiple data lines DL. The multiple gate lines GL extend along a first direction X and are arranged side-by-side along a second direction Y; the multiple data lines DL extend along the second direction Y and are arranged side-by-side along the first direction X. The first direction X and the second direction Y intersect, at which point the gate lines GL and data lines DL are intersected, defining multiple sub-pixel regions 100a, each containing one sub-pixel 100. The sub-pixels 100 arranged side-by-side along the first direction X are connected to the same gate line GL; that is, sub-pixels 100 in the same row are controlled by one gate line GL. In the i-th first sub-pixel group 100, the odd-numbered sub-pixels 100 and the even-numbered sub-pixels 100 in the (i+1)-th first sub-pixel group 100 are connected to the same data line DL; or, the even-numbered sub-pixels 100 in the i-th first sub-pixel group 100 and the odd-numbered sub-pixels 100 in the (i+1)-th first sub-pixel group 100 are connected to the same data line DL; i is an integer greater than or equal to 1. That is, sub-pixels 100 within a first sub-pixel group 100 are written to by two data lines DL, and adjacent sub-pixels 100 within the same first sub-pixel group 100 are connected to different data lines DL. Specifically, each sub-pixel 100 includes at least a thin-film transistor (TFT) and a pixel electrode 20; wherein the gate of the TFT is connected to the gate line GL, the source of the TFT is connected to the data line DL, and the drain of the TFT is connected to the pixel electrode 20. Each first sub-pixel group 100 contains pixel electrodes 20 constituting a pixel electrode group 20, which includes a first side and a second side disposed opposite to each other in the first direction X; in two sub-pixels 100 disposed adjacent to each other in the second direction Y, one thin-film transistor TFT is located on the first side of the pixel electrode group 20, and the other is located on the second side of the pixel electrode group 20; in each sub-pixel 100 disposed side by side in the first direction X, the thin-film transistor TFT is located on either the first side or the second side of the pixel electrode group 20 within its respective first sub-pixel group 100. In this case, refer to Figure 4 Except for the first data line DL and the last data line DL, each data line DL has a thin film transistor TFT on both the left and right sides, and the thin film transistor TFTs on both sides are staggered. In this way, the display uniformity of the display panel with this pixel structure can be effectively utilized.
[0056] It should be noted that, Figure 5 This is a schematic diagram of another pixel structure according to an embodiment of the present disclosure; as shown Figure 5As shown, in some examples, in the intermediate display area Q1, the colors of the sub-pixels 100 within each group of first sub-pixels 100 can also be the same. For example, in the intermediate display area Q1, the sub-pixels 100 in each pixel unit 10 are arranged in sequence in the first direction X as red sub-pixel R, green sub-pixel G, and blue sub-pixel B.
[0057] Second example: Figure 6 and 7 This is a schematic diagram of another pixel structure according to an embodiment of the present disclosure; as shown Figure 6 and 7 As shown, this pixel structure is similar to Figure 3 The pixels are roughly the same, the only difference is that... Figure 6 and 7 In the pixel structure, the colors of adjacent sub-pixels 100 in any first pixel group 111 are different. For example, in any first pixel group 111, the sub-pixels 100 in the first pixel unit 10 from top to bottom are red sub-pixel R, green sub-pixel G, and blue sub-pixel B from left to right; the sub-pixels 100 in the second pixel unit 10 are green sub-pixel G, blue sub-pixel B, and red sub-pixel R from left to right; and the sub-pixels 100 in the third pixel unit 10 are blue sub-pixel B, red sub-pixel R, and green sub-pixel G from left to right. In some examples, the arrangement pattern of sub-pixels 100 in each pixel unit 10 arranged side by side in the first direction X is the same.
[0058] Continue to refer to Figure 6 In this pixel structure, the pixel units 10 in the first pixel group 1 located in the edge display area Q2 and the middle display area Q1 are arranged in the same way. Furthermore, the sub-pixels 100 in the pixel units 10 arranged side-by-side in the first direction X are arranged in the same pattern. This arrangement results in better display uniformity for the display panel using this pixel structure.
[0059] It should be noted that, Figure 8 This is a schematic diagram of another pixel structure in this embodiment; as shown Figure 8 As shown, the arrangement of pixel units 10 in the first pixel group 1 of the edge display area Q2 is different from that in the first pixel group 1 of the middle display area Q1. In the middle display area Q1, the colors of all sub-pixels 100 in the same first sub-pixel group 100 are the same. For example, any pixel unit 10 in the middle display area Q1 includes a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B arranged sequentially from left to right in the first direction X. The arrangement of pixel units 10 in the edge display area Q2 is different from that in the middle display area Q1. Figure 6 The same applies as shown, so it will not be repeated here.
[0060] Figure 9This is a schematic diagram of another pixel structure according to an embodiment of the present disclosure; Figure 10 This is a schematic diagram of the region distribution of the pixel structure according to an embodiment of the present disclosure; as shown Figure 9 and 10 As shown, this disclosure also provides a pixel structure including a plurality of pixel units 10, which form a plurality of first pixel groups 1 arranged side by side along a first direction X, and the pixel units 10 in any first pixel group 1 are arranged side by side along a second direction Y. Each pixel unit 10 in this pixel structure includes a plurality of sub-pixels 100, and at least some of the sub-pixels 100 are different colors. For example, each pixel unit 10 includes one red sub-pixel R, one green sub-pixel G, and one blue sub-pixel B; as another example, each pixel unit 10 includes one red sub-pixel R, two green sub-pixels G, and one blue sub-pixel B. Again, taking the example of each pixel unit 10 including one red sub-pixel R, one green sub-pixel G, and one blue sub-pixel B as an example.
[0061] Continue to refer to Figure 9 The pixel structure includes a central display area Q1 and two opposite edge display areas Q2 located on opposite sides of the central display area Q1 in the first direction X. Both the central display area Q1 and the edge display areas Q2 include multiple pixel areas 10a, with one pixel unit 10 disposed in each pixel area 10a. For example, pixel units 10 and pixel areas 10a are arranged in a one-to-one correspondence. Each pixel area 10a includes multiple sub-pixel areas 100a arranged side-by-side along the first direction X. The number of sub-pixel areas 100a in each pixel area 10a can be the same as the number of sub-pixels 100 in each pixel unit 10. For example, in this embodiment, each pixel unit 10 has three sub-pixels 100, and correspondingly, each pixel area 10a also has three sub-pixel areas 100a. Each sub-pixel 100 includes at least one pixel unit 10. For each pixel unit 10 located in the first pixel group 1 of the edge display area Q2, at least a portion of the pixel electrodes 20 in the sub-pixels 100 are located within at least two sub-pixel areas 100a. For example, each pixel electrode 20 in each sub-pixel 100 within the edge display area Q2 includes three sub-electrodes 21, meaning that one pixel unit 10 includes nine sub-electrodes 21, and the three sub-electrodes 21 of each pixel electrode 20 in each pixel unit 10 are located within three sub-pixel areas 100a respectively. It should be understood that the three sub-electrodes 21 of each pixel electrode 20 are electrically connected.
[0062] Since the pixel electrodes 20 in at least some of the sub-pixels 100 in the edge display area Q2 are located within at least two sub-pixel areas 100a, at least some of the sub-pixels 100 in each pixel unit 10 are not rectangular. This results in the sub-pixel areas 100a arranged side by side along the second direction Y in the edge display area Q2 not displaying the same color. Even if the border partially obscures the edge display area Q2, the risk of concentrated obscuring of multiple sub-pixels 100 of the same color arranged consecutively in the second direction Y is reduced, thereby reducing the range of rainbow patterns.
[0063] In some examples, each pixel electrode 20 includes a plurality of sub-electrodes 21; the sub-electrodes 21 located within the same sub-pixel region 100a are arranged side by side along the second direction Y. Furthermore, each sub-electrode 21 within the same sub-pixel region 100a belongs to a different sub-pixel 100. To more clearly illustrate the structure of each pixel unit 10 in the edge display area Q2 of this embodiment, the following is combined with... Figure 11 The following is an example of an enlarged view of a pixel unit 10 as shown in the illustration. Figure 11 As shown, each pixel unit 10 includes a red subpixel R, a green subpixel G, and a blue subpixel B; the pixel electrodes 20 of the red subpixel R, green subpixel G, and blue subpixel B each include three sub-electrodes 21, referred to as the first sub-electrode, the second sub-electrode, and the third sub-electrode, respectively. Specifically, in the first subpixel region 100a from left to right, the first sub-electrodes of the red subpixel R, blue subpixel B, and green subpixel G are arranged sequentially from top to bottom; in the second subpixel region 100a, the second sub-electrodes of the green subpixel G, red subpixel R, and blue subpixel B are arranged sequentially from top to bottom; and in the second subpixel region 100a, the third sub-electrodes of the blue subpixel B, green subpixel G, and red subpixel R are arranged sequentially from top to bottom.
[0064] In some examples, the subpixels 100 in each pixel unit 10 of the edge display area Q2 of this pixel structure are arranged in the same pattern. For example, each pixel unit 10 located in the edge display area Q2 can be arranged in the same pattern. Figure 11 The pixel unit 10 structure shown is convenient to manufacture and produces a uniform display. Furthermore, the sub-pixel 100 arrangement pattern of the pixel units 10 in the central display area Q1 of the pixel structure can be the same as the sub-pixel 100 arrangement pattern of the pixel units 10 in the edge display area Q2. For example, each pixel unit 10 in the pixel structure can adopt... Figure 11 The pixel unit 10 structure shown.
[0065] In some examples, to better understand the specific structure of the pixel structure, each pixel unit 10 is arranged according to... Figure 11The pixel unit 10 structure design shown is used as an example for explanation. Figure 12 This is another schematic diagram of the pixel structure according to an embodiment of the present disclosure; as shown Figure 12 As shown, the pixel structure includes not only the sub-pixels 100 described above, but also multiple gate lines GL extending along the first direction X and arranged side-by-side in the second direction Y, and multiple data lines DL extending along the second direction Y and arranged side-by-side in the first direction X. The gate lines GL and data lines DL are intersected to form multiple sub-pixel regions 100a. Each sub-pixel 100 includes not only a pixel electrode 20, but also a thin-film transistor (TFT), and one TFT is disposed within each sub-pixel region 100a. The gate of the TFT is connected to the gate line GL, the source of the TFT is connected to the data line DL, and the drain of the TFT is connected to a sub-electrode 21 of the corresponding sub-pixel 100. Preferably, the drain of each TFT is connected to the sub-electrode 21 closest to the gate line GL connected to the gate of that TFT. For example: Refer to... Figure 12 The thin-film transistor TFT of blue subpixel B is located in the first subpixel region 100a from left to right, and the drain of the thin-film transistor TFT is connected to the first sub-electrode of blue subpixel B; the thin-film transistor TFT of red subpixel R is located in the second subpixel region 100a from left to right, and the drain of the thin-film transistor TFT is connected to the second sub-electrode of red subpixel R; the thin-film transistor TFT of green subpixel G is located in the third subpixel region 100a from left to right, and the drain of the thin-film transistor TFT is connected to the third sub-electrode of green subpixel G.
[0066] Furthermore, a plurality of first sub-electrodes arranged side-by-side in the first direction X constitute a sub-electrode group 21. Each sub-electrode group 21 includes a first side (left side) and a second side (right side) arranged opposite to each other along the first direction X; two thin-film transistor TFTs in two adjacent sub-pixel regions 100a arranged in the second direction Y, one located on the first side of the sub-electrode group 21 and the other located on the second side of the sub-electrode group 21; and thin-film transistor TFTs in each sub-pixel region 100a arranged side-by-side in the first direction X, located on the same side (first side or second side) of the sub-electrode group 21 in which they are located. In this case, refer to Figure 12 Except for the first data line DL and the last data line DL, each data line DL has a thin film transistor TFT on both the left and right sides, and the thin film transistor TFTs on both sides are staggered. In this way, the display uniformity of the display panel with this pixel structure can be effectively utilized.
[0067] Furthermore, continue to refer to Figure 12The sub-pixel regions 100a arranged side-by-side in the second direction Y constitute the first sub-pixel region group 101a; the gates of the thin-film transistor TFTs of each sub-pixel region 100a arranged side-by-side in the first direction X are connected to the same gate line GL; the source of the thin-film transistor TFT of the odd number of sub-pixel regions 100a in the i-th first sub-pixel region group 101a is connected to the source of the thin-film transistor TFT of the even number of sub-pixel regions 100a in the (i+1)-th first sub-pixel region group 101a is connected to the same data line DL; or, the source of the thin-film transistor TFT of the even number of sub-pixel regions 100a in the i-th first sub-pixel region group 101a is connected to the source of the thin-film transistor TFT of the odd number of sub-pixel regions 100a in the (i+1)-th first sub-pixel region group 101a is connected to the same data line DL; i is an integer greater than or equal to 1. In other words, the thin-film transistor TFT of the sub-pixel 100 in a first sub-pixel group 101a is written with data by two data lines DL, and the data lines DL connected to the source of the thin-film transistor TFT in adjacent sub-pixel regions 100a in the same first sub-pixel group 101a are different.
[0068] It should be noted that in any of the above examples, each sub-pixel 100 may include not only a thin-film transistor (TFT) and a pixel electrode 20, but also structures such as a common electrode 40 and a color filter 50, which will not be listed here. The color of the color filter 50 determines the color of its corresponding sub-pixel 100. Furthermore, the shape of each color filter 50 corresponds to the shape of the pixel electrode 20 of its corresponding sub-pixel 100. For example, if the pixel electrode 20 is rectangular, the color filter 50 is also rectangular. As another example, if the pixel electrode 20 includes three sub-electrodes 21, the corresponding color filter 50 includes sub-structures that correspond one-to-one with the sub-electrodes 21, and the shapes of the sub-electrodes 21 and sub-structures are correspondingly arranged.
[0069] Secondly, embodiments of this disclosure also provide a display device, which includes at least one display panel, wherein any display panel includes any of the pixel structures described above.
[0070] Furthermore, the display device can be a video wall, that is, it includes multiple display panels. Since the pixel structure in the display panel is as described above, the risk of concentrated obstruction of multiple sub-pixels 100 of the same color arranged consecutively in the second direction Y is reduced, thereby reducing the range of rainbow patterns.
[0071] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.
Claims
1. A pixel structure comprising a plurality of pixel units; the plurality of pixel units forming a plurality of first pixel groups arranged side-by-side along a first direction, and pixel units within any first pixel group arranged side-by-side along a second direction; each of the plurality of pixel units comprising a plurality of sub-pixels, and at least a portion of the plurality of sub-pixels having different colors; the pixel structure being divided into a central display area and edge display areas located on two opposite sides of the central display area along the first direction; wherein, For the first pixel group located in the edge display area, at least some of the sub-pixels that are adjacent to each other in the second direction have different colors; In the central display area, the sub-pixels arranged side by side in the second direction have the same color; Each of the subpixels includes at least a pixel electrode; for each of the pixel units in the first pixel group located in the edge display area, at least a portion of the pixel electrodes in the subpixels are located within at least two of the subpixel regions.
2. The pixel structure of claim 1, wherein, The subpixel arrangement pattern is the same in each of the pixel units located in the edge display area and arranged side by side in the first direction.
3. The pixel structure of claim 2, wherein, Located in the edge display area, within the first pixel group, the subpixel arrangement pattern is the same in the odd-numbered pixel units and the same in the even-numbered pixel units.
4. The pixel structure of claim 2, wherein, Located in the edge display area, within the first pixel group, some subpixels arranged side by side in the second direction have the same color.
5. The pixel structure of claim 2, wherein, Located in the edge display area, within the first pixel group, the subpixels arranged side by side in the second direction are all different in color.
6. The pixel structure according to any one of claims 1-5, wherein, The subpixels in each pixel unit arranged side by side in the first direction follow the same arrangement pattern.
7. The pixel structure according to any one of claims 1-5, wherein, In the central display area, the subpixels in each pixel unit arranged side by side in the first direction follow the same arrangement pattern.
8. The pixel structure according to any one of claims 1-5, wherein, It also includes multiple gate lines and multiple data lines; Each of the sub-pixels arranged side by side in the first direction is connected to the same gate line; The subpixels arranged side by side in the second direction form a first subpixel group; the odd-numbered subpixels in the i-th first subpixel group and the even-numbered subpixels in the (i+1)-th first subpixel group are connected to the same data line; or, the even-numbered subpixels in the i-th first subpixel group and the odd-numbered subpixels in the (i+1)-th first subpixel group are connected to the same data line; where i is an integer greater than or equal to 1.
9. The pixel structure according to claim 8, wherein, Each sub-pixel includes a thin-film transistor and a pixel electrode; the pixel electrodes of the sub-pixels arranged side by side in the second direction form a pixel electrode group; the pixel electrode group includes a first side and a second side arranged opposite to each other in the first direction; In the second direction, the thin-film transistors in the two adjacent sub-pixels are located, one on the first side of the pixel electrode group and the other on the second side of the pixel electrode. In each of the subpixels arranged side by side in the first direction, the thin-film transistors are located on the first side or the second side of the pixel electrode group within the first subpixel group to which they belong.
10. The pixel structure according to any one of claims 1-5, wherein, The subpixels in each pixel unit include red subpixels, green subpixels, and blue subpixels.
11. A pixel structure comprising a plurality of pixel units; the plurality of pixel units forming a plurality of first pixel groups arranged side by side along a first direction, and the pixel units within any first pixel group arranged side by side along a second direction; each of the plurality of pixel units comprising a plurality of sub-pixels, and at least some of the sub-pixels having different colors; each of the sub-pixels comprising at least a pixel electrode; The pixel structure is divided into a central display area and two opposite edge display areas located on either side of the central display area along the first direction; both the central display area and the edge display areas include multiple pixel regions, and one pixel unit is disposed within each pixel region; each pixel region includes multiple sub-pixel regions arranged side by side along the first direction; wherein... For each pixel unit in the first pixel group located in the edge display area, at least a portion of the pixel electrodes in the sub-pixels are located within at least two sub-pixel regions.
12. The pixel structure of claim 11, wherein, Each pixel electrode includes multiple sub-electrodes; the sub-electrodes located in the same sub-pixel region are arranged side by side along a second direction.
13. The pixel structure of claim 12, wherein, Each of the sub-electrodes located within the same sub-pixel region belongs to a different sub-pixel.
14. The pixel structure of claim 13, wherein, The number of sub-pixel regions and sub-pixels in each pixel region is the same; each sub-pixel also includes a thin-film transistor, and one thin-film transistor is disposed in one sub-pixel region; the pixel structure also includes gate lines and data lines; each sub-electrode closest to the gate line in each pixel unit belongs to a different sub-pixel; The gates of the thin-film transistors arranged side-by-side in the sub-pixel region in the first direction are connected to the same gate line; the drain of each thin-film transistor is connected to the sub-electrode closest to the gate line to which the gate of the thin-film transistor is connected.
15. The pixel structure of claim 14, wherein, Each sub-electrode arranged side by side in the second direction constitutes a sub-electrode group; the sub-electrode group includes a first side and a second side arranged opposite to each other along the first direction; In the second direction, two thin-film transistors in the two adjacent sub-pixel regions are located, one on the first side of the sub-electrode group and the other on the second side of the sub-electrode group; In each of the sub-pixel regions arranged side by side in the first direction, a thin-film transistor is located on the first or second side of the sub-electrode group in which it is located.
16. The pixel structure according to any one of claims 11-15, wherein, The subpixel arrangement pattern is the same in each of the aforementioned pixel units.
17. The pixel structure according to any one of claims 11-15, wherein, The subpixels in each pixel unit include red subpixels, green subpixels, and blue subpixels.
18. A display device comprising at least one display panel; wherein, Any of the aforementioned display panels comprises the pixel structure of any one of claims 1-17.