Active control of light emitting diodes and light emitting diode displays

Abstract

Synchronization is provided for light emitting diode (LED) pixels in an LED display such that one or more actions of all LED pixels can be initiated simultaneously or within a millisecond. The LED display and corresponding system can include a controller configured to send a communication signal to one or more strings of LED pixels. An active electrical element within each LED pixel can be configured to receive the communication signal, generate a corresponding synchronization signal, and respond in a coordinated manner with all other LED pixels in a particular LED display. Failure mitigation of LED pixel failure within an LED string is provided, where the controller is configured with a bidirectional communication port for communication with the LED string. In the failure mitigation process, the bidirectional communication port can switch direction to provide the communication signal to both sides of the LED string.

Description

Technical Field

[0001] This disclosure relates to solid-state lighting devices including light-emitting diode devices and light-emitting diode displays. Background Technology

[0002] A light-emitting diode (LED) is a solid-state device that converts electrical energy into light and typically includes one or more active layers (or active regions) of semiconductor material disposed between oppositely doped n-type and p-type layers. When a bias voltage is applied to the doped layers, holes and electrons are injected into the one or more active layers and recombine within them to produce emission, such as visible light or ultraviolet light emission. LED chips typically include active regions that can be made of epitaxial layers and / or organic semiconductor materials such as silicon carbide, gallium nitride, aluminum gallium nitride, indium nitride, gallium phosphide, aluminum nitride, gallium arsenide, etc.

[0003] LEDs are widely used in various lighting environments, including for backlighting of liquid crystal display (LCD) systems (e.g., as an alternative to cold cathode fluorescent lamps) and for direct-view LED displays. Applications utilizing LED arrays include vehicle headlights, street lighting, luminaires, and various indoor, outdoor, and professional environments. Ideal characteristics of LED devices include high luminous efficiency, long lifespan, and wide color gamut.

[0004] Traditional LCD systems require polarizers and color filters (e.g., red, green, and blue), which inherently reduces light utilization efficiency. Direct-view LED displays utilize self-emissive LEDs, eliminating the need for backlights, polarizers, and color filters, thus improving light utilization efficiency.

[0005] Large-size multicolor direct-view LED displays (including full-color LED video screens) typically comprise numerous individual LED panels, packages, and / or components, providing image resolution determined by the distance between adjacent pixels, or "pixel pitch." Direct-view LED displays include tri-color and dual-color displays; tri-color displays use red, green, and blue (RGB) LED arrays, while dual-color displays use red and green (RG) LED arrays. Other colors and color combinations can be used. Large-size displays intended for long-distance viewing (e.g., electronic billboards and stadium displays) typically have relatively large pixel pitches and often include discrete LED arrays with multicolor (e.g., red, green, and blue) LEDs that can operate independently to form what appears to be full-color pixels to the viewer. Medium-sized displays with relatively short viewing distances require shorter pixel pitches (e.g., 3 mm or less) and may include panels with arrays of red, green, and blue LEDs mounted on a single electronic device attached to a driver printed circuit board that controls the LEDs. Driver printed circuit boards are typically densely packed with electrical devices used to drive the pixels of a display, including capacitors, field-effect transistors (FETs), decoders, microcontrollers, and more. As pixel pitch continues to decrease for higher resolution displays, the density of these electronic devices for a given panel area becomes even higher, corresponding to the increased number of pixels. This often increases the complexity and cost of LED panels used in display applications, as well as thermal congestion in areas where the driver electronics are more closely spaced.

[0006] The field continues to seek improved LED array devices with small pixel pitch while overcoming the limitations associated with conventional devices and manufacturing methods. Summary of the Invention

[0007] This disclosure relates to light-emitting diodes, LED packages, and associated LED displays, and more specifically to active control of LEDs within an LED display. An LED display may include rows and columns of LED diodes forming an array of LED pixels. A particular LED pixel may include a cluster of LED chips of the same or multiple colors, wherein exemplary LED pixels include red LED chips, green LED chips, and blue LED chips. In some embodiments, an LED package includes a plurality of LED chips forming at least one LED pixel, and a plurality of such LED packages may be arranged to form an array of LED pixels for an LED display. Each LED package may include an active electrical element configured to receive control signals and actively maintain the operating state of the LED chips for the LED package when addressing other LED packages, such as brightness or grayscale level or color selection signals. In some embodiments, the active electrical element may include active circuitry including one or more of driver devices, signal conditioning or conversion devices, memory devices, decoder devices, electrostatic discharge (ESD) protection devices, thermal management devices, and detection devices. In this regard, each LED pixel of the LED display may be configured to operate in an active matrix addressing manner. Active electrical components can be configured to receive one or more of analog control signals, coded analog control signals, digital control signals, and coded digital control signals. A display panel is disclosed, comprising an array of such LED pixels on a first surface of the panel and control circuitry on a rear surface of the panel, the control circuitry being configured to communicate with each active electrical component of the LED pixels.

[0008] According to aspects of this disclosure, synchronization is provided for LED pixels in an LED display, enabling one or more actions of all LED pixels to initiate simultaneously or within milliseconds. The LED display and corresponding system may include a controller configured to send communication signals to one or more strings of LED pixels. Active electrical components within each LED pixel may be configured to receive the communication signals, generate a corresponding synchronization signal, and respond in a manner coordinated with all other LED pixels in a particular LED display. Other aspects of this disclosure include fault mitigation for LED pixel failures within an LED string, wherein the controller is configured with a bidirectional communication port for communicating with the LED string. During fault mitigation, the bidirectional communication port may switch direction to provide communication signals to both sides of the LED string.

[0009] In one aspect, an LED package includes: at least one LED chip; and an active electrical element electrically connected to the at least one LED chip, the active electrical element being configured to receive serial communication from a data stream and determine a synchronization signal associated with a recurring pattern of data within the data stream. In some embodiments, the active electrical element includes a counter configured to count the synchronization signal. In some embodiments, the counter is configured to decrement from a counter start value corresponding to a location of the active electrical element. In some embodiments, the active electrical element is configured to initiate an event signal when the count reaches a first predetermined value. In some embodiments, the first predetermined value is determined based on the location of the active electrical element, and the event signal initiated in the active electrical element is synchronized with other active elements arranged to receive the data stream. In some embodiments, the event signal includes one or more of activating at least one LED chip, deactivating at least one LED chip, and maintaining at least one LED chip in an operational state. In some embodiments, the active electrical element is configured to initiate a second event signal when the count reaches a second predetermined value. In some embodiments, the second event signal includes one or more of activating at least one LED chip, deactivating at least one LED chip, and maintaining at least one LED chip in an operational state. In some embodiments, the output of the counter is provided to a processing unit of the active electrical component. In some embodiments, the active electrical component includes an overflow register configured to provide an overflow bit to the processing unit. In some embodiments, the counter is configured to reset when the active electrical component receives one or more predetermined commands from a data stream. In some embodiments, the one or more predetermined commands include a frame end command.

[0010] In another aspect of controlling an LED display, the method includes: providing a first LED string comprising a plurality of first LED pixels, wherein each of the plurality of first LED pixels comprises at least one LED chip and an active electrical component; loading different counter values ​​onto the active electrical component of each first LED pixel based on the position of each first LED pixel in the first LED string; and synchronizing the operating states of each first LED pixel based on the different counter values. In some embodiments, the loading of different counter values ​​is performed by a controller connected to the first LED string. In some embodiments, the method further includes: providing a second LED string comprising a plurality of second LED pixels, wherein each of the plurality of second LED pixels comprises at least one LED chip and an active electrical component; loading different counter values ​​onto the active electrical component of each second LED pixel based on the position of each second LED pixel in the second LED string; and synchronizing the operating states of the plurality of first LED pixels and the plurality of second LED pixels based on the counter values. In some embodiments, synchronizing the operating states of the plurality of first LED pixels and the plurality of second LED pixels includes turning the plurality of first LED pixels and the plurality of second LED pixels on or off. In some embodiments, synchronizing the operating states of each first LED pixel provides a time frame in which all of the plurality of first LED pixels are off. In some embodiments, the LED display is a three-dimensional (3D) LED display that requires the viewer to wear 3D shutter glasses, and the time frame is determined to allow the 3D shutter glasses to transition from one viewing state to another while multiple first LED pixels are off.

[0011] In one aspect, an LED package includes: at least one LED chip; and an active electrical element electrically connected to the at least one LED chip, the active electrical element being configured to: provide a pulse width modulation (PWM) signal to the at least one LED chip, wherein the PWM signal includes a PWM period and a PWM duty cycle; pause the PWM signal during a portion of the PWM period; and restart the PWM signal from that paused portion of the PWM period. In some embodiments, the active electrical element is configured to: receive serial communication from a data stream and determine a synchronization signal associated with a cyclic pattern of data within the data stream; decrement the counting synchronization signal from a counter start value corresponding to a location of the at least one LED chip; and initiate a first event signal to pause the PWM signal when the count reaches a predetermined value. In some embodiments, the active electrical element is further configured to initiate a second event signal to restart the PWM signal when the count reaches a second predetermined value.

[0012] In another embodiment, an LED package includes: at least one LED chip; and an active electrical element electrically connected to the at least one LED chip, the active electrical element being configured to: receive data from a data stream in a communication direction; and respond to a command in the data stream by reversing the communication direction of the data stream. In some embodiments, the active electrical element is configured to transmit a command in the communication direction before reversing the communication direction. In some embodiments, the active electrical element is configured to provide return data to the data stream after reversing the communication direction. In some embodiments, the return data includes pulses configured to be counted by a controller of the LED package. The LED package may also include at least one bidirectional communication port configured to receive a command and then reverse the direction of the at least one bidirectional communication port in response to the command.

[0013] In another aspect, an LED display includes: at least one LED string, the at least one LED string including a plurality of LED pixels, wherein each of the plurality of LED pixels includes at least one LED chip and an active electrical component; and a controller connected to the at least one LED string, wherein the controller is configured to provide a fault mitigation process that identifies one or more operating LED pixels of the LED string and at least one non-operating LED pixel of the LED string, the fault mitigation mode including: sending communication to the at least one LED string, wherein the active electrical components of the one or more operating LED pixels send return communication to the controller, and the at least one non-operating LED pixel does not respond to the communication. In some embodiments, the communication is polling communication, and the return communication is return polling communication. In some embodiments, the return communication includes a ping or pulse from each of the one or more operating LED pixels. In some embodiments, the controller is configured to count each ping or pulse to determine the number of one or more operating LED pixels. In some embodiments, the controller includes a first bidirectional communication port and a second bidirectional communication port coupled to opposite ends of the at least one LED string. In some embodiments, the communication direction of one of the first and second bidirectional communication ports is reversed to receive the return polling communication. The LED display may also include a data line tap between at least one pair of adjacent LED pixels connected in at least one LED string. In some embodiments, communication via the data line tap is initiated during fault mitigation. In some embodiments, each of the plurality of LED pixels includes at least one bidirectional communication port configured to receive polling communication and then reverse the communication direction of the at least one bidirectional communication port to send return polling communication to the controller. In some embodiments, 10 to 100 LED pixels in the plurality of LED pixels in at least one LED string are arranged along the peripheral edge of the LED display.

[0014] On the other hand, any of the foregoing aspects and / or the various individual aspects and features as described herein can be combined to obtain additional advantages. Any of the various features and elements disclosed herein can be combined with one or more other disclosed features and elements, unless otherwise indicated herein.

[0015] Those skilled in the art will understand the scope of this disclosure and recognize its additional aspects after reading the following detailed description of preferred embodiments in conjunction with the accompanying drawings. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of this disclosure and, together with the specification, serve to explain the principles of this disclosure.

[0017] Figure 1A This is a top view of the front of a representative display panel used for a light-emitting diode (LED) display that includes multiple active LED pixels.

[0018] Figure 1B yes Figure 1A The bottom view of the back of a representative display panel.

[0019] Figure 2A This is a bottom view of an LED package in a specific manufacturing state, with multiple LEDs and active electrical components mounted on a substrate.

[0020] Figure 2B It is along Figure 2A The cross-sectional view taken by section line AA.

[0021] Figure 2C yes Figure 2A The bottom view of the LED package in its subsequent manufacturing state, where a sealant layer and multiple conductive traces have been formed.

[0022] Figure 2D It is along Figure 2C The cross-sectional view taken by section line BB.

[0023] Figure 2E yes Figure 2C The bottom view of the LED package in its subsequent manufacturing state, where an additional sealant layer and multiple package bonding pads have been formed.

[0024] Figure 2F It is along Figure 2E The cross-sectional view taken by the section line CC.

[0025] Figure 2G It is along Figure 2E The cross-sectional view taken by the section line DD.

[0026] Figure 2H yes Figure 2E A simplified top view of the LED package.

[0027] Figure 2I yes Figure 2E A simplified bottom view of the LED package.

[0028] Figure 3A This is a bottom view of a representative LED package including multiple conductive traces, where portions of some of the conductive traces form package bonding pads for the LED package.

[0029] Figure 3B It is along Figure 3A The cross-sectional view taken by the section line EE.

[0030] Figure 4 This is a cross-sectional view of an LED package showing a configuration in which one or more LED chips and active electrical components are mounted along the same horizontal plane.

[0031] Figure 5 This is a cross-sectional view of an LED package with one or more LED chips mounted along a first horizontal plane and active electrical components mounted along a second horizontal plane different from the first horizontal plane.

[0032] Figure 6 This is a cross-sectional view showing an LED package with one or more LED chips and active electrical components mounted on opposite sides of a substrate.

[0033] Figure 7 This is a bottom view of an LED package including a plurality of LED pixels according to an embodiment disclosed herein.

[0034] Figure 8 This is a block diagram schematically illustrating an assembly of an active electrical element according to embodiments disclosed herein.

[0035] Figure 9 This is a block diagram schematically illustrating an assembly of an active electrical element according to embodiments disclosed herein.

[0036] Figure 10 This is a schematic diagram illustrating an exemplary structure of a volatile memory element that may be included within an active electrical component according to embodiments disclosed herein.

[0037] Figure 11A This is a schematic diagram showing a driver element including a voltage-controlled current source circuit.

[0038] Figure 11B This is a schematic diagram showing driver elements including transconductance amplifiers arranged in an active cascade configuration.

[0039] Figure 11C It shows that it includes adding to Figure 11B A schematic diagram of the driver element of the input amplifier.

[0040] Figure 11D It shows something similar to Figure 11C A schematic diagram of a driver element but with a driver element having a reverse polarity connection.

[0041] Figure 11E This is a schematic diagram showing the drive components, including the Howland current pump.

[0042] Figure 11F It shows something similar to Figure 11E A schematic diagram of the driver element, with the addition of a voltage divider and an additional operational amplifier.

[0043] Figure 12A This is a block diagram schematically illustrating an embodiment of an active electrical component including a detector element.

[0044] Figure 12B This is a bottom view of an LED package including a photodiode according to an embodiment disclosed herein.

[0045] Figure 13 This is a block diagram schematically illustrating various components that may be included in a system-level control scheme for an LED display panel according to embodiments disclosed herein.

[0046] Figure 14 This is a schematic diagram illustrating a configuration in which active electrical components corresponding to a specific LED pixel are configured to receive row selection signal lines and independent control signals for each red, green, and blue LED chip included within the LED pixel.

[0047] Figure 15 This is a schematic diagram illustrating a configuration in which active electrical components corresponding to a particular LED pixel are configured to receive individual row select signal lines for each LED chip in the LED pixel and single color level signal lines for all LED chips within the LED pixel.

[0048] Figure 16 This is a schematic diagram illustrating a configuration in which active electrical components corresponding to a particular LED pixel are configured to receive an encoding row selection signal for each LED chip in the LED pixel and a single color level signal line for all LED chips within the LED pixel.

[0049] Figure 17This is a schematic diagram illustrating a configuration in which the active electrical components of a particular LED package are configured to receive row selection signals, color level signals, and one or more color selection signals from red, green, and blue LED chips included within the LED package.

[0050] Figure 18 It means similar to Figure 16 and Figure 17 A schematic diagram of the configuration of independent symbols.

[0051] Figure 19 This is a schematic diagram illustrating a configuration in which the active electrical components corresponding to a particular LED pixel are configured to receive a single row selection signal line and a single color level signal line for all LED chips of the LED pixel.

[0052] Figure 20 This is a schematic diagram illustrating a configuration in which the active electrical components corresponding to a particular LED pixel are configured to receive a single row selection signal line and a single color level signal line for all LED chips of the LED pixel.

[0053] Figure 21 It is an illustrative representation based on Figure 20 A block diagram of a system-level control scheme for an LED display panel, wherein each active electrical element of the LED pixel array is configured to receive a signal line.

[0054] Figure 22 It shows the configuration used according to Figure 20 and Figure 21 A partial plan view of the path configuration of the LED display panel for configuration operations.

[0055] Figure 23 This is a schematic diagram illustrating a configuration in which active electrical components corresponding to a particular LED pixel are configured to receive fully digital communication of row, column, and / or color selection signals.

[0056] Figure 24 It is an illustrative representation based on Figure 23 A block diagram of a system-level control scheme for an LED display panel, wherein each active electrical element of the LED pixel array is configured to receive a signal line.

[0057] Figure 25 It shows the configuration used according to Figure 23 A partial plan view of the path configuration of the LED display panel.

[0058] Figure 26A and Figure 26BThis is a schematic diagram illustrating the arrangement of exemplary data packets according to embodiments disclosed herein.

[0059] Figure 27 This is a schematic diagram illustrating a cascaded flow of data packets from a control element to multiple LED packages according to embodiments disclosed herein.

[0060] Figure 28 This is a schematic diagram illustrating a cascaded flow of data packets from a control element to multiple LED packages and a flow of one or more intercom data packets to a control element according to embodiments disclosed herein.

[0061] Figure 29 This is a schematic diagram illustrating a cascaded flow of data packets from a control element according to an embodiment disclosed herein, the cascaded flow further including data packets configured to provide information to all LED packages.

[0062] Figure 30 This is a schematic diagram illustrating a cascaded flow of data packets from a control element according to an embodiment disclosed herein, the cascaded flow additionally including one or more consecutive data packets configured to provide additional information to at least one LED package.

[0063] Figure 31 This is a partial plan view illustrating the path configuration of an LED panel configured for operation according to embodiments disclosed herein.

[0064] Figure 32 This is a partial plan view illustrating the path configuration of an LED panel including an LED package with selectively assigned communication ports according to an embodiment disclosed herein.

[0065] Figure 33 This is a partial plan view illustrating another path configuration of an LED panel including an LED package with selectively assigned communication ports, according to an embodiment disclosed herein.

[0066] Figure 34 This illustrates embodiments according to the disclosure herein. Figure 33 A partial plan view of the path configuration of the LED panel, with added voltage lines and ground lines.

[0067] Figure 35 This is a schematic diagram illustrating various inputs and corresponding actions for an active electrical component according to embodiments disclosed herein.

[0068] Figure 36 This is a schematic diagram illustrating an active electrical component including a finite state machine according to an embodiment disclosed herein.

[0069] Figure 37This is a schematic diagram illustrating an embodiment of an embodiment disclosed herein in which an active electrical component is configured to detect normal or malfunctioning operating conditions of at least one LED.

[0070] Figure 38 This is a schematic diagram illustrating an embodiment of an embodiment disclosed herein in which an active electrical element is configured to provide forward and reverse bias states to at least one LED.

[0071] Figure 39 This illustrates an embodiment according to the present disclosure, in which a current source is used instead of... Figure 38 A schematic diagram of an embodiment of a resistor network and a corresponding selection switch.

[0072] Figure 40 It is shown that... Figure 39 The schematic diagram is similar to that of several LED embodiments.

[0073] Figure 41 This illustrates a configuration with multiple ports according to embodiments disclosed herein. Figure 40 A schematic diagram of an active electrical component, the multiple ports including power supply voltage, ground, and bidirectional communication ports.

[0074] Figure 42 This illustrates a configuration with polarity-agnostic input capability according to embodiments disclosed herein. Figure 41 A schematic diagram of an active electrical component.

[0075] Figure 43 It shows that it can be used to... Figure 42 A schematic diagram of a four-input rectifier that provides initial power via a switching network.

[0076] Figure 44A This is a schematic diagram illustrating an embodiment in which active electrical components are configured to segment the duty cycle for pulse width modulation (PWM) control of one or more LEDs.

[0077] Figure 44B This is a schematic diagram illustrating an embodiment in which a counter switching device is configured to share a segment of the corresponding duty cycle of the LEDs among multiple LEDs.

[0078] Figure 45 This is a tabular diagram showing a sequence counter used for PWM control of one or more LEDs.

[0079] Figure 46 This is a tabular diagram illustrating a non-sequential sorting counter used to provide a bit-inverted sequence for PWM control of one or more LEDs.

[0080] Figure 47This is a tabular diagram illustrating a non-sequential sorting counter used to provide a partial bit-inverted sequence for PWM control of one or more LEDs.

[0081] Figure 48 This is a table diagram showing a non-sequential sorting counter used to provide a sorting counter based on two segments of PWM control for one or more LEDs.

[0082] Figure 49 This is a table diagram showing a non-sequential sorting counter used to provide a four-segment sorting based on PWM control for one or more LEDs.

[0083] Figure 50 This is a table diagram showing a non-sequential sorting counter used to provide an eight-segment sorting based on the PWM control of one or more LEDs.

[0084] Figure 51A This shows a return-to-zero (RZ) format data stream that can be provided to active electrical components.

[0085] Figure 51B A data stream in RZ format is shown, which includes a reset signal that can be provided to active electrical components.

[0086] Figure 52 This is a schematic block diagram of a system-level control scheme for an LED display panel based on the synchronization principle of this disclosure.

[0087] Figure 53 It is based on the synchronization principle of this disclosure. Figure 52 The schematic processing flow of the sub-controller.

[0088] Figure 54 It is connected to Figure 53 An illustrative processing flow of an exemplary procedure for the counter logic within the active electrical components of each LED pixel of the sub-controller.

[0089] Figure 55 yes Figure 54 An illustrative processing flow of an exemplary processing unit within an active electrical component.

[0090] Figure 56 This is a schematic block diagram of a system-level control scheme for an LED display panel based on the fault mitigation principle of this disclosure.

[0091] Figure 57 The diagram shows a top view of a portion of an LED display with data line taps arranged along one or more LED strings. Detailed Implementation

[0092] The embodiments described below illustrate the necessary information to enable those skilled in the art to practice these embodiments and demonstrate the best mode of practice. Upon reading the following description in conjunction with the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and recognize the application of these concepts not specifically mentioned herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0093] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements are not limited by these terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term “and / or” includes any and all combinations of one or more of the related listed items.

[0094] It should be understood that when an element, such as a layer, region, or substrate, is referred to as being on or extending onto another element, it may be directly on or directly extending onto the other element, or intermediate elements may also exist. Conversely, when an element is referred to as being "directly on" or "directly extending onto" another element, no intermediate elements exist. Similarly, it should be understood that when an element, such as a layer, region, or substrate, is referred to as being "on" or extending "on" another element, it may be directly on or directly on the other element, or intermediate elements may also exist. Conversely, when an element is referred to as being "directly on" or "directly extending" onto another element, no intermediate elements exist. It should also be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or intermediate elements may exist. Conversely, when an element is referred to as being "directly connected" or "directly coupled" to another element, no intermediate elements exist.

[0095] Related terms such as “below,” “above,” “upper,” “lower,” “horizontal,” “vertical,” “top,” “bottom,” “row,” or “column” may be used herein to describe the relationship of one element, layer, surface, or region to another element, layer, surface, or region shown in the figures. It should be understood that these terms, and those discussed above, are intended to encompass different orientations of the device beyond those depicted in the figures. For example, if the device in a particular figure is flipped, an element, layer, surface, or region described as “above” would now be oriented as “below.”

[0096] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that, when used herein, the terms “comprises,” “comprising,” “includes,” and / or “including” designate the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0097] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that the terms used herein are to be interpreted as having the same meaning as they have in the context of this specification and the relevant field, and are not to be construed as having an idealized or overly formal meaning unless expressly defined herein.

[0098] This disclosure relates to light-emitting diodes (LEDs), LED packages, and associated LED displays, and more particularly to active control of LEDs within an LED display. An LED display may include rows and columns of LEDs forming an array of LED pixels. A particular LED pixel may include a cluster of LED chips of the same or multiple colors, wherein exemplary LED pixels include red LED chips, green LED chips, and blue LED chips. In some embodiments, an LED package includes a plurality of LED chips forming at least one LED pixel, and a plurality of such LED packages may be arranged to form an array of LED pixels for an LED display. Each LED package may include an active electrical element configured to receive control signals and actively maintain the operational state of the LED chips in the LED package, such as brightness or grayscale level or color selection signals, while addressing other LED packages. In some embodiments, the active electrical element may include active circuitry including one or more of driver devices, signal conditioning or conversion devices, memory devices, decoder devices, electrostatic discharge (ESD) protection devices, thermal management devices, and detection devices. In this regard, each LED pixel of the LED display may be configured to operate in an active matrix addressing manner. Active electrical components can be configured to receive one or more of analog control signals, coded analog control signals, digital control signals, and coded digital control signals. A display panel is disclosed, comprising an array of such LED pixels on a first surface of the panel and control circuitry on a rear surface of the panel, the control circuitry being configured to communicate with each active electrical component of the LED pixels.

[0099] This disclosure relates to active control of LEDs, LED packages, and associated LED displays via pulse width modulation (PWM). In some embodiments, the effective PWM frequency of the LEDs is increased by segmenting the duty cycle, wherein the LEDs are electrically activated within individual PWM cycles. Segmenting the duty cycle within a PWM cycle can be achieved by transforming or reordering a sequence in which a comparator outputs a control signal to a driver operating the LEDs. In this way, the duty cycle within each PWM cycle can be segmented over a series of pulses that electrically activate and deactivate each LED multiple times within each PWM cycle, rather than continuously keeping the LEDs electrically activated for the duration of the duty cycle. In some embodiments, active electrical components incorporated in one or more LED packages of the LED display are capable of segmenting the duty cycles of one or more LEDs. In some embodiments, active electrical components are disclosed that are capable of receiving a reset signal from a data stream to initiate a reset action or to pass the reset signal to other active electrical components of the display.

[0100] According to aspects of this disclosure, synchronization is provided for LED pixels in an LED display, enabling one or more actions of all LED pixels to initiate simultaneously or within milliseconds. The LED display and corresponding system may include a controller configured to send communication signals to one or more strings of LED pixels. Active electrical components within each LED pixel may be configured to receive the communication signals, generate a corresponding synchronization signal, and respond in a manner coordinated with all other LED pixels in a particular LED display. Other aspects of this disclosure include fault mitigation for LED pixel failures within an LED string, wherein the controller is configured with a bidirectional communication port for LED string communication. During fault mitigation, the bidirectional communication port may switch direction to provide communication signals to both sides of the LED string.

[0101] LED chips typically include active LED structures or regions, which may have many different semiconductor layers arranged in different ways. The fabrication and operation of LEDs and their active structures are well known in the art and will only be briefly discussed here. The layers of the active LED structure can be fabricated using known processes, with metal-organic chemical vapor deposition being a suitable process. The layers of an active LED structure may include many different layers and typically include an active layer sandwiched between n-type and p-type oppositely doped epitaxial layers, all of which are sequentially formed on a growth substrate. It should be understood that the active LED structure may also include additional layers and elements, including but not limited to: buffer layers, nucleation layers, superlattice structures, undoped layers, cladding layers, contact layers, current diffusion layers, and light extraction layers and elements. The active layer may include a single quantum well, multiple quantum wells, a double heterostructure, or a superlattice structure.

[0102] Active LED structures can be made from different material systems, some of which are group III nitride-based. Group III nitrides refer to these semiconductor compounds formed between nitrogen and elements in group III of the periodic table, typically aluminum (Al), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group III nitrides also refer to ternary and quaternary compounds, such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). For group III nitrides, silicon (Si) is a common n-type dopant, and magnesium (Mg) is a common p-type dopant. Therefore, for group III nitride-based material systems, the active layer, n-type layer, and p-type layer can comprise one or more layers of GaN, AlGaN, InGaN, and AlInGaN, either undoped or doped with silicon or magnesium. Other material systems include silicon carbide (SiC), organic semiconductor materials, and other Group III-V systems, such as gallium phosphide (GaP), gallium arsenide (GaAs), and related compounds.

[0103] Active LED structures can be grown on a substrate that can include many materials, such as sapphire, SiC, aluminum nitride (AlN), and GaN. A suitable substrate is 4H polytype SiC, but other SiC polytypes, including 3C, 6H, and 15R polytypes, can also be used. SiC offers several advantages, such as a tighter lattice match with group III nitrides compared to other substrates, resulting in high-quality group III nitride films. SiC also has very high thermal conductivity, so the total output power of group III nitride devices on SiC is not limited by substrate heat dissipation. Sapphire is another common substrate for group III nitrides and also offers several advantages, including lower cost, established manufacturing processes, and good optical transmission properties.

[0104] Depending on the composition of the active layer and the n-type and p-type layers, different embodiments of active LED structures can emit light of different wavelengths. For example, various active LED structures can emit blue light with a peak wavelength range of approximately 430 nanometers (nm) to 480 nm, green light with a peak wavelength range of 500 nm to 570 nm, or red light with a peak wavelength range of 600 nm to 650 nm. The LED chip can also be coated with one or more luminescent phosphors or other conversion materials, such as phosphors, such that at least some of the light from the LED chip is absorbed by one or more phosphors and converted into one or more different wavelength spectra according to the characteristics of the one or more phosphors. In some embodiments, the combined emission of the LED chip and one or more phosphors is typically a white combination of light. One or more phosphors may include those emitting yellow (e.g., YAG:Ce), green (e.g., LuAg:Ce), and red (e.g., Ca) light. i-x-y Srx Eu y Phosphors (AlSiN3) and combinations thereof. The luminescent materials described herein may be or include one or more of phosphors, scintillators, luminescent inks, quantum dot materials, fluorescent light strips, etc. The luminescent materials may be provided by any suitable means, for example, directly coated on one or more surfaces of an LED, dispersed in a sealant material configured to cover one or more LEDs, and / or coated on one or more optical or support elements (e.g., by powder coating, inkjet printing, etc.). In some embodiments, the luminescent materials may be down-converted or up-converted, and combinations of down-converted and up-converted materials may be provided. In some embodiments, multiple different (e.g., different compositions) luminescent materials configured to produce different peak wavelengths may be configured to receive emissions from one or more LED chips.

[0105] Light emitted from the active layer or region of an LED chip typically exhibits a Lambertian emission mode. For directional applications, internal mirrors or external reflective surfaces can be used to redirect as much light as possible to the desired emission direction. Internal mirrors may comprise a single layer or multiple layers. Some multilayer mirrors include a metallic reflective layer and a dielectric reflective layer, wherein the dielectric reflective layer is disposed between the metallic reflective layer and multiple semiconductor layers. A passivation layer may be disposed between the metallic reflective layer and first and second electrical contacts, wherein the first electrical contact is configured to be electrically connected to a first semiconductor layer and the second electrical contact is configured to be electrically connected to a second semiconductor layer. In some embodiments, the first and second electrical contacts themselves may be configured as mirror layers. For single-layer or multilayer mirrors comprising surfaces with a reflectivity of less than 100%, some light may be absorbed by the mirror. Furthermore, light redirected by the active LED structure may be absorbed by other layers or elements within the LED chip.

[0106] As used herein, a layer or region of a light-emitting device can be considered “transparent” when at least 80% of the emitted radiation incident on the layer or region is emitted through the layer or region. Furthermore, as used herein, a layer or region of an LED is considered “reflective” or embodies a “mirror” or “reflector” when at least 80% of the emitted radiation incident on the layer or region is reflected. In some embodiments, the emitted radiation includes visible light, for example, blue and / or green LEDs with or without light-emitting material. In other embodiments, the emitted radiation can include invisible light. For example, in the case of GaN-based blue and / or green LEDs, silver (e.g., at least 80% reflectivity) can be considered a reflective material. In the case of ultraviolet (UV) LEDs, suitable materials can be selected to provide the desired reflectivity, providing high reflectivity in some embodiments; and / or the desired absorption, providing low absorption in some embodiments. In some embodiments, a “transparent” material can be configured to transmit at least 50% of the emitted radiation of the desired wavelength. In some embodiments, by adding one or more light-absorbing materials (e.g., opaque or non-reflective materials, including gray, dark, or black particles or materials), an initial “transparent” material can be transformed into a “light-absorbing material” that transmits less than 50% of the emitted radiation at the desired wavelength.

[0107] This disclosure can be used for LED chips having various geometries, such as vertical or lateral geometries. LED chips with vertical geometries typically include anode and cathode connections on opposite sides of the LED chip. LED chips with lateral geometries typically include anode and cathode connections on the same side of the LED chip, which is opposite a substrate (e.g., a growth substrate). Some embodiments disclosed herein relate to the use of flip-chip LED devices, where the light-transmitting substrate represents the exposed light-emitting surface.

[0108] LED chips, or LED packages comprising one or more LED chips, can be arranged in a variety of applications to provide illumination for objects, surfaces, or areas. In some applications, clusters of LED chips or LED packages of different colors can be arranged as pixels for LED display applications, including video displays. For example, separate clusters of red, green, and blue LED chips can form LED pixels for a larger LED display. In some applications, the red, green, and blue LED chips for each pixel can be packaged together as a multi-LED package, and an array of such multi-LED packages is arranged together to form an LED display. In this respect, each pixel may include a single LED package comprising red, green, and blue LED chips. In other embodiments, red, green, and blue LED chips may be packaged individually or arranged in an on-board chip configuration. In some LED display applications, arrays of LED pixels are arranged on panels, which may also be referred to as plywood or LED modules, and arrays of such panels are arranged together to form a larger LED display. Depending on the application, each panel of an LED display may include a different number of LED pixels. In some applications, each panel of an LED display may include an array formed by 64 rows by 64 columns of LED pixels or more. In some embodiments, each panel of the LED display can be configured to have a horizontal display resolution of approximately 4,000 LED pixels, or 4K resolution. For applications requiring higher screen resolution, each panel can include more rows and columns of LED pixels spaced closer together. Depending on the desired screen resolution, the pixel pitch can be approximately 3 millimeters (mm), or approximately 2.5 mm, or approximately 1.6 mm, or in the range of approximately 1.5 mm to approximately 3 mm, or in the range of approximately 1.6 mm to approximately 3 mm, or in the range of approximately 1.5 mm to approximately 2.5 mm. Furthermore, for some embodiments, for fine-pitch LED displays with higher screen resolution, the pixel pitch can be configured to be less than 1 mm, or less than 0.8 mm, or in the range of approximately 0.5 mm to approximately 1 mm, or approximately 0.7 mm.

[0109] In traditional video display applications, LED pixels are typically configured for passive matrix addressing. In this respect, LED pixels can be arranged to couple to passive interface elements that provide electrical connections to individual drivers or controllers. For example, orthogonally arranged (e.g., vertical and horizontal) conductors form rows and columns in a grid pattern, whereby the individual LED chip of each LED pixel is defined by each intersection of the row and column. Multiplexing can be used to allow individual control of each LED chip in the array while employing fewer conductors than the number of LED chips in the array, or by using a common anode or common cathode matrix arrangement, and brightness control can be provided via pulse width modulation. In this way, the conductors for rows or columns are shared among many LED pixels, and time-division multiplexing is used to address each individual LED pixel. Due to their passive configuration, each LED pixel emits light only during its respective communication time. The individual drivers for controlling the display are typically located away from the pixel arrangement of the display, such as on separate boards or modules, or on a printed circuit board (PCB) attached or otherwise mounted to the back of each panel, or on the back of a common PCB that includes the pixel array on the front side. As mentioned earlier, PCBs are typically densely packed with electrical components used to drive each pixel on a particular panel, including capacitors, field-effect transistors (FETs), decoders, microcontrollers, and so on. For higher resolution displays, the density of these electrical components increases in response to the increased number of pixels per panel. As previously mentioned, this increases the complexity and cost of LED panels used in display applications, as well as thermal congestion in areas where the driving electronics are more closely spaced. For passive matrix addressing, LED pixels are typically driven by a sequence of pulsed signals. In this respect, LED pixels can pulse rapidly at certain frequencies, such as 60 Hz or 120 Hz, depending on the display scan rate. While these rapid pulses may not appear to the human eye, they can be detected by image capture devices, and in some cases, interfering pulses may exist between the video display and other pulsed displays or between light sources adjacent to the video display.

[0110] According to the embodiments disclosed herein, each LED pixel of an LED display can be configured to operate in an active matrix addressing manner. With active matrix addressing, each LED pixel is configured to actively maintain an operational or driven state, such as brightness or grayscale level, or color selection, while other LED pixels are addressed, thereby allowing each LED pixel to maintain its driven state with reduced pulses or no pulses depending on the drive configuration. Therefore, each LED pixel can be configured to maintain its respective operational state by a continuous drive signal rather than by pulse signals associated with passive matrix addressing. In this regard, each LED pixel may include an active electrical chip or active electrical element, which may include a memory device and the ability to change the drive conditions or driver conditions of the LED pixel based on stored content from the memory device. In some embodiments, the continuous drive signal is a constant analog drive current, and in other embodiments, the brightness level can be controlled by a pulse method such as pulse width modulation (PWM), the continuous drive signal may refer to a PWM signal that is not interrupted by the scanning of other LED pixels within the array or subarray. In some embodiments, the active electrical chip may include active circuitry, which includes one or more of a driver device, signal conditioning or conversion device, memory device, decoder device, ESD protection device, thermal management device, and detection device. As used herein, the terms "active electrical chip," "active electrical element," or "active electrical assembly" include any chip or assembly capable of changing the driving conditions of an LED based on stored content or other information that may be stored within the chip or assembly. As used herein, the term "active LED pixel" includes one or more LED devices forming a pixel and an active electrical chip as described above. In some embodiments, each LED pixel may include a single LED package configured to include an active LED package comprising a plurality of LED chips and active electrical elements as described above. In this way, the number of individual electrical devices required for an LED display can be reduced, for example, individual electrical devices located on the back of the LED panel of the LED display, as previously described. Furthermore, the overall operating power required to operate the LED panel can be reduced.

[0111] Figure 1AThis is a top view of the front side of a representative display panel 10 for an LED display comprising a plurality of active LED pixels 12. As shown, the plurality of active LED pixels 12 may be arranged in rows and columns to form an array of active LED pixels 12 spanning the front side of the display panel 10. In some embodiments, each active LED pixel 12 is configured with active electrical elements including the ability to receive input signals, store stored content based on the input signals, change the driving conditions of LEDs within each active LED pixel 12 based on the stored content, and update the driving conditions each time the stored content is updated via an input signal. In some embodiments, each active LED pixel 12 includes an LED package comprising a plurality of LED chips forming the LED pixel and active electrical elements. Figure 1B yes Figure 1A A bottom view of the rear side of a representative display panel 10. Shown in its entirety, the display panel 10 may include additional passive or active elements configured to receive, process, and distribute signals to active LED pixels. Figure 1A (12). For example, display panel 10 may include input signal connector 14 and output signal connector 16, each of which may be configured as a video source connector, including a Video Graphics Array (VGA) connector, a Digital Visual Interface (DVI) connector, a High Definition Multimedia Interface (HDMI) connector, or a DisplayPort connector, etc. Display panel 10 may include control element 18, which includes control circuitry, such as a semiconductor control element. Control element 18 may be configured to receive input signals via input signal connector 14 and output control signals for active LED pixels. As will be described in more detail later, the active electrical components of each LED pixel are configured to independently change the driving conditions of each LED chip within the LED pixel in response to the control signals output from control element 18. In some embodiments, control element 18 includes one or more integrated circuits, such as application-specific integrated circuits (ASICs), microcontrollers, programmable control elements, and field-programmable gate arrays (FPGAs). In some embodiments, multiple control elements 18 may be configured on or recorded on each display panel 10. Decoder element 20 may be configured to receive control signals from control element 18 and path them to active LED pixels ( Figure 1A Multiple signal lines (12) of the active LED pixel. In some embodiments, one or more digital-to-analog converters (DACs) 22 may be provided to input signal to the active LED pixel (12). Figure 1AThe digital signals from control element 18 and decoder element 20 are converted before (12). Display panel 10 may also include other passive or active elements 24, which may include additional decoders, resistors, capacitors, or other electrical components or circuits for video display. In this way, signal connectors 14 and 16, control element 18, decoder element 20, DAC 22, and other passive or active elements 24 are recorded on display panel 10. In an alternative embodiment, the back side of display panel 10 may include additional LED packages forming another LED pixel array. In this respect, display panel 10 can be configured for double-sided display applications. In such an embodiment, at least some of signal connectors 14 and 16, control element 18, decoder element 20, DAC 22, and other passive or active elements 24 may be configured to be recorded at locations other than the back side of display panel 10 to provide control signals from one or more edges of display panel 10.

[0112] Figures 2A-2I Various manufacturing states of an LED package 26 comprising a plurality of LEDs 28-1 to 28-3 and an active electrical component 30 according to embodiments disclosed herein are shown. In some embodiments, the individual LED package 26 may be configured in a display panel ( Figure 1A Each active LED pixel is formed in 10) Figure 1A (12). Active electrical component 30 can also be called active electrical chip or active electrical assembly. Figure 2AThis is a bottom view of an LED package 26 in a specific manufacturing state, in which a plurality of LEDs 28-1 to 28-3 and active electrical components 30 are mounted on a substrate 32. Specifically, the plurality of LEDs 28-1 to 28-3 and active electrical components 30 may be mounted on a first surface 32' of the substrate 32. Transparent die attachment material may be arranged between the plurality of LEDs 28-1 to 28-3 and the substrate 32 to facilitate mounting. Each of the plurality of LEDs 28-1 to 28-3 may include a corresponding cathode contact 34-1 to 34-3 (e.g., an N-type contact pad) and a corresponding anode contact 36-1 to 36-3 (e.g., a P-type contact pad). In some embodiments, the plurality of LEDs 28-1 to 28-3 include individual LED chips that generate light of different dominant wavelengths. For example, LED 28-1 may be configured to primarily generate green emission, LED 28-2 may be configured to primarily generate blue emission, and LED 28-3 may be configured to primarily generate red emission. Therefore, the plurality of LEDs 28-1 to 28-3 may include green LED chips, blue LED chips, and red LED chips. In other embodiments, different combinations of the colors and numbers of LEDs are possible. In yet another embodiment, each of the plurality of LEDs 28-1 to 28-3 may be configured to generate light emission that is substantially the same as each other. In other embodiments, the plurality of LEDs 28-1 to 28-3 may include microLED structures in which a common active LED structure is separated into a plurality of active LED structure portions to form a plurality of LEDs 28-1 to 28-3 that are independently addressable.

[0113] In some embodiments, the active electrical element 30 is configured to receive one or more signals and independently drive each of the plurality of LEDs 28-1 to 28-3. In some embodiments, the active electrical element 30 includes a memory element, chip, or component configured to store one or more operating states of the plurality of LEDs 28-1 to 28-3 received from an external source, such as a control element ( Figure 1B(18). The active electrical element 30 may be further configured to change one or more driving conditions of a plurality of LEDs 28-1 to 28-3 based on one or more stored operating states. In some embodiments, the active electrical element 30 is configured to independently change the driving conditions of each of the plurality of LEDs 28-1 to 28-3 based on a plurality of operating states stored by a memory element. In this regard, the active electrical element 30 may be configured to receive and store one or more operating states, and drive each of the plurality of LEDs 28-1 to 28-3 independently according to one or more operating states. The active electrical element 30 may continue to drive and maintain the operating state of each of the plurality of LEDs 28-1 to 28-3 until the active electrical element 30 receives a refresh or update signal corresponding to the updated operating state. In this way, the active electrical element 30 may be configured to change the driving conditions of the plurality of LEDs 28-1 to 28-3 according to the temporarily stored operating states of the memory element. Therefore, the plurality of LEDs 28-1 to 28-3 may be configured for active matrix addressing as described above. To quickly receive one or more operating states of multiple LEDs 28-1 to 28-3, the active electrical element 30 may include multiple contact pads 38. In some embodiments, some of the contact pads 38 are configured to receive one or more signals, and other contact pads 38 are configured to transmit signals to independently drive or address the multiple LEDs 28-1 to 28-3. In some embodiments, the active electrical element 30 includes one or more of an integrated circuit chip, an ASIC, a microcontroller, or an FPGA. In some embodiments, the active electrical element 30 may be configured to be programmable or reprogrammable after being manufactured by incorporating various memory elements and logic within the active electrical element 30. In this respect, for embodiments where the active electrical element 30 does not include a complete FPGA, the active electrical element 30 may be considered programmable.

[0114] The substrate 32 can be formed of many different materials, with preferred materials being electrically insulating. Suitable materials include, but are not limited to, ceramic materials (e.g., alumina or bauxite), AlN, or organic insulators (e.g., polyimide (PI) and polyphthalamide (PPA)). In other embodiments, the substrate 32 may include a PCB, sapphire, Si, or any other suitable material. For PCB embodiments, different PCB types may be used, such as standard FR-4 PCB, bismaleimide-triazine (BT) or related materials, metal-core PCB, or any other type of PCB. In some embodiments, the substrate 32 includes a light-transmitting material such that light emission from the plurality of LEDs 28-1 to 28-3 can pass through the substrate 32. In this respect, the emitting surface of each of the plurality of LEDs 28-1 to 28-3 can be mounted to the substrate 32. Suitable light-transmitting materials for the substrate 32 include glass, sapphire, epoxy, and silicone. In some embodiments where the substrate 32 is a light-transmitting substrate, the substrate 32 may be referred to as a cover plate. The term "cladding" is used in part to avoid confusion with other substrates that may be part of a semiconductor light-emitting device, such as the growth or carrier substrate of an LED chip or a different substrate used for the LED package 26. The term "cladding" is not intended to limit the orientation, location, and / or composition of the structure it describes. In some embodiments, substrate 32 may include a light-transmitting cladding, and the LED package 26 may not have another substrate. In other embodiments, substrate 32 may include a light-transmitting cladding, and the LED package 26 includes an additional substrate, wherein a plurality of LEDs 28-1 to 28-3 are arranged between substrate 32 and the additional substrate.

[0115] Figure 2B It is along Figure 2A The figure shows a cross-sectional view taken by section line AA. As shown, LED 28-1 is mounted on the first surface 32' of substrate 32. Therefore, the emission from LED 28-1 can be configured to pass through substrate 32, such that the second surface 32″ of substrate 32 is configured as the main emitting surface of LED package 26. Notably, the anode contact 36-1 and cathode contact (34-1) of LED 28-1 are arranged on opposite sides of LED 28-1 relative to substrate 32. In this respect, the light emission from LED 28-1 can pass through the substrate and exit the opposite surface 32″ without interacting or being absorbed by the anode contact 36-1 and cathode contact (34-1). Figure 2B The orientation of the cross-sectional view in the diagram is intended to illustrate that the second surface 32″ of the substrate 32 will be configured as the main light-emitting surface; however, during intermediate manufacturing steps, Figure 2B The orientation and subsequent cross-sectional manufacturing view can be rotated 180 degrees so that LEDs 28-1 are sequentially assembled on top of substrate 32.

[0116] Figure 2C yes Figure 2A The bottom view of the LED package 26 in a subsequent manufactured state, wherein a sealant layer 40 and a plurality of conductive traces 42-1 to 42-7 have been formed. Figure 2D It is along Figure 2C The cross-sectional view taken by section line BB shows the electrical connector 44. Multiple electrical connectors 44 can be formed on the cathode contacts 34-1 to 34-3 and anode contacts 36-1 to 36-3 of each of the multiple LEDs 28-1 to 28-3 before the formation of the sealant layer 40 and the multiple conductive traces 42-1 to 42-7. Multiple electrical connectors 44 can also be formed on multiple contact pads 38 of the active electrical component 30. In some embodiments, the multiple electrical connectors 44 may include at least one of metal bump bonding, metal pads, metal wiring, metal interconnects, and metal bases. Multiple electrical connectors 44 can be formed by various methods, including but not limited to wiring bump bonding, solder bumping, electroplating, laser drilling of through-holes subsequently filled with metal, or other metallization techniques. The electrical connectors 44 can be formed at the wafer level, before assembly, after die attachment of the LEDs 28-1 to 28-3, or in other manufacturing steps, depending on various process configurations. After forming the plurality of electrical connectors 44, a sealant layer 40 may be deposited over the plurality of LEDs 28-1 to 28-3 and the active electrical components 30. In some embodiments, the sealant layer 40 may further cover the plurality of electrical connectors 44. The sealant layer 40 may be configured to surround the periphery or side edges of each of the plurality of LEDs 28-1 to 28-3. Figure 2D As shown, the sealant layer 40 may cover at least a portion of the bottom surface of each of the plurality of LEDs 28-1 to 28-3. The sealant layer 40 may also be configured to surround the periphery or side edge of the active electrical component 30. In such embodiments, a removal step may subsequently be applied to the sealant layer 40 to remove a portion of the sealant layer 40 to form exposed surfaces of the plurality of electrical connectors 44. The removal step may include planarization processes, such as grinding, polishing, or buffing the sealant layer 40, to expose the plurality of electrical connectors 44. For embodiments in which the plurality of electrical connectors 44 include laser-drilled through-holes or microvias, a removal step may not be necessary.

[0117] The sealant layer 40 can be applied or deposited by a coating or dispensing process. In some embodiments, the sealant layer 40 may include one or more of silicone resins, epoxy resins, and thermoplastics (e.g., polycarbonate, aliphatic urethane, or polyester). The sealant layer 40 may be configured to alter or control the light output from the plurality of LEDs 28-1 to 28-3. For example, the sealant layer 40 may include an opaque or non-reflective material, such as a gray, dark, or black material, which may absorb some of the light propagating between the plurality of LEDs 28-1 to 28-3, thereby improving the contrast between the emission of the plurality of LEDs 28-1 to 28-3 through the substrate 32. In some embodiments, the sealant layer 40 may include light-absorbing particles suspended in an adhesive (e.g., silicone or epoxy resin). The light-absorbing particles may include at least one of carbon, silicon, or metal particles or nanoparticles. In some embodiments, the light-absorbing particles include a predominantly black color, which, when suspended in the adhesive, provides the sealant layer 40 with a predominantly black or dark color. Depending on the desired application, sealant layer 40 may be configured to be transparent or translucent, or sealant layer 40 may include light-reflecting or light-redirecting materials, such as fused silica, fumed silica, or titanium dioxide (TiO2) particles, forming a predominantly white sealant layer 40. Other particles or fillers may be used to enhance the mechanical, thermal, optical, or electrical properties of sealant layer 40. In some embodiments, sealant layer 40 may include multiple layers with varying mechanical, thermal, optical, or electrical properties.

[0118] After the surface of the electrical connector 44 is exposed by the sealant layer 40, a plurality of conductive traces 42-1 to 42-7 are formed on the sealant layer 40 (e.g., for Figure 2D As shown in the orientation (on the bottom surface of the sealant layer 40), certain traces of conductive traces 42-4 to 42-7 are electrically connected to a plurality of LEDs 28-1 to 28-3 via exposed surfaces of certain electrical connectors 44. Certain conductive traces of the plurality of conductive traces 42-1 to 42-7 can be configured to provide a conductive path between the plurality of contact pads 38 of the active electrical component 30 and the cathode contacts 34-1 to 34-3 and anode contacts 36-1 to 36-3 of each LED 28-1 to 28-3. Figure 2C As shown, conductive traces 42-1, 42-2, and 42-3 are electrically connected to the active electrical component 30, but not electrically connected to any of the plurality of LEDs 28-1 to 28-3. In this respect, conductive traces 42-1, 42-2, and 42-3 can be configured to draw power from an external source (e.g., Figure 1B The control element 18) provides a signal to the active electrical element 30. It is worth noting that... Figure 2CThe conductive trace 42-7 is configured to provide a conductive path between the active electrical element 30 and the anode contacts 36-1 to 36-3 of each of the plurality of LEDs 28-1 to 28-3. In this respect, the plurality of LEDs 28-1 to 28-3 can be configured for common anode control. In other embodiments, the plurality of conductive traces 42-1 to 42-7 and the plurality of LEDs 28-1 to 28-3 can be configured for common cathode control.

[0119] Figure 2E yes Figure 2C The bottom view of the LED package 26 in a subsequent manufacturing state, in which an additional sealant layer 46 and a plurality of package bonding pads 48-1 to 48-4 have been formed. Figure 2F It is along Figure 2E The cross-sectional view taken by the section line CC. Figure 2G It is along Figure 2EThe cross-sectional view taken by the section line DD shows the additional electrical connector 50. Prior to forming the additional sealant layer 46 and the plurality of package bonding pads 48-1 to 48-4, a plurality of additional electrical connectors 50 may be formed and electrically connected to the conductive traces 42-1, 42-2, 42-3, and 42-7. The additional electrical connectors 50 may be configured and formed in a manner similar to that of the electrical connector 44 described above. In some embodiments, the additional electrical connectors 50 may be formed on the electrical connector 44 without intervening conductive traces. Alternatively, the additional sealant layer 46 may be applied first, followed by the formation of through-holes or openings for the additional electrical connectors 50 via a selective removal step (e.g., laser drilling). Similarly, a selective removal step may also be used to form openings for the electrical connector 44 described above. The additional sealant layer 46 may then be deposited over the bottom surfaces of the plurality of conductive traces 42-1 to 42-7 and the additional electrical connectors 50. The additional sealant layer 46 can be configured and formed in a manner similar to that of the sealant layer 40 described above. It is noteworthy that the additional sealant layer 46 can also be formed on portions of the sealant layer 40 not covered by the plurality of conductive traces 42-1 to 42-7. In this respect, the sealant layer 40 and the additional sealant layer 46 can be formed together as continuous sealant layers 40, 46, such that at least some portions of the plurality of conductive traces 42-1 to 42-7 are embedded within the sealant layers 40, 46. After forming the additional sealant layer 46, a removal step (e.g., planarization) as described above can be applied to form the exposed surfaces of the plurality of additional electrical connectors 50. Then, a plurality of package bonding pads 48-1 to 48-4 can be formed on the bottom surface of the additional sealant layer 46 and electrically connected to the additional electrical connectors 50. In this respect, the package bonding pads 48-1 to 48-4 are configured to receive signals from outside the LED package 26. In some embodiments, the package bonding pads 48-1 to 48-4 are configured to mount and bond to another surface (e.g., the mounting surface of an LED panel including traces or other types of signal lines) to receive external signals (e.g., from...). Figure 1BThe control element 18). As shown, package bonding pad 48-4 is electrically connected to active electrical element 30 via an electrical path including an additional electrical connector 50 and conductive trace 42-1. Similarly, package bonding pad 48-3 is electrically connected to active electrical element 30 via a different electrical path including a different additional electrical connector 50 and conductive trace 42-2. Package bonding pad 48-2 is electrically connected to active electrical element 30 via a different electrical path including a different additional electrical connector 50 and conductive trace 42-3. Notably, package bonding pad 48-1 is electrically connected to the anode contacts 36-1 to 36-3 of each of LEDs 28-1 to 28-3 via different additional electrical connectors 50 and conductive trace 42-7 for a common anode control configuration. As previously described, LED package 26 can be configured for common cathode control by rearranging the paths of the multiple conductive traces 42-1 to 42-7. Additional layers, such as solder masks or other insulating layers or materials, may be applied over selected areas of the additional sealant layers 46 and the package bonding pads 48-1 to 48-4 to further delineate the imprints of the package bonding pads 48-1 to 48-4 and prevent short circuits in the solder material during assembly or mounting on the PCB. In some embodiments, multiple additional sealant layers 46 and at least one additional trace may be formed in a similar manner prior to forming the package bonding pads 48-1 to 48-4. In this way, the additional trace layer may be stacked or alternated with multiple additional sealant layers 46 to provide more conductive paths and connections for the LED package 26.

[0120] Figure 2H yes Figure 2E A simplified top view of the LED package 26. In operation, Figure 2H The view shown represents the main emitting surface 52 of the LED package 26. Therefore, a plurality of LEDs 28-1 to 28-3 are disposed below the substrate 32 to provide light emission through the substrate 32 (e.g., a light-transmitting substrate or a light-transmitting cladding). Active electrical components 30 are also disposed below the substrate 32, and all electrical connections and conductive paths as described above are correspondingly arranged below the active electrical components 30 and below the plurality of LEDs 28-1 to 28-3 relative to the main emitting surface 52. Therefore, light generated from the plurality of LEDs 28-1 to 28-3 can pass through the substrate 32 and exit the main emitting surface 52, while reducing losses or absorption of electrical connections, conductive paths, or other components within the LED package 26. In some embodiments, the plurality of LEDs 28-1 to 28-3 form LED pixels for the LED package 26, which can be combined with other LED packages to form an LED pixel array for video display applications.

[0121] Figure 2I yes Figure 2E A simplified bottom view of the LED package 26. In operation, Figure 2I The bottom view shown represents the main mounting surface 54 of the LED package 26. In this respect, the LED package 26 is configured to be mounted onto an outer surface (e.g., a panel of a video display or a PCB) such that package bonding pads 48-1 to 48-4 are bonded or soldered to electrical connections disposed on the outer surface. In some embodiments, at least one package bonding pad 48-1 may include an identifier 56, such as a notch, a different shape, or other form of identifier, configured to convey the polarity and mounting position of the LED package 26 on the outer surface.

[0122] Figure 3A This is a bottom view of a representative LED package 58 including multiple conductive traces 60-1 to 60-7, wherein portions of conductive traces 60-1 to 60-4 form package bonding pads 62-1 to 62-4 for the LED package 58. Figure 3B It is along Figure 3A The cross-sectional view is taken by section line EE. The LED package 58 may include a substrate 32 as described above, a sealant layer 40, a plurality of LEDs 28-1 to 28-3 having cathode contacts 34-1 to 34-3 and anode contacts 36-1 to 36-3, and an active electrical component 30 having contact pads 38. As previously described, after planarizing the sealant layer 40 to expose the cathode contacts 34-1 to 34-3, anode contacts 36-1 to 36-3, and contact pads 38, to... Figure 2C Multiple conductive traces 42-1 to 42-7 are similarly formed on the sealant layer 40, creating multiple conductive traces 60-1 to 60-7. For example... Figure 3A As shown, portions of certain conductive traces 60-1 to 60-4 are configured to have a wider area across the LED package 58. An insulating material 64, such as a solder mask, is then formed over portions of conductive traces 60-1 to 60-7. It is noteworthy that the insulating material 64 does not extend completely over all conductive traces 60-1 to 60-7. Specifically, portions of conductive traces 60-1 to 60-4 are not covered by the insulating material 64 to form the package bonding pads 62-1 to 62-4 of the LED package 58. In this respect, the package bonding pads 62-1 to 62-4 can be bonded or soldered to another surface, and the insulating material 64 prevents electrical short circuits between the different traces in the conductive traces 60-1 to 60-7.

[0123] Figure 4 This is a cross-sectional view of the LED package 66 showing the configuration of mounting one or more LEDs 28-1 and active electrical components 30 along the first horizontal plane P1 of the LED package 66. Figure 4Only LED 28-1 is shown in the image, but it should be understood that LED package 66 may include components that can be used with LEDs. Figure 4 Multiple LEDs are mounted in a similar manner to LED 28-1. As shown, LED 28-1 and active electrical component 30 are mounted or bonded along a first horizontal plane P1 defined by the mounting surface of substrate 32. In some embodiments, LED 28-1 and active electrical component 30 may include different dimensions, such as different thicknesses or heights relative to substrate 32. Additionally, bonding layers of different thicknesses may be provided to bond LED 28-1 and active electrical component 30 to substrate 32, respectively. After bonding LED 28-1 and active electrical component 30 along the first horizontal plane P1, an electrical connector 44, a sealant layer 40, an additional electrical connector 50, conductive traces 42-1 to 42-3, an additional sealant layer 46, and an encapsulation bonding pad 48-1 may be formed as described above.

[0124] Figure 5 This is a cross-sectional view of the LED package 68, showing a configuration in which one or more LEDs 28-1 are mounted along a first horizontal plane P1 and active electrical components 30 are mounted along a second horizontal plane P2, which is different from the first horizontal plane P1 of the LED package 68. Figure 5 Only LED 28-1 is shown in the image, but it should be understood that LED package 68 may include components that can be used with LEDs. Figure 5 Multiple LEDs are mounted in a similar manner to LED 28-1. As shown, LED 28-1 is mounted or bonded along a first horizontal plane P1 defined by the mounting surface of substrate 32. An electrical connector 44, a sealant layer 40, and multiple conductive traces 42-1 to 42-3 are then formed as previously described. An active electrical component 30 is then mounted along a second horizontal plane P2 defined by the surfaces of the multiple conductive traces 42-1 to 42-3 opposite to LED 28-1. In this way, multiple conductive traces 42-1 to 42-2 are thus arranged between LED 28-1 and the active electrical component 30. An additional electrical connector 50, an additional sealant layer 46, and a package bonding pad 48-1 may subsequently be formed as previously described. Notably, in this configuration, the active electrical component 30 may be at least partially embedded in the additional sealant layer 46. Therefore, the additional sealant layer 46 and at least one additional electrical connector 50 may include a greater thickness than in the previously described embodiments. In some embodiments, the additional sealant layer 46 may include a second substrate, and the active electrical components 30 may be embedded in or mounted on the second substrate. This arrangement may be referred to as a chip-scale configuration.

[0125] Figure 6 This is a cross-sectional view showing an LED package 70 configured with one or more LEDs 28-1 and active electrical components 30 mounted on opposite surfaces of a substrate 32. Figure 6 Only LED 28-1 is shown in the image, but it should be understood that LED package 70 may include components that can be used with LEDs. Figure 6 Multiple LEDs are mounted in a similar manner to LED 28-1. As shown, multiple conductive traces 42-1, 42-2 are formed on the second surface 32” of the substrate 32, and additional conductive traces 71-1, 71-2 are formed on the first surface 32” of the substrate 32. LED 28-1 is mounted or bonded to conductive traces 42-1, 42-2 via electrical connectors 44, and active electrical components 30 are mounted or bonded to additional conductive traces 71-1, 71-2 via additional electrical connectors 50. A sealant layer 40 is formed over LED 28-1 and the second surface 32” of the substrate 32. In some embodiments, a portion of the sealant layer 40 forms the main emitting surface 52 of the LED package 70. As previously mentioned, the sealant layer 40 may include a black material to provide improved contrast between LED 28-1 and other LEDs that may be mounted in the LED package 70. In some embodiments, another layer or extension of the sealant layer 40 may extend over the LED 28-1 to provide a seal for the LED 28-1. In such embodiments, the other layer or extension of the sealant layer 40 over the LED 28-1 may include a light-transmitting material, an additional layer, or a texture. An additional sealant layer 46 may be formed on a first surface 32' of the substrate 32 to provide a seal for the active electrical component 30. In this respect, the additional sealant layer 46 may or may not extend over the entire first surface 32' of the substrate 32. Notably, as described above, the portion of the additional conductive trace 71-2 not covered by the additional sealant layer 46 may form a package bonding pad 48. To facilitate bonding to an outer surface, the conductive bonding material 72 may include a thickness relative to the substrate 32 that is greater than or nearly equal to the thickness of the active electrical component 30 and the additional sealant material 46. To provide electrical communication between the conductive trace 42-2 and the additional conductive trace 71-1, a connection may be provided via, for example... Figure 6 One or more conductive interconnects 73 of the substrate 32 shown may be, for example, metal inserts, vias or traces, or conductive interconnects 73 may be wound around the side edges of the substrate 32.

[0126] Figure 7 This is a bottom view of an LED package 74 including a plurality of LED pixels according to an embodiment disclosed herein. The LED package 74 is similar to Figure 2EThe LED package 26 includes a plurality of LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3, which respectively form a plurality of LED pixels spaced apart from each other and packaged together in the same LED package 74. As shown, LED chips 75-1 to 75-3 form a first LED pixel, LED chips 76-1 to 76-3 form a second LED pixel, LED chips 77-1 to 77-3 form a third LED pixel, and LED chips 78-1 to 78-3 form a fourth LED pixel. In some embodiments, each LED pixel includes a red LED chip, a blue LED chip, and a green LED chip. The LED package 74 further includes an active electrical element 30' configured to be electrically connected to the plurality of pixels, the plurality of conductive traces 42-1 to 42-16, and the plurality of package bonding pads 48-1 to 48-4 as described above. It is worth noting that the LED package 74 may be configured to be similar to those previously used for single-pixel LED packages (e.g., Figure 2HThe LED package 74 comprises the same number of package bonding pads 48-1 to 48-4 as described in the LED package 26. As shown, the LED package 74 includes four package bonding pads 48-1 to 48-4, which are configured to receive various combinations of input signals or connections, such as those described in more detail later, such as power supply voltage (Vdd), ground (Vss), color selection signal, brightness level (or grayscale) signal, analog signal, coded color selection signal, coded brightness level selection signal, digital signal, clock signal, and asynchronous data signal. Thus, the active electrical element 30' includes four input / output and power connections; however, as described later, the active electrical element 30' is configured to independently change the driving conditions of each of the plurality of LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3. It is worth noting that conductive trace 42-1 can be electrically connected to the anode of each of the LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3 for common anode control. Conductive trace 42-1 is also electrically connected between package bonding pad 48-1 and active electrical component 30'. Conductive trace 42-2 is electrically connected between package bonding pad 48-4 and active electrical component 30', conductive trace 42-9 is electrically connected between package bonding pad 48-3 and active electrical component 30', and conductive trace 42-10 is electrically connected between package bonding pad 48-2 and active electrical component 30'. In other embodiments, the LED package 74 can be configured for common cathode control as described above. To provide electrical communication with an increased number of LED pixels within the LED package 74, the active electrical element 30' may include an increased number of contact pads 38 for communication with an increased number of conductive traces 42-1 to 42-16. As described above, four contact pads 38 are electrically connected to package bonding pads 48-1 to 48-4, and the remaining contact pads 38 are electrically connected to different chips among the LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3. To enable the LED package 74 to control multiple LED pixels with a reduced number of input signals, the active electrical element 30 may include circuitry configured to receive input communication signals and perform a sub-pixel selection function to independently transmit operating states individually to each LED chip 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3 for each LED pixel. In this respect, when multiple LED packages 74 are arranged together to form an LED pixel array for display applications, the resulting display will have a reduced number of LED packages 74 compared to a display of similar size in which each LED package includes only a single LED pixel. In this respect, the number of external sources (e.g., Figure 1B The total number of communication signals between the control element 18 and the LED pixel. Compared to a single-pixel embodiment (e.g., Figure 2E Similarly, the almost infinite combinations of routes used for communication signals are within the scope of this disclosure, including simple variations in which one or more metallic traces follow a previously targeted path. Figure 3A and Figure 3B The same planar configuration as described.

[0127] Figure 8 This is an illustrative representation of an active electrical element 30 (or...) according to an embodiment disclosed herein. Figure 7 A block diagram of an assembly of active electrical components 30'. As previously described, active electrical components 30 can be incorporated into an LED package to enable active matrix addressing for a corresponding LED display. Active electrical components 30 are configured to receive signals from an external source (e.g., Figure 1BThe control element 18) receives input signals and independently maintains and / or changes the driving conditions of one or more LEDs within the LED package. As described in more detail later, the input signals may include a single or multiple communication lines in analog, digital, or a combination of analog and digital formats. In some embodiments, the active electrical element 30 includes a memory element 80, which may include one or more volatile and non-volatile memory elements. The memory element 80 may include one or more of bipolar transistors, field-effect transistors, inverters, logic gates, dynamic random access memory (DRAM), static random access memory (SRAM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, operational amplifiers, capacitors, and lookup tables. In some embodiments, the memory element 80 includes at least one of sample-and-hold circuitry, latch circuitry, and trigger circuitry. In some embodiments, the memory element 80 includes a volatile memory element configured to store the operating state of one or more LEDs based on input signals. In operation, whenever the active electrical component 30 receives an updated input signal, the volatile memory element updates to the new operating state of one or more LEDs, and accordingly activates and maintains one or more LEDs based on the new operating state. In this respect, the volatile memory element can be configured to store temporary operating states, and the active electrical component 30 is thereby configured to change the driving conditions of one or more LEDs based on the temporarily stored operating states. In some embodiments, the volatile memory element can be additionally configured to store other states or conditions that may not be considered temporary, such as calibration factors, or, for example, the electron transfer function of gain. In this respect, one or more of temporary and non-temporary states or conditions can be used together to generate driving conditions for one or more LEDs. In some embodiments, the memory element 80 includes a non-volatile memory element configured to store preset data or information that can also be used to change the operating state of one or more LEDs. Non-volatile memory elements (e.g., lookup tables or hash tables) can be provided to change the operating state based on the operating conditions or environment of the LED package. For example, as Figure 8The thermal management element shown can be integrated within active electrical component 30, which monitors the operating temperature of the LED package and can accordingly adjust the operating state of one or more LEDs based on a comparison of the operating temperature with a value stored in a non-volatile memory element. In some embodiments, the thermal management element includes a temperature sensor or a temperature sensor input from an external temperature sensor. In other embodiments, ambient light level information from a light sensor can be compared with a value stored in the non-volatile memory element to change the brightness level of one or more LEDs. In a further embodiment, the non-volatile memory element can be programmed to store position setting data for LEDs or LED pixels for a display, including predetermined position setting data or position setting data programmed later. Position settings can be programmed before or after the LED display is installed. Position settings can include position settings for individual LED chips, individual LED packages including LED pixels, and individual LED panels that can co-form the LED display. In this regard, a common control line can be connected to more than one LED, LED pixel, or LED package, and the position settings can be used to interpret input signals and drive only the intended LEDs connected via the common control line.

[0128] The active electrical component 30 may additionally include one or more ESD protection elements configured between the input signals and other components within the active electrical component 30. In some embodiments, a decoder or control logic element is disposed within the active electrical component 30 to receive one or more input signals and convert them into a unique combination of output signals, which in turn are used to change different operating states of one or more LEDs. Specifically, the decoder or control logic element may output a combination of output signals that can be stored in a volatile memory element and periodically updated. Each time the volatile memory element is updated, the operating state of one or more LEDs is changed or updated via the driver element 82. In some embodiments, the decoder element is configured to provide row or column selection information for one or more LEDs, or to provide brightness or grayscale levels for each LED. For LED package configurations comprising multiple LED pixels, the decoder element may be configured to provide pixel or sub-pixel selection within the LED package to the memory element 80. The decoder element may be configured to provide programming, setpoint, or calibration information to the memory element 80. In some embodiments, the decoder element may be configured to select certain pixels on a shared control line by decoding predetermined position settings of certain pixels on the shared control line, such that only specific pixels will respond to a control signal. The predetermined position settings may be programmed and stored in memory element 80, such as a non-volatile memory element. In some embodiments, the driver element 82 (or buffer element) includes a source driver element, a sink driver element, or both. Source driver elements are typically used when the LED is configured for common cathode control, while sink drivers are typically used when the LED is configured for common anode control. In some embodiments, the source driver and sink driver may be included within active electrical element 30, and therefore, the source driver and sink driver may be configured to provide differential voltage outputs to control one or more LEDs. In some embodiments, active electrical element 30 may also include one or more signal conditioning elements configured to convert, manipulate, or otherwise transform the control signal before it is received by the source driver or sink driver. The signal conditioning element can be configured to transform analog or digital signals for applications such as gamma correction or to apply other nonlinear transfer functions. In some embodiments, the decoder / control logic communicates directly with the signal conditioning element, while in other embodiments, the decoder / control logic performs the tasks or functions of the signal conditioning element in the digital domain. In such embodiments, when the decoder / control logic performs the tasks, the signal conditioning element can simply consist of wiring. The signal conditioning element can be configured or electrically connected between memory element 80 and driver element 82 such that signals leaving memory element 80 can be converted or manipulated before reaching driver element 82.Signal conditioning elements can be configured or electrically connected between the input signal and memory element 80, such that the input signal can be converted or manipulated before reaching the memory element 80. Various other arrangements are considered because the various elements of active electrical component 30 can be partitioned in other ways. For example, the decoder / control logic can be considered together with the signal conditioning and memory elements as a single processor unit. Furthermore, depending on the specific application, active electrical component 30 may include multiple ESD elements, and / or multiple decoder / control logic elements, and / or multiple memory elements 80, and / or multiple signal conditioning elements, and / or multiple thermal management elements and / or multiple driver elements 82. Each of the decoder / control logic elements, memory elements 80, signal conditioning elements, thermal management elements, and driver elements can be configured as analog elements, digital elements, and combinations of analog and digital elements, including software and firmware, etc.

[0129] Figure 9 This is a block diagram schematically illustrating the components of an active electrical element 30 according to an embodiment disclosed herein. Figure 9 In this context, the active electrical component 30 may include a number of components previously designed for use with the same characteristics. Figure 8 The same components described include ESD protection elements, decoder / control logic, volatile memory elements, non-volatile memory elements, and thermal management elements. Figure 9 As further shown, for each LED (LED 1 to LED 3), the output of the volatile memory element can be separated into individual signal lines 84-1 to 84-3. Each individual signal line 84-1 to 84-3 may include one of the signal conditioning elements, source driver elements, and sinker driver elements described above. In this respect, each LED (LED 1 to LED 3) can be driven and changed independently based on one or more control signals entering the active electrical element 30. Furthermore, in the case of LEDs of different colors, it may be necessary to configure different LEDs on different power lines or power supply voltage inputs V1, V2. For example, compared to blue or green LEDs (e.g., 3-3.3V), red LEDs typically have a lower turn-on or forward voltage (e.g., 1.8-2.4 volts (V)) due to the lower bandgap of the different material systems typically used to form red LEDs (e.g., GaAs, AIGalnP, GaP-based) compared to blue or green LEDs (e.g., GaN-based). In this respect, the active control element 30 can be configured with separate connections (e.g., Figure 2A The contact pad 38 is configured to receive a separate power line or input (e.g., V1 between about 1.8 and 2.4V) for the red LED and a common power line or input (e.g., V2 between about 3 and 3.3V) for both the blue and green LEDs.

[0130] In addition to various digital memory elements, analog memory elements can also be used. Figure 10 This is a schematic diagram illustrating an exemplary structure including an analog volatile memory element that may be included within an active electrical component, according to embodiments disclosed herein. Figure 10 The diagram illustrates an exemplary sample-and-hold circuit 86, which includes a switching device 88, a capacitor 90, an operational amplifier 92, and an optional operational amplifier buffer 94 between the input and the capacitor 90. To sample an input signal, the switching device 88 connects the input signal to the capacitor 90 via the operational amplifier buffer 94, and the capacitor 90 stores charge. After the input signal is sampled, the switching device 88 disconnects the capacitor 90, and the stored charge in the capacitor 90 discharges through the operational amplifier 92 to provide an operating state for a specific LED, which is maintained until the input signal is sampled again. In this way, the optional operational amplifier buffer 94 and the switching device 88 can be considered components of the decoder / control logic. Figure 8 and Figure 9 Capacitor 90 can be considered a component of the memory element. Figure 8 and Figure 9 ), and operational amplifier 92 can be considered a component of signal conditioning elements ( Figure 8 and Figure 9 It can be linear or nonlinear, depending on the system configuration.

[0131] Figures 11A-11F This is a schematic diagram illustrating an exemplary structure of a driver element that may be included within an active electrical component according to embodiments disclosed herein. For video display applications, the driver element may need to include a non-inverting circuit configured to drive each LED linearly from a fully off state of approximately 0 microamps (µA) or approximately 0V to a low power consumption of approximately 1 milliamp (mA) or approximately 3V. Figure 11A This illustrates an embodiment where driver element 96 includes a voltage-controlled current source circuit (e.g., a transconductance amplifier). For the transconductance amplifier, the differential input voltage is converted into an output current to drive the LED. Figure 11A In the simplified schematic, driver element 96 includes a non-inverting circuit; however, driver element 96 needs to be connected to both terminals of the LED for operation, resulting in a more complex device layout. Therefore, driver element 96 is neither a sink driver element for common anode control nor a source driver element for common cathode control. Furthermore, resistor R1 needs to be large enough to reduce input voltage sensitivity, which reduces the efficiency of driver element 96. Additionally, when the LED needs to be turned off, the output current may not be low enough (0µA) to achieve the desired shutdown. Figure 11BThis illustrates an embodiment where the driver element 98 includes a transconductance amplifier arranged in an active cascode configuration. This active cascode configuration includes a transistor, such as a metal-oxide-semiconductor field-effect transistor (MOSFET) M1, and an additional resistor R2, which facilitates the complete shutdown of the LED. As previously stated... Figure 11A As described, the voltage sensitivity of driver element 98 may be too high. When the LED is fully turned on, or at approximately 1mA, driver element 98 may result in a low voltage input, such as approximately 0.05V, and therefore, the active cascode configuration may experience an undesirable signal-to-noise ratio.

[0132] Figure 11C An embodiment of driver element 100 is shown, in which an input amplifier is added to driver element 98, the driver element including having Figure 11B An active cascode transconductance amplifier is used. An added input amplifier can be used to de-amplify the voltage to obtain lower signal sensitivity and provide an improved signal-to-noise ratio. Furthermore, the driver element 100 provides a sinking or common-anode configuration for the LED; however, the input voltage becomes inverted. Figure 11D An embodiment representing driver element 102, which is similar to... Figure 11C This is an embodiment, but with reverse polarity connection. In this respect, driver element 102 includes an input amplifier between the input voltage and driver element 98', which is an inverted polarity version of driver element 98, and includes... Figure 11B An active cascode transconductance amplifier. As shown in the figure. Figure 11D The driver element 102 shown in the diagram offers the advantage of non-inverting; however, it does result in a source or common cathode configuration for the LED. Other driver element arrangements are also possible, such as... Figure 11E and Figure 11F The Howland current pumps shown are configured 104 and 106. Figure 11E In the Howland current pump 104, an operational amplifier and a resistor bridge are configured to drive an LED. Figure 11F In addition, the Howland current pump 106 includes a voltage divider, which comprises resistors R5 and R6, added to it. Figure 11E The Howland 104 current pump is used to improve performance when there is very little to no current flow. Additionally, an additional operational amplifier is provided at the voltage input to form a non-inverting voltage follower (e.g., a preamplifier) ​​to provide the high input resistance required for the output buffer of the sample-and-hold circuitry, ensuring sufficient hold time.

[0133] When multiple LED packages, as disclosed herein, are arranged to form an LED pixel array for an LED display application, it may be advantageous if the position of each individual LED package within a corresponding active electrical element of each LED package is known, or if each LED package has a specific address associated with it. In some embodiments, each active electrical element within each LED package is configured to store location or address-specific information, such as specific rows and columns recorded therein by the LED package. In this regard, the display control unit can transmit signals encoded for specific locations within the LED pixel array across the LED pixel array, and each active electrical element of each individual LED package is thereby configured to interpret the signals and determine whether to respond to or ignore the specific signals based on the location or address information. In some embodiments, the active electrical element of each LED package includes a detector element configured to detect the position of the LED package in the LED package array in the display and communicate with a main controller (e.g., Figure 1B The control element 18 and other hardware / software configurations work together to relay this information for use in the memory within the active electrical component. This task can be performed after PCB assembly, at which point a specific configuration procedure is run to correctly set and store the address and calibration information in the non-volatile memory of the active electrical component, one or more remote memory devices, or both the active electrical component and one or more remote memory devices.

[0134] Figure 12A This is a block diagram schematically illustrating an embodiment of an active electrical element 30 including a detector / signal conditioning element. As previously described, the active electrical element 30 can be incorporated into an LED package to realize an LED display configured for active matrix addressing. The active electrical element 30 is configured to receive signals from an external source (e.g., Figure 1B The control element 18) receives the input signal and independently changes the driving conditions of one or more LEDs within the LED package. Figure 12A The block diagram is similar to Figure 8The block diagram includes a memory element 80 and a driver element 82 as previously described. As shown, as previously described, it may also include ESD protection elements, decoder / control logic elements, thermal management elements, and signal conditioning elements. In some embodiments, one or more LEDs may be used as photodetectors to generate signals received by the detector / signal conditioning elements. For example, after multiple LED packages are mounted in an LED pixel array, all LED packages connected to a common data bus may lack a separate unique address. In this regard, an initial setup process (or location setup process) can be performed, in which each LED package can be scanned with a beam of light, and at least one LED within each LED package can be used as a photodiode, providing a corresponding voltage and / or current signal corresponding to a specific location within the LED package. In this way, during the initial setup process, at least one of the LEDs can operate in photovoltaic mode or light-guiding mode. The signal generated by the beam of light is transmitted via a data bus from a master controller (e.g., Figure 1B The electrical signals provided by the control element 18 and other hardware / software configurations are used in combination to enable the component to record its address. As the encoded signal for each pixel position is transmitted across the LED pixel array, each LED package can thus be configured to know which signal the LED package should respond to. In such embodiments, the LED driver element 82 may be configured with a high-impedance output to support photodetector modes for one or more LEDs during the initial setup process. In some embodiments, the detector / signal conditioning element may include a voltage detector, a current sensor, or even wiring that transmits the position signal to the decoder / control logic element. In this way, the active electrical element 30 can be configured to be addressed, and the operating state of at least one LED can be changed in a manner dependent on information such as an address stored in local memory. In some embodiments, a separate photodiode, not one of the LEDs within the LED package, may be configured within the LED package to provide a position signal to the active electrical element 30. In some embodiments, the detector / signal conditioning element may be configured to monitor the operating voltage or current of the LED and store such information in a memory element. In this regard, the active electrical component 30 is configured to store monitoring information, including operating temperature and location information from the thermal management element, or voltage or current information from the LED via a detector / signal conditioning element. In some embodiments, the active electrical component 30 may be configured to interact with an external source (e.g., Figure 1B The control element 18 or a separate device communicates this monitoring information to enable the LED display to be configured to self-monitor various operating conditions and generate a report or visual indication if any of the monitored operating conditions are outside the target window. In this respect, the active electrical element 30 can be configured for bidirectional communication with an external source.

[0135] Figure 12B This is a bottom view of an LED package 108 including a photodiode 110 according to an embodiment disclosed herein. The LED package 108 is similar to... Figure 7 The LED package 74 includes a plurality of LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3, which respectively form a plurality of LED pixels and active electrical components 30' as described above. The LED package 108 may also include package bonding pads 48-1 to 48-4 and conductive traces ( Figure 7 (42-1 to 42-16). As shown, the LED package 108 includes a photodiode 110, which is configured to detect light signals and transmit the light signals to, for example, Figure 12A Other components of the active electrical element 30' described herein. In some embodiments, the active electrical element 30' includes a photodiode 110. In some embodiments, the photodiode 110 is disposed on the active electrical element 30. In other embodiments, the photodiode 110 is disposed outside the active electrical element 30'. For example, in some embodiments, the LED package 108 includes a black sealing material that covers the LED package 108 except for the areas where each LED chip 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3 are registered. In this respect, the photodiode 110 may be disposed adjacent to one of the LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3, and 78-1 to 78-3 such that a sufficient amount of light signal can reach the photodiode 110 without being absorbed by the black sealing material. In other embodiments, the photodiode may be incorporated within other LED packages, including Figure 2H LED package 26 Figure 3A LED package 58 Figure 4 LED package 66 Figure 5 LED package 68 and Figure 6 LED package 70, etc. As mentioned above, in some embodiments the photodiode 110 may be omitted, and one or more of LED chips 75-1 to 75-3, 76-1 to 76-3, 77-1 to 77-3 and 78-1 to 78-3 may be used as photodiodes when scanning with a beam during the initial setup process.

[0136] Figure 13 This is a block diagram schematically illustrating various components that may be included in a system-level control scheme for an LED display panel according to embodiments disclosed herein. In some embodiments, components of the system-level control scheme may be included on the back of the display panel, as previously described. Figure 1B As shown in the diagram. In operation, the LED display panel receives input signals from an external video source. As previously described, the video source is provided via a suitable electrical connector, such as VGA, DVI, HDMI, HUB75, USB, etc. A signal decoder, such as a DVI / HDMI decoder, can be configured to provide conversion of the input signal to other formats, such as 24-bit transistor-to-transistor logic (TTL) or complementary metal-oxide-semiconductor (CMOS) color pixel data. For example, the signal decoder can convert the input signal along with other control signals, such as pixel clock, vertical sync, and horizontal sync, into a 24-line data bus, which is then pathped to a control element. As previously described, the control element can include one or more of an ASIC, microcontroller, programmable control element, and field-programmable gate array (FPGA). For example, the control element can include an FPGA programmed to scale, offset, or otherwise transform the converted data from the signal decoder and provide data buffering for control lines that ultimately transmit various signals to the corresponding LED pixels of the LED package and the LED display panel. In some embodiments, the control element is also configured to receive additional input for transforming the input signal. For example, additional inputs may include horizontal and vertical panel position information of the LED display panels within a larger LED display. When multiple LED display panels are assembled together to form a larger LED display, each LED display panel can be configured with a unique position identifier that is relayed to the control element. Unique identifiers, such as serial numbers or position coordinates, can be pre-assigned before or during installation, or they can simply be assigned according to the order in which the LED display panels are connected during assembly. In the latter configuration, each LED display panel can be configured to communicate with each other via a shift register, such that during installation, as the LED display panels are arranged adjacent to each other in a daisy-chain configuration, position information is relayed from one LED display panel to the next in the installation order, similar to HUB75-compatible panels. Additional inputs may also include calibration tables, such as hash tables, which provide information that allows the control element to transform the input signal in a manner that compensates for any non-uniform performance characteristics between the LED chips of the LED display panels. For example, after assembling the LED display panels, the intensity of each LED pixel can be measured, and the calibration table can then be configured to provide information to the control element to scale the drive signal differently based on the initial measured brightness levels of the different LED pixels.

[0137] Therefore, the control element can be configured to receive input signals and additional inputs, including panel position or calibration information, via a signal decoder. As previously mentioned, the control element can include one or more integrated circuits of various types. In some embodiments, the control element includes an ASIC pre-configured for application in an LED display panel. In other embodiments, the control element includes an FPGA that provides the ability to be programmed and reprogrammed after installation. Thus, other supporting devices, such as power inputs and regulators, programming interfaces, volatile and non-volatile memory elements, etc., are implied. The control element is configured to process input signals and any additional input and output control signals sent to the active electrical components of each LED pixel. In some embodiments, multiple DACs can be arranged to convert signals from the control element before the signal path reaches the LED pixel. The control element can also be configured to output column, row, and LED color selection information to the LED pixel, which determines when each LED pixel and each LED chip within each LED pixel responds to control signals from the multiple DACs. In some embodiments, one or more column, row, or color selection decoders can be configured to receive and transform the output column, row, and / or LED color selection information from the control element before the path reaches the LED pixel. For example, the control element may include an FPGA that outputs digital signal codes of 0s and 1s for column, row, or color selection information. The column, row, or color selection decoder can then be configured to receive and decode the digital signals so as to activate active control elements for specific LED pixels within the LED display panel.

[0138] For display applications, an LED display panel may include multiple LED packages arranged in columns and rows to form an array of LED pixels. Each LED package may include one or more LED pixels, comprising a first LED chip (e.g., a red LED chip), a second LED chip (e.g., a blue LED chip), and a third LED chip (e.g., a green LED chip), as well as active electrical components as described above. Depending on the driving configuration between the control element and the LED packages, the number of control lines connecting the control element and each LED package, as well as the number of rows, columns, and color selection lines, may vary.

[0139] Figure 14This is a schematic diagram illustrating a configuration in which an active electrical element 30 corresponding to a specific LED pixel is configured to receive a row selection signal line and a separate control signal for each of the red, green, and blue LED chips included within the LED pixel. In this regard, the row selection signal activates each active electrical element 30 of a specific row of LED pixels, and each column of LED pixels is configured to receive three separate control signals for each of the red, green, and blue LED chips. These three separate control signals may correspond to three separate DACs per column, or analog control signals. The control signals may control the brightness level or grayscale level of each of the red, green, and blue LED chips within a specific LED pixel. Therefore, as the control signal is passed along a specific column, the row selection signal determines which LED pixel responds to that signal. As previously described, the active electrical element 30 corresponding to each LED pixel is configured to store red, green, and blue level signal information and accordingly drive the LED chip in a constant manner until the next time the active electrical element 30 is activated to refresh or update the signal information. Therefore, for Figure 14 In this configuration, besides grounding and voltage input connections, the active electrical component 30 is configured to receive four different signal lines (row select, red level, green color level, and blue level). Therefore, this configuration requires at least six connections, increasing PCB path complexity. In some embodiments, it may be desirable to have fewer connections, such as the 4-connection embodiment shown in the preceding embodiments (e.g., Figure 2E ).

[0140] Figure 15 This is a schematic diagram illustrating a configuration in which an active electrical component 30 corresponding to a specific LED pixel is configured to receive a separate row selection signal line for each LED chip within the LED pixel and a single color level signal line for all LED chips within the LED pixel. Figure 15In this configuration, three separate row selection signals (red row selection, green row selection, and blue row selection) activate each of the red, green, and blue LED chips within an LED pixel, respectively. Therefore, a single color level (e.g., brightness level or grayscale level) can be provided for each of the red, green, and blue LED chips within an LED pixel. For this purpose, each column can be configured with a single DAC as described above. In other embodiments, the active electrical element 30 can be configured to receive optional column selection lines, thereby allowing a single DAC to provide color level signals for multiple columns of LED pixels. In operation, a specific row selection signal activates a specific LED chip in response to a color level signal at a specific time. As in the previous embodiments, the active electrical element 30 is configured to store color level signal information and drive each LED chip accordingly until the next time the active electrical element 30 is activated to refresh or update the color level information. Therefore, for Figure 15 In addition to grounding and voltage input connections, the active electrical component 30 is configured to receive four to five different signal lines (red row select, blue row select, green row select, color level, and selectable column select). While reducing the number of DACs lowers the overall system complexity, at least six connections may be undesirable for some applications.

[0141] Figure 16 This is a schematic diagram illustrating a configuration in which an active electrical component 30 corresponding to a specific LED pixel is configured to receive an encoding row selection signal for each LED chip within the LED pixel and a single color level signal line for all LED chips within the LED pixel. Figure 16 In the middle, color levels and optional column selection lines can be configured to match the previous settings. Figure 15 The description is the same; however, the row selection signals are reduced to two row selection lines (row selection RS0, row selection RS1). In this respect, the row selection lines are configured to provide coded digital signals (a combination of 0s and 1s) that determine which LED chip should respond to a specific color level signal. As a non-limiting example, the two row selection lines can provide a "00" digital signal corresponding to an operating state where no LED chip should respond, a "01" digital signal corresponding to the activation of a red LED chip, a "10" signal corresponding to the activation of a blue LED chip, and an "11" signal corresponding to the activation of a green LED chip. As in the previous embodiments, the active electrical element 30 is configured to store color level signal information and accordingly drive each LED chip in a constant manner until the next time the active electrical element 30 is activated to refresh or update the color level information. Therefore, for Figure 16In addition to grounding and voltage input connections, the active electrical component 30 is configured to receive three to four different signal lines (row select RS0, row select RS1, color grade, and optional column select). Therefore, with... Figure 14 and Figure 15 Compared to the previous embodiment, the reduction of at least one connection represents an improvement in PCB complexity.

[0142] Figure 17 This is a schematic diagram illustrating a configuration in which the active electrical element 30 of a particular LED pixel is configured to receive row selection signals, color level signals, and one or more color selection signals from red, green, and blue LED chips included within the LED pixel. Figure 17 In the middle, the row selection signal is configured to be similar to... Figure 14 The configuration is the same; however, the signal for the color level (e.g., brightness or grayscale level) of each LED chip is controlled by a single signal line. In this respect, each column can be configured with a single DAC as described above. In other embodiments, the single DAC can be configured to provide signals regarding color levels to multiple columns of LED pixels. To determine which LED chip within an LED pixel should respond to a specific color level signal, two color selection lines (color selection 0, color selection 1) are configured to provide coded digital signals (a combination of 0s and 1s) that determine which LED chip should respond to a specific color level signal. As a non-limiting example, the two color selection lines can provide a "00" digital signal corresponding to an operating state where no LED chip should respond, a "01" digital signal corresponding to the activation of a red LED chip, a "10" signal corresponding to the activation of a blue LED chip, and an "11" signal corresponding to the activation of a green LED chip. Therefore, for Figure 17 In addition to grounding and voltage input connections, the active electrical component 30 is configured to receive four different signal lines (row select, color level, color select 0, color select 1).

[0143] Figure 18 It means similar to Figure 16 and Figure 17 A schematic diagram of the configuration. Specifically, Figure 18 It can represent Figure 16 or Figure 17 The configuration of any independent symbol in the configuration. In Figure 18 In the middle, the active electrical component 30 includes... Figure 16 and Figure 17 The same color level line as the color level line in the text. Figure 18The active electrical component 30 further includes a device select (DS) line and two color select lines (CS0 and CS1). The DS line is configured to provide a device select signal, which may include at least one of a row select signal and a column select signal. The CS0 and CS1 lines are configured to provide signals that can correspond to... Figure 16 Row selection RS0 line and row selection RS1 line or Figure 17 The color selection lines 0 and 1 are encoded signals. In this respect, the active electrical component 30 can be configured to control a number of operating conditions with a small number of connections. The DS line corresponds to... Figure 16 Column selection lines or Figure 17 The row selection line.

[0144] Figure 19 This is a schematic diagram illustrating a configuration in which an active electrical component 30 corresponding to a specific LED pixel is configured to receive a single row selection signal line and a single color level signal line for all LED chips of the LED pixel. Figure 19 In the middle, color levels and optional column selection lines can be configured to match the previous settings. Figure 15 The description is the same; however, the row selection signals are combined into a row selection line. In this respect, a single row selection line can be configured to send an encoded signal individually corresponding to each LED chip within an LED pixel. The encoded signal can include an analog signal, which includes at least one of a variable amplitude signal, a variable frequency signal, or a variable phase signal. The encoded signal can also include multiplexed or multi-level logic signals. In some embodiments, the row selection line can be configured to provide signals having different voltage states corresponding to different LED chips. For example, the row selection line can be configured as a four-level signal line, where each of the four signal levels corresponds to one of the following operating conditions: no LED chip selected, red LED selected, blue LED selected, and green LED selected. In some embodiments, additional active electrical components can be provided to further facilitate the processing of the four-level signal line. The additional active electrical components can be disposed within each LED package or separate from each LED package. As in the previous embodiments, the active electrical component 30 is configured to store color level signal information and accordingly drive each LED chip in a constant manner until the next time the active electrical component 30 is activated to refresh or update the color level information. Therefore, for Figure 19 In addition to grounding and voltage input connections, the active electrical component 30 is configured to receive two to three different signal lines (row selection (multilevel), color level, and optional column selection). This configuration is suitable for applications requiring reduced complexity, such as the previously described 4-connection configuration (e.g., Figure 2E This is what is expected.

[0145] Figure 20 This is a schematic diagram illustrating a configuration in which an active electrical component 30 corresponding to a particular LED pixel is configured to receive a single row selection signal line and a single color level signal line for all LED chips of the LED pixel. Figure 20 Similar to Figure 19 The configuration includes color levels and optional column selection lines as previously described. Figure 20 In this configuration, the row select signal line can be configured to transmit encoded signals, such as asynchronous encoded digital signals, portions of which correspond to each LED chip within the LED pixel. In some embodiments, the encoded signals include different pulses corresponding to each of the operating conditions of red LED select, blue LED select, green LED select, and no LED select. Other operating states can also be addressed using an extended encoding scheme. In this way, the active electrical element 30 may include a shift register that cycles sequentially through each operating state (e.g., no select, red select, blue select, green select) using each pulse of the encoded signal. To prevent the shift register from becoming out of sync, the encoded signal may also include a pulse code at the end of each cycle to reset the shift register to the beginning of the next cycle. In addition to the sequential pulses, the row select line may include other encoded signals that identify and correspond to different states among the four or more operating states described above. Therefore, for Figure 20 In addition to grounding and voltage input connections, the active electrical component 30 is configured with connections (e.g., Figure 2A The contact pad 38) is used to receive two to three different signal lines (row selection (encoding), color level, and optional column selection). With Figure 19 The configuration is the same. Figure 20 This configuration is suitable for applications with reduced complexity, such as the previously described 4-connection configuration (e.g., Figure 2E This is what is expected.

[0146] Figure 21 It is an illustrative representation based on Figure 20 A block diagram of a system-level control scheme for an LED display panel, according to an embodiment, wherein each active electrical element of the LED pixel array is configured to receive a signal line. Figure 21 It can provide input signals, signal decoders, control elements, row / column decoders, panel position inputs, calibration meter inputs, and multiple DACs, as previously described for... Figure 13 As mentioned above. Figure 21In this embodiment, column select lines are not included, and optional DAC decoder elements are arranged to allow selection of an appropriate DAC element to receive data provided by a common data bus. In other embodiments, the control element may be configured to include DAC decoding capability, thus eliminating the need for a DAC decoder element. Depending on the number of output pins available on a particular FPGA or other control element, a separate row / color decoder may also be unnecessary.

[0147] Figure 22 It shows the configuration used according to Figure 20 and Figure 21 A partial plan view of the path configuration of the LED panel 112 for configuration operations. Figure 22 In this configuration, multiple LED packages 26 are arranged in rows and columns to form an LED pixel array. Each LED package 26 may include multiple LEDs forming LED pixels as described above (e.g., 28-1 to 28-3 of FIG. 2), active electrical components (30 of FIG. 2), and multiple package bonding pads 48-1 to 48-4. Figure 22 As shown, multiple LED packages 26 are connected to corresponding Figure 20 The color grading selection line has multiple color grading control lines 114-1 to 114-4 and corresponding to... Figure 20 Multiple row selection control lines 116-1 to 116-3 for the row selection lines. Figure 22 The LED package 26, marked in the middle, has package bonding pad 48-1 connected to color grade control line 114-1, and package bonding pad 48-3 connected to row select control line 116-3. Package bonding pad 48-2 is connected to voltage input line 118-1 among a plurality of voltage input lines 118-1 to 118-4, and package bonding pad 48-4 is connected to a ground plane (not shown). In some embodiments, the plurality of color grade control lines 114-1 to 114-4 and the plurality of row select control lines 116-1 to 116-3 may be arranged on different levels or planes of a multilayer connector interface, wherein one or more dielectric layers are arranged between the multilayer connector interfaces for electrical insulation. For example, the row select control lines 116-1 to 116-3 may be arranged along a first plane closest to the plurality of LED packages 26. The plurality of color grade control lines 114-1 to 114-4 and the plurality of voltage input lines 118-1 to 118-4 may be arranged along different planes at greater distances from the plurality of LED packages 26. Finally, the ground connection plane (not shown) may be arranged along another different plane, which is farther away from the multiple LED packages 26 than the multiple color grade control lines 114-1 to 114-4 and the multiple voltage input lines 118-1 to 118-4. Multiple through-holes 120 may be arranged to pass through the multilayer connector interface to provide corresponding connections to the package bonding pads 48-1 to 48-4. Figure 22Only one of many path configurations for the LED panel 112 is shown. In other embodiments, various lines 114-1 to 114-4, 116-1 to 116-3, and 118-1 to 118-4 may be provided in different arrangements of vertical and horizontal configurations, including but not limited to all vertical and all horizontal configurations.

[0148] Figure 23 This is a schematic diagram illustrating a configuration in which an active electrical element 30 corresponding to a specific LED pixel is configured to receive fully digital communication of row, column, and / or color selection signals. Furthermore, bidirectional communication can be achieved through one of many standard or custom protocols. This enables numerous additional tasks, such as communication handshake, addressing, status reporting, and a broader command structure. In other words, the active electrical element includes serial communication elements. In this way, serial input / output lines are configured to provide digital signals to the active electrical element 30 according to one of various serial communication link technologies. Serial communication technologies typically involve sending or streaming data sequentially bit by bit over time. An optional clock input can be configured to receive a clock signal that provides cyclic information to the LED pixel. In some embodiments, serial communication (e.g., sending or receiving) can include a high bit rate with differential signaling, including but not limited to Low Voltage Differential Signaling (LVDS), Minimum Transition Differential Signaling (TDMS), Current Mode Logic (CML), and Source Coupled Logic (SCL). In this regard, the active electrical component 30 can be configured to receive optional differential input / output lines and optional clock differential input / output lines. Certain serial communication technologies can be configured with a self-clocking configuration or a configuration for receiving a self-clocked signal, and therefore, a clock input may not be required. Such a self-clocking configuration may include a decoder element within the active electrical component, which includes various decoding capabilities for clock recovery, such as 8b / 10b encoding, Manchester encoding, phase encoding, pulse counting with or without timing reset, isochronous signal encoding, or non-isochronous signal encoding. Other communication technologies may include inter-integrated circuit (IIC) communication. 2C) Protocols, I3C protocol, Serial Peripheral Interface (SPI), Ethernet, Fibre Channel (FC), Universal Serial Bus (USB), IEEE 1394 or FireWire, HyperTransport (HT), Infinite Bandwidth (IB), Digital Multiplexing (DMX), DC-BUS or other power line communication protocols, Avionics Digital Video Bus (ADVB), Serial Input / Output (SIO), Controller Area Network (CAN), ccTalk protocol, CoaXPress (CXP), Musical Instrument Digital Interface (MIDI), MIL-STD-1553, Peripheral Component Interconnect High Speed ​​(PCIexpress), Fieldbus, RS-232, RS-422, RS-423, RS-485, Serial Digital Interface (SDI), Serial AT Attach (Serial ATA), Serial Attach SCSI (SAS), Synchronous Optical Network (SONET), Synchronous Digital Architecture (SDFI), SpaceWire, UNI / O bus and I-Wire, etc. For some configurations, the active control element 30 is configured to operate using at least one subset of signals compatible with one of the protocols described above (e.g., transmitting or receiving), including but not limited to I... 2 C protocol. When arranged for all-digital communication, active electrical element 30 is configured to latch input data, implement other logic, and provide color levels or grayscale levels to the LED pixels of the display. In some embodiments, active electrical element 30 may include a DAC-controlled current driver, wherein one or more DACs are included within active electrical element 30 and have current-driven outputs. In some embodiments, active electrical element 30 includes a PWM driver or current source configured to independently drive each LED of the LED pixel based on digital input signals. When active electrical element 30 is arranged for all-digital communication, the path for the LED pixel array can be simplified. In this respect, in some embodiments, each active electrical element 30 may only need to be configured to receive as few communication or signal lines as possible, e.g. Figure 23 The serial input / output lines are shown.

[0149] Figure 24 It is an illustrative representation based on Figure 23 A block diagram of a system-level control scheme for an LED display panel, according to an embodiment, wherein each active electrical element of the LED pixel array is configured to receive a signal line. Figure 24 The interface can provide input signals, signal decoders, panel position inputs, and calibration meter inputs, as mentioned earlier for... Figure 13 As described above. In some embodiments, the control element includes one or more serial communication interfaces or serial communication elements as described above. Therefore, a DAC element is not required, thus providing... Figure 21The block diagram is a simplified configuration. Depending on the number of output pins available on a particular FPGA or other control element, a separate line / color decoder may not be necessary. As shown, the outputs of the control element can communicate directly with the LED array, where multiple serial outputs communicate with multiple serial lines or LED strings of the LED array. Figure 24 In the illustration, each LED string is shown as having two columns. In practice, LED strings can be arranged in rows and columns of different sizes and numbers, or the electrical connections of each string may not follow the rows and columns shown.

[0150] Figure 25 It shows the configuration used according to Figure 23 A partial plan view of the path configuration of the LED panel for configuration operations. Figure 25 In this configuration, multiple LED packages 26 are arranged in rows and columns to form an LED pixel array. Each LED package 26 may include multiple LEDs forming LED pixels as described above (e.g., 28-1 to 28-3 in FIG. 2), active electrical components (e.g., 30 in FIG. 2), and multiple package bonding pads 48-1 to 48-4. In this configuration, control lines 116-1 to 116-4 correspond to... Figure 23 The serial input / output lines, first and second voltage input lines 118-1 to 118-4 and 120-1 to 120-4, and the ground connection lines 122-1 to 122-4 shown. As shown, no source from the DAC (e.g., Figure 22 The color grading control lines (114-1 to 114-4) provide simplified PCB path configuration. Figure 25 In this configuration, the input electrical connections, including control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4, are all arranged along the same plane or layer of the LED panel. This configuration provides a simpler structure and manufacturing process, as well as reduced costs. In other embodiments, the control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4 can be arranged on different planes with different dielectric layers and via arrangements to form various connections to each LED package 26. Figure 25In the diagram, control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4 are shown as long linear segments spanning the LED panel. In some embodiments, the control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4 may be arranged in other configurations, such as comb wiring or other chain configurations that can reduce crosstalk between the various lines. In some embodiments, the control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4 may not be registered in specific rows and columns of the LED package 26. For example, control lines 116-1 to 116-4, voltage lines 118-1 to 118-4, 120-1 to 120-4, and ground lines 122-1 to 122-4 can be configured to connect and communicate with subgroups of LED packages 26 arranged in blocks or other shapes across the LED panel.

[0151] In some embodiments, signal communication between the control element and the LED packages of the LED display may include sending control signals comprising multiple data packets from the control element. Specific data packets may include control information, such as color selection data and brightness level data for individual LED packages in the array. In some embodiments, the data packets may include file sizes ranging from as low as a single bit of data to very large file sizes (e.g., large video files). Each data packet may also include a command code configured as an identifier or a series of identifiers that enable each LED package in the array to receive the command code and respond to the data packet or pass the data packet to the next LED package. In this way, the LED packages may be arranged to receive different data packets from the control signals in a cascaded manner.

[0152] Figure 26A and Figure 26B This is a schematic diagram illustrating the arrangement of an exemplary data packet 124 according to an embodiment disclosed herein. Data packet 124 is included in a data stream 126 that is transmitted from a control element 18 to an active electrical element 30 of an LED package 26 via a control line. In some embodiments, data stream 126 may include multiple data streams, including a cascading method wherein data stream 126 includes multiple sub-data streams. In some embodiments, the LED package 26 forms one or more pixels as described above (e.g., Figure 1A(12). Additional LED packages may be disposed before or after LED package 26, configured to receive data stream 126. In this way, LED package 26 may receive data packets 124 directly from control element 18, or via another LED package disposed in data stream 126 and between control element 18 and LED package 26. Data packet 124 may include information or data portions (indicated as "data") for selecting and operating one or more LED chips of LED package 26, including individual color selection and brightness level data for each LED chip disposed within LED package 26. This information or data may also include setting data, calibration data, temperature compensation data, and option selection data, etc. Additionally, data packet 124 may include instructions for turning one or more LED chips of LED package 26 on or off. In some embodiments, at least some of the information or data from data packet 124 may be stored in registers within LED package 26 for later use. For applications where the LED package 26 forms one or more LED pixels comprising multiple LED chips (e.g., red, green, and blue LED chips), the information or data may include a subset of data corresponding to a single chip in the LED package. The data packet 124 may also include a portion comprising a command code (indicated as a “command”) configured as an identifier of the data packet 124 or a series of identifiers that identify how the active electrical element 30 should respond to the data packet 124. Specifically, the command code is configured to identify an action to be taken by the active electrical element 30. In some embodiments, this action includes transmitting the data packet 124 through the LED package 26, or sending or retransmitting the data packet 124 through an output port of the LED package 26. In some embodiments, this action includes performing internal actions within the LED package 26, such as driving one or more LED chips within the LED package 26 and sending the data packet 124 through the LED package 26. As used herein, internal actions of the LED package 26 may include setting or changing a persistent state for a time frame defined by the data packet 124 or any other associated data packet for a given time frame. The persistent state may include one or more of the following: turning one or more LED chips on or off, changing the color or brightness level of an LED chip, or setting or updating calibration data. In some embodiments, this action includes driving one or more LED chips within the LED package 26 without transmitting data packets 124 through the LED package 26. In some embodiments, this action includes transmitting data packets 124 without performing any other actions within the LED package 26. Such an action may be based at least in part on one or more other data packets previously received by the LED package 26.In a further embodiment, another data packet or second data packet received by the LED package 26 may include a second command code identifying a second action to be taken, the second action including sending the second data packet through the LED package 26. In other embodiments, the second action includes driving one or more LED chips within the LED package 26 and sending the second data packet through the LED package 26. In this way, the data packet 124 is configured with self-identification. In some embodiments, the data packet 124 may include information configured to provide a data handshake with another LED package in the data stream 126. The data handshake capability may include a packet start portion (indicated as "BOP") and / or packet end portion (indicated as "EOP") of the data packet 124, such that the LED package 26 can acknowledge the reception and / or transmission of the data packet 124. In some embodiments, the data stream 126 may include empty space portions (referred to as "space"), which are no-data cycles or empty transmission cycles arranged before or after the data packet 124 in the data stream 126. The no-data transmission cycle may be configured to control the communication speed and prevent buffer overflow of control signals for the LED package 26. For example, if multiple LED packages 26 with different communication speeds or clock configurations are arranged in a cascaded manner to receive different data packets from data stream 126, data overflow may occur. Therefore, a no-data-transfer cycle can be provided to ensure that communication operates effectively at a controlled or slower speed to avoid or reduce buffer overflow. The no-data-transfer cycle can also be configured to signal reset or restart conditions, or signal conditions for the next frame. The no-data-transfer cycle can be configured at different positions relative to data packet 124, for example... Figure 26A As shown, after packet 124, or as... Figure 26B As shown, this occurs before data packet 124. In some embodiments, data packet 124 may include other commands, such as basic on or off instructions corresponding to LED package 26.

[0153] Figure 27 This shows multiple data packets DP1, DP2...DP n A schematic diagram showing the cascading flow from control element 18 to multiple LED packages 26-1, 26-2…26-n. In some embodiments, any number (n) of LED packages can be provided to form an LED display. As shown, control element 18 is configured to cascade multiple data packets DP1, DP2…DP4 along data stream 126. n Send to multiple LED packages 26-1, 26-2…26-n. For example, each data packet DP1, DP2…DP n It can be configured as follows: Figure 26A or Figure 26B The data packet 124 describes this. Data packets (e.g., DP1, DP2…DP…)n Groups (one or more combinations of) can form one of multiple datasets 128-1, 128-2…128-n, which corresponds to packets DP1, DP2…DP… n Specific packets are received by specific LED packages 26-1, 26-2…26-n. For example, dataset 128-1 corresponds to data packets DP1, DP2…DP… n The packets, which are received by the first LED package 26-1, and the dataset 128-2 correspond to data packets DP2…DP n The packets are received by the second LED package 26-2, and so on. In some embodiments, a specific data packet (e.g., a first data packet DP1) is configured for a corresponding LED package (e.g., the first LED package 26-1). Thus, data packets DP1, DP2…DP… n Received by the first LED package 26-1, which is configured to take action based on the first command code of the first data packet DP1, remove the first data packet DP1 from the data stream 126, and retransmit or resend data packets DP2…DP n To the adjacent LED package 26-2. Similarly, LED package 26-2 is configured to take action and remove packet DP2, and pass or retransmit the remaining packet DP. n The sequence continues until the remaining packets DP of dataset 128-n are reached. n Until it is received by the remaining LED packages 26-n. For some display applications, each LED package 26-1, 26-2…26-n will receive data according to its corresponding data packets DP1, DP2…DP… nThe operation continues until control element 18 sends a new dataset 128-1 corresponding to LED packages 26-1, 26-2…26-n. In some embodiments, control element 18 may be configured to provide a portion of the data stream 126, such as bit mode / code or transmission delay, indicating to LED packages 26-1, 26-2…26-n that the previous datasets 128-1, 128-2…128-n are complete and to search for the next dataset 128-1, 128-2…128-n. For the transmission delay between different datasets 128-1, 128-2…128-n, the time delay may include a range from 1 microsecond to 0.1 seconds, which provides sufficient timeout for LED packages 26-1, 26-2…26-n to begin searching for the next dataset 128-1, 128-2…128-n. For LED display applications, each dataset 128-1, 128-2…128-n may correspond to a data frame or video frame used for the LED display. For other LED applications, each dataset 128-1, 128-2…128-n may correspond to an operating state, such as general lighting color point and / or brightness level, or a static image provided by LED packages 26-1, 26-2…26-n. In some embodiments, the first data packet DP1 configured for the first LED package 26-1 may include the same data length as the second data packet DP2. In other embodiments, the first data packet DP1 may include a data length greater than the data length of the second data packet DP2 in order to transmit more information, such as color selection data, brightness level data, setting data, calibration data, temperature compensation data, and / or option selection data, to the first LED package 26-1.

[0154] Figure 28 This shows multiple data packets DP1, DP2...DP n A schematic diagram of the cascaded flow from control element 18 to multiple LED packages 26-1, 26-2…26-n, and the flow of one or more intercom data packets TB1, TB2…TBn to control element 18. (See diagram for...) Figure 27 As described, control element 18 and data stream 126 provide data packets DP1, DP2, ... DP to datasets 128-1, 128-2...128-n. n Grouped into LED packages 26-1, 26-2…26-n. Figure 28In this configuration, the first LED package 26-1 is configured to receive and act to remove the first data packet DP1 from data stream 126, and subsequently replace the first data packet DP1 with the first intercom data packet TB1 from dataset 128-2 or with data stream 126 leaving the first LED package 26-1. Similarly, the remaining LED packages 26-2…26-n can be configured to receive corresponding data packets DP2…DP n And then using the corresponding intercom data packets TB2…TB n Replace them. Intercom data packets TB1, TB2…TB n Data set 128-c can then be formed, which is configured to transmit information about LED packages 26-1, 26-2…26-n back to control element 18 for monitoring. In some embodiments, intercom data packets TB1, TB2…TB… n Configured to transmit one or more states of LED packages 26-1, 26-2…26-n, such as operating temperature, operating current, or other operating states, such that control element 18 can transmit based on one or more intercom data packets TB1, TB2…TB n Modify or add additional data to subsequent datasets 128-1, 128-2…128-n. Intercom data packets TB1, TB2…TB n It can also be configured to provide data verification and parity checks or other data verifications to control element 18. In such an embodiment, one or more data packets DP1, DP2…DP n The command codes may include active electrical components configured to guide or prompt the corresponding LED packages 26-1, 26-2…26-n to provide intercom data packets TB1, TB2…TB n The code or signal. Therefore, one or more LED packages 26-1, 26-2…26-n and the corresponding active electrical components within each LED package 26-1, 26-2…26-n can be configured to receive input data (e.g., one or more data packets DP1, DP2…DP…). n And the introduction of additional data (e.g., one or more intercom data packets TB1, TB2…TB). n ) to data stream 126.

[0155] Figure 29 This shows multiple data packets DP1, DP2...DP from control element 18. n A diagram illustrating a cascaded flow, where the cascaded flow additionally includes data packets (DP). ALL-1 DP ALL-2 Data Packet DP ALL-1 DP ALL-2It is configured to provide information to all LED packages 26-1, 26-2…26-n that receive the data stream 126. For example, regarding… Figure 27 As described, control element 18 and data stream 126 provide datasets 128-1, 128-2, ..., 128-n to LED packages 26-1, 26-2...26-n, these datasets including data packets DP1, DP2...DP... n The data sets 128-1, 128-2…128-n are grouped. In some embodiments, the datasets 128-1, 128-2…128-n additionally include one or more data packets DP. ALL-1 DP ALL-2 Data Packet DP ALL-1 DP ALL-2 It is configured as a common or broadcast data packet for all LED packages 26-1, 26-2…26-n. In this respect, the first LED package 26-1 is configured to receive and respond to the data packet DP. ALL-1 DP ALL-2 And additionally, data packets DP are transmitted or retransmitted along data stream 126. ALL-1 DP ALL-2 This allows the remaining LED packages 26-2…26-n to also receive and respond accordingly. In some embodiments, the data packet DP ALL-1 DP ALL-2 One or more of the components can be used to turn all LED packages 26-1, 26-2…26-n on or off, or to provide brightness levels for all LED packages 26-1, 26-2…26-n in response to user input or ambient light sensing. In other embodiments, the data packet DP… ALL-1 DP ALL-2 One or more of them can be configured to guide LED packages 26-1, 26-2…26-n to provide, for example Figure 28 The intercom data packets TB1, TB2...TB n In some embodiments, the same datasets 128-1, 128-2…128-n may include a first data packet DP. ALL-1 Second data packet DP ALL-2 Each data packet provides different common instructions to the LED packages 26-1, 26-2…26-n, such as DP. ALL-1 Indicator LED package 26-1, 26-2…26-n open and DP ALL-2 Common brightness settings are provided for LED packages 26-1, 26-2…26-n. Figure 29 In the diagram, packet DPs are shown at the beginning and end of datasets 128-1, 128-2…128-n. ALL-1 DP ALL-2 However, in other embodiments, the packet DPALL-1 DP ALL-2 It can be placed anywhere within the dataset 128-1, 128-2…128-n. In some embodiments, the packet DP ALL-1 DP ALL-2 The data can be retransmitted via LED package 26-n to form dataset 128-c received by control element 18.

[0156] Figure 30 This shows multiple data packets DP1, DP2...DP from control element 18. n A schematic diagram of a cascaded flow, wherein the cascaded flow additionally includes one or more consecutive data packets CDP2, which are configured to provide additional information to at least one of the LED packages 26-1, 26-2…26-n. (See diagram for…) Figure 27 As described, control element 18 is configured to provide datasets 128-1, 128-2, ..., 128-n to LED packages 26-1, 26-2...26-n, these datasets including data packets DP1, DP2...DP... n In some embodiments, datasets 128-1, 128-2…128-n additionally include consecutive data packets CDP2, which are configured to send to at least one of the LED packages 26-1, 26-2…26-n (e.g., Figure 30 The second LED package 26-2 in the data stream 126 provides additional data or information. In this regard, in the datasets 128-1, 128-2…128-n of the data stream 126, the continuous data packet CDP2 is arranged after data packet DP2 and before data packet DP3. Furthermore, the command code for the continuous data packet CDP2 can be configured such that the first LED package 26-1 transmits the continuous data packet CDP2, and the second LED package 26-2 removes and responds to the continuous data packet CDP2 after removing and responding to data packet DP2. In some embodiments, the continuous data packet CDP2 includes color selection data and / or brightness level data, which may be supplementary to the color selection data and / or brightness level data received from data packet DP2. In some embodiments, the continuous data packet CDP2 includes at least one of setting data, option selection data, and calibration data. For example, in some embodiments, the active electrical components 30 of one or more of the LED packages 26-1, 26-2…26-n can be arranged without flash memory, and the continuous data packet CDP2, as disclosed herein, can be configured to provide one or more transfer functions after a reset or initial startup condition. The transfer function can include temperature compensation information, gamma function, etc.

[0157] According to embodiments disclosed herein, multiple LED packages can be arranged in series to receive a cascaded stream of data packets. The multiple LED packages can form an LED package array, which can form at least a portion of an LED display panel, an LED sign panel, or a general lighting panel. In such embodiments, one or more LED packages may include active electrical components as described above, which receive and act upon one or more data packets. In some embodiments, the LED package array can be arranged in a serpentine pattern on the panel, the serpentine arrangement being configured to provide a cascaded stream of data packets while also providing reduced traces of electrical paths or traces between the LED packages.

[0158] Figure 31 This is a partial plan view illustrating the path configuration of an LED panel 130 configured for operation according to embodiments disclosed herein. Figure 31 In this configuration, multiple LED packages 26 are arranged in rows and columns to form an LED pixel array. Each LED package 26 may include multiple LEDs forming LED pixels as described above (e.g., 28-1 to 28-3 of FIG. 2), active electrical components (e.g., 30 of FIG. 2), and multiple package bonding pads 48-1 to 48-4. Figure 31 In this configuration, the package bonding pads 48-1 and 48-3 of each LED package 26 are configured as communication ports for sending and receiving cascaded data packets of a data stream. Specifically, each package bonding pad 48-3 is pre-assigned as an input port for the data stream (denoted as "DIN" for data input), and each package bonding pad 48-1 is pre-assigned as an output port for the data stream (denoted as "DOUT" for data output). Each package bonding pad 48-2 is configured as a voltage port (VDD), and each package bonding pad 48-4 is configured as a ground port (GND). In this way, a data stream (designated as "input") can be received at the package bonding pad 48-3 of the LED package 26 at the lower right corner of the LED panel 130. At least a portion of the data stream can then exit the LED package 26 via the package bonding pad 48-1 for reception by adjacent LED packages 26. Multiple communication buses 132-1 to 132-3 for data flow are arranged to connect the package bonding pad 48-1 of one LED package 26 to the package bonding pad 48-3 of the next LED package 26. In some embodiments, the communication buses 132-1 to 132-3 are arranged to connect the LED packages 26 in series in a serpentine manner. Figure 31In the LED panel 130, communication buses 132-1 to 132-3 traverse the bottom row of the LED panel 130 from right to left and from left to right through the next row above the bottom row, connecting the LED packages 26 in series. This sequence is repeated for each additional row of the LED panel 130 to form a serpentine arrangement. Depending on the alternating direction of the series connections between rows, different communication buses 132-1 to 132-3 may include different lengths to connect between the package bonding pads 48-1 and 48-3 of the series-connected LED packages 26. For example, communication bus 132-1 may include a shorter length and alternate with communication buses 132-3, which have a longer length, row by row. As shown, communication bus 132-2 is arranged to connect one row to another and may include the same or similar length as communication bus 132-1. In this way, all communication buses 132-1 to 132-3 can be arranged on the same layer or plane of the LED panel 130 while providing series connections for the data flow to the LED packages 26. Although not shown, at least some of the electrical connections for the LED package 26 may be arranged on a different layer or plane than the communication buses 132-1 to 132-3.

[0159] Figure 32 This is a partial plan view illustrating the path configuration of an LED panel 134 including a plurality of LED packages 26 having selectively assigned or bidirectional communication ports according to embodiments disclosed herein. Figure 32 In this configuration, multiple LED packages 26 are arranged and connected in a serpentine pattern of rows and columns to form an LED pixel array. Each LED package 26 may include multiple LEDs forming LED pixels as described above (e.g., 28-1 to 28-3 of FIG. 2), active electrical components (e.g., 30 of FIG. 2), and multiple package bonding pads 48-1 to 48-4. Figure 32 In the middle, package bonding pad 48-2 (VDD) and package bonding pad 48-4 (GND) are connected to... Figure 32 Similarly configured, the package bonding pads 48-1(D2), 48-3(D1) of each LED package 26 are configured as communication ports for sending and receiving cascaded streams of data packets. As shown in the figure, to... Figure 31 Similarly, each package bonding pad 48-1 is arranged at the upper left corner of each LED package 26, and each package bonding pad 48-3 is arranged at the lower right corner of each LED package 26. Figure 32In this configuration, package bonding pads 48-1 and 48-3 are configured as communication ports that can be selectively assigned based on how communication buses 132-1 to 132-3 are arranged to receive input and output data streams from each LED package 26. In this respect, communication buses 132-1 to 132-3 can be arranged to receive or output data streams from any of the package bonding pads 48-1 and 48-3 of each LED package 26. Upon startup or after the LED panel 134 is reset, when an LED package 26 initially receives a data stream, the active electrical components of the LED package 26 are thus configured to identify the first of the first and second communication ports (e.g., one of the package bonding pads 48-1 and 48-3) receiving input signals from the data stream, selectively assigning the first of the first and second communication ports as an input port, and selectively assigning the second of the first and second communication ports (e.g., the other of the package bonding pads 48-1 and 48-3) as an output port. In this way, package bonding pads 48-1, 48-3 can be configured as bidirectional communication ports within each LED package 26. Thus, some LED packages 26 may have package bonding pads 48-1 assigned as input ports, while other LED packages 26 in the same LED panel 134 may have package bonding pads 48-1 assigned as output ports. In some embodiments, the active electrical components of each LED package 26 may include circuitry configured to selectively allocate input and output communication portions. For example, the active electrical components may include circuitry comprising a tri-state buffer, such that when an input communication signal is received, the active electrical components can allocate input and output ports in a register. By providing such selectively allocated communication ports, the path of the communication bus 132-1 to 132-3 between LED packages 26 can be simplified with a reduced length, thereby providing lower cost and achieving higher resolution for the LED panel 134.

[0160] Figure 33 This is a partial plan view illustrating another path configuration of an LED panel 136 including a plurality of LED packages 26 with selectively assigned communication ports, according to an embodiment disclosed herein. Figure 33 In this configuration, multiple LED packages 26 are arranged and connected in a serpentine pattern of rows and columns to form an LED pixel array. Each LED package 26 may include multiple LEDs forming LED pixels as described above (e.g., 28-1 to 28-3 of FIG. 2), active electrical components (e.g., 30 of FIG. 2), and multiple package bonding pads 48-1 to 48-4. Figure 33 In the middle, some settings in the package bonding pads 48-1 to 48-4 have with Figure 32 The different arrangements are shown. Specifically, the package bonding pad 48-1 is configured as follows: Figure 33 The ground port (GND), the voltage holding port (VDD) of the package bonding pad 48-2, and the package bonding pads 48-3 (D1) and 48-4 (D2) are configured as selectively assigned communication ports. In this way, the selectively assigned communication ports are arranged close to each other within the same LED package 26, and closer to the selectively assigned communication ports of adjacent LED packages 26. Therefore, the communication buses 132-1 and 132-2 can be further simplified by reducing the length between the LED packages 26. Specifically, the communication bus 132-1 can form a straight line between adjacent LED packages 26 along each row of the LED panel 136. The longer communication bus 132-2 connects one row to another and is arranged around the periphery of the LED panel 136.

[0161] Figure 34 This illustrates embodiments according to the disclosure herein. Figure 33 A partial plan view of the path configuration of the LED panel 136, with the addition of voltage line 118 and ground line 122. The simplified path arrangement of communication lines 132-1, 132-2 allows for a simplified path arrangement of voltage line 118 and ground line 122 for the LED panel 136 by having multiple LED packages 26 with one or more selectively assigned communication ports (e.g., one or more of package bonding pads 48-1 to 48-4). Specifically, this path configuration allows communication lines 132-1, 132-2, voltage line 118, and ground line 122 to all be arranged on the same layer or plane of the LED panel 136. In some applications, it may be beneficial to arrange one or more of the voltage lines 118 or ground lines 122 on a different plane from the communication buses 132-1, 132-2 to improve power distribution, reduce voltage drops caused by trace resistance, and reduce noise from crosstalk and other sources. In some embodiments, communication buses 132-1, 132-2 and voltage line 118 may be arranged on a first layer or plane of LED panel 136, and ground line 122 may be arranged on a second layer or plane of LED panel 136, wherein vias connect ground line 122 to package bonding pad 48-1 of each LED package 26. A subset distribution on the second layer or plane of LED panel 136 may be provided to reduce the number of vias.

[0162] exist Figures 31 to 34 In each of these, the LED package 26 is shown having four package bonding pads 48-1 to 48-4. It should be understood that in some embodiments, Figures 31 to 34Any of the LED packages 26 shown may include an additional number of package bonding pads. In some embodiments, the LED package 26 may have at least two additional package bonding pads configured to provide a clock signal input and a clock signal output to provide synchronization or other timing sequences for the LED package 26. In some embodiments, the series-connected LED packages 26 may be configured with a self-clocking configuration or a configuration for receiving a self-clocking signal, and therefore, a clock input may not be required. In some embodiments, the additional package bonding pads may be configured to receive additional voltage inputs to save power. For example, one or more red LED chips within the same LED package 26 may operate at a lower voltage with a different voltage input compared to one or more blue or green LED chips within the LED package 26. Furthermore, one or more logic circuit arrangements in the active electrical components 30 may operate at a lower voltage with different voltage inputs.

[0163] As disclosed herein, the series-connected LED package 26 can be configured to have temperature or other compensation, calibration, correction, or transfer function capabilities. Such capabilities or techniques may include the use of one or more lookup tables, transfer coefficient-based calculations, and combinations of lookup tables with transfer coefficient calculations that provide a piecewise continuous transfer function. In some embodiments, packet DP, continuous packet CDP, or public or broadcast packet DP... ALL One or more of them may include command codes configured to prompt active electrical components in one or more LED packages 26 to communicate from such lookup tables and / or transfer coefficients to a single LED package 26, a subgroup of LED packages 26, or all LED packages 26 in the data stream 126.

[0164] As disclosed herein, an LED package including an active electrical element configured to receive data from a data stream and take one or more actions, at least in part, in response to the received data. In some embodiments, the active electrical element may take one or more actions based on a command identified by the data received from the data stream, in conjunction with one or more of the current state of the LED package or previously received commands by the active electrical element.

[0165] Figure 35This is a schematic diagram illustrating various inputs and corresponding actions for an active electrical component according to embodiments disclosed herein. As shown, the active electrical component 30 is configured to receive an input data stream 126A and take actions based on the data stream 126A and various inputs and internal states 138-1 to 138-n for identifying one or more corresponding actions 140-1 to 140-n to be taken. Specifically, one or more inputs and internal states 138-1 to 138-n are received by control logic 141 of the active electrical component 30. One or more inputs or internal states 138-1 to 138-n include the current state 138-1 of the active electrical component 30 (and the corresponding LED package 26), a current command 138-2 corresponding to a command code received from the current portion of the input data stream 126A, a previous command 138-3 corresponding to a previous command code received from a previous portion of the input data stream 126A, and one or more additional inputs (...138-n). Current state 138-1 may include reset or start conditions for the active electrical component 30, such as resetting a register to an initial state. If the LED package 26 is provided with a bidirectional communication port, the initial state may include resetting the bidirectional communication port to seek an input signal. Current state 138-1 may also include waiting for data input from one or more communication ports. After receiving data from input data stream 126A, current state 138-1 may include maintaining the operating conditions of the LED package 26, or implementing a public or broadcast command and any corresponding continuous data command. When current command 138-2 is received, the control logic 141 of the active electrical component 30 may then identify one or more actions 140-1 to 140-n to be taken based on one or more combinations of the control logic 141 inputs and internal states 138-1 to 138-n, and may include changing the current state 138-1. One or more actions 140-1 to 140-n may include sending or retransmitting data 140-1 from input data stream 126A to output data stream 126B, sending LED data 140-2 (e.g., intercom data packets) to output data stream 126B, or any number of other actions 140-3, 140-4…140-n, including energizing the LED chip or other components of the LED package 26, turning the output of the LED package 26 on or off, sending data to a calibration register according to the received input data stream 126A, identifying and assigning the bidirectional communication port of the LED package 26 as a different port among the input and output ports, changing the data rate according to the input or output data streams 126A / 126B, implementing a specific set of options for the LED package 26, or changing the driving conditions of the LED package 26. In this regard, the active electrical component 30 may include a finite state machine configured to identify and take actions based on the current or previous input command and one or more finite or current states of the LED package 26.

[0166] Figure 36 This is a schematic diagram illustrating an active electrical element 30 including a finite state machine 142 according to an embodiment disclosed herein. The active electrical element 30 can be configured according to a finite state machine 142. Figure 35 The current state 138-1 can be configured with any number of states 144-1 to 144-4. Startup or reset state 144-1 may include an initial state for resetting the registers and communication ports to their initial states. After startup or reset state 144-1, the active electrical component 30 can proceed to communication port setting state 144-2, where the active electrical component 30 awaits data input from the data stream. Upon receiving data input, the active electrical component 30 can assign input and output ports to the corresponding LED package. Based on command codes received from various input signals, the active electrical component 30 can proceed to one of command states 144-3 and 144-4. Command state 144-3 corresponds to implementing and / or maintaining the operating conditions of the individual LED package of the active electrical component 30 according to the received command code. Command state 144-4 corresponds to implementing and / or maintaining common or broadcast operating conditions for all LED packages in the data stream. In normal operation, the active electrical component 30 can advance from the startup or reset state 144-1 to the communication port setting state 144-2 before advancing and cycling between command states 144-3 and 144-4 based on various received command codes and other conditions such as timeout conditions. As shown, all the various states 144-1 to 144-4 can cycle back to themselves until a condition or command is provided to change the active electrical component 30 to another of the various states 144-1 to 144-4. In some embodiments, a command or condition can change one of the various states 144-1 to 144-4 to a different one of the various states 144-1 to 144-4, as indicated by the dashed lines between the different states 144-1 to 144-4. Although only four states 144-1 to 144-4 are shown, the active electrical component 30 and the finite state machine 142 may have additional states according to the embodiments disclosed herein. Therefore, providing Figure 36 This is a high-level concept diagram illustrating the basic operation of the active electrical component 30. It is understood that the same operation can be represented in many different ways, such as combining command states into one and demoting a first command condition to a subordinate state. In some embodiments, all states 144-1 to 144-4 can be configured with one or more timeout conditions that change a particular state 144-1 to 144-4 to the previous one of states 144-1 to 144-4, which can ultimately force a reset condition. In this respect, the active electrical component 30 can avoid getting stuck in unresponsive states 144-1 to 144-4.

[0167] In some embodiments disclosed herein, the LED package includes active electrical components configured to detect adverse operating conditions or corresponding error signals of one or more LEDs within the LED package. In some embodiments, the active electrical components may be configured to provide forward and reverse bias states to one or more LEDs and toggle between them. A forward bias state is provided to activate or turn on one or more LEDs, and a reverse bias state may be provided individually to one or more LEDs for other capabilities, including current leakage measurement and reverse bias voltage measurement. In some embodiments, the active electrical components may be configured to provide forward voltage monitoring and corresponding adjustment of drive signals to one or more LEDs. An LED panel comprising multiple LED packages configured to provide forward and reverse bias states is disclosed. The LED panel may be configured such that one or more LED packages can run a self-test routine at startup or at other intervals or times. Such a self-test routine may include, for any LED within each LED package, comparing a reverse leakage measurement to a reverse leakage requirement and a forward voltage measurement to a forward voltage requirement. Such a self-test routine may also include a temperature assessment of any LED. In some embodiments, reverse leakage measurement and forward voltage measurement can be added to or can replace those fed back to the control element (e.g., Figure 28The data in 18). In response to an inappropriate reverse leakage value, the active electrical components of a particular LED package can shut down a specific LED within the LED package, shut down an LED pixel within the LED package, or shut down the entire LED package during normal operation of the LED panel to prevent drawing current from other LEDs, LED pixels, or the LED package. In response to a deviation in a forward voltage measurement, the active electrical components of a particular LED package can responsively adjust the drive signal, such as a PWM signal, for one or more LEDs within the package. In some embodiments, an exemplary self-test routine may include looping through each LED to perform an initial brightness measurement, performing internal reverse leakage and / or forward voltage measurements, and providing one or more diagnostic signals via LED color or pulse sequence for detection and decoding by an external machine. In some embodiments, the self-test routine may provide an output signal indicating at least one of a pass or fail condition for the LEDs within the package. The output signal may be transmitted as a digital signal to an electrical port. In other embodiments, the output signal may be communicated as an optical signal through one or more LEDs within the package. In some embodiments, the self-test routine may repeat steps in which the LEDs are electrically activated in a slower manner to provide a visible signal to a human observer. In this way, the optical signal can include a code that can be interpreted from the blinking of one or more LEDs in a predetermined color, duration, and / or count. In some embodiments, the optical signal can be initially transmitted at a high speed that is undetectable or difficult for a human observer to detect, and then transmitted at a lower speed to provide a human-readable code for human detection. The LED package can be configured to automatically execute such a self-test routine upon power-up, or the LED package can be configured to execute such a self-test routine when tested by being directly connected to a separate power supply. Furthermore, a time delay can be provided between the high-speed communication and the low-speed communication code during power-up, with the low-speed communication code being low enough that the controller has time to send a command to stop the self-test routine before displaying or sending the low-speed communication. Thus, upon first power-up, the display may blink only according to the higher-speed communication, and the main controller can send a full-off command almost immediately after power-up. In this way, the initial blinking at a higher speed during power-up will be difficult for a human observer to detect.

[0168] Figures 37 to 42 The schematic diagrams and block diagrams are provided to represent concepts related to the active electrical components described herein. Although Figures 37 to 42 While shown as general schematic diagrams and block diagrams, various configurations and additional supporting elements and circuitry may be present in various embodiments. Figures 37 to 42In these diagrams, any lines connecting different components may include single or multiple lines, depending on the application and the type of signal being transmitted (e.g., analog or digital). Again, these diagrams are intended to convey the concept in a general manner. Additional resistors, capacitors, and active components may need to be added to achieve the desired functionality and performance. Other arrangements, such as source-level and / or sink-level drivers, are also considered. Furthermore, other arrangements, such as using a single ADC with a multiplexer switch instead of separate ADC inputs for each node, are understood to be within the scope of this disclosure. Similarly, separate voltage inputs may be used for LEDs with different voltage requirements (e.g., a separate voltage input for a red LED compared to a voltage input for a green or blue LED).

[0169] Figure 37 This is a schematic diagram illustrating an embodiment of an active electrical element 30 configured to detect normal or malfunctioning operating conditions of at least one LED 146 according to the embodiments disclosed herein. As shown, the driver 148 of the active electrical element 30 is essentially an analog interface of the active electrical element 30 and includes a pull-up resistor R6 with a high resistance value (e.g., 10,000-100,000 ohms), a threshold detector 150, and a resistor network R1-R5 with different resistance values, wherein selector switches FET1-FET3 are coupled to resistors R3-R5 respectively. The threshold detector 150 may include a comparator / operational amplifier configuration for transmitting error (ERR) signals to control logic 141. These error signals may include electrical short-circuit or open-circuit states of LED 1, etc. Control logic 141 is a digital interface of the active electrical element 30 and includes resistor selection (R-Select) and PWM circuitry coupled to the driver 148. The cathode of LED 146 is coupled to pull-up resistor R6, threshold detector 150, and resistor network R1-R5. During normal operation, selector switches FET1-FET3 allow selection of resistors R3-R5 to provide a predetermined current limit, and selector switch FET4 is coupled to the PWM circuitry of control logic 141 to provide brightness control of LED 146. When LED 146 is electrically short-circuited, an error is detected as a high voltage, such as above 2V or above 3V, and a corresponding error signal is sent to control logic 141. When LED 146 is electrically open-circuited, depending on the specific resistor selection, an error is detected as a low voltage, such as below 0.5V. Although only LED 146 is shown, the concepts described herein are also applicable to arrangements of multiple LEDs, where individual or multiplexed threshold detectors 150 are configured with each LED. As with the previously described embodiments, as Figure 37The active electrical component 30 configured therein can be integrated with one or more LEDs (e.g., LED 146) into the same LED package. Additionally, the active electrical component 30 can be configured to work with another control element (e.g., Figure 1B The control element 18) communicates with and responds to commands from another control element.

[0170] Figure 38 This is a schematic diagram illustrating an embodiment of the present disclosure in which an active electrical element 30 is configured to provide forward and reverse bias states to at least one LED 146. In some embodiments, control logic 141 includes a reverse bias control output signal configured to provide a near VSS or near VDD voltage level to LED 146 based on an appropriate active element. Since the term "reverse bias" implies that a high level on the output of control logic 141 creates a reverse bias condition, the output signal can be simply coupled to an inverter 152 disposed in driver 148. Therefore, depending on the specific operating state, LED 146 can be forward biased or reverse biased. Inverter 152 or inverter logic element can have sufficient output characteristics to drive LED 146. As with other aspects, additional elements may need to be added to meet all requirements. Figure 38 In this configuration, ADC 154 is configured to detect the voltage at LED 146 in relation to the operating conditions of LED 146. Therefore, ADC 154 is arranged to replace... Figure 37 The threshold detector 150. In some embodiments, the ADC 154 includes at least one of a resistor-capacitor (RC) circuit or analog filter arranged in the driver 148 and a digital filter circuit arranged in the control logic 141. The ADC 154 may further include a comparator, a sampling element with digital feedback, and additional filtering in the digital domain. Other arrangements / methods for analog-to-digital conversion are also contemplated. To measure the operating conditions such as reverse leakage of LED 146, the control logic 141 may apply a reverse bias to LED 146 such that the anode of LED 146 becomes close to 0V. In the reverse bias state with the PWM circuit off, if LED 146 exhibits a suitable low reverse leakage, the cathode of LED 146 coupled to the pull-up resistor R6 will approach V. ddIf LED 146 leaks in the reverse-biased state, the cathode of LED 146 will have a lower voltage. This can be sensed by ADC 154 or a limiting sensor and used by control logic 141 to take appropriate action, such as turning off LED 146 and notifying the main control element 18 via a communication protocol. In this respect, ADC 154 can form a level sensor configured to provide an error signal when LED 146 is in the reverse-biased state. Therefore, ADC 154 is configured to detect the voltage associated with the operating conditions of LED 146 when LED 146 is in the reverse-biased state.

[0171] In other embodiments, control logic 141 may turn off one or more LEDs within the LED package in response to detected reverse leakage, or control logic 141 may turn off the entire LED package. In other embodiments, control logic 141 may adjust the control signal to LED 146 in response to detected reverse leakage. As shown, driver 148 may include resistor networks R1-R5 and selection switches FET1-FET4, and control logic 141 may include R selection circuitry and PWM circuitry, such as... Figure 37As described above, the PWM circuit is turned off during the reverse bias state of LED 146. In some embodiments, this configuration of the active electrical component 30 allows for adjustment and improved control of the operating conditions of LED 146, rather than simply detecting voltage levels and responding only to pass and fail states. The resistor network R1-R5 serves as a current-limiting circuit for LED 146, and in this way, precisely controls the current of LED 146 without active feedback in response to small changes in LED voltage. These changes are typically observed during the lifetime of LED 146. Feedback on the positive voltage level of LED 146 from ADC 154 can be used as part of a calculation to determine and / or adjust the PWM duty cycle of LED 146. For example, if ADC 154 detects a decrease in the positive voltage level of LED 146, control logic 141 can responsively increase the PWM duty cycle of LED 146 to compensate for any brightness difference that would otherwise be observed. This pseudo-current control may be superior to other current control methods because it requires fewer resources (e.g., additional chip space and power) to implement. Along with the positive voltage level feedback of LED146, the transfer curve, temperature compensation data, and input brightness level data can also be part of the calculations used to determine and adjust the PWM duty cycle. Additionally, since ADC 154 can provide voltage level monitoring of LED146 to control logic 141, it can also detect electrically short-circuited or electrically open-circuited states of LED146. In this way, ADC 154 is configured to detect voltages related to the operating conditions of LED146, such as the positive voltage level, when LED146 is in a forward biased state. According to the embodiments disclosed herein, ADC 154 can be configured to send measurement data (e.g., reverse leakage and forward voltage measurements) to active electrical element 30 for serial output to a main control element (e.g., ...). Figure 1B Control element 18). Although in Figure 38 Only LED 146 is shown in the document, but the ideas described herein are also applicable to arrangements of multiple LEDs, where a separate ADC 154 is configured for each LED, or a switching network (e.g., a multiplexer) allows one ADC 154 to perform voltage measurements from multiple LEDs. As with the previously described embodiments, as... Figure 38 The active electrical component 30 configured therein can be combined with one or more LEDs (e.g., LED 146) into the same LED package.

[0172] Figure 39 This illustrates the replacement of the active electrical component 30 with a current source 156 according to an embodiment disclosed herein. Figure 38 A schematic diagram of an embodiment of the resistor network R1-R5 and the corresponding selection switches FET1-FET3. Figure 39 In, such as Figure 38 As described, pull-up resistor R6 and inverter 152 are coupled to LED 146. Current source 156 is configured to provide LED 146 with selectable (e.g., several levels) or adjustable (e.g., many levels) current. Because the schematic diagram of current source 156 is larger than... Figure 38 The resistor network R1-R5 and the corresponding selector switches FET1-FET3 are more general, therefore subsequent diagrams will use current source 156 to represent any method used to control the LED current, including Figure 38 The resistor network R1-R5 and the corresponding selection switches FET1-FET3. Control logic 141 includes a current selection circuit (or...) Figure 37 The resistor selection circuit (typically used to set the maximum current or brightness level based on factors such as the chip size of LED 146) is used. Such a selection can usually be made during initial setup and does not necessarily need to be changed afterwards. In some embodiments, PWM can be omitted, and LED 146 can be operated independently by current source 156, as described above. Figure 11E The Howland current pump is described. In some embodiments, the current source 156 is equipped with built-in feedback, so feedback from the ADC 154 may not be required. In some embodiments, temperature measurement feedback may be provided to the current source 156 by one or more components of the ADC 154. Although in Figure 39 Only LED 146 is shown in the illustration, but the concept described herein is also applicable to arrangements of multiple LEDs. As with the previously described embodiments, as... Figure 39 The active electrical component 30 configured therein can be combined with one or more LEDs (e.g., LED 146) into the same LED package.

[0173] Figure 40 It is shown that... Figure 39 The schematic diagram is similar to that of multiple LED embodiments. As shown, individual resistors among the pull-up resistors R6-1 to R6-3 in the active electrical component 30 are coupled to a corresponding LED among the multiple LEDs 146-1 to 146-3. Furthermore, each of the LEDs 146-1 to 146-3 is coupled to a corresponding ADC 154-1 to 154-3 and a corresponding current source 156-1 to 156-3. Figure 40 In this embodiment, inverter 152 is configured to change or switch from a forward bias state to a reverse bias state for each of LEDs 146-1 to 146-3. In other embodiments, active electrical element 30 may include a separate inverter 152 for each of LEDs 146-1 to 146-3. As previously described, a separate V ddA voltage input can be used to save power by driving LEDs 146-1 to 146-3 with less power dissipation at their respective voltage levels within active electrical components 30. While current sources 156-1 to 156-3 are shown, a resistor network (e.g., Figure 38 R1-R5) and selector switches (e.g., Figure 38 FET1-FET3 can also be configured for each of LEDs 146-1 to 146-3. Therefore, Figure 40 The active electrical component 30 is configured to provide open-circuit detection, short-circuit detection, forward voltage monitoring, and reverse leakage monitoring for each of the LEDs 146-1 to 146-3, and to adjust or turn off individual LEDs or groups of LEDs among the LEDs 146-1 to 146-3 in response. As in the previously described embodiments, as Figure 40 The active electrical component 30 configured therein can be integrated with LEDs 146-1 to 146-3 into the same LED package. Although multiple ADCs 154-1 to 154-3 are shown, a single ADC can be provided to detect voltages or voltage levels at multiple nodes, such that the single ADC is configured to provide at least one of reverse leakage measurement and forward voltage measurement for multiple LEDs 146-1 to 146-3.

[0174] Figure 41 This illustrates a configuration with multiple ports according to embodiments disclosed herein. Figure 40 A schematic diagram of an active electrical component 30, the plurality of ports including a power supply voltage V dd Grounding V ss And bidirectional communication ports (Input / Output (I / O) Port 1 and I / O Port 2). In Figure 41 In the diagram, besides the V on the left... dd V ssIn addition to the four ports of I / O Port 1 and I / O Port 2, the active electrical component 30 also includes four ports shown on the right side of the diagram, which are coupled to LEDs 146-1 to 146-3. As shown, LEDs 146-1 to 146-3 are electrically coupled to inverter 152, pull-up resistors R6-1 to R6-3, ADC 154-1 to 154-3, and current sources 156-1 to 156-3, as previously described. In other embodiments, current sources 156-1 to 156-3 can be replaced by a corresponding resistor network and selection switch, as previously described. The bidirectional communication ports I / O Port 1 and I / O Port 2 are electrically coupled to one or more I / O buffers 158. I / O buffer 158 includes circuitry (e.g., various buffers and tri-state buffers) configured, together with control logic 141, to assign bidirectional communication ports I / O port 1 and I / O port 2 as input (data input) or output (data output) communication ports based on the connection method of the active electrical components 30 within the system. In response to an input data connection at either bidirectional communication port I / O port 1 or I / O port 2, control logic 141 will accordingly assign the input port direction and the output port direction. Control logic 141 may include one or more additional elements that, in Figure 41 The diagram generally illustrates, for example, memory elements, clocks or oscillators, and / or filters and ADCs, which are connected to temperature sensors and resistor-capacitor pairs to provide thermal management capabilities. In some embodiments, one or more or a single ADC from ADCs 154-1 to 154-3 may be configured to provide temperature measurements by measuring the voltage supplied by the temperature sensor.

[0175] Figure 42 This illustrates configurations according to embodiments disclosed herein that have polarity-agnostic or polarity-independent input capabilities. Figure 41 A schematic diagram of the active electrical component 30. As shown, the switching network 160, such as an active switching network, can be arranged to receive multiple connections (e.g., ports P1-P4) from input ports or pins or to connect to multiple connections, and configure individual signal lines as V dd V ss One of the data input and data output signal lines. Therefore, ports P1-P4 form multiple polarity-agnostic connection ports arranged to receive or transmit various signals. In some embodiments, the switch network 160 includes circuitry configured to self-configure regardless of the connection order of ports P1-P4. Exemplary circuitry for the switch network 160 may include a network of actively controlled switches, such as multiple MOSFETs having gates biased according to voltage levels sensed on the inputs. In some embodiments, the switch network 160 may be... Figure 41 The I / O buffer 158 provides some functionality. Therefore, in some embodiments, it is desirable to... Figure 41 The function of the I / O buffer 158 is integrated into the switching network 160. For example... Figure 42 As shown by the dashed lines within the active switch network 160, each individual port among ports P1-P4 can be connected as V dd V ss Any one of the data input and data output signal lines. In this way, the active electrical component 30 of the LED package may include a switching network 160 and one or more bidirectional communication ports, such that the package bonding pads of the LED package (e.g., Figure 2I (48-1 to 48-4) form a structure that can be connected to V dd V ss The polarity of any of the input and output communication ports is unknown. For output communication, at least one of multiple ports (e.g., ports P1-P4) can be configured as an output communication port accordingly. Since the switching network 160 also includes a power supply, the power supply pin must first be specified and switched to the appropriate node. This power input can be implemented using passive circuitry (e.g., an RC network controlling the FET gate). As an example, Figure 43 It shows that it can be used to... Figure 42 A general schematic diagram of a four-input rectifier 162 that provides initial power to a switching network 160. As shown, each of ports P1-P4 is coupled to a pair of low-voltage components such as bipolar diodes, Schottky diodes, etc. Because of their voltage drop (especially for low-voltage LED components), such diodes may consume too much power; therefore, the four-input rectifier 162 may only be used initially for… Figure 42 The switching network 160 is powered, and then active components and logic can be used to make the final switching connections. In this way, Figure 42 The power switching network can then use low-voltage switches, such as MOSFETs, to provide a low-resistance path for the power pins, bypassing the diode rectifier (e.g., Figure 43 (162). In some embodiments, the MOSFET may be included in the active rectifier of the switching network 160 used in combination with the four-input rectifier 162. In other embodiments, this is achieved by replacing the MOSFET with an actively controlled switch (e.g., a transistor comprising a MOSFET and / or a bipolar junction transistor). Figure 43 Each diode shown can be replaced by an active rectifier instead of the 4-input rectifier 162.

[0176] As previously disclosed, an active electrical component of an LED package is configured to receive digital codes, such as compressed digital codes or encoded signals, from a control element of an LED display. For example, the active electrical component may be configured to receive encoded digital signals (e.g., Figure 20This encoded digital signal utilizes fewer data bits in the data stream to transmit a larger number of command codes. In this respect, active electrical components can be configured to receive compressed digital codes and subsequently decompress the digital codes in the data stream received by the active electrical components. Therefore, the decompression of the received digital codes can include any nonlinear function or algorithm used to extend the received data stream, including exponential inverse power functions that can increase the dynamic range of the data stream. The dynamic range of a digital signal can refer to the range of signal levels (e.g., upper and lower values) typically described by the number of bits. A compressed form is only relevant to how these bits are used. Bits are typically used to generate the current or power input to an LED in a linear manner. For display systems, this can be an inefficient use of bit depth (e.g., dynamic range) because human observers perceive light in a more nonlinear way, similar to logarithmic or power-law functions used for gamma correction. The dynamic range of a given number of bits may be small (e.g., the highest level of an 8-bit code is 255 times the lowest level, excluding zeros), but this dynamic range can be extended by several orders of magnitude when the data is transformed to match the nonlinear response of the eye. As an example, instead of a dynamic range of 255 with 8 bits, by applying a gamma of 2.2, we obtain a dynamic range of nearly 200,000, still using only 8 bits. Without compression, 18 bits are needed to achieve the same level of dynamic range. In this way, dynamic range can refer to the useful number of bits, sampling, or resolution of the data stream of an active electrical element. Therefore, the active electrical elements disclosed herein can be configured to receive compressed data and decompress it to provide a greater observed and useful dynamic range. As described above, in some embodiments, the compression and decompression schemes can follow a power-law expression (e.g., gamma correction) to increase the dynamic range between the digital image and the image perceived by a human observer. In other embodiments, the compression and decompression schemes can include grouping adjacent LED pixels / packages or LED pixels / packages that are closely spaced from each other. Such grouping of LED pixels can be applicable to embodiments where groups of LED pixels are controlled by a common electrical element in an LED display matrix. Specifically, an LED package may include two or more adjacent LED pixels, and compressed data codes and subsequently decompressed data codes reduce data inefficiencies by eliminating redundancy that might be expected between adjacent pixels of two or more adjacent LED pixels. Therefore, a common code is decoded or decompressed to provide codes for two or more adjacent LED pixels or sub-pixels.

[0177] As mentioned above, regarding Figure 41 and Figure 42 The present invention discloses an LED package capable of bonding pads (e.g., at any of several bidirectional communication ports or in packages with unknown polarity) to a single pad. Figure 2IAny one of (48-1 to 48-4) receives compressed digital data and decompresses such digital data. Furthermore, an LED package capable of receiving a transfer function or transfer function value is disclosed, which will be applied within the LED package to any one of a plurality of bidirectional communication ports or any one of the polarity-unknown package bonding pads (e.g., ...). Figure 2I (48-1 to 48-4). The transfer function may include one or more subsets of transfer function coefficients for active electrical components for interpolation. In this way, the transfer function can be computed in the digital domain. In some embodiments, the transfer function may include a piecewise transfer function. According to embodiments disclosed herein, the transfer function may be applied to direct or control one or more of the temperature measurement or brightness output of one or more LEDs within an LED package to an ADC input (e.g., Figure 38 (ADC154), to the PWM output terminal (e.g., Figure 38 The PWM circuit and the output of the DAC control to the active electrical element. As used herein, "transfer function" refers to any type of function that can be implemented in any number of ways to transform input data into output data such that the output data differs from the input data. In some embodiments, the transfer function can be configured to transform data according to a linear function (e.g., addition, multiplication, etc.). In some embodiments, the transfer function can be configured to transform data according to a nonlinear function (e.g., exponential, logarithmic, transcendental, algorithmic, Fourier transform (e.g., discrete Fourier transform) etc.). The transfer function can be applied to temperature control by transforming temperature sensor values ​​to generate corresponding control signals for LEDs for temperature, brightness, or voltage adjustments and combinations thereof. In some embodiments, the transfer function can be configured to receive and transform multiple inputs of data values ​​from multiple sources, these inputs being from the control element ( Figure 1B 18), inputs from a temperature sensor, and inputs including forward voltage measurement or reverse leakage measurement of the LED. Inputs from control elements outside the LED package can be configured as serial communication or serial inputs, including desired brightness, calibration, and transfer coefficients, etc. Inputs from a temperature sensor, or inputs including forward voltage and / or reverse leakage measurement, can be generated within a specific LED package. In this way, an LED package is disclosed herein including an active electrical element configured to receive data values ​​and transform the data values ​​according to a transfer function. In some embodiments, the data values ​​include compressed data codes received by the active electrical element, and the active electrical element is configured to transform the compressed data codes into decompressed data codes. The decompressed data codes may include signals for brightness levels or other control of the LED within the LED package.

[0178] In some embodiments disclosed herein, the active electrical components of an LED package are configured to receive data from a data stream that includes user-selectable color depth data. Color depth can refer to the number of bits of data used to indicate or represent the color of an LED or LED pixel. For example, a 1-bit color depth can include monochromatic colors such as black and white, and a 24-bit color depth can include 8 bits for each of a red, blue, and green LED within a particular LED package. Depending on the application, user-selectable color depth data can include color depths ranging from 1-bit to 100-bit. In some embodiments, a user can select a color depth for one or more LED packages within an LED display, which can be selected from any of 24-bit, 30-bit, 36-bit, and 48-bit color depths. In some embodiments, a specific bit depth (e.g., one of 24-bit, 30-bit, 36-bit, and 48-bit color depths) can be achieved by selecting the next higher bit depth and zero-padding a plurality of least significant bits associated with the difference. Depending on the selected color depth, the data stream received by the active electrical components of a particular LED package can be adjusted according to the bit size corresponding to the selected color depth. For example, when switching from a larger color depth to a smaller color depth, the corresponding number of bits and transmission time are reduced. In this way, the bit size of the selectable color depth data is adjustable. At different communication speeds of the data stream, a trade-off can be made between the bit size or depth related to the color depth, frame rate, and the number of pixels or subpixels in the control chain.

[0179] As disclosed herein, the active electrical components of an LED package can be configured to receive various data signals, including compressed or encoded signals corresponding to any number of command codes and color depth data. As previously described, command codes can be included as part of a data packet in a data stream. In some embodiments, the command code for a particular LED or LED pixel can include an identifier signal that instructs the active electrical components how the particular LED or LED pixel should respond to the command code. For example, the identifier signal can include a "0" digital signal indicating that the command code is a single-pixel command code for a single LED or a single LED pixel; or a "1" digital signal indicating that the command code is a full-pixel command code for all LEDs or all LED pixels. In some embodiments, single-pixel data is removed from the data stream by the specific pixel receiving the data, and can be replaced with intercom data or intercom data packets as previously described. Single-pixel command codes can include any of the following: skip pixel, set brightness return voltage, set brightness return temperature and status, and return or intercom reverse leakage command. Skip pixel command codes allow addressing of a particular LED or LED pixel in the chain without affecting other LEDs or LED pixels upstream. A full-pixel command code can include either the set brightness of all LEDs or LED pixels or the end of a frame command code. In some embodiments, the end of a frame command code is provided to indicate that an LED or LED pixel should respond to the next single-pixel command code. In some embodiments, single-pixel command codes can be sent or retransmitted along the chain for addressing a particular LED or LED pixel. In this regard, an active electrical component of an LED package responding to a single-pixel command code can responsively send a single-pixel command code with a modified code to indicate an "executed" command code, and then wait until the end of a frame command code is received before responding to the next single-pixel command code. Such an active electrical component can be called a pseudo-repeater in cascaded communication because it receives and retransmits data, but sometimes modifies or replaces the data, and never returns the same data as the received data.

[0180] Examples of command codes, which can be single-pixel or full-pixel command codes (e.g., 0 or 1 for the "ALL" command bit), may include any one of the following: reset, set option, set RGB calibration, set RGB transfer coefficient, set RGB thermal coefficient command code, load data, and load program. Load data and load programs can be used to send and / or receive any data or program from the active electrical component's memory element. In some embodiments, a set option command code may be followed by data bytes, where each bit represents one of the following options: red LED off, green LED off, blue LED off, disable thermal shutdown, disable red LED off, disable green LED off, disable blue LED off, communication speed 0, communication speed 1, color depth 0, color depth 1, disable / enable parity failure, PWM type 0, PWM type 1, resistor selection 0, resistor selection 1, resistor selection 2, do not turn off short-circuit LED, use thermal compensation, set confirmation to confirm that the power-on reset condition has been resolved, and use voltage compensation to set a mode that uses positive voltage feedback to adjust the PWM duty cycle. The communication speed options 0 and 1 can provide up to four communication speeds for the output, or can provide a communication speed for detecting the input. In this regard, an LED package is disclosed that includes an active electrical element configured to change or adapt the communication speed of data without a transmitted clock signal. The color depth options 0 and 1 can be configured to switch between color depths including 24-bit, 30-bit, 36-bit, and 48-bit depths.

[0181] As described above, some embodiments may include controlling the brightness and / or grayscale output of an LED via a pulsed method such as PWM. Under typical PWM control, the LED can be electrically activated within a portion of the PWM cycle or the duty cycle. The PWM cycle may be referred to as the PWM ratio or PWM frequency and corresponds to the length of time required to complete each PWM cycle. For LED display applications utilizing PWM control, higher PWM frequencies are typically required. Below 60Hz, the human eye may be able to detect LED flicker, while between 60Hz and 1000Hz, fluctuations may occur with respect to other cyclic (PWM or scan) sources or recording devices. In this regard, LED displays as disclosed herein are provided that are capable of PWM operation at an effective PWM frequency of at least 60Hz, or at least 1000Hz, or at least 10000Hz, or in a range including 60Hz and 10000Hz, or in a range including 60Hz and 1000Hz, or in a range including 1000Hz and 10000Hz.

[0182] Higher PWM frequencies can come with performance tradeoffs, including increased power consumption and reduced linearity. Furthermore, the PWM frequency for display applications may be limited by the display's color or bit depth, as well as the clock or counter rate. Specifically, the PWM period is equal to the bit depth divided by the clock frequency. In this respect, for high dynamic range (HDR) displays, the PWM frequency decreases proportionally to the clock frequency as the bit depth increases. Therefore, the conventional approach to increasing the PWM frequency involves increasing the clock frequency; however, practical clock frequencies may be limited to ranges including 1MHz and 50MHz, with some exemplary display applications operating at a clock frequency of 3MHz. Bit depth corresponds to the number of bits used to represent a specific color in the display. Each bit has two possible values, 0 or 1, and thus the total number of bits for a specific bit depth is calculated by increasing the number of possible values ​​(2) to a power corresponding to the bit depth. In this way, a 2-bit depth (e.g., 2...) 2 ) corresponds to a total bit depth of 4, 4 bits deep (e.g., 2 4 This corresponds to a total of 16 bits, with a 16-bit depth (e.g., 2). 16 This corresponds to a total bit depth of 65536, and so on. Therefore, for display applications with higher bit depths, it may be difficult to achieve higher PWM frequencies within an acceptable clock frequency range.

[0183] According to embodiments disclosed herein, the effective PWM frequency of an LED display is increased by segmenting the duty cycle, wherein the LEDs are electrically activated within each PWM cycle. In other words, the effective PWM frequency is achieved without changing the clock or bit depth, while maintaining the same PWM cycle (e.g., the PWM cycle remains equal to the bit depth divided by the clock frequency, but the effective PWM frequency becomes the clock frequency multiplied by the number of segments and divided by the bit depth). One method for segmenting the duty cycle within the PWM cycle is to transform or reorder the sequence of clock counters compared with the desired stage, the result being the output control signal for a driver operating at least one LED. In this way, the duty cycle within each PWM cycle can be segmented on a series of pulses that electrically activate and deactivate the LED multiple times within each PWM cycle, rather than continuously keeping the LEDs electrically activated for the duration of the duty cycle. In some embodiments, active electrical components, as disclosed herein, incorporated into one or more LED packages of the LED display, can be individually segmented for the duty cycles of one or more groups of one or more LEDs.

[0184] Figure 44A This is a schematic diagram illustrating an embodiment in which active electrical components 30 are configured to be segmented for the duty cycles of one or more LEDs. Although Figure 44A Including the components described below, but active electrical component 30 may include many other components as previously described, which, for illustrative purposes, are... Figure 44A It was not reproduced in the text. In this respect, Figure 44A Examples of implementations that could represent sub-blocks of potentially more complex components are provided. As previously described, active electrical element 30 is configured to receive a data stream and responsively send drive or control signals to one or more LEDs. The data stream can be received by active electrical element 30 and optionally stored in memory element 164 or a register. Memory element 164 may include, as previously described, […]. Figure 8 The memory element 80 describes any of the memory elements, register elements, and / or chips. Additionally, one or more signal conditioning elements 166 can be configured to convert, manipulate, or otherwise transform control signals from the data stream before drive signals are sent to one or more LEDs, such as for... Figure 8 The signal conditioning element described herein. Separate signal conditioning element inputs may be provided to introduce previously described transfer coefficients, etc., into signal conditioning element 166. In some embodiments, signal conditioning element 166 may be optional. In other embodiments, signal conditioning element 166 may be implemented by hard logic built into active electrical element 30 for a specific task. In other embodiments, a programmable device such as a microcontroller may be used to transform data by computation or otherwise by program instructions. When present, comparator 168 is configured to receive a command signal from the data stream by means of memory element 164 and signal conditioning element 166. Comparator 168 is also configured to receive clock or counter signals via clock 170 and counter 171, and output control signals accordingly based on a comparison of the command signal from the data stream with the counter signal. Clock 170 and counter 171 may include any of the previously described clock configurations. Figure 44A In this embodiment, clock 170 and counter 171 are shown within active electrical element 30, whereas in other embodiments, clock 170 may be located outside active electrical element 30. Additionally, inputs for data flow, signal conditioning, and counter conversion are shown within active electrical element 30 because, in practice, external inputs may be routed through intermediate components within active electrical element 30 as described above.

[0185] During operation, clock 170 and counter 171 provide sequential counts corresponding to the desired bit depth for the LED display. In this way, counter 171 sequentially counts the total number of bits in the bit depth and then resets or toggles to zero. As used herein, sequential counting refers to counting the total number of bits in numerical order (e.g., 0, 1, 2, 3, 4, ...), while non-sequential counting refers to sorting the total number of bits according to a non-numerical sequence of numbers, while including all the same total number of bits within a PWM cycle. Therefore, comparator 168 compares the bits from any signal-conditioned / transformed data stream with the count value provided by counter 171 after any counter transformation as described below, and responsively provides a control signal to driver 172. For an exemplary PWM cycle or loop, a data value corresponding to the number of bits depending on the bit depth is received from the data stream and compared with the counter value. When the counter value is less than the data value, comparator 168 may responsively provide a control signal to driver 172 to electrically activate one or more corresponding LEDs. As the count value increases, comparator 168 can responsively provide a control signal to driver 172 to electrically disconnect one or more corresponding LEDs when the count value exceeds a data value. In this way, PWM control is provided to the LEDs, wherein the LEDs are electrically activated during the duty cycle of the PWM cycle and electrically disconnected during the remainder of the PWM cycle. Driver 172 may include any driver devices and elements as described above, including... Figure 8 The driver element 82 is described above. In some embodiments, comparator 168 may be configured to perform a simple comparison between a data value and a counter value, such as less than, less than or equal to, greater than, greater than or equal to, equal to, and / or not equal to. In other embodiments, comparator 168 may be configured to perform comparisons based on other logical operations.

[0186] like Figure 44AAs further shown, a counter conversion device 174 or circuitry can be provided to receive counter signals from clock 170 and counter 171, and responsively convert the counter signals before comparator 168 receives them. In this way, the counter conversion device 174 can be configured to rearrange the order of the counter signals such that comparator 168 performs the aforementioned comparisons with each data value in a non-sequential sequence (e.g., non-digital order) within each PWM cycle. By applying the comparisons in a non-sequential manner, the output of comparator 168 can undergo multiple conversions during each PWM cycle. In this way, depending on the data value, the duty cycle can be segmented into multiple electrically active portions instead of a single continuous duty cycle, thereby increasing the effective PWM frequency of the LED. In some embodiments, the counter conversion device 174 can be configured to be selectable between a digitally ordered sequence and one or more non-digitally ordered sequences applied in each PWM cycle, allowing the active electrical element 30 to selectively switch between segmented duty cycles and single-pulse duty cycles. In this regard, in some applications, the same counter transformation device 174 can provide a numerical sorted counter value that is not transformed or changed from counter 171, while in other applications it can also provide transformed and non-numerical sorted counter values. In some embodiments, a separate counter transformation input can be provided to the counter transformation device 174 to provide the ability to select between numerical sorted sequences and non-numerical sorted sequences.

[0187] Figure 44B It is shown that Figure 44A A schematic diagram of an embodiment in which the counter switching device 174 is configured to share the corresponding duty cycles of segmented LEDs (LEDs 1 to LED 3) among a plurality of LEDs (LEDs 1 to LED 3). (Compared to...) Figure 44A Same, Figure 44B It can be included in Figure 44B Many other components, such as those previously described, are not reproduced here. In this respect, Figure 44B Examples can represent implementations of sub-blocks that could potentially contain more complex components. Figure 44B In this configuration, clock 170 and counter 171 are configured to work in conjunction with... Figure 44AThe same applies. However, the output of the counter conversion device 174 is shared by multiple LEDs (LED 1 to LED 3). In this way, each of the LEDs (LED 1 to LED 3) includes corresponding and separate memory elements 164-1 to 164-3, signal conditioning elements 166-1 to 166-3, comparators 168-1 to 168-3, and drivers 172-1 to 172-3. Therefore, the output of the counter conversion device 174 is shared with each of the comparators 168-1 to 168-3 for comparison with the individual data signals of each of the LEDs (LED 1 to LED 3). In some embodiments, the LEDs (LED 1 to LED 3) may include any number of LEDs forming a plurality of sub-pixels or sub-pixel matrices served by a single counter conversion device 174.

[0188] Figures 45 to 50 Provides separate representations that can be generated by Figure 44A The counter conversion device 174 provides a tabular diagram of sequential and various non-sequential or modified counter sequences for PWM control. In some embodiments, Figure 44A The counter conversion device 174 may have a selection / control input to allow for, for example, Figures 45 to 50 Choose from any number of counting sequences shown. Figures 45 to 50 In each of these tables, each row represents the data values ​​that can be received from the data stream for a specific desired output power or LED brightness. These data values ​​are represented as sequential decimal values ​​(e.g., 1, 2, 3, etc.) and their corresponding binary values ​​(e.g., 0000, 0001, 0010, etc.). For each step of the counter sequence, each column represents the counter value (sequential and / or modified) as a binary value. For illustrative purposes, Figures 45 to 50 The example shown is provided for a 4-bit depth display application, where 16 possible values ​​(e.g., 0, 1, 2, ... 15) are provided for each color or grayscale level. In practice, Figures 45 to 50 The illustrated embodiments are scalable to larger bit-depth applications for higher resolution displays, including but not limited to 24-bit, 30-bit, 36-bit, and 48-bit depth configurations. Each of these bit-depth configurations is divided by 3 to determine the bit depth per pixel (e.g., 8, 10, 12, or 16 bits). In the case of tri-color or other multi-subpixel compositions, a single counter and a transformation counter signal can be shared among all subpixels, with each subpixel having its own data, comparator, and driver, as previously described. Figure 44B As described.

[0189] Figure 45 Indicates the use of numerical order to Figure 44AThe comparator 168 provides a tabular diagram of the counter sequence. In this respect, the comparator ( Figure 44A (168) compares the data value for a specific PWM cycle with a counter value that starts at 0 and increments sequentially to 15. Because Figure 45 This represents the unchanging linear counter value, so the modified counter value section of the table is left blank. When the data value is greater than the counter value, a control signal (e.g., "1") is provided to electrically activate the corresponding LED. When the data value is less than or equal to the counter value, a control signal (e.g., "0") is provided to electrically deactivate the corresponding LED. In this respect, a data value of 0 will cause the corresponding LED to be electrically deactivated for the entire PWM cycle. A data value of 8 will cause the corresponding LED to be electrically activated for 8 consecutive counts out of the total 16 counts in the counter sequence, thus providing a duty cycle corresponding to 50% of the PWM cycle. As shown, for each of the data values ​​0 to 15, the corresponding LED is electrically activated once during the duty cycle duration within each PWM cycle. In other words, within each PWM cycle, at most one electrical pulse is delivered to the LED or at most one positive transition and one negative transition. At low frequencies, this can cause noticeable flickering or flashing and may additionally provide jitter with respect to other light sources or imaging sources.

[0190] Figure 46 Indicates the use of the full-bit reversal sequence to Figure 44A Comparator 168 provides a tabular representation of non-numeric sorted counter values. It does not compare data values ​​with those sorted by... Figure 44A The counter value provided by counter 171 is compared with the counter value for sorting the numbers. Figure 44A The counter transformation device 174 can reorder counter values ​​to provide modified counter values ​​by bit reversal. For example, when the counter sequence is 3, the sequential counter value 0011 is converted in reverse order to the modified counter value 1100 that originally corresponded to counter sequence 12. For full bit reversal, all sequential binary counter values ​​are transformed in this way. This is one of the simplest reordering methods because it can be implemented by connecting the bit outputs of the counter in reverse order and requires no decision logic, calculation, or lookup. Therefore, Figure 44AThe comparator 168 compares a data value for a specific PWM cycle with a modified counter value arranged in the following non-digital order: 0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15. When the data value is greater than the modified counter value, a control signal (e.g., "1") is provided to electrically activate the corresponding LED. When the data value is less than or equal to the modified counter value, a control signal (e.g., "0") is provided to electrically deactivate the corresponding LED. Depending on the specific bit depth and data value, the corresponding LED can be electrically activated and deactivated multiple times to provide a specific net duty cycle. For example, a data value of 8 will cause the corresponding LED to be electrically activated in 8 non-contiguous counts out of a total of 16 counts, thus cycling (or switching) on ​​and off 8 times to provide 50% of the duty cycle of the PWM cycle. In this way, the effective PWM frequency for 50% of the duty cycle is higher than... Figure 45 The ratio is 8 times higher. For data values ​​of 0, 1, and 15, it will be... Figure 45 The corresponding LEDs are driven in a similar manner as shown. Although Figure 46 The bit-inverting method provides an increased effective PWM rate for many data values, but power consumption can also increase as the LED cycles on and off more times per PWM cycle. As shown in the figure, at the 50% data level, the full-bit inverting PWM provides a drive frequency of half the clock rate, which can be much higher than expected. Furthermore, linearity issues can occur because the driver may not accurately follow the high-speed signal provided by the comparator.

[0191] Figure 47 Indicates used to Figure 44A Comparator 168 provides a tabular diagram of the modified counter value based on the partially bit-inverted sequence. For partially bit inversion, only a portion of the counter bits is inverted. As an example, Figure 47 This represents the modified counter value obtained by inverting the first two digits of the counter value. Therefore, for a counter sequence of 4, the sequence counter value 0100, representing the decimal value 4, is converted to the modified binary counter value 1000, representing the decimal value 8. In this example, by only converting the first two digits, the number of conversions at the 50% level is reduced by a quarter of the number of full-bit inversions. Therefore, Figure 44A The comparator 168 compares the data value for a specific PWM cycle with the modified counter values ​​arranged in the following non-digital order: 0, 1, 2, 3, 8, 9, 10, 11, 4, 5, 6, 7, 12, 13, 14, 15. By applying partial bit inversion, the corresponding LED can be electrically activated and deactivated more often than in each PWM cycle. Figure 45 There are more sorted sequences of numbers than [number], but more than [number]. Figure 46The full-bit inversion sequence is short. For example, a data value of 8 will cause the corresponding LED to be electrically activated and deactivated in four consecutive count increments to provide a 50% duty cycle. Therefore, the corresponding LED will cycle on and off (or toggle) twice in each PWM cycle with a data value of 8, thus corresponding to... Figure 45 Compared to the effective PWM frequency, it doubles, but compared to Figure 46 The higher effective PWM frequency benefits from lower power consumption. In some embodiments, partial bit inversion may include other numbers that invert the order of the binary counter values. In some embodiments, the number of bits from none to the total number of counter bits may be reversed. In some embodiments, the choice of how many bits to invert may be hardcoded or hardwired in the system. In a further embodiment, adaptive bit inversion may be utilized, which allows changes to the bit inversion and / or partial bit inversion sequence to be accepted as user options and / or settings as input.

[0192] As mentioned above, partial bit inversion offers more advantages than the original counter sequence by providing a higher switching frequency (significantly higher than one per PWM cycle) while also providing a switching frequency significantly lower than the clock frequency. However, as Figure 47 As illustrated in the diagram, data levels below 5 and above 11 differ from the original method (e.g., Figure 45 The data level remains unchanged. This can be further addressed by bit segment swapping. Previous embodiments inverted all or a portion of the counter bits. Bit segment swapping swaps the bits within each segment without inverting them. For example, to achieve y pulses within a PWM cycle, 2... x =The remaining bits of y are swapped with the most significant bits of x. As an example, an 8-bit counter 76543210 with bit positions can use bit position 7 as the most significant bit. If 4 PWM pulses are needed per cycle for most data values, then the two most significant bits (76) can be moved to the least significant position to provide the sequence 54321076. In this respect, a modified counter using this bit order can be transferred to Figure 44A The comparator is 168.

[0193] Figure 48 Indicates used to Figure 44A The comparator 168 provides a tabular diagram of the modified counter values ​​obtained by swapping bit segments ordered according to two segments. For the two sequences, the modified counter values ​​are obtained by rearranging the 16 values ​​into two distinct segments, for example, all even numbers in one segment followed by all odd numbers in the second segment. As previously described, this is achieved by swapping the order of the counter bits to move the most significant bit to the least significant bit position. Therefore, Figure 44AThe comparator 168 compares the data value for a specific PWM cycle with the modified counter values ​​arranged in the following non-numeric order: 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15. As shown in the figure, with... Figure 47 Compared to a partial bit-inverted sequence, the increase in data value corresponds to the LED being electrically activated and deactivated twice in each PWM cycle, thus providing a higher effective PWM frequency for both lower and higher data values, as well as approximately 50% of the values.

[0194] Figure 49 Indicates used to Figure 44A The comparator 168 provides a tabular diagram illustrating the modified counter value obtained by swapping bit segments according to a four-segment sequence. For a four-segment sequence, the modified counter value is obtained by rearranging the 16 values ​​into four distinct segments. In other words, the top two bits are swapped with the bottom two bits, rather than reversing the bits in each group. As a result, Figure 49 The four distinct segments are provided as follows: a counter value is modified starting at 0 and counted to 4 to provide the first four digits of the modified counter sequence; then the fifth digit is set to the modified counter value of 1 and counted to 4 to provide the next four digits, and so on. Therefore, Figure 44A The comparator 168 compares the data value for a specific PWM cycle with the modified counter values ​​arranged in the following non-numeric order: 0, 4, 8, 12, 1, 5, 9, 13, 2, 6, 10, 14, 3, 7, 11, 15. As shown in the figure, depending on the data value, the corresponding LED can be electrically activated and deactivated one to four times at any point within each PWM cycle.

[0195] Figure 50 Indicates used to Figure 44A The comparator 168 provides a tabular diagram illustrating the modified counter value obtained by swapping bit segments according to an eight-segment order. For an eight-segment sequence, the modified counter value is obtained by rearranging the 16 values ​​into eight distinct segments. In other words, the top three bits are swapped with the bottom bits, rather than reversing the bits in each group. As a result, Figure 50 Up to eight distinct segments are provided as follows: the modified counter value starts at 0 and counts eight to provide the first two digits of the modified counter sequence, then the third digit is set to the modified counter value of 1 and counts eight to provide the next two digits, and so on. Therefore, Figure 44AComparator 168 compares data values ​​for a specific PWM cycle based on a modified counter value arranged in the following non-numeric order: 0, 8, 1, 9, 2, 10, 3, 11, 4, 12, 5, 13, 6, 14, 7, 15. As shown, depending on the data value, the corresponding LED can be electrically activated and deactivated one to eight times at any point within each PWM cycle. Although the above examples are provided for two-segment, four-segment, and eight-segment sorts, these embodiments are scalable to larger bit-depth applications for higher resolution displays, including but not limited to 24-bit, 30-bit, 36-bit, and 48-bit depth configurations. For such higher bit-depth applications, higher segment sorts can include sixteen-segment, thirty-two-segment, and sixty-four-segment sorts, etc.

[0196] exist Figures 45 to 50 In each of these, the last column is zero, so that even for the highest brightness level, the LED is turned off for one clock pulse corresponding to the last counter sequence value. This is in practice. Figures 45 to 50 This is an example of various implementations. If it is desired that the maximum level has no transition, so that the LED remains active throughout the entire PWM cycle, the implementation can omit the last counter value (i.e., the last column) and roll back to zero one cycle earlier than the previous implementation. For clarity, all Figures 45 to 50 Both show the last optional loop, where the modified counter is the same as the sequential value of 15 in decimal (or 1111 in binary).

[0197] By providing such Figures 45 to 50 The examples illustrate various non-digital sorting and / or modified counting sequences that can achieve higher effective PWM frequencies. In this respect, active electrical components configured for PWM control can achieve effective PWM frequencies higher than those calculated by dividing the clock frequency by the bit depth of the specific application. By providing higher effective PWM frequencies, LED displays can advantageously avoid low-frequency interference effects while providing a higher dynamic range with accurate high and low brightness levels and maintaining good linearity, without having to increase the clock rate or sacrifice power efficiency. Such non-digital sorting and / or modified counting sequences can be provided in any of the previously described embodiments, including those with multiple LED chips forming pixels. Figures 2A to 2I LED package 26, comprising multiple groups of LED chips forming multiple pixels. Figure 7 LED package 74 and / or Figure 12B LED package 108, and such Figures 8 to 12A and Figures 14 to 35The active electrical component structure, associated components, and associated system-level configurations described herein. In some embodiments, the non-numerical sorting and / or modified counting sequences described herein are suitable for an integrated multi-pixel display comprising a plurality of LED chips formed in a pixel group on a common board, the common board including common active electrical components, such as an ASIC or multiple separate ASICs. Such an integrated multi-pixel display may include one or more of a chip-on-glass (COG), chip-on-board (COB), package-on-package (POP), package-on-board (POB), or PCB assembly.

[0198] Due to the potential for various error states, LED displays, as described herein, may sometimes require a reset. As previously mentioned, a period of no data transmission and / or a command code including a reset command code can be configured to signal a reset or restart condition. In some embodiments, the LED display and the corresponding active electrical components can be configured to initiate reset and / or interrupt conditions without requiring a period of no data transmission and / or a reset command code. In this regard, reset and / or interrupt conditions can be initiated via a common data signal, such as a serial communication signal, by holding the line state high or low for a time interval longer than the expected time interval for normal operation. Such reset conditions can be signaled and configured to reset all active electrical components in the display or one or more individual active electrical components in the display. For one or more individual active electrical components, the reset signal can be provided with different lengths and / or pulses corresponding to certain active electrical components. In this regard, an active electrical component that does not correspond to a reset signal can simply pass the reset signal to the next active electrical component. Another way to issue a reset signal to individual active electrical components within a string is to configure the active electrical components to respond to a "next hard reset" command. In this way, commands can be directed to active electrical components preceding the target active electrical component to be reset, and the reset signal is directed to its output, thereby preventing all preceding active electrical components from receiving a hard reset signal. In some embodiments, there can be two such commands: a "hard reset one" command and a "hard reset all" command. The "hard reset one" command will send a single reset signal, such as the shorter of the two reset signals. The "hard reset all" command can direct a longer pulse at the output to signal all subsequent active electrical components in the sequence to reset. The ability to initiate reset conditions by embedding a reset signal in the data stream can be particularly advantageous when the LED display and the corresponding active electrical components do not respond to other reset communications, including command codes or no data transmission cycles.

[0199] Figure 51A A normal data stream 176 in Return-to-Zero (RZ) format that can be provided to an active electrical component according to the previously described embodiment is shown. Figure 51B A data stream 178 in RZ format, including a reset signal 180, is shown. As illustrated, the reset signal 180 corresponds to a time period during which the data stream 178 remains in a high state (e.g., "1"), a duration longer than [a certain value]. Figure 51A This is part of the normal data stream 176. In this way, the active electrical component to which the reset signal 180 is used can responsively reset its operating state upon receiving the reset signal 180. Furthermore, any active electrical component not to which the reset signal 180 is used can simply pass the reset signal 180 to the next active electrical component without initiating a reset action. While the reset signal 180 is shown as being in a high state (e.g., "1"), the reset signal 180 may alternatively remain in a low state (e.g., "0"), or the reset signal 180 may include pulses of varying lengths and / or multiple pulses without departing from the principles disclosed herein. In some embodiments, the data stream 178 may further include one or more commands or instructions indicating the type of reset or interrupt condition to be initiated after the reset signal 180 is received. Additionally, the data stream 178 may include additional commands indicating the next action to be taken after initiating a reset or interrupt condition.

[0200] As previously stated Figure 8 As described, thermal management elements can be integrated into the LED package and / or LED display, monitoring the operating temperature of the LED package and / or LED display. Therefore, the operating state of one or more LEDs within the package and / or display can be adjusted based on the monitored temperature provided by one or more thermal management elements. In some cases, the response time of the thermal management element may be slow, or the location of the thermal management element may be too far from a specific LED to provide timely thermal compensation. For example, in situations such as... Figure 2A In the three-chip LED package 26 shown, the corresponding thermal management element provides a single operating temperature for the LED package 26 without recognizing the individual contribution of each individual LED chip 28-1 to 28-3 to the total operating temperature. In some cases, one of the LED chips (e.g., 28-1) may operate disproportionately hotter than the other LED chips (e.g., 28-2, 28-3). For this situation, an integrator can be incorporated into the active electrical element 30, which is configured to individually determine the thermal management compensation for each of the LED chips 28-1 to 28-3 within the package. For example, the integrator can compare the operating temperature measured by the thermal management element with one or more different brightness levels passed to each of the LED chips 28-1 to 28-3, as well as any calibration constant, to calculate an individual thermal compensation adjustment for each of the LED chips 28-1 to 28-3.

[0201] The color space or gamut that an LED pixel can display can be defined by the individual color points of the LED chips that form the LED pixel. For example, the color space of an LED pixel comprising red, green, and blue LED chips can be defined as a triangular region in a chromaticity diagram, where the vertices of the triangular region correspond to different color points of the LED chips. In some embodiments, the color space of the input video source can be different from the color space defined by the LED chips of the LED pixel. As a result, the colors displayed on different monitors can differ unless data conversion occurs. In some applications, the video processor may perform the conversion in real time before sending the data signal to the LED display. The LED display may include its own video processor to simulate one or more standard color spaces or gamuts depending on the video technology used. For example, an LED display capable of having a relatively wide color gamut can be configured to display a narrower color gamut, such as the National Television Standards Committee (NTSC) color gamut based on analog television from a specific video source. Such a video processor needs to be quite fast and powerful to do this in real time, and therefore can be quite expensive. In some embodiments, the active electrical components described above can be configured for digital signal processing, i.e., they perform digital signal processing by accepting input data from a color space or gamut and transforming that data into a more accurate representation of the color space or gamut of the LED chip controlled by the active electrical component. Since the active electrical component serves only a small number of subpixels (typically 3 subpixels for a single-pixel RGB and 12 subpixels for a 2x2-pixel RGB), the task of color space conversion is significantly simpler, thus eliminating the need for a high-speed processor to calculate the conversion for all pixels within the display.

[0202] In some embodiments, the active electrical element can be configured to control more than three LED chips for each LED pixel. For example, the active electrical element can be configured to control four LED chips for a four-point color gamut. In such an example, the active electrical element can be configured to receive three-color input data and transform it to more accurately match the desired four-point color gamut. In a further example, instead of simply turning on only the green LED, the controller for the LED display can send a command for green; the active electrical element can calculate a combination of drive signals to the LED chips to match the desired shade of green in its corresponding color space. Thus, the active electrical element can convert a green input signal into drive signals for all three or more LED chips in the LED pixel (e.g., a significantly higher green LED emission combined with a smaller amount of blue and red LED emission). In some embodiments, the active electrical element capable of digital signal processing can include one or more ASICs, which include one or more of an arithmetic logic unit, a microcontroller, an execution controller, and a digital signal processing unit.

[0203] The embodiments disclosed herein can be implemented in various applications, including those having multiple LED chips forming multiple pixels. Figures 2A to 6 LED packages, and multiple sets of LED chips forming multiple pixels. Figure 7 LED package 74 and / or Figure 12B The LED package 108. The embodiments described herein are also applicable to integrated multi-pixel displays comprising a plurality of LED chips formed in a pixel group on a common board, the common board including common active electrical components, such as an ASIC or multiple separate ASICs. Such integrated multi-pixel displays may include one or more of chip-on-glass (COG), chip-on-board (COB), package-on-package (POP), package-on-board (POB), or PCB assemblies. In this regard, as... Figures 8 to 12A and Figures 14 to 51B Any of the active electrical component configurations, associated component configurations, and associated system-level configurations described herein can be applied to LED packages and LED display systems.

[0204] In the foregoing embodiments, the LED pixels within the display can be configured to update their respective operating states when each LED pixel receives a specific command to do so. Commands for each LED pixel can be received at different times, thus allowing the operating states of individual LED pixels to be updated at different times based on the frame rate and their arrangement in the string. In this way, synchronization among all LED pixels within the display can be challenging because each LED pixel may operate according to its own clock without coordinating with other LED pixels. This is feasible for general applications where frame rates exceed human visual perception, but some applications using high-speed operating devices may require synchronization. For example, advanced displays utilizing 3D shutter glasses might require one eye to use even-numbered frames and the other to use odd-numbered frames, with dark periods inserted between frames to allow shutter time switching. In such applications, all pixels should switch on and off together.

[0205] According to the embodiments disclosed herein, synchronization is provided for LED pixels in an LED display such that all LED pixels can be turned off simultaneously to provide a coordinated black screen, and / or all LED pixels can be turned on at a coordinated time to provide a specific image or video. Synchronization may also include coordinating other states of the LED pixels, not just on and off, such as maintaining all LED pixels in a certain color and / or brightness for a period of time, or experiencing multiple operating states in a coordinated manner. The LED display and the corresponding system may include a central or master controller configured to send communication signals to multiple sub-controllers, each of which is responsible for sending communication signals to one or more strings of LED pixels. Furthermore, active electrical components within each LED pixel (e.g., LED packages as described above) may be configured to receive communication signals, generate corresponding synchronization signals, and respond in a coordinated manner with all LED pixels within the display.

[0206] Figure 52 This is a schematic block diagram 182 of a system-level control scheme for an LED display panel based on the synchronization principle of this disclosure. A sub-controller 190 is arranged to control one or more LED strings 192 of a plurality of LED pixels 194. Figure 52 The sub-controller 190 may include the control element 18 as described above. In this way, the sub-controller 190 may include one or more integrated circuits, such as ASICs, microcontrollers, programmable control elements, and FPGAs. Figure 52 In the diagram, an exemplary LED string 192 is represented by a dashed box. While only LED string 192 is shown in detail, one or more other LED strings may also be coupled to sub-controller 190, as illustrated. LED string 192 includes a plurality of LED pixels 194, each LED pixel potentially including a separate active electrical element 30. The sub-controller 190's data signal out (DOUT) can be transmitted serially along LED string 192, and the sub-controller 190 can receive a return data signal in (DIN). Figure 52In this configuration, each LED pixel 194 has a label such as "Px1,1", where the first number indicates the row and the second number indicates the column. Each active electrical element 30 is recorded and accommodated within a specific LED pixel 194, such that each LED pixel 194 may include logic for responding to the received data signals of the aforementioned length, as described in detail above. Each LED pixel 194 may contain an LED package 26, which includes one or more LED chips and the active electrical elements as previously described. The sub-controller 190 may be configured to receive one or more signals from the system-level main controller 196 of the larger display. The main controller 196 may be configured to receive one or more signals provided by the receiver 198. In some applications, the receiver 198 may comprise an HDMI / DVI digital receiver configured to receive an HDMI input signal 200. In this way, one or more signals from the receiver 198 to the main controller 196 may include one or more color signals (e.g., red, blue, green) and various clock signals (e.g., HSYNC, VSYNC, and PIXCLK). For reference, HYSNC refers to the horizontal clock signal corresponding to the row raster, VSYNC refers to the vertical clock signal corresponding to the frame pulse, and PIXCLK refers to the pixel clock. One or more of these signals are processed by the main controller 196 and routed to one or more sub-controllers 190 based on the specific application. For example, multiple sub-controllers 190 and corresponding LED strings 192 can be tiled together to form a larger display. In some embodiments, for example, for smaller displays, the main controller 196 may not be necessary. As shown, the sub-controllers 190 can also be configured to receive signals from one or more other components (e.g., one or more microcontrollers and memory 202).

[0207] Each active electrical element 30 of LED pixel 194 may include a processing unit, such as a central processing unit, microprocessor, or even a state machine, which helps control logic control the operating state of the LED chip having each LED pixel 194. During serial communication, commands for each LED pixel 194 can be received at different times, thus the operating state of each LED pixel 194 and the corresponding LED chip can be updated at different times according to the provided frame rate. According to the principles of this disclosure, each active electrical element 30 can also be configured to synchronize the action and / or operating state within its corresponding LED pixel 194 with the action and / or operating state of other LED pixels 194 where other active electrical elements 30 are located. In a first step (e.g., startup and / or calibration), sub-controller 190 can be configured to send different delay parameters to each LED pixel 194 based on the relative position of each LED pixel and according to when the corresponding command is sent in each frame. This delay parameter can be based on information processed and stored by memory 202. In this way, each active electrical element 30 of each LED pixel 194 can be loaded with delay parameters to help determine when to activate the desired response, such as turning on or off. Since the internal clock frequencies of different LED pixels 194 may be very different, such a delay command alone may not be sufficient to achieve proper synchronization. Thus, a timing signal associated with a common clock provided by the sub-controller 190 can be utilized; however, in clockless communication applications without individual clock signals, the common clock may not be easily regenerated and available at each LED pixel 194.

[0208] According to the principles of this disclosure, each active electrical element 30 can be configured to provide a synchronization signal based on the occurrence or recurrence of a pattern within the data stream. For example, the synchronization signal can be generated based on an input bit sequence, or an input byte sequence, or a sequence of received commands, and / or a sequence of data packets received from the data stream. In this way, the synchronization signal can provide synchronization pulses corresponding to the common clock of the sub-controller 190, thereby providing operation in the pseudo-controller clock domain. For example, each active electrical element 30 can receive an expected command from the data stream, execute the command, and then transmit the executed command in the data stream, while also serially transmitting other commands expected for use by other LED pixels 194. The active electrical element 30 of each LED pixel 194 may also include a synchronization counter register 203 configured to count all commands (expected and transmitted) starting from the last frame end command. In some embodiments, the synchronization counter register 203 may include an incrementing counter that counts up to a set value and / or a decrementing counter that counts down to zero to generate a desired delay for the occurrence of other events. Other events may include the processing unit of the active electrical element 30 changing the state of one or more LED chips within the LED pixel 194, such as turning on, off, or providing a brightness level. A synchronization counter register 203 may be located within the active electrical element 30. In some embodiments, a common clock from the sub-controller 190 may send commands with the same pulse interval, e.g., the same number of commands per frame. In other embodiments, the sub-controller 190 may include additional commands in some frames. When this occurs, the sub-controller 190 may further provide compensation commands and / or conversion factors that allow each active electrical element 30 to compensate for frames of different sizes within the data stream. Thus, the active electrical element 30 can be configured to associate the common clock from the sub-controller 190 with periodic and non-periodic frames.

[0209] The processing unit within each active electrical element 30 can read the value provided by the synchronization counter register 203 according to a program to take action, or it can generate an interrupt signal that forces the processing unit to switch to a predetermined routine when a desired value is reached. For example, the interrupt signal can trigger the processing unit to proceed to an interrupt routine and then determine the next step or action, such as synchronously turning off all LED pixels 194. In some applications, each LED pixel 194 can be synchronized within one millisecond with other LED pixels 194 controlled by the same sub-controller 190 and other LED pixels controlled by other sub-controllers connected to the main controller 196 of the display. By synchronizing each LED pixel 194 with its corresponding sub-controller 190, the sub-controller 190 and any main controller 196 used by the sub-controller 190 can thus be configured to provide any synchronization effect to all LED pixels 194 within the display. In some embodiments, an overflow register can be provided in the synchronization counter register 203 to allow the processing unit to know when the output is invalid and a counter interrupt event has occurred, for example, when the sub-controller 190 sends more data than can be counted since the last counter reset. There are other ways for the processing unit to know that the counter interrupt event is the first occurrence and that no counter interrupt event is generated after the synchronous counter register 203 rolls over and returns to the same value, but the overflow register can be used to provide a more robust means of ensuring the validity of the counter.

[0210] Figure 53 It is based on the synchronization principle of this disclosure. Figure 52 The schematic processing flow 204 of the sub-controller 190. At startup 206, the sub-controller 190 can initialize the LED pixels associated with it by copying one or more of calibration, program, and setting parameters from memory and sending this information to the LED pixels. In some embodiments, the sub-controller 190 can initialize the LED pixels with position-specific counter start values ​​stored in registers within the active electrical component 30. In this way, each LED pixel can have a different counter start value based on its specific position in the LED string. After startup 206, the sub-controller 190 can then proceed to operating mode 208, where the sub-controller 190 sends a data stream comprising specific frames 210 of each LED string controlled by the sub-controller 190. Frames 210 of each LED string can include a serial arrangement of data including one or more input bits, bytes, commands, and / or any other data packets. A serial arrangement can be provided such that the commands and / or data for each individual LED pixel are arranged in a data packet order corresponding to the order of the LED pixels in the LED string. Figure 53In this context, this is represented as a Px1,1 command with a data packet, followed by a Px1,2 command with a data packet, and so on, corresponding to... Figure 52 The arrangement of LED pixels 194 in the LED string 192. In this way, the first LED pixel (Px1,1) can execute / receive the Px1,1 command / data packet from frame 210, and through the executed command / data packet and all other command / data packets for other LED pixels. Thus, frame 210 provides each LED pixel with a synchronization pulse corresponding to the common clock of sub-controller 190. Frame 210 may also include an end-of-frame (EOF) command or other predetermined commands, such as a specific command to reset the synchronization counter register 203, which signals the LED pixel to advance to the next frame. The EOF command can also be regarded as the start of a frame. For synchronization purposes, it may be better to interpret it as a command for resetting (e.g., clearing, loading, or preset) the synchronization counter register 203. In some embodiments, the EOF command may have a dual purpose, namely signaling the active electrical element 30 to execute the next unexecuted command and restarting the synchronization counter register 203.

[0211] Figure 54 It is connected to Figure 53 The exemplary process flow 212 is a schematic representation of the counter logic within the active electrical element 30 of each LED pixel of the sub-controller 190. (As described above...) Figure 53 As described above, the sub-controller 190 can initialize the LED pixels with position-specific counter start values ​​at startup 206. As described below, each position-specific counter start value is then used to evaluate each command / data pulse within each active electrical element 30 and determine the response time to be coordinated with other active electrical elements 30 in the LED string. Figure 54 As shown, in the first step 214 after startup 206, the EOF command received by the active electrical component 30 signals to proceed to the next frame. At this point, the EOF command signals the active electrical component 30 in response to another command. In the second step 216, a first value corresponding to the position-specific counter start value is provided to the synchronization counter register (e.g., Figure 52 (e.g., 203), for example, Figure 54 The decrementing counter is shown. As previously described, the active electrical element 30 is configured to generate a synchronization signal 218 for a mode pulse based on a mode within the data stream. In some embodiments, the synchronization signal 218 is generated in a serial interface 220 within the active electrical element 30. In the third step 222, the active electrical element 30 receives the synchronization signal 218, and the synchronization counter register (e.g., Figure 52(203) The countdown sequence begins from the counter's initial value. Once the synchronization counter register reaches zero in the fourth step 224, the active electrical element can send an interrupt signal in the fifth step 226. The interrupt signal can trigger the processing unit of the active electrical element 30 to begin an interrupt routine, which causes the LED chips within the LED pixel to take action, for example, turning on and / or off in a synchronized manner with other LED pixels in the display based on their respective countdown sequences. In some embodiments, the synchronization routine may require more than one interrupt signal, for example, turning off the LED in the first interrupt and turning it back on in a subsequent interrupt. In this way, the active electrical element 30 can then determine whether the previous interrupt signal in the fifth step 226 is the last event, as shown in the sixth step 228. If it is not the last event, the process repeats back to the second step 216, and the decrementing counter (synchronization counter register 203) begins to count down from a second specific counter starting value, which corresponds to the time when the active electrical element 30 should proceed to the fifth step 226 and send an interrupt signal for the second time. In various embodiments, the process can be repeated any number of times based on the number of position-specific counter start values ​​provided in startup 206. For example, in a 3D LED display application where the viewer wears 3D shutter glasses, a first interrupt signal can turn off all LEDs, and a second interrupt signal can turn all LEDs back on, effectively creating a fully off time frame within each frame of serial communication, allowing the LED shutter glasses to switch from one viewing state to another, e.g., from one eye to the other. When the interrupt signal is the last event, the process can return to the beginning of the first step 214. In such cases... Figure 54 At any time during any of the steps shown, the frame end signal 230 can return the process to the first step 214, regardless of whether the processing flow has ended. Figure 54 The processing flow 212 can operate in parallel with other processes previously described within the active electrical element 30, such as the execution of other programs run by the processing unit along with several other state machines of the active electrical element 30.

[0212] Figure 55 yes Figure 54An exemplary processing flow 240 of the processing unit 242 within the active electrical component 30 is shown. The processing unit 242 may include a central processing unit, a microprocessor, or even a state machine, which facilitates control logic for controlling the operational states of the LED chip having each LED pixel. Under normal operation, one or more main program routines 244 may be executed by the processing unit 242. The main program routines 244 may include initialization routines and run one or more main programs in an infinite loop, as described for any of the foregoing embodiments. Upon receiving an interrupt signal (e.g., ...), Figure 54 In step 226), processing unit 242 may exit main program routine 244 and initiate one or more interrupt service routines 246. Interrupt service routine 246 may include polling interrupt sources to determine the cause of the interrupt and selecting an appropriate response. For example, a first received interrupt signal may indicate that the LED should be turned off, while a next received interrupt signal may indicate that the LED should be turned back on. In processing flow 240, various types of interrupt responses are typically designated as #1-#4, indicating that more interrupt responses are possible beyond simply turning the LED on and off. Some other interrupt responses may include setting a value as a signal to main program routine 244. In practice, other interrupt responses may be programmable to suit specific applications. Once the expected interrupt response is determined and executed, the processing flow returns to main program routine 244 until the next interrupt signal is initiated. As disclosed herein, an interrupt signal may also be triggered if active electrical component 30 detects a communication error in the data stream or within the active electrical component. In some embodiments, the main processing unit controls the LED pixels using a PWM driver, as described in previous embodiments. For events as described above, where the LED turns off and on at different times relative to commands setting the frame color and intensity, it may be necessary to pause the PWM throughout the dark period, rather than turning off the LED while the PWM counter continues. In this way, the processing unit can be equipped with the ability not only to set the LED (e.g., RGB) intensity but also to pause the PWM count and resume it once the dark period ends, thus restarting the PWM signal at specific points in the PWM cycle and duty cycle where the PWM signal was paused.

[0213] In certain aspects of this disclosure, mitigation of LED pixel failures within an LED string can be provided by a controller or sub-controller configured with bidirectional communication ports for the LED string. Under normal operation, a first communication port can be configured to provide a data stream from the controller into a first end of the LED string, and a second bidirectional communication port can be configured to receive a data stream returning from the opposite end of the LED string. When an LED pixel within the LED string fails, the data stream may fail to return to the controller. In this case, the controller can modify the second bidirectional communication port to also provide a data stream from the controller into a second end of the LED string, ensuring that LED pixels on either side of the failed LED pixel can still receive data from the data stream. In some embodiments, the data stream provided by the second bidirectional communication port during an LED pixel failure can be reversed to compensate for the reversed order of the LED pixels.

[0214] Figure 56 This is a schematic block diagram 248 of a system-level control scheme for an LED display panel based on the fault mitigation principle of this disclosure. Schematic block diagram 248 is generally similar to... Figure 52 The schematic block diagram 182 includes fault mitigation capabilities as described below. To provide fault mitigation, LED string 192 is connected to sub-controller 190 via two bidirectional communication ports (DOUT / IN and DIN / OUT). Under normal operation, the sub-controller sends a data stream from the DOUT / IN port into the first end of LED string 192 at LED pixel Px1,1. The data stream then passes through LED string 192 and the second end of LED string 192 at LED pixel Pxm,1, and enters the DIN / OUT port of sub-controller 190. In certain fault modes, the faulty LED pixel (in...) Figure 56 LED pixel 194' (represented as 194') may no longer respond to the data stream and may not be able to transmit the data stream along the LED string 192, thus preventing downstream LED pixels 194 from receiving the data stream. The faulty LED pixel 194' may be caused by one or more of the following failure mechanisms: power failure, open circuit, electrical short circuit, and others. Figure 56When sub-controller 190 stops receiving return data streams at the DIN / OUT port, it can enter a fault-mitigation mode by reconfiguring the DIN / OUT port to provide data streams to LED strings 192 at the second end near LED pixel Pxm,1. In this way, data streams from the reverse DIN / OUT port can be provided in reverse from LED pixel Pxm,1 to LED pixels Px2,3. That is, in fault-mitigation mode, the data streams provided from the reverse DIN / OUT port can be arranged in reverse order with the data streams provided from the DOUT / IN port. Therefore, each operating LED pixel 194 can receive its intended portion of the data stream, and only the faulty LED pixel 194' will not operate. In some embodiments, all communication ports connected to sub-controller 190 for all LED strings can be bidirectional communication ports.

[0215] In some embodiments, this is useful for the sub-controller 190 to identify the location of a faulty LED pixel 194'. When fault mitigation mode is activated, the sub-controller 190 can be configured to send polling commands or communications from the DOUT / IN port along the LED string 192. As previously described, each LED pixel 194 in the LED string 192 can also be configured with a bidirectional communication port. During polling communication, each active LED pixel 194 (e.g., Px1,1) receives the polling communication, retransmits the polling communication to the next LED pixel 194 (e.g., Px1,2), and reverses the communication direction of the bidirectional port within the LED pixel 194 (e.g., Px1,1), then responds to the polling communication with a return polling communication, for example, a ping, pulse, or data returned to the sub-controller 190 in the opposite direction to the normal data flow. Because the bidirectional port of the first LED pixel (e.g., Px1,1) is reversed, pings or other return data from each downstream LED pixel (e.g., Px1,2 to Px2,1) can be retransmitted through the LED pixel (Px1,1) and returned to the sub-controller 190. The sub-controller 190 can count the received pings or data to determine how many LED pixels 194 were active before the first failure on the LED string 192. Other information can also be retrieved. In some embodiments, the LED pixel 194 receiving polling communication can responsively provide a skip command to bypass one or more LED pixels 194 in either direction of the data flow. When the polling process is complete, the bidirectional communication ports of the sub-controller 190 and the LED pixels 194 can be restored to their normal communication direction. Alternatively, the bidirectional communication ports can be set to an initial startup state, where both bidirectional communication ports are set to input, thereby allowing the communication direction to be redefined. The polling procedure can also be executed from the DIN / OUT port to determine whether it is a single LED pixel failure or multiple LED pixel failures. If multiple LED pixels fail, polling commands from each bidirectional communication port may only identify the first and last failed LED pixels in the LED string 192, thus providing no further information about the LED pixels 194 in between. In some embodiments, data line taps as described below may be arranged in one or more sections of the LED string 192 to further refine the location of the failed LED pixels in the presence of multiple failures.

[0216] Figure 57A top view layout of a portion of an embodiment of the LED display 250 is shown, wherein data line taps are arranged along one or more LED strings 192-1 to 192-3 of the LED display 250. For illustrative purposes, three LED strings 192-1 to 192-3 are drawn along the LED display 250, and corresponding communication ports (A to I) of the sub-controller 190 are shown on the right side of the LED display 250. For LED string 192-1, port A represents a data stream originating from the sub-controller 190, and port B represents a data stream received back to the sub-controller 190 after passing through LED string 192-1. Similarly, ports C and D correspond to LED string 192-2, and ports E and F correspond to LED string 192-3. Ports G, H, and I correspond to LED strings that can be connected to different LED strings (e.g., ...). Figure 57 The data line taps (tap 1 to tap 3) of LED strings 192-1 and 192-2 are shown. In some embodiments, the data line taps (tap 1 to tap 3) are connected between adjacent LED pixels 194, rather than connected to a specific LED pixel 194 as in normal DIN and DOUT communication ports (AF). As shown, LED string 192-1 is configured with two data line taps (tap 1 and tap 2), while LED string 192-2 is configured with a single data line tap (tap 3). In practice, any number of data line taps can be connected to any number of LED strings, including at least one data line tap for each LED string within the LED display 250. In other embodiments, only some LED strings of the LED display 250 may include data line taps, such as... Figure 57 As shown. During normal operation, the data line taps (tap 1 to tap 3) can be set to a high impedance value and are therefore typically off or unused. In the event of a fault in LED pixel 194 that triggers a fault mitigation procedure, one or more data line taps (tap 1 to tap 3) can be used to access LED pixel 194 across multiple faults and / or receive data from a portion of a functional LED string. For example, the fault mitigation procedure for LED string 192-2 can be executed on ports C and D as follows: Figure 56 The polling sequence is as described. If the polling data indicates that tap 1 (e.g., tap 3) is between two faults, then tap 3 is opened, and appropriate data is sent via tap 3 to the LED pixel 194 between the two faults. Figure 57As further illustrated, another fault mitigation method could be to design the layout of LED strings 192-1 to 192-3 on a board such as a PCB, such that the LED pixels 194 along the outer perimeter of the board are close to the ends of the LED strings. During handling and assembly, LED pixels 194 along the outer perimeter may be more susceptible to mechanical damage and failure. By arranging these LED pixels 194 toward the ends of the LED strings 192-1 to 192-3, under normal operation, the data flow can reach more operating LED pixels in each LED string 192-1 to 192-3 before reaching the faulty LED pixel 194. Furthermore, if the higher density of faulty LED pixels 194 is along the edges of the LED display 250 rather than in the middle, the impact on the overall appearance of the LED display 250 is less. In some embodiments, at least five, or at least ten, of one of LED strings 192-1 to 192-3, or the last series of LED pixels 194, ranging from 5 to 10, from 10 to 50, or from 10 to 100, are arranged along the outer periphery of the LED display 250. In other words, in practice, at least half of the LED pixels 194 of the LED display 250 arranged along the outer periphery of the LED display 250 may be located within the last 25% of their respective LED strings 192-1 to 192-3. Furthermore, most or even all of the data line taps (tap 1 to tap 3) may also be arranged along the outer periphery of the LED display 250 to provide easier connection to the LED strings 192-1 to 192-3.

[0217] In some embodiments, any of the foregoing aspects and / or the various individual aspects and features as described herein may be combined to obtain additional advantages. Any of the various features and elements disclosed herein may be combined with one or more other disclosed features and elements unless otherwise indicated herein.

[0218] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of this disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the subsequent claims.

Claims

1. A light-emitting diode (LED) package, comprising: At least one LED chip; as well as An active electrical component, electrically connected to the at least one LED chip, is configured to receive serial communication signals from a data stream and determine a synchronization signal associated with a loop pattern of data within the data stream. The active electrical component includes a counter configured to count the synchronization signal decrementing from a starting value corresponding to the location of the active electrical component. The active electrical component is configured to synchronize the operation of at least one LED chip when the count reaches a first predetermined value.

2. The light emitting diode (LED) package of claim 1, wherein, The active electrical component is configured to activate an event signal when the count reaches the first predetermined value.

3. The LED package according to claim 2, wherein, The first predetermined value is determined based on the location of the active electrical element, and the event signal initiated in the active electrical element is synchronized with other active elements arranged to receive the data stream.

4. The LED package according to claim 2, wherein, The event signal includes one or more of the following: turning on the at least one LED chip, turning off the at least one LED chip, and keeping the at least one LED chip in an operational state.

5. The LED package according to claim 4, wherein, The active electrical component is configured to activate a second event signal when the count reaches a second predetermined value.

6. The LED package according to claim 5, wherein, The second event signal includes one or more of the following: turning on the at least one LED chip, turning off the at least one LED chip, and keeping the at least one LED chip in an operational state.

7. The LED package according to claim 1, wherein, The output of the counter is provided to the processing unit of the active electrical component.

8. The LED package according to claim 7, wherein, The active electrical component includes an overflow register configured to provide an overflow bit to the processing unit.

9. The LED package according to claim 1, wherein, The counter is configured to reset when the active electrical component receives one or more predetermined commands in the data stream.

10. The LED package according to claim 9, wherein, The one or more predetermined commands include a frame end command.

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