Multi-scene flash memory data offset method and device, electronic equipment and medium

Abstract

The application discloses a multi-scene flash memory data offset method and device, electronic equipment and medium, wherein the multi-scene flash memory data offset method comprises the following steps: in a first scene, recording original data of a data block of a flash memory; in a second scene, performing offset setting on a data page of the data block to obtain offset data corresponding to the data page, wherein the second scene is obtained by scene adjustment on the first scene; comparing the original data with the offset data to obtain bit flip information; and filtering the bit flip information to obtain the best read voltage offset of the data page. In the embodiment of the application, the best read voltage offset of the data page can be accurately obtained in any scene.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, and in particular to a multi-scene flash memory data offset method and device, electronic equipment and medium. BACKGROUND

[0002] NAND Flash is a widely used storage chip today, with fast speed, non-volatility and other excellent characteristics. Its internal data is actually represented in the form of stored charge, however, due to the influence of internal and external conditions of the load during use, the number of stored electrons will change, and thus the correct data cannot be obtained with the default read voltage. Typical scenarios that cause changes in the charge of NAND Flash products include high and low temperature read-write scenarios, data retention scenarios, read interference scenarios, power failure scenarios, and the like. In order to cover these scenarios in actual product use, a large amount of testing is often required to obtain the read voltage offset corresponding to the scenario. The commonly used testing method today is usually to rely on the re-read list provided by the original factory. By doing experiments in different scenarios, the corresponding re-read item in the re-read list provided by the original factory is matched. The matched re-read item is marked as the best re-read item for the scenario. However, if the original factory re-read table does not cover a certain scenario, the best read voltage offset for the scenario cannot be obtained, and the read voltage offset matched from the original factory is only a relatively best read offset, not a globally best read offset, so the accurate read voltage offset cannot be obtained. SUMMARY

[0003] The embodiments of the present application provide a multi-scene flash memory data offset method, device, electronic equipment and medium, which can accurately obtain the best read voltage offset of the data page in any scenario.

[0004] In a first aspect, the embodiments of the present application provide a multi-scene flash memory data offset method, which comprises:

[0005] In a first scenario, the original data of the data block of the flash memory is recorded;

[0006] In a second scenario, the data page of the data block is set to offset to obtain offset data corresponding to the data page, wherein the second scenario is obtained by adjusting the first scenario;

[0007] The original data and the offset data are compared to obtain bit flip information;

[0008] The bit flip information is screened to obtain the best read voltage offset of the data page.

[0009] The multi-scene flash memory data offset method provided by the embodiment has at least the following beneficial effects: first, in the first scene, the original data of the data block of the flash memory is recorded, then the first scene is adjusted to obtain the second scene, in the second scene, the data page of the data block is offset set to obtain offset data corresponding to the data page, so that the offset data in a specific scene can be obtained in real time, and then the original data and the offset data are compared to obtain bit flip information, so that the offset data of the data page is obtained by comparing the original data, which is convenient for subsequent determination of the optimal offset voltage in the current scene, finally, the bit flip information is screened to obtain the optimal read voltage offset of the data page, so that the optimal read voltage offset of the data page in the current scene is accurately obtained without relying on the re-reading table provided by the original factory, and the original data and the offset data are compared directly.

[0010] In some embodiments, the offset setting of the data page of the data block includes:

[0011] Obtaining the data page type of the data page;

[0012] Determining a read voltage set of the data page according to the data page type, wherein the read voltage set includes at least one read voltage;

[0013] According to the preset offset direction, the read voltage in the read voltage set is voltage offset to obtain the offset data, and the real-time acquisition of the offset data is realized.

[0014] In some embodiments, before the original data and the offset data are compared to obtain the bit flip information, the method further includes:

[0015] Determining that the read voltage set includes one read voltage.

[0016] In some embodiments, the comparison of the original data and the offset data to obtain the bit flip information includes:

[0017] Comparing the original data and the offset data to obtain the number of bit flips corresponding to the offset data;

[0018] Counting the number of bit flips to obtain the bit flip information, which is convenient for subsequent determination of the optimal read voltage offset in the current scene.

[0019] In some embodiments, before the bit flip information is screened to obtain the optimal read voltage offset of the data page, the method further includes:

[0020] Recording the number of times of offset of the read voltage to obtain the number of times of voltage offset;

[0021] The number of voltage offsets is compared with a preset offset condition to obtain a comparison result;

[0022] The comparison result is determined to be that the number of voltage offsets satisfies the offset condition, so that the read voltage offset of the data page is accurately obtained.

[0023] In some embodiments, the filtering of the bit flip information to obtain the optimal read voltage offset of the data page comprises:

[0024] The number of bit flips in the bit flip information is compared to determine a target number of bit flips;

[0025] The offset data corresponding to the target number of bit flips is determined, and the offset data is recorded as the optimal read voltage offset of the data page, so that the optimal read voltage offset of each data page can be quickly and accurately obtained.

[0026] In some embodiments, it further comprises:

[0027] In the case where the set of read voltages includes at least two read voltages, a first read voltage is selected from the set of read voltages, and the offset amounts of the remaining read voltages are fixed to obtain a subset of read voltages;

[0028] The first read voltage is adjusted to move according to a preset offset direction to obtain first offset data;

[0029] The first offset data is compared with the original data to obtain first bit flip information;

[0030] The first bit flip information is compared with a preset offset condition;

[0031] When the first bit flip information satisfies the offset condition, a first read voltage offset is determined according to the first bit flip information;

[0032] The offset amount of the first read voltage is fixed as the first read voltage offset, and the fixed first read voltage is stored in the subset of read voltages;

[0033] A second read voltage in the subset of read voltages is read, and the second read voltage is set to offset to obtain second offset data, until all read voltages in the set of read voltages are traversed;

[0034] The read voltage offset of each read voltage in the set of read voltages is read, and the optimal read voltage offset of the data page is obtained according to the read voltage offset, so that a large amount of data analysis is completed through an automated program.

[0035] In a second aspect, the embodiment of the present application further provides a multi-scenario flash data offset device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the computer program to realize the multi-scenario flash data offset method in the first aspect.

[0036] In a third aspect, the embodiment of the present application further provides a solid state disk, which is provided with the multi-scenario flash data offset device in the second aspect.

[0037] In a fourth aspect, the embodiment of the present application further provides a computer readable storage medium, which stores computer executable instructions for making a computer execute the multi-scenario flash data offset method in the first aspect.

[0038] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or can be learned by practice of the present application. The objects and other advantages of the present application will be realized and attained by the structure particularly pointed out in the written description and claims thereof. BRIEF DESCRIPTION OF DRAWINGS

[0039] The accompanying drawings are included to provide a further understanding of the technical solutions of the present application, and constitute a part of the specification, and are used to explain the technical solutions of the present application together with the examples of the present application, and do not constitute a limitation on the technical solutions of the present application.

[0040] Figure 1 is the overall flowchart of the multi-scenario flash data offset method provided by the embodiment of the present application;

[0041] Figure 2 is the specific method flowchart of step S102 in Figure 1

[0042] Figure 3 is the specific method flowchart of step S103 in Figure 1

[0043] Figure 4 is the overall flowchart of the multi-scenario flash data offset method provided by another embodiment of the present application;

[0044] Figure 5 is the specific method flowchart of step S104 in Figure 1

[0045] Figure 6 is the overall flowchart of the multi-scenario flash data offset method provided by another embodiment of the present application;

[0046] Figure 7 ​​​is a schematic diagram of a flash memory data offset method provided by one specific example of the present application.

[0047] Figure 8 is a structural schematic diagram of a multi-scenario flash memory data offset device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0049] The embodiment of the present application provides a multi-scenario flash memory data offset method, device, electronic equipment and medium. First, in a first scenario, the original data of the data block of the flash memory is recorded, then the first scenario is adjusted to obtain a second scenario, in the second scenario, the data page of the data block is set to obtain offset data, so that the offset data in a specific scenario can be obtained in real time, and then the original data and the offset data are compared to obtain bit flip information, so that the offset data of the data page is obtained by comparing the original data, which is convenient for subsequent determination of the best offset voltage in the current scenario. Finally, the bit flip information is screened to obtain the best read voltage offset of the data page, so that the best read voltage offset of the data page in the current scenario is accurately obtained without relying on the re-reading table provided by the original factory.

[0050] The embodiments of the present application are further described below in combination with the drawings.

[0051] Reference Figure 1 The embodiment of the present application provides a multi-scenario flash memory data offset method, which includes but is not limited to the following steps S101 to S104.

[0052] Step S101, in a first scenario, recording original data of a data block of a flash memory;

[0053] In some embodiments, in the first scenario, the original data of the data block of the flash memory is recorded, which is convenient for subsequent comparison with offset data.

[0054] It should be noted that in the first scenario, the data block of the flash memory needs to be erased and written first, and then the original data of the data block of the flash memory is recorded.

[0055] Step S102, in a second scenario, offset setting is performed on a data page of a data block to obtain offset data corresponding to the data page;

[0056] It should be noted that the second scenario is obtained by adjusting the first scenario.

[0057] In some embodiments, in the second scenario, the data page of the data block is offset to obtain offset data corresponding to the data page, so as to facilitate subsequent obtaining of the optimal read voltage offset.

[0058] It should be noted that the first scenario and the second scenario in the embodiment can be invalidation scenarios for invalidating flash data, for example, high-low temperature read-write scenarios, data retention scenarios, and the like. In the embodiment, the first scenario is a high-temperature read-write scenario, and the second scenario is a low-temperature read-write scenario. The temperature of the high-temperature read-write scenario is 85 degrees Celsius, and the temperature of the low-temperature read-write scenario is -25 degrees Celsius. The specific scenario setting and scenario parameters are not specifically limited in the embodiment.

[0059] In step S103, the original data is compared with the offset data to obtain bit flip information.

[0060] In some embodiments, the recorded original data is compared with the offset data respectively, and the bit flip information is obtained by statistics, so that the bit flip information of the data page can be compared in any scenario, and the optimal read voltage offset of the data page is facilitated to be determined subsequently.

[0061] In step S104, the bit flip information is screened to obtain the optimal read voltage offset of the data page.

[0062] In some embodiments, the bit flip information is screened, the minimum value in the bit flip information is selected as the optimal read voltage offset of the data page in the current scenario, and the global optimal read voltage offset is obtained, so that the optimal read voltage offset of each data page can be quickly and accurately obtained.

[0063] Reference Figure 2 In some embodiments, step S102 can include but is not limited to steps S201 to S203.

[0064] In step S201, the data page type of the data page is obtained.

[0065] In step S202, the read voltage set of the data page is determined according to the data page type.

[0066] It should be noted that the read voltage set includes at least one read voltage.

[0067] In step S203, the read voltage in the read voltage set is voltage offset according to a preset offset direction to obtain offset data.

[0068] In steps S201 to S203 in some embodiments, in the process of obtaining the offset data, the data page type of the data page needs to be acquired first, then the read voltage set of different types of data pages is determined according to the data page type, finally, the read voltage in the read voltage set is voltage offset according to the preset offset direction, and the offset data is obtained, realizing real-time acquisition of the offset data.

[0069] It should be noted that the number of read voltages in the read voltage set corresponds to the data page type, for example, when the data page is of the LSB (Least Significant Bit, Least Significant Bit) type, the read voltage set includes one read voltage; when the data page is of the MSB (Most Significant Bit, Most Significant Bit) type, the read voltage set includes two read voltages; when the data page is of the CSB (Central Significant Bit, Central Significant Bit) type, the read voltage set includes three read voltages, and the embodiment does not make specific limitation.

[0070] It can be understood that the method of adjusting the left and right offset of the read voltage is provided by the original factory, generally, the read voltage is allowed to be offset by 255 units from the default position to the left and right, so the preset offset direction in the embodiment is from left to right.

[0071] In some embodiments, before comparing the original data with the offset data to obtain the bit flip information, it further includes: determining that the read voltage set includes one read voltage.

[0072] Reference Figure 3 In some embodiments, step S103 can include but is not limited to steps S301 to S302:

[0073] Step S301, comparing the original data with the offset data to obtain the bit flip number corresponding to the offset data;

[0074] Step S302, counting the bit flip number to obtain the bit flip information.

[0075] In steps S301 to S302 of some embodiments, in the process of obtaining the bit flip information, the original data is compared with the bit flip number of the offset data respectively, the bit flip number corresponding to the bit number of the offset data is obtained, then the bit flip number is counted to obtain a plurality of bit flip information, which is convenient for subsequent determination of the best read voltage offset in the current scenario.

[0076] It should be noted that, for example, in a high temperature (85°) scenario, a SLC (Single-Level Cell, single-layer cell flash memory) data block is written, the original data recorded is data_original, then in a low temperature (-25°) scenario, the offset of the SLC page (data page) is set, the read voltage offset of the SLC page (data page) is set to v1, v2, v3, …… v255 respectively, and the offset data of the SLC page is read. These offset data are respectively named: data_offset1, data_offset2, data_offset3, ……, data_offset_255; Then the original data data_original written is compared with data_offset1, data_offset2, data_offset3, data_offset255 respectively. The number of bit flips is counted to obtain bit flip information, and the bit flip information is recorded as: bit_cnt1, bit_cnt2, bit_cnt3, ……, bit_cnt255 respectively, so as to facilitate subsequent obtaining of the best read voltage offset under the current scenario.

[0077] Referring to Figure 4 , Figure 4 The multi-scene flash memory data offset method provided by another embodiment of the present application includes but is not limited to the following steps S401 to S403.

[0078] It should be noted that the steps S401 to S403 occur before the bit flip information is screened and the best read voltage offset of the data page is determined.

[0079] Step S401, record the number of read voltage offsets to obtain the voltage offset number;

[0080] Step S402, compare the voltage offset number with the preset offset condition to obtain a comparison result;

[0081] Step S403, determine that the comparison result is that the voltage offset number meets the offset condition.

[0082] In some embodiments of steps S401 to S403, before the bit flip information is screened, the number of read voltage offsets is also recorded to obtain the current voltage offset number, then the voltage offset number and the preset offset condition are compared to determine whether the voltage offset number meets the preset offset condition, a comparison result is obtained, and in the case where it is determined that the comparison result is that the voltage offset number meets the offset condition, the bit flip information is screened, so that the read voltage offset of the data page is accurately obtained.

[0083] It should be noted that when it is determined that the comparison result is that the number of voltage shifts does not satisfy the shift condition, the read voltage needs to be shifted according to the preset shift direction, and the number of voltage shifts needs to be updated until the number of voltage shifts satisfies the preset shift condition.

[0084] It can be understood that the shift condition can be one or more combinations of the number of shifts, the shift direction, and the shift threshold voltage, wherein the read voltage is allowed to be shifted 255 units to the left and right from the default position, and the shifts from the leftmost to the rightmost are referred to as v1, v2, v3, …, v255, respectively. Therefore, the number of shifts in the preset shift condition in the embodiment is less than or equal to 255.

[0085] Referring to Figure 5 In some embodiments, step S104 can include but is not limited to steps S501 to S502:

[0086] Step S501, comparing the number of bit flips in the bit flip information to determine the target number of bit flips;

[0087] Step S502, determining the shift data corresponding to the target number of bit flips, and recording the shift data as the best read voltage shift of the data page.

[0088] In steps S501 to S502 of some embodiments, the number of bit flips in the bit flip information is compared, the minimum value in the bit flip information is selected as the target number of bit flips, and then the shift data corresponding to the target number of bit flips is determined. The shift data is recorded as the best read voltage shift of the data page, that is, the best read voltage shift under the current scenario, so that the best read voltage shift of each data page can be quickly and accurately obtained.

[0089] Referring to Figure 6 , Figure 6 The multi-scene flash memory data shift method provided by another embodiment of the present application includes but is not limited to steps S601 to S608.

[0090] Step S601, in the case where the read voltage set includes at least two read voltages, selecting a first read voltage from the read voltage set, and fixing the shift amount of the remaining read voltages to obtain a read voltage subset;

[0091] Step S602, adjusting the first read voltage to move according to the preset shift direction to obtain first shift data;

[0092] Step S603, comparing the first shift data with the original data to obtain first bit flip information;

[0093] Step S604, compare the first bit flipping information with a preset offset condition;

[0094] Step S605, when the first bit flipping information meets the offset condition, determine the first read voltage offset according to the first bit flipping information;

[0095] Step S606, fix the offset of the first read voltage as the first read voltage offset, and store the fixed first read voltage to the read voltage subset;

[0096] Step S607, read the second read voltage in the read voltage subset, and set the offset of the second read voltage to obtain the second offset data, until all read voltages in the read voltage set are traversed;

[0097] Step S608, read the read voltage offset of each read voltage in the read voltage set, and obtain the best read voltage offset of the data page according to the read voltage offset.

[0098] In steps S601 to S608 of some embodiments, when it is determined that the read voltage set includes at least two read voltages, first, the first read voltage is selected from the read voltage set, the offset of the other remaining read voltages is fixed, and the remaining read voltages are stored in a subset to obtain a read voltage subset, then the first read voltage is adjusted according to the preset offset direction to obtain the first offset data, the first offset data is compared with the original data to obtain the first bit flipping information of the first read voltage, wherein the first bit flipping information includes the voltage offset number of the first read voltage and the bit flipping number, the voltage offset number of the first read voltage is compared with the preset offset condition, when the first bit flipping information meets the preset offset condition, the bit flipping number in the first bit flipping information is compared, and the minimum bit flipping number is selected as the first read voltage offset, the offset of the first read voltage is set as the first voltage offset, the offset of the first read voltage is fixed, and the fixed first read voltage is stored in the read voltage subset, when the offset of the first read voltage is fixed, the second read voltage in the read voltage subset is read, and the offset of the second read voltage is set, finally, steps S602 to S606 are repeated until all read voltages in the read voltage set are traversed, the voltage offset of all read voltages in the read voltage set is completed, the read voltage offset of each read voltage in the read voltage set is read, and the best read voltage offset of the data page is obtained according to the read voltage offset, so that a large amount of data analysis is completed through an automatic program.

[0099] It can be understood that if the read voltage set includes two read voltages, the optimal read voltage offset of the data page can be obtained by the following operations, wherein the two read voltages are named as level_a and level_b respectively, the offset of level_a is fixed, that is, the offset of level_a is set to 0, and then level_b is shifted from left to right to obtain first offset data, the first offset data is compared with the original data written to obtain first bit flip information, in the case that the first bit flip information meets the preset offset condition, the first bit flip information is screened to obtain the minimum bit flip offset level_b_x;

[0100] Then, the offset of level_b is fixed, level_b is set to level_b_x, and then level_a is shifted from left to right to obtain second offset data, the second offset data is compared with the original data written to obtain second bit flip information, in the case that the second bit flip information meets the preset offset condition, the second bit flip information is screened to obtain the minimum bit flip offset level_a_y.

[0101] The level_a_y and level_b_x obtained by the above operations are the optimal read voltage offset of the data page in the corresponding scene.

[0102] It should be noted that if the read voltage set includes three read voltages, the offsets of two read voltages are first fixed, and the offset of the other read voltage is shifted and compared to obtain the optimal read voltage of the read voltage, and then the offset of the read voltage whose optimal read voltage has been obtained is fixed, and the remaining two read voltages are processed in turn, so as to complete the offset of all read voltages and obtain the optimal read voltage offset of the data page. The read voltage scanning method and the data comparison method of the embodiment are relatively easy to realize by software, so that the optimal read voltage offset of a single page can be accurately obtained. When the optimal read voltage offset of a block or even a chip needs to be processed, the same operation is performed on each page, a large amount of data analysis is completed by an automatic program, and the use scene is not limited.

[0103] In order to more clearly illustrate the flow of the flash memory data offset method in multiple scenes, the following specific examples are used for illustration.

[0104] Example one:

[0105] Reference Figure 7 , Figure 7 The schematic diagram of the flash memory data offset method provided by one specific example of the application;

[0106] Step one: erase and write an SLC block, and record the original data written;

[0107] Step two: determine a set of read voltages corresponding to the data page, and adjust one read voltage in the set of corrected read voltages;

[0108] Step three: adjust the read voltage to shift from left to right to obtain offset data;

[0109] Step four: compare the offset data with the original data, record the number of bit flips and the number of voltage shifts;

[0110] Step five: determine whether the number of voltage shifts reaches 255 times;

[0111] Step six: if yes, determine the minimum number of flipped bits in the number of bit flips, and record the offset corresponding to the minimum number of flipped bits as the best read voltage offset of the current read voltage;

[0112] Step seven: if no, continue to adjust the read voltage to shift from left to right to obtain offset data;

[0113] Step eight: determine whether all read voltages in the set of read voltages have been traversed;

[0114] Step nine: if no, continue to adjust other read voltages in the set of corrected read voltages;

[0115] Step ten: if yes, determine the best read voltage offset of the data page according to all the best read voltage offsets.

[0116] In some embodiments, the present embodiment can quickly, accurately and automatically obtain the best read voltage offset of each flash memory page in any scenario, without being limited by the re-reading table provided by the original factory.

[0117] Please refer to Figure 8 , Figure 8 The multi-scene flash memory data offset device of another embodiment is illustrated, which comprises:

[0118] The processor 801 can be implemented in the form of a general-purpose CPU (Central Processing Unit), a microprocessor, an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits, etc., and is used to execute related programs to implement the technical solutions provided by the embodiments of the present application;

[0119] The memory 802 can be implemented in the form of read only memory (ROM), static storage device, dynamic storage device or random access memory (RAM), etc. The memory 802 can store an operating system and other application programs, and when the technical solutions provided by the embodiments of the present specification are implemented by software or firmware, the related program codes are stored in the memory 802 and are called and executed by the processor 801 to implement the multi-scene flash data offset method of the present application;

[0120] The input / output interface 803 is configured to realize information input and output.

[0121] The communication interface 804 is configured to realize the communication interaction between the device and other devices, and can realize the communication through a wired manner (for example, USB, network cable, etc.) or a wireless manner (for example, mobile network, WIFI, Bluetooth, etc.).

[0122] The bus 805 is configured to transmit information between various components (for example, the processor 801, the memory 802, the input / output interface 803 and the communication interface 804) of the device.

[0123] The processor 801, the memory 802, the input / output interface 803 and the communication interface 804 are connected to each other through the bus 805 to realize the communication connection between the device.

[0124] The present application also provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement the multi-scene flash data offset method.

[0125] The memory is a non-transitory computer readable storage medium, which can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device or other non-transitory solid-state memory device. In some embodiments, the memory can optionally include a memory remotely arranged relative to the processor, and these remote memories can be connected to the processor through a network. Examples of the above network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network and a combination thereof.

[0126] The present application also provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are executed by one or more control processors, for example, are executed by the processor 801. Figure 8The one processor 801 in the processor 800 executes, which can cause the one or more control processors to execute the multi-scenario flash data offset method in the method embodiments.

[0127] The apparatus embodiments described above are merely illustrative, wherein the units described as separate components can or can not be physically separate, i.e., can be located in one place, or can be distributed on multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiments.

[0128] Those skilled in the art can understand that all or some steps in the above disclosed method and system can be implemented as software, firmware, hardware and appropriate combination thereof. Some or all physical components can be implemented as software executed by a processor, such as a central processing unit, a digital signal processor or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software can be distributed on a computer readable medium, which can include computer storage media (or non-transitory media) and communication media (or transitory media). As known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, as known to those skilled in the art, communication media typically includes computer readable instructions, data structures, program modules or other data in modulated data signals such as carrier waves or other transport mechanisms, and can include any information delivery medium.

[0129] The above is a specific description of the preferred embodiments of the present application, but the present application is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the present application, and these equivalent modifications or replacements are all included in the scope defined by the present application.

Claims

1. A flash memory data offset method for multiple scenarios, characterized in that, include: In the first scenario, the raw data of the data block in the flash memory is recorded; In the second scenario, the data pages of the data block are offset to obtain offset data corresponding to the data pages. The second scenario is obtained by adjusting the first scenario. The original data is compared with the offset data to obtain bit flip information; The number of times the reading voltage is offset using the offset setting is recorded to obtain the voltage offset count; The voltage offset count is compared with a preset offset condition; the offset condition is to traverse 256 voltage reading offsets from left to right. When the comparison result shows that the number of voltage offsets meets the offset condition, the number of bit flips in all the obtained bit flip information is compared, and the minimum number of bit flips is selected as the target number of bit flips. Determine the offset data corresponding to the target bit flip number, and record the offset data as the optimal read voltage offset of the data page.

2. The flash memory data offset method for multiple scenarios according to claim 1, characterized in that, The step of setting the offset of the data page of the data block to obtain the offset data corresponding to the data page includes: Obtain the data page type of the data page; The set of read voltages for the data page is determined according to the data page type, wherein the set of read voltages includes at least one read voltage; The voltages in the set of read voltages are offset according to a preset offset direction to obtain the offset data.

3. The flash memory data offset method for multiple scenarios according to claim 2, characterized in that, Before comparing the original data with the offset data to obtain the bit flip information, the method further includes: The set of read voltages is determined to include a read voltage.

4. The flash memory data offset method for multiple scenarios according to claim 1, characterized in that, The step of comparing the original data with the offset data to obtain bit flip information includes: The original data is compared with the offset data to obtain the number of bit flips corresponding to the offset data; The number of bit flips is counted to obtain the bit flip information.

5. The flash memory data offset method for multiple scenarios according to claim 2, characterized in that, Also includes: When the set of read voltages includes at least two read voltages, a first read voltage is selected from the set of read voltages, and the offset of the remaining read voltages is fixed to obtain a subset of read voltages; The first reading voltage is moved according to the preset offset direction to obtain the first offset data; The first offset data is compared with the original data to obtain the first bit flip information; The first bit flip information is compared with the preset offset condition; When the first bit flip information satisfies the offset condition, the first read voltage offset is determined based on the first bit flip information. The offset of the first read voltage is fixed to the first read voltage offset, and the fixed first read voltage is stored in the read voltage subset; Read the second read voltage from the subset of read voltages, and set an offset for the second read voltage to obtain the second offset data, until all read voltages in the set of read voltages are traversed; Read the read voltage offset of each read voltage in the read voltage set, and obtain the optimal read voltage offset of the data page based on the read voltage offset.

6. A multi-scenario flash memory data offset device, characterized in that, include: A memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor, when executing the computer program, implements the multi-scenario flash memory data offset method as described in any one of claims 1 to 5.

7. A solid-state drive, characterized in that, The device is equipped with a multi-scenario flash memory data offsetting device as described in claim 6.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for performing the multi-scenario flash memory data offset method according to any one of claims 1 to 5.

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