Display panel, display device and terminal device

By designing multi-layer lead layer and external compensation methods in the display panel, the color shift problem in the under-screen camera area is solved, and better display effect and screen-to-body ratio are achieved.

CN115943755BActive Publication Date: 2025-07-25BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202180001135.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-05-13
Publication Date
2025-07-25
Estimated Expiration
2041-05-13

AI Technical Summary

Technical Problem

The display panel in the existing under-screen camera area is prone to color shift when displaying images, especially green, which affects the display effect.

Method used

By designing multi-layer lead layers on the drive backplane and adapter layer, ensure that the lengths of the leads are consistent or different in a specified length, and adjust the drive signal through external compensation to reduce the impact of parasitic capacitance and improve the delay in the turn-on time.

Benefits of technology

It effectively reduces the color shift phenomenon, ensures the consistency of the display effect of the under-screen camera area, and improves the screen-to-body ratio.

✦ Generated by Eureka AI based on patent content.

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    Figure CN115943755B_ABST
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Abstract

A display panel, a display device (1000) and a terminal device. The display panel includes a driving backplane (1), a transfer layer (2) and a light-emitting layer (3). The driving backplane (1) has a light-transmitting area (101) and a driving area (102). The pixel circuit (10) in the driving area (102) includes a first pixel circuit (110) and a second pixel circuit (120); the driving backplane (1) has a first transfer hole (100), and the pixel circuit (10) is connected to the first transfer hole (100); the transfer layer (2) includes multiple lead layers (21), and the transfer area (210) of the transfer layer (2) includes two transfer sub-areas (2110); the second transfer hole (201) in the transfer sub-area (2110) is connected to the first transfer hole (100) through a lead (211); the light-emitting device (30) of the light-emitting layer (3) includes a first light-emitting device (301) connected to the second transfer hole (201) and a second light-emitting device (302) connected to the first transfer hole (100); the first transfer hole (100) and the second transfer hole (201) are arranged in multiple hole rows (001) distributed along the column direction; the first transfer hole (100) and the second connection hole (201) connected by the same lead (211) are located in the same hole row (001) and form a hole group (002); the first transfer hole (100) and the second transfer hole (201) of a hole group (002) among two adjacent hole groups (002) are located between the first transfer hole (100) and the second transfer hole (201) of the other hole group (002).
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel, a display device and a terminal equipment. Background Art

[0002] For the screens of electronic devices with cameras, such as mobile phones and tablets, the area of the screen corresponding to the camera usually needs to have a hole, so that it cannot emit light, which is not conducive to increasing the screen-to-body ratio. At present, although there is an under-screen camera technology that allows the area where the camera is located to display images, avoids the need for holes, and can shoot normally, the area of the screen corresponding to the camera is prone to color cast when displaying images, especially green cast, which affects the display effect.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field.

[0004] Disclosed content

[0005] The purpose of the present disclosure is to provide a display panel, a display device and a terminal equipment.

[0006] According to one aspect of the present disclosure, there is provided a display panel, comprising:

[0007] A driving backplane, comprising a light-transmitting area and a driving area at least partially surrounding the light-transmitting area, wherein the driving area comprises a plurality of pixel circuits, wherein the pixel circuits comprise a first pixel circuit and a second pixel circuit; the driving backplane comprises a plurality of first transfer holes, and any of the pixel circuits is connected to one of the first transfer holes;

[0008] A transfer layer is provided on one side of the driving backplane and covers the light-transmitting area and the driving area; the transfer layer includes multiple mutually spaced lead layers, each of which includes multiple mutually spaced lead wires; the transfer layer has a transfer area corresponding to the light-transmitting area and a routing area corresponding to the driving area, the transfer area includes two transfer partitions separated on both sides of a first central axis; the first central axis is the central axis of the transfer area extending along the column direction; each of the transfer partitions has multiple second transfer holes, and any of the second transfer holes is connected to one of the first transfer holes through one of the lead wires;

[0009] A light-emitting layer is provided on a side of the transfer layer away from the driving backplane, and includes a plurality of light-emitting devices, wherein the light-emitting devices include a plurality of first light-emitting devices located in each of the transfer subareas and a plurality of second light-emitting devices located in the routing area; any of the first light-emitting devices is connected to one of the second transfer holes, and any of the second light-emitting devices is connected to one of the first transfer holes;

[0010] The first via holes and the second via holes are arranged in a plurality of hole rows distributed along the column direction, and each of the second via holes is located in some of the hole rows; the first via holes and the second connection holes connected by the same lead are located in the same hole row and form a hole group; in two adjacent hole groups, the first via holes and the second via holes of one hole group are located between the first via holes and the second via holes of the other hole group;

[0011] The length of any lead in the row direction is the same as or differs from the distance between the first via hole and the second via hole it connects by a specified length.

[0012] In an exemplary embodiment of the present disclosure, there are N hole rows, and each of the second via holes is located in each of the i-th to j-th hole rows; N, i, and j are all positive integers, and 1 ≤ i < j ≤ N;

[0013] In any two adjacent ones of the i-th to j-th hole rows, the leads connected to at least some of the second via holes in one hole row are located between the two adjacent hole rows.

[0014] In an exemplary embodiment of the present disclosure, the leads connected to the second via holes in the k-th hole row are located between the (k - 1)-th and k-th hole rows; k is a positive integer, and i < k ≤ j;

[0015] The leads connected to the second via holes in the i-th hole row are located on the side of the i-th hole row away from the j-th hole row.

[0016] In an exemplary embodiment of the present disclosure, in at least one of the i-th to j-th hole rows, at least a partial region of the leads connected to at least some of the second via holes is located on the side of the i-th hole row away from the j-th hole row.

[0017] In an exemplary embodiment of the present disclosure, the routing area includes a main area and a peripheral area, at least a part of the main area surrounds the outside of the transfer area, and the peripheral area surrounds the outside of the main area and the transfer area; at least a part of the first pixel circuit is distributed in the area of the driving backplane corresponding to the main area;

[0018] In the i-th hole row, at least a partial region of the leads connected to at least some of the second via holes is located in the peripheral area.

[0019] In an exemplary embodiment of the present disclosure, in at least one of the i-th to j-th hole rows, at least a partial region of the leads connected to at least some of the second via holes is located on the side of the j-th hole row away from the i-th hole row.

[0020] In an exemplary embodiment of the present disclosure, the transfer partition includes a plurality of sub - partitions distributed along the row direction, and each of the sub - partitions is provided with the second transfer hole;

[0021] The leads connected to the second transfer holes within the same sub - partition are located in the same lead layer.

[0022] In an exemplary embodiment of the present disclosure, among the multiple lead layers, at least include a first lead layer, a second lead layer, and a third lead layer that are sequentially distributed from the driving backplane to the light - emitting layer; the leads of the first lead layer include first leads, the leads of the second lead layer include second leads, and the leads of the third lead layer include third leads;

[0023] The sub - partitions of the same transfer partition include a first sub - partition, a second sub - partition, and a third sub - partition that are sequentially distributed along the row direction towards the first central axis. The leads connected to the second transfer holes within the first sub - partition are the first leads, the leads connected to the second transfer holes within the second sub - partition are the second leads, and the leads connected to the second transfer holes within the third sub - partition are the third leads.

[0024] In an exemplary embodiment of the present disclosure, if i < k ≤ j;

[0025] The first leads, second leads, and third leads connecting the second transfer holes of the k - th hole row are located between the (k - 1)-th and k - th hole rows;

[0026] The first leads, second leads, and third leads connecting the second transfer holes in the i - th hole row are located on the side of the i - th hole row away from the j - th hole row.

[0027] In an exemplary embodiment of the present disclosure, the leads of the first lead layer further include fourth leads;

[0028] The sub - partitions of the same transfer partition include a fourth sub - partition located between the third sub - partition and the first central axis; the leads connected to the second transfer holes within the fourth sub - partition are the fourth leads;

[0029] At least part of at least some regions of the fourth leads are located on the side of the i - th hole row away from the j - th hole row;

[0030] At least part of at least some regions of the fourth leads are located on the side of the j - th hole row away from the i - th hole row.

[0031] In an exemplary embodiment of the present disclosure, the fourth sub-area includes a first sub-area and a second sub-area separated on both sides of a second central axis, the second central axis is the central axis of the transfer area extending along the row direction; part of the second transfer holes of the i-th to k-th hole rows are located in the first sub-area, and part of the second transfer holes of the k+1-th to j-th hole rows are located in the second sub-area; k+1≤j;

[0032] At least a portion of the fourth lead connected to the second transfer hole of the first sub-divided area is located on a side of the i-th hole row away from the j-th hole row;

[0033] At least a portion of the fourth lead connected to the second transfer hole of the second sub-region is located on a side of the j-th hole row away from the ith hole row.

[0034] In an exemplary embodiment of the present disclosure, the lead line includes two lead sections and an extension section connecting the two lead sections; the lead section extends along the column direction, and the extension section extends along the row direction;

[0035] The length of the extension section of any one of the first lead, the second lead and the third lead is the same as the interval between the first transfer hole and the second transfer hole connected thereto.

[0036] In an exemplary embodiment of the present disclosure, if i<k<j;

[0037] The lead-out section of the fourth lead wire connected to the kth row of holes includes a first section, a second section and a third section distributed along the column direction, one end of the first section is connected to the second transfer hole, the other end is connected to one end of the second section, the other end of the second section is connected to one end of the third section, and the other end of the third section is connected to one end of the extension section;

[0038] The first section and the third section extend in a straight line along the column direction, and the third section is located on a side of the second adapter hole connected to the first section that is away from or close to the first central axis;

[0039] The length of the extension section of the fourth lead connecting the kth row of holes differs from the spacing between the first transfer hole and the second transfer hole connected thereto by a specified length.

[0040] In an exemplary embodiment of the present disclosure, the length of the extension section of the fourth lead connecting the i-th and j-th hole rows is the same as the spacing between the first transfer hole and the second transfer hole connected thereto.

[0041] In an exemplary embodiment of the present disclosure, a fourth lead connecting the second transfer hole in the first sub-division and a fourth lead connecting the second transfer hole in the second sub-division are symmetrically arranged about the second central axis.

[0042] In an exemplary embodiment of the present disclosure, the leads of the second transfer holes connecting the two transfer partitions are symmetrically arranged with respect to the first central axis.

[0043] In an exemplary embodiment of the present disclosure, the light-emitting device includes:

[0044] A first electrode disposed on the surface of the transfer layer facing away from the driving backplane; the first electrode has an electrode portion and a wiring portion located outside the edge of the electrode portion; the wiring portion is connected to one of the leads through one of the second transfer holes;

[0045] A light-emitting functional layer disposed on the surface of the first electrode facing away from the driving backplane;

[0046] A second electrode disposed on the surface of the light-emitting functional layer facing away from the driving backplane.

[0047] According to one aspect of the present disclosure, there is provided a display device including the display panel described in any one of the above.

[0048] According to one aspect of the present disclosure, there is provided a terminal device including:

[0049] The display device described in any one of the above;

[0050] An imaging device disposed on the backlight side of the driving backplane facing away from the light-emitting layer and disposed opposite to the light-transmitting area for taking an image through the light-transmitting area.

[0051] It should be understood that the above general description and the following detailed description are only exemplary and explanatory and should not limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure and, together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and those of ordinary skill in the art can obtain other drawings based on these drawings without creative efforts.

[0053] Figure 1 It is a schematic diagram of the driving backplane in an embodiment of the display panel of the present disclosure.

[0054] Figure 2 It is a schematic diagram of the connection between the pixel circuit and the light-emitting device in an embodiment of the display panel of the present disclosure.

[0055] Figure 3 It is an equivalent circuit diagram of the pixel circuit in an embodiment of the display panel of the present disclosure.

[0056] Figure 4 FIG. 1 is a schematic diagram of the structure of a pixel circuit in an embodiment of a display panel disclosed herein.

[0057] Figure 5 FIG. 4 is a schematic cross-sectional view of a display panel in one embodiment of the display panel disclosed herein.

[0058] Figure 6 FIG. 4 is a top view of a first electrode in an embodiment of a display panel disclosed herein.

[0059] Figure 7 Schematic diagram of each routing area of the transfer layer in an embodiment of the display panel disclosed in the present invention.

[0060] Figure 8 Schematic diagram of the connection of the first lead layer in one embodiment of the display panel disclosed herein.

[0061] Figure 9 FIG. 1 is a connection diagram of the second lead layer in one embodiment of the display panel disclosed herein.

[0062] Figure 10 Schematic diagram of the connection of the third lead layer in one embodiment of the display panel disclosed herein.

[0063] Figure 11 FIG. 1 is a schematic diagram of a first lead in an embodiment of a display panel disclosed herein.

[0064] Figure 12 FIG. 4 is a schematic diagram of a fourth lead in an embodiment of a display panel disclosed herein.

[0065] Figure 13 It is a schematic diagram of an embodiment of the display device disclosed in the present invention.

[0066] Description of reference numerals:

[0067] 1. Driving backplane; 101. Transparent area; 102. Driving area; 1021. Pixel area; 1022. Peripheral area; 10. Pixel circuit; 110. First pixel circuit; 120. Second pixel circuit; 100. First transfer hole;

[0068] 2. Transfer layer; 210, transfer area; 2101, transfer partition; 21011, sub-partition; 21011a, first sub-partition; 21011b, second sub-partition; 21011c, third sub-partition; 21011d, fourth sub-partition; 21011d1, first sub-partition; 21011d2, second sub-partition; 220, routing area; 21, lead layer; 211, lead; 21a, first lead layer; 211a, first lead; 21b, second lead layer; 211b, second lead; 21c, third lead layer; 211c, third lead; 211d, fourth lead; 201, transfer hole; 2110, lead-out section; 21101, first section; 21102, second section; 21103, third section; 2120, extension section; 22, first flat layer; 23, second flat layer; 24, third flat layer;

[0069] 3. Light-emitting layer; 30. Light-emitting device; 301. First light-emitting device; 302. Second light-emitting device; 311. First electrode; 3111. Electrode portion; 3112. Wiring portion; 312. Light-emitting functional layer; 313. Second electrode; 314. Pixel definition layer; 301. First light-emitting device; 302. Second light-emitting device;

[0070] 001, hole row; 002, hole group;

[0071] 1000. Display device; 2000. Camera device. DETAILED DESCRIPTION

[0072] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0073] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusive meaning and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used merely as labels and are not intended to limit the quantity of their objects.

[0074] In the related art, the display panel used to realize under-screen camera has a light-transmitting area and a driving area outside the light-transmitting area, and a plurality of light-emitting devices are arranged in both the light-transmitting area and the driving area. At the same time, a pixel circuit for driving all the light-emitting devices is arranged in the driving area, and there is no pixel circuit in the light-transmitting area, so as to improve the light transmittance, so that the camera device can be used to capture images through the light-transmitting area. In order to facilitate driving the light-emitting devices in the light-transmitting area to emit light, the light-emitting devices in the light-transmitting area can be connected to the corresponding pixel circuits in the driving area through the leads extending from the light-transmitting area to the driving area, and the light-emitting devices in the driving area are directly connected to the corresponding pixel circuits in the driving area.

[0075] The light-emitting devices include at least red light-emitting devices, green light-emitting devices and blue light-emitting devices. Since the light-emitting materials of light-emitting devices with different light-emitting colors are different, their response times are different, resulting in different start-up times. After experimental verification, even if the driving signal is received at the same time, the start-up time of the green light-emitting device is usually later than that of the red light-emitting device and the blue light-emitting device.

[0076] Because of the parasitic capacitance between the leads and between the leads and other conductive film layers such as the pixel circuit, the light-emitting device's lighting time is delayed to varying degrees. When combined with the inherent delay of the light-emitting device, the screen has a color shift visible to the human eye. In particular, the green light-emitting device emits light significantly later than the red light-emitting device and the blue light-emitting device. Before the green light-emitting device emits light, there are only red and blue in the screen, resulting in purple stripes or other purple-colored screens.

[0077] In order to reduce the influence of the parasitic capacitance of the leads, the length of the leads can be changed and the area of the overlapping region can be adjusted to make the parasitic capacitance of different leads tend to be consistent. However, this will cause large differences in the length of the leads and lack of regularity. The lead paths need to be specially designed according to different overlapping areas. Moreover, due to the large number of overlapping film layers and the complex structure, the parasitic capacitance cannot be truly made consistent.

[0078] Based on the above analysis, the embodiment of the present disclosure provides a display panel, which may be an OLED (Organic Light-Emitting Diode) display panel, such as Figure 1 , Figure 2 , Figures 5 - 10 As shown, the display panel includes a driving backplane 1, a transfer layer 2 and a light-emitting layer 3, wherein:

[0079] The driving backplane 1 has a light-transmitting area 101 and a driving area 102 at least partially surrounding the light-transmitting area 101. The driving area 102 has a plurality of pixel circuits 10, and the pixel circuits 10 include a first pixel circuit 110 and a second pixel circuit 120. The driving backplane 1 has a plurality of first transfer holes 100, and each pixel circuit 10 is connected to a first transfer hole 100.

[0080] The transfer layer 2 is arranged on one side of the driving backplane 1 and covers the light-transmitting area 101 and the driving area 102; the transfer layer 2 includes multiple mutually spaced lead layers 21, and each lead layer 21 includes multiple mutually spaced leads 211; the transfer layer 2 has a transfer area 210 corresponding to the light-transmitting area 101 and a routing area 220 corresponding to the driving area 102, and the transfer area 210 includes two transfer partitions 2110 separated on both sides of the first central axis S1; the first central axis S1 is the central axis of the transfer area 210 extending along the column direction; each transfer partition 2101 has multiple second transfer holes 201, and each second transfer hole 201 is connected to a first transfer hole 100 through a lead 211.

[0081] The light-emitting layer 3 is arranged on the side of the transfer layer 2 away from the driving backplane 1, and includes a plurality of light-emitting devices 30, the light-emitting devices 30 include a plurality of first light-emitting devices 301 located in each transfer partition 2101 and a plurality of second light-emitting devices 302 located in the routing area 220; each first light-emitting device 301 is connected to each second transfer hole 201 in a one-to-one correspondence, and each second light-emitting device 302 is connected to each first transfer hole 100 in a one-to-one correspondence.

[0082] The first transfer holes 100 and the second transfer holes 201 are arranged into a plurality of hole rows 001 distributed along the column direction, and the second transfer holes 201 are located in some of the hole rows 001; the first transfer holes 100 and the second connection holes 201 connected by the same lead 21 are located in the same hole row 001 and form a hole group 002; in two adjacent hole groups 002, the first transfer holes 100 and the second transfer holes 201 of one hole group 002 are located between the first transfer holes 100 and the second transfer holes 200 of the other hole group 002.

[0083] The length of any lead 21 in the row direction is the same as or different from the interval between the first via 100 and the second via 201 connected thereto, by a specified length.

[0084] It should be noted that the row direction in the embodiments of the present disclosure may be Figures 7 - 10 The X direction in the column direction can be Figures 7 - 10 However, those skilled in the art will appreciate that if the display panel is rotated, the actual directions of the row and column directions may change, and are not limited to the X and Y directions in the figure. The row and column directions in the embodiments of the present disclosure only refer to two directions perpendicular to each other.

[0085] For the display panel according to the embodiments of the present disclosure, the first pixel circuit 110 for driving the first light-emitting device 301 is disposed in the driving region 102 outside the light-transmitting region 101. Without reducing the number of light-emitting devices 30, the light-transmitting degree of the light-transmitting region 101 can be improved, facilitating the imaging device to capture images. At the same time, through the lead 211 of the multi-layer lead layer 21, the first via hole 100 and the second via hole 201, the first light-emitting device 301 in the light-transmitting region 101 is connected to the first pixel circuit 110, enabling the light-transmitting region 101 to display images normally. Moreover, the multiple lead layers 21 can increase the layout space of the leads 211. When there are many first light-emitting devices 301 within the range of the light-transmitting region 101, each first light-emitting device 301 can still be connected to the first pixel circuit 110, avoiding reducing the number of first light-emitting devices 301 due to insufficient leads 211 being unable to be arranged. The second light-emitting device 302 is connected to the second pixel circuit 120 and can display images outside the light-transmitting region 101.

[0086] In addition, in any hole group 002, the length of the lead 21 in the row direction is the same as or differs from the distance between the first via hole 100 and the second via hole 201 by a specified length. So, as long as the distance between the mutually connected first via hole 100 and second via hole 201 is known, the length of the lead 21 connecting the two in the row direction can be determined. Thus, the driving signal can be controlled by an external compensation method to at least compensate for the delay in the turn-on time caused by the lead 21, thereby improving the color shift phenomenon. This external compensation method can be external optical compensation (demura) or other methods, as long as it can supplement the turn-on times of different first light-emitting devices 301 to make them tend to be consistent.

[0087] Taking external optical compensation as an example, the compensation can be performed at least through the following steps:

[0088] Cause the display panel to display a test pattern;

[0089] Use an imaging device to capture the test pattern; by analyzing the captured image, identify the color shift region in the light-transmitting region 101;

[0090] Generate compensation data according to the display data, lead length, and a preset compensation algorithm of the identified color shift region; the display data may include brightness values and the timing of the brightness values, etc. As long as the distance between the mutually connected first via hole 100 and second via hole 201 is known, the length of the lead 21 connecting the two in the row direction can be determined. Compared with setting the extension path of the lead 21 in an irregular manner, it is easier to pre-determine the compensation algorithm.

[0091] The compensation data is stored in a control circuit provided inside or outside the display panel. When driving the display panel to display an image, the driving signal of the first light-emitting device 301 that causes color deviation can be compensated by the compensation data, thereby eliminating color deviation.

[0092] The following is a detailed description of the display panel of the present disclosure:

[0093] As Figure 1 shown, the driving backplane 1 is provided with a pixel circuit 10 for driving the light-emitting device 30 to emit light, and the driving backplane 1 at least includes a light-transmitting area 101 and a driving area 102 outside the light-transmitting area 101. Among them, the pixel circuit 10 is located in the driving area 102, and no pixel circuit 10 is provided in the light-transmitting area 101 to improve transparency. The imaging device can capture an image through the light-transmitting area 101, thereby realizing under-screen imaging.

[0094] As Figure 2 shown, the pixel circuit 10 in the driving area 102 at least includes a first pixel circuit 110 and a second pixel circuit 120. Among them, the first pixel circuit 110 is used to drive the light-emitting device corresponding to the light-transmitting area 101, that is, the first light-emitting device 301; the second pixel circuit 120 is used to drive the light-emitting device corresponding to the driving area 102, that is, the second light-emitting device 302.

[0095] In some embodiments of the present disclosure, as Figure 1 and Figure 2 shown, the driving area 102 may include a pixel area 1021 and an edge area 1022. Among them, the pixel area 1021 at least partially surrounds the outside of the light-transmitting area 101, and one side of the light-transmitting area 101 may at least partially coincide with one side of the pixel area 1021. The edge area 1022 may surround the outside of the pixel area 1021, and a peripheral circuit for inputting a driving signal to the pixel circuit 10 may be provided in the edge area 1022. The peripheral circuit may include a gate driving circuit, a light-emitting control circuit, a power supply circuit, etc., which are not specifically limited herein.

[0096] Of course, in some other embodiments of the present disclosure, the pixel area 1021 may also completely surround the light-transmitting area 101, and the edge area 1022 may surround the outside of the pixel area 1021.

[0097] Furthermore, the first pixel circuit 110 may be entirely distributed in the pixel area 1021, and all the second pixel circuits 120 are also distributed in the pixel area 1021. Of course, a part of the second pixel circuits 120 may also be provided in the pixel area 1021, all the first pixel circuits 110 are also distributed in the pixel area 1021, and the other second pixel circuits 120 are provided in the edge area 1022. At the same time, a plurality of first via holes 100 are provided in the pixel area 1021, and each first via hole 100 is connected to each pixel circuit 10 in one-to-one correspondence to output a driving signal.

[0098] Further, the pixel circuits 10 are distributed in an array, and the first pixel circuits 110 in each column are located between the second pixel circuits 120 in each column, and at most one column of first pixel circuits 110 is provided between two adjacent columns of second pixel circuits 120; one or more columns of second pixel circuits 120 may be provided between two adjacent columns of first pixel circuits 110.

[0099] In order to have sufficient space in the driving region 102 to accommodate the first pixel circuits 110 and the second pixel circuits 120 without reducing the number of pixel circuits 10. At least some of the pixel circuits 10 can be compressed along the row direction to reduce the width of the pixel circuits 10 in the row direction. On the premise that the size of the driving backplane 1 is the same, more regions can be obtained in the driving region 102, and the first pixel circuits 110 can be provided in these more regions. The width of the pixel circuit 10 refers to the length of the positive projection of the pixel circuit 10 on the driving backplane 1 along the row direction.

[0100] The structure of the pixel circuit 10 will be exemplarily described below:

[0101] In some embodiments of the present disclosure, as Figure 3 and Figure 4 shown, the pixel circuit 10 (the first pixel circuit 110 and the second pixel circuit 120) can be a 7T1C structure, that is, it includes 7 transistors and 1 capacitor. The 7T1C pixel circuit includes a driving transistor T1, a data writing transistor T2, a threshold compensation transistor T3, a first light emission control transistor T4, a second light emission control transistor T5, a first reset transistor T6, a second reset transistor T7, and a storage capacitor C1. The pixel circuit can be connected to a gate signal terminal Gate, a data signal terminal Data, a reset signal terminal RST1 and RST2, a light emission control signal terminal EM, a power supply terminal VDD, an initial power supply terminal Vinit1 and Vinit2, and a light emitting device, and the light emitting device can also be connected to a power supply terminal VSS. The pixel circuit 10 can be used to drive the connected light emitting device 30 to emit light in response to the signals provided by the connected signal terminals.

[0102] In addition, transistors can be classified into N-type and P-type transistors according to the characteristics of the transistors. In the embodiments of the present disclosure, it is described by taking all transistors as P-type transistors as an example. Based on the description and teaching of the present disclosure for this implementation manner, those of ordinary skill in the art can easily think of using at least some of the transistors in the pixel circuit structure of the embodiments of the present disclosure as N-type transistors, that is, the implementation manners using N-type transistors or a combination of N-type transistors and P-type transistors. Therefore, these implementation manners are also within the protection scope of the embodiments of the present disclosure.

[0103] Of course, in other embodiments of the present disclosure, the pixel circuit 10 may also adopt other structures, as long as it can drive the light-emitting device 30 to emit light, and no special limitation is imposed on its structure herein.

[0104] Based on the above pixel circuit 10, taking the structure of one transistor as an example, the driving backplane 1 may include an active layer, a first gate insulating layer, a gate, a second gate insulating layer, a dielectric layer, a first source-drain layer, a first planarization layer, a second source-drain layer, and a second planarization layer that are sequentially stacked on the substrate, so as to form a transistor, and no special limitation is imposed on the specific structure of the transistor herein. The first transfer hole 100 may be provided in the second planarization layer, so that the lead 21 can be connected to the second source-drain layer.

[0105] As Figure 5 shown, the transfer layer 2 is provided on one side of the driving backplane 1. For example, the transfer layer 2 is provided on the surface of the second planarization layer facing away from the substrate. The transfer layer 2 may cover the light-transmitting region 101 and the driving region 102, and the transfer layer 2 includes multiple spaced-apart lead layers 21. Each lead layer 21 includes multiple spaced-apart leads 211. The orthographic projection of each lead 211 on the driving backplane 1 extends from the light-transmitting region 101 to the driving region 102 and is connected to a first pixel circuit 110 through a first transfer hole 100. That is to say, each lead 211 is only used to transmit signals from one first pixel circuit 110.

[0106] As Figure 7 shown, the transfer layer 2 has a transfer region 210 corresponding to the light-transmitting region 101 and a routing region 220 corresponding to the driving region 102. The boundary of the transfer region 210 coincides with the boundary of the light-transmitting region 101, and the boundary of the routing region 220 coincides with the boundary of the driving region 102. At the same time, the transfer region 210 may include two transfer sub-regions 2101 separated on both sides of the first central axis S1. The first central axis S1 is the central axis of the transfer region 210 extending in the column direction; each transfer sub-region 2101 has multiple second transfer holes 201, and each second transfer hole 201 is connected to each lead 211 in a one-to-one correspondence, so that any first light-emitting device 301 can be connected to the corresponding first pixel circuit 110 through a second transfer hole 201 and a lead 211. The second transfer hole 201 may be a via structure in the transfer layer 2. However, since the leads 211 connected by the second transfer hole 201 may be located in different lead layers 21, the depths of different second transfer holes 201 may be different.

[0107] The material of the leads 211 of each lead layer 21 may be a transparent material such as indium tin oxide (ITO) or indium gallium zinc oxide (IGZO).

[0108] In some embodiments of the present disclosure, as Figure 5As shown, the number of lead layers 21 can be three layers, including a first lead layer 21a, a second lead layer 21b, and a third lead layer 21c that are sequentially distributed from the driving backplane 1 to the light-emitting layer 3. Among them, the lead 211 of the first lead layer 21a includes a first lead 211a, the lead 211 of the second lead layer 21b includes a second lead 211b, and the lead 211 of the third lead layer 21c includes a third lead 211c.

[0109] It should be noted that Figure 5 It is schematically shown only for explaining the relationship between the film layers of the display panel, and does not limit the specific structure of the lead layer 21.

[0110] As Figure 5 shown, in order to insulate between the lead layers 21, the transfer layer 2 further includes a first planarization layer 22, a second planarization layer 23, and a third planarization layer 24, where:

[0111] The first lead layer 21a can be disposed on the surface of the driving backplane 1 close to the light-emitting layer 3. The first planarization layer 22 covers the first lead layer 21a and the surface of the driving backplane 1 close to the light-emitting layer 3.

[0112] The second lead layer 21b is disposed on the surface of the first planarization layer 22 facing away from the driving backplane 1. The second planarization layer 23 covers the second lead layer 21b and the surface of the first planarization layer 22 close to the light-emitting layer 3.

[0113] The third lead layer 21c is disposed on the surface of the second planarization layer 23 facing away from the driving backplane 1. The third planarization layer 24 covers the third lead layer 21c and the surface of the second planarization layer 23 close to the light-emitting layer 3; the light-emitting layer 3 is disposed on the surface of the third planarization layer 24 facing away from the driving backplane 1.

[0114] As Figure 5 shown, the light-emitting layer 3 is disposed on one side of the transfer layer 2 facing away from the driving backplane 1. For example, the light-emitting layer 3 is disposed on the surface of the third planarization layer 24 facing away from the driving backplane 1.

[0115] The light-emitting layer 3 covers the transfer area 210 and the routing area 220 on the driving backplane 1, and the light-emitting layer 3 can include a plurality of light-emitting devices 30. The light-emitting device 30 includes a first light-emitting device 301 located in the transfer area 210 and a second light-emitting device 302 located in the routing area 220. Any first light-emitting device 301 can be connected to a first pixel circuit 110 through a second transfer hole 201, a lead 211, and a first transfer hole 201, and any second light-emitting device 32 can be connected to a second pixel circuit 120 through a first transfer hole 210.

[0116] In some embodiments of the present disclosure, each light-emitting device 30 can be an OLED, which can include a first electrode 311, a light-emitting functional layer 312, and a second electrode 313, where:

[0117] The first electrode 311 can be disposed on the surface of the transfer layer 2 facing away from the driving backplane 1. For example, the first electrode 311 is disposed on the surface of the third flat layer 24 facing away from the driving backplane 1. As Figure 5 and Figure 6 shown, the first electrode 311 serves as the anode of the OLED light-emitting device, and has an electrode portion 3111 and a wiring portion 3112 located outside the edge of the electrode portion 3111. The wiring portion 3112 is connected to the electrode portion 3111 or has an integral structure. The electrode portion 3111 of each first electrode 311 is connected to a lead 211 through the wiring portion 3112 and a second transfer hole 201, thereby connecting the first pixel circuit 110 to the first electrode 311 of the corresponding light-emitting device 30. The orthographic projection of the interconnected wiring portion 3112 and the second transfer hole 201 on the driving backplane 1 at least partially overlaps.

[0118] The light-emitting functional layer 312 can be disposed on the surface of the first electrode 311 facing away from the driving backplane 1, and may include a hole transport layer, an organic light-emitting layer, and an electron transport layer stacked in sequence on the first electrode 311.

[0119] The second electrode 313 serves as the cathode of the OLED light-emitting device and can be disposed on the surface of the light-emitting functional layer 312 facing away from the driving backplane 1. By applying an electrical signal to the first electrode 311 and the second electrode 313, the light-emitting functional layer 312 can be driven to emit light.

[0120] The above is the structure of one light-emitting device 30. In the entire display panel, the first electrodes 311 of each light-emitting device 30 can be made of the same material and formed simultaneously through a single patterning process. The materials of the light-emitting functional layers 312 of the light-emitting devices 3 with different light-emitting colors are different. At the same time, each light-emitting device 30 can share the same second electrode 313, that is to say, the second electrode 313 can cover each light-emitting functional layer 312 at the same time. In addition, in order to facilitate defining the light-emitting range of each light-emitting device 30, the light-emitting layer 3 may further include a pixel definition layer 314, which can be disposed on the surface of the transfer layer 2 facing away from the driving backplane 1 and has openings exposing each first electrode 311. The light-emitting functional layer 312 can cover the first electrode 311 within each opening and expose the electrode portion 3111. The wiring portion 3112 is located outside the opening. The second electrode 313 can cover the surface of the pixel definition layer facing away from the driving backplane 1 and be recessed into the opening.

[0121] Further, in order to make the brightness of the area of the light-emitting layer 3 corresponding to the light-transmitting area 101 consistent with the area corresponding to the driving area 102. The density of the first light-emitting device 301 in the area corresponding to the light-transmitting area 101 can be made the same as the density of the second light-emitting device 302 in the area corresponding to the driving area 102.

[0122] A detailed description of the method of connecting the light-emitting device and the pixel circuit through the lead 211 is as follows:

[0123] As Figures 7 - 12 shown, taking the central axis of the transfer area 210 in the column direction as the first central axis S1, the light-transmitting area 101 can be divided into two transfer sub-areas 2101 distributed in the row direction. The first light-emitting device 301 is distributed in the two transfer sub-areas 2101.

[0124] The two transfer sub-areas 2101 are symmetric about the first central axis S1, and the first light-emitting device 301 and the lead 211 connected thereto in the two transfer sub-areas 2101 are also symmetrically arranged about the first central axis S1.

[0125] Taking one transfer sub-area 2101 as an example: The first transfer holes 100 and the second transfer holes 201 are arranged in a plurality of hole rows 001 distributed in the column direction. Each hole row 001 includes a plurality of first transfer holes 100, and each second transfer hole 201 is located in some of the hole rows 001. The first transfer hole 100 and the second connection hole 201 connected by the same lead 211 are located in the same hole row 001 and form a hole group 002. In two adjacent hole groups 002, the first transfer hole 100 and the second transfer hole 201 of one hole group 002 are located between the first transfer hole 100 and the second transfer hole 201 of the other hole group 002.

[0126] In any hole group 002, the length of the lead 211 in the row direction is the same as or differs from the distance between the first pixel circuit 110 and the first light-emitting device 301 by a specified length, so as to perform compensation through an external compensation method to improve color deviation.

[0127] In some embodiments of the present disclosure, there are N hole rows 001, and each second transfer hole 201 is located in each of the i-th to j-th hole rows. Wherein, N, i, and j are all positive integers, and 1 ≤ i < j ≤ N.

[0128] In any two adjacent ones of the i-th to j-th hole rows 001, the lead 211 connected to at least part of the second transfer holes 201 of one hole row 001 is located between the two adjacent hole rows 001.

[0129] For example, the lead 21 connected to the second transfer hole 201 in the k-th hole row 001 is located between the (k - 1)-th and k-th hole rows 001; k is a positive integer, and i < k ≤ j;

[0130] The lead 211 connected to the second transfer hole 201 in the i-th hole row is located on the side of the i-th hole row 001 away from the j-th hole row 001.

[0131] Furthermore, since the number of leads 211 that can be accommodated in the space between two adjacent hole rows 001 is limited, therefore, in at least one of the i-th to j-th hole rows 001, at least a partial region of the leads 211 connected to at least some of the second transfer holes 201 is located on the side of the i-th hole row 001 away from the j-th hole row 001.

[0132] Furthermore, the routing area 220 includes a main area and a peripheral area. The main area at least partially surrounds the transfer area 210, and the peripheral area surrounds the main area and the transfer area 210; at least some of the first pixel circuits 110 are distributed in the area of the driving backplane 1 corresponding to the main area.

[0133] In the i-th hole row 001, at least a partial region of at least some of the leads 211 connected to the second transfer holes 201 is located in the peripheral area.

[0134] In at least one of the i-th to j-th hole rows 001, at least a partial region of at least some of the leads 211 connected to the second transfer holes 201 is located on the side of the j-th hole row 001 away from the i-th hole row 001.

[0135] In some embodiments of the present disclosure, the transfer sub-region 2101 may include a plurality of sub-regions 21011 distributed along the row direction, and each sub-region 21011 is provided with a second transfer hole 201. The leads 211 connected to the first light-emitting devices 301 within the same sub-region 21011 are located in the same lead layer 21.

[0136] For example, the sub-regions 21011 of the same transfer sub-region 2101 include a first sub-region 21011a, a second sub-region 21011b, and a third sub-region 21011c that are sequentially distributed along the row direction toward the first central axis S1. The leads 211 connected to the second transfer holes 201 within the first sub-region 21011a are first leads 211a, the leads 211 connected to the second transfer holes 201 within the second sub-region 21011b are second leads 211b, and the leads 211 connected to the second transfer holes 201 within the third sub-region 21011c are third leads 211c.

[0137] Furthermore, if i < k ≤ j, the first lead 211a, the second lead 211b, and the third lead 211c connected to the second transfer holes 201 of the k-th hole row 001 are located between the (k - 1)-th and k-th hole rows 001. At the same time, the first lead 211a, the second lead 211b, and the third lead 211c connected to the second transfer holes 201 in the i-th hole row 001 are located on the side of the i-th hole row 001 away from the j-th hole row 001.

[0138] Further, in some embodiments of the present disclosure, the lead 211 of the first lead layer 21a further includes a fourth lead 211d. The sub-division 21011 of the same transfer partition 2101 includes a fourth sub-division 21011d located between the third sub-division 21011c and the first central axis S1; the leads 211 connected to the respective second transfer holes 201 within the fourth sub-division 21011d are the fourth leads 211d.

[0139] At least a portion of at least a part of the fourth lead 211d is located on a side of the i-th row of holes 001 away from the j-th row of holes 001. At least a portion of at least a part of the fourth lead 211d is located on a side of the j-th row of holes 001 away from the i-th row of holes 001.

[0140] Furthermore, as Figure 7 and Figure 8 shown, the fourth sub-division 21011d includes a first sub-division 21011d1 and a second sub-division 21011d2 separated on both sides of the second central axis S2, and the second central axis S2 is the central axis extending along the row direction of the transfer area 210. Part of the second transfer holes 201 of the i-th to k-th rows of holes 001 are located in the first sub-division 21011d1, and part of the second transfer holes 201 of the (k + 1)-th to j-th rows of holes 001 are located in the second sub-division 21011d2; k + 1 ≤ j.

[0141] At least a portion of the fourth lead 211d connected to the second transfer holes 201 in the first sub-division 21011d1 is located on a side of the i-th row of holes 001 away from the j-th row of holes 001.

[0142] At least a portion of the fourth lead 211d connected to the second transfer holes 201 in the second sub-division 21011d2 is located on a side of the j-th row of holes 001 away from the i-th row of holes 001.

[0143] In some embodiments of the present disclosure, as Figure 11 and Figure 12 shown, the lead 211 may include two lead-out segments 2110 and an extension segment 2120 connecting the two lead-out segments 2110. The lead-out segments 2110 extend along the column direction, and the extension segment 2120 extends along the row direction. The length of the extension segment 2120 of any one of the first lead 211a, the second lead 211b, and the third lead 211c is the same as the distance between the first transfer hole 100 and the second transfer hole 201 it is connected to. The length of the lead-out segment 2110 of any one of the first lead 211a, the second lead 211b, and the third lead 211c along the column direction is less than the distance between two adjacent rows of holes 001. The distance between the first transfer hole 100 and the second transfer hole 201 is: the distance between the center of the first transfer hole 100 and the center of the orthographic projection of the second transfer hole 201 on the driving backplane 1.

[0144] In some embodiments of the present disclosure, as Figure 12 shown, if i < k < j, the lead-out section 2110 of the fourth lead 211d connecting the k-th hole row 001 may include a first section 21101, a second section 21102, and a third section 21103 distributed in the column direction. One end of the first section 21101 is connected to a second transfer hole 201, the other end is connected to one end of the second section 21102, the other end of the second section 21102 is connected to one end of the third section 21103, and the other end of the third section 21103 is connected to one end of the extension section 2120;

[0145] The first section 21101 and the third section 21103 extend linearly in the column direction, and the third section 21103 is located on the side of the second transfer hole 201 connected to the first section 21101 away from or close to the first central axis S1; A row of second transfer holes 201 is located on the extension line of the extension path of the first section 21101. The second section 21102 extends linearly and forms a specified angle with the first section 21101 and the third section 21103, so that the third section 21103 is arranged in parallel with the first section 21101.

[0146] The length of the extension section 2120 of the fourth lead 211d connecting the k-th hole row 001 differs from the distance between the first transfer hole 100 and the second transfer hole 201 it is connected to by a specified length, and this specified length is the distance between the first section 21101 and the third section 21103 in the row direction.

[0147] The length of the extension section 2120 of the fourth lead 211d connecting the i-th and j-th hole rows 001 is the same as the distance between the first transfer hole 100 and the second transfer hole 201 it is connected to.

[0148] The embodiments of the present disclosure further provide a display device, which may include the display panel of any of the above embodiments. The structure and beneficial effects of the display panel can refer to the embodiments of the display panel in the above text and will not be elaborated here.

[0149] The embodiments of the present disclosure further provide a terminal device, as Figure 13 shown, the terminal device may include a display device 1000 and a camera device 2000, wherein:

[0150] The display device 1000 may be the display device of any of the above embodiments, and its structure and beneficial effects can refer to the embodiments of the display panel and the display device in the above text and will not be elaborated here.

[0151] The imaging device 2000 can be disposed on the backlight side of the display device 1000, that is, the back side of the light-emitting direction. For example, if the light-emitting device of the display device 1000 is a top-emission structure, that is, it emits light in the direction away from the driving backplane 1, then the imaging device 2000 can be disposed on the side of the driving backplane 1 away from the light-emitting layer 3, and the imaging device 2000 can be aligned with the light-transmitting area 101 for capturing an image through the light-transmitting area 101. If the light-emitting device of the display device 1000 is a bottom-emission structure, then the imaging device 2000 can be disposed on the side of the light-emitting layer 3 away from the driving backplane 1. The imaging device 2000 can include a lens, a photoelectric sensor, etc. There is no special limitation on the specific structure of the imaging device 2000 here, as long as it can capture an image.

[0152] The terminal device of the present disclosure can be an electronic device with display and shooting functions such as a mobile phone, a tablet computer, a television, etc., and will not be listed one by one here.

[0153] After considering the specification and practicing the invention disclosed herein, those skilled in the art will readily conceive of other embodiments of the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure, which follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the appended claims.

Claims

1. A display panel, wherein, include: A driving backplane, comprising a light-transmitting area and a driving area at least partially surrounding the light-transmitting area, wherein the driving area comprises a plurality of pixel circuits, and the pixel circuits comprise a first pixel circuit and a second pixel circuit; The driving backplane has a plurality of first transfer holes, and any of the pixel circuits is connected to a first transfer hole; A transfer layer, provided on one side of the driving backplane and covering the light-transmitting area and the driving area; The transfer layer includes multiple mutually spaced lead layers, each of which includes multiple mutually spaced lead layers; the transfer layer has a transfer area corresponding to the light-transmitting area and a routing area corresponding to the driving area, and the transfer area includes two transfer partitions separated on both sides of the first central axis; The first central axis is the central axis of the transition area extending along the column direction; Each of the transfer partitions has a plurality of second transfer holes, and any of the second transfer holes is connected to one of the first transfer holes through one of the lead wires; A light-emitting layer is provided on a side of the transfer layer away from the driving backplane, and includes a plurality of light-emitting devices, wherein the light-emitting devices include a plurality of first light-emitting devices located in each of the transfer subareas and a plurality of second light-emitting devices located in the routing area; Any one of the first light-emitting devices is connected to one of the second transfer holes, and any one of the second light-emitting devices is connected to one of the first transfer holes; The first transfer holes and the second transfer holes are arranged into a plurality of hole rows distributed along a column direction, and each of the second transfer holes is located in a part of the hole rows; The first transfer hole and the second connection hole connected to the same lead are located in the same hole row and form a hole group; In two adjacent hole groups, the first adapter hole and the second adapter hole of one hole group are located between the first adapter hole and the second adapter hole of the other hole group; The length of any of the lead wires in the row direction is the same as or different from the spacing between the first transfer hole and the second transfer hole connected thereto by a specified length.

2. The display panel according to claim 1, wherein, There are N rows of holes, and each of the second transfer holes is located in each of the i-th to j-th rows of holes; N, i and j are all positive integers, and 1≤i<j≤N; In any adjacent two of the i-th to j-th hole rows, the leads connected to at least part of the second transfer holes of one hole row are located between the two adjacent hole rows.

3. The display panel according to claim 2, wherein, The lead connected to the second transfer hole in the kth hole row is located between the k-1th and kth hole rows; k is a positive integer, and i<k≤j; The lead wire connected to the second transfer hole in the ith row of holes is located on the side of the ith row of holes away from the jth row of holes.

4. The display panel according to claim 2, wherein, In at least one of the i-th to j-th hole rows, at least a portion of the lead wires connected to the second transfer holes are located on a side of the i-th hole row away from the j-th hole row.

5. The display panel according to claim 4, wherein, The routing area includes a main area and a peripheral area, the main area at least partially surrounds the outside of the transfer area, and the peripheral area surrounds the outside of the main area and the transfer area; at least part of the first pixel circuit is distributed in the area of the driving backplane corresponding to the main area; In the i-th hole row, at least a portion of the leads connected to at least a portion of the second vias are located in the peripheral area.

6. The display panel according to claim 2, wherein, In at least one of the i-th to j-th hole rows, at least a partial region of the leads connected to at least a part of the second via holes is located on a side of the j-th hole row facing away from the i-th hole row.

7. The display panel according to any one of claims 1-6, wherein, The via partition includes a plurality of sub-partitions distributed along the row direction, and each of the sub-partitions is provided with the second via holes. The leads connected to the second via holes within the same sub-partition are located in the same lead layer.

8. The display panel according to claim 7, wherein, Among the multiple lead layers, at least the first lead layer, the second lead layer, and the third lead layer are sequentially distributed from the driving backplane to the light-emitting layer; the leads of the first lead layer include the first leads, the leads of the second lead layer include the second leads, and the leads of the third lead layer include the third leads. The sub-partitions of the same via partition include a first sub-partition, a second sub-partition, and a third sub-partition sequentially distributed along the row direction toward the first central axis. The leads connected to the second via holes within the first sub-partition are the first leads, the leads connected to the second via holes within the second sub-partition are the second leads, and the leads connected to the second via holes within the third sub-partition are the third leads.

9. The display panel according to claim 8, wherein, If i < k ≤ j; The first leads, the second leads, and the third leads connected to the second via holes of the k-th hole row are located between the (k - 1)-th and k-th hole rows. The first leads, the second leads, and the third leads connected to the second via holes in the i-th hole row are located on a side of the i-th hole row facing away from the j-th hole row.

10. The display panel according to claim 8 or 9, wherein, The leads of the first lead layer further include fourth leads. The sub-partitions of the same via partition include a fourth sub-partition located between the third sub-partition and the first central axis; the leads connected to the second via holes within the fourth sub-partition are the fourth leads. At least a partial region of at least a part of the fourth leads is located on a side of the i-th hole row facing away from the j-th hole row. At least a partial region of at least a part of the fourth leads is located on a side of the j-th hole row facing away from the i-th hole row.

11. The display panel according to claim 10, wherein, The fourth sub-partition includes a first sub-region and a second sub-region separated on both sides of a second central axis, and the second central axis is the central axis along which the via region extends in the row direction. Partial second via holes of the i-th to k-th hole rows are located in the first sub-region, and partial second via holes of the (k + 1)-th to j-th hole rows are located in the second sub-region. k + 1 ≤ j; At least a partial region of the fourth leads connected to the second via holes in the first sub-region is located on a side of the i-th hole row facing away from the j-th hole row. At least a partial region of the fourth leads connected to the second via holes in the second sub-region is located on a side of the j-th hole row facing away from the i-th hole row.

12. The display panel according to claim 11, wherein, The leads include two lead-out segments and an extension segment connecting the two lead-out segments; the lead-out segments extend along the column direction, and the extension segment extends along the row direction. The length of the extension segment of any one of the first leads, the second leads, and the third leads is the same as the distance between the first via hole and the second via hole it is connected to.

13. The display panel according to claim 12, wherein, If i < k < j; The lead-out section of the fourth lead connecting the k-th row of holes includes a first section, a second section, and a third section distributed along the column direction. One end of the first section is connected to one of the second transfer holes, and the other end is connected to one end of the second section. The other end of the second section is connected to one end of the third section, and the other end of the third section is connected to one end of the extension section; The first section and the third section extend linearly along the column direction, and the third section is located on the side of the second transfer hole connected to the first section away from or close to the first central axis; The length of the extension section of the fourth lead connecting the k-th row of holes differs from the distance between the first transfer hole and the second transfer hole it is connected to by a specified length.

14. The display panel according to claim 12, wherein, The length of the extension section of the fourth lead connecting the i-th and j-th rows of holes is the same as the distance between the first transfer hole and the second transfer hole it is connected to.

15. The display panel according to claim 11, wherein, The fourth lead connecting the second transfer hole in the first sub-region and the fourth lead connecting the second transfer hole in the second sub-region are symmetrically arranged with respect to the second central axis.

16. The display panel according to claim 1, wherein, The leads connecting the second transfer holes in the two transfer sub-regions are symmetrically arranged with respect to the first central axis.

17. The display panel according to any one of claims 1-6, wherein, The light-emitting device includes: A first electrode provided on the surface of the transfer layer facing away from the driving backplane; the first electrode has an electrode portion and a wiring portion located outside the edge of the electrode portion; the wiring portion is connected to a lead through one of the second transfer holes; A light-emitting functional layer provided on the surface of the first electrode facing away from the driving backplane; A second electrode provided on the surface of the light-emitting functional layer facing away from the driving backplane.

18. A display device, wherein, A display panel according to any one of claims 1-17.

19. A terminal device, wherein, Including: The display device according to claim 18; An imaging device provided on the backlight side of the driving backplane facing away from the light-emitting layer and disposed opposite to the light-transmitting region for capturing an image through the light-transmitting region.

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