Drive protection circuit for power tubes

Abstract

This application provides a drive protection circuit for a power transistor, comprising: a sampling module; a threshold generation module coupled to the gate of the power transistor to acquire the voltage change of the power transistor and generate a change threshold; a comparison module coupled to both the sampling module and the threshold generation module to acquire the sampling voltage provided by the sampling module and the change threshold provided by the threshold generation module, and output a first comparison result or a second comparison result; and a switch discharge module coupled to both the comparison module and the gate of the power transistor, having two operating states based on the first comparison result or the second comparison result output by the comparison module. The drive protection circuit for the power transistor described in this application allows the gate voltage of the power transistor to remain at a stable two-level voltage when it drops, thus protecting the power transistor for safer operation.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design technology, and in particular to a drive protection circuit for a power transistor. Background Technology

[0002] Functional safety chips have strict overvoltage and overcurrent protection requirements for power transistors (such as IGBTs). In the event of an IGBT overcurrent, it needs to be slowly turned off to prevent voltage overshoot between its collector (C) and emitter (E). However, if the turn-off process is too slow, the IGBT will overheat and be damaged due to prolonged exposure to high current. To avoid this problem, the IGBT's gate (G) voltage can be rapidly reduced to a voltage slightly higher than the Miller plateau, followed by a small current discharge until it is turned off. This allows the IGBT to turn off slowly near the Miller plateau, reducing the rate of change of the collector-emitter voltage (dv / dt). This method of turning off the IGBT is called two-level turn-off (2LTO), and the voltage slightly higher than the Miller plateau that the IGBT's gate voltage first drops to is called the two-level voltage.

[0003] However, for different power transistors, the gate voltage slew rate (VSR) will vary due to factors such as different drive resistors and gate parasitic capacitances. In the circuit, there is a delay between the comparator determining that the gate voltage has dropped to the two-level voltage and completing the switching to discharge the power transistor with a small current. If the threshold value used for comparison in the comparator is fixed, the actual gate voltage (the so-called two-level voltage) will differ between the time the comparator determines that the gate voltage has dropped to the two-level voltage and the time the small current discharge is completed. If the two-level voltage is inaccurate, for example, lower than the Miller plateau, the gate voltage may rapidly cross the Miller plateau, resulting in an excessively large rate of change of the gate voltage, which can easily damage the power transistor. Therefore, it is necessary to control the two-level voltage to a stable value. Summary of the Invention

[0004] Based on the aforementioned deficiencies in the background technology, the purpose of this application is to provide a drive protection circuit for a power transistor, which can keep the gate voltage of the power transistor at a stable two-level voltage when it drops, thereby protecting the power transistor to operate more safely.

[0005] To achieve the above objectives, this application provides a drive protection circuit for a power transistor, for connection to a power transistor, the drive protection circuit for the power transistor comprising:

[0006] The sampling module is coupled to the gate of the power transistor, obtains the current voltage of the gate of the power transistor, and generates a sampling voltage;

[0007] A threshold generation module is coupled to the gate of the power transistor to obtain the voltage change of the power transistor and generate a change threshold.

[0008] The comparison module is coupled to both the sampling module and the threshold generation module, and acquires the sampling voltage provided by the sampling module and the change threshold provided by the threshold generation module, and outputs a first comparison result or a second comparison result.

[0009] The switching discharge module is coupled to both the comparison module and the gate of the power transistor. Based on the first comparison result or the second comparison result output by the comparison module, it has two operating states: a first operating state in which the switching discharge module and the power transistor are in a conducting state; and a second operating state in which the switching discharge module and the power transistor are in a high-resistance state.

[0010] In one embodiment, a pull-up drive resistor is connected between the sampling module and the gate of the power transistor, and a pull-up drive signal is also connected between the sampling module and the pull-up drive resistor; a pull-down drive resistor is connected between the switch discharge module and the gate of the power transistor, and a pull-down drive signal is also connected between the switch discharge module and the pull-down drive resistor.

[0011] In one embodiment, the threshold generation module includes a fixed threshold generation unit and a pull-up voltage generation unit connected together. The fixed threshold generation unit includes a low-dropout linear regulator to provide a fixed threshold voltage. The pull-up voltage generation unit includes a pull-up capacitor, a pull-up resistor, a first MOSFET, and a second MOSFET. The first MOSFET and the second MOSFET form a current mirror. The source of the first MOSFET and the source of the second MOSFET are both coupled to the operating voltage. The gate of the first MOSFET, the gate of the second MOSFET, and the drain of the second MOSFET are all connected to the first terminal of the pull-up capacitor. The second terminal of the pull-up capacitor is connected between the sampling module and the pull-up drive resistor. The drain of the first MOSFET is connected to the first terminal of the pull-up resistor. The second terminal of the pull-up resistor is connected to the low-dropout linear regulator to receive the fixed threshold voltage provided by the low-dropout linear regulator. The first terminal of the pull-up resistor is connected to the comparison module to provide the changing threshold.

[0012] In one embodiment, the comparison module includes a comparator, the first end of the pull-up resistor is connected to the negative input terminal of the comparator, the sampling module includes a first resistor and a second resistor connected in series, the connection point of the first resistor and the second resistor is connected to the positive input terminal of the comparator, the free end of the first resistor is connected to the pull-up drive resistor, the free end of the second resistor is grounded, and the output terminal of the comparator outputs the first comparison result or the second comparison result.

[0013] In one embodiment, the drive protection circuit of the power transistor further includes a connected pulse generation circuit and a first switch. The two ends of the first switch are connected in parallel to the two ends of the second resistor. The pulse generation circuit is connected between the output of the comparator and the first switch. When the comparator outputs the first comparison result, the pulse generation circuit does not work and the first switch is in an open state. When the comparator outputs the second comparison result, the pulse generation circuit generates a pulse output, controlling the first switch to be in a closed state during the effective time of the pulse, and the second resistor is short-circuited and shielded.

[0014] In one embodiment, the pull-up voltage generation unit further includes a zero-current source and a zero-switch connected together. The free end of the zero-current source is grounded, and the free end of the zero-switch is connected to the first terminal of the pull-up capacitor. The output terminal of the comparator is also connected to the zero-switch. The comparator outputs the first comparison result, and the zero-switch is in an open state. The comparator outputs the second comparison result, and the zero-switch is in a closed state. The zero-current source provides a hysteresis voltage to the pull-up voltage generation unit.

[0015] In one embodiment, the voltage boosting unit further includes a first current source and a second current source, wherein the source of the first MOS transistor is connected to the operating voltage via the first current source, and the source of the second MOS transistor is connected to the operating voltage via the second current source.

[0016] In one embodiment, the switch discharge module includes a switch transistor, the output terminal of the comparator is coupled to the gate of the switch transistor, the source of the switch transistor is connected to a negative operating voltage, and the drain of the switch transistor is connected to the gate of the power transistor.

[0017] In one embodiment, the switch discharge module further includes a level conversion unit, the input of which is connected to the output of the comparator, the output of which is coupled to the gate of the switch transistor, and the level conversion unit is also connected to a negative operating voltage and ground.

[0018] In one embodiment, the switch discharge module further includes a two-level turn-off control unit and a soft turn-off control unit. The two-level turn-off control unit and the soft turn-off control unit are connected in parallel between the output terminal of the level conversion unit and the gate of the switching transistor. They operate according to the first comparison result or the second comparison result output by the comparison module. In the first operating state, the two-level turn-off control unit controls the switching transistor to turn on, and the switch discharge module and the power transistor are in a conducting state. In the second operating state, the soft turn-off control unit controls the switching transistor to turn off, and the switch discharge module and the power transistor are in a high-impedance state.

[0019] The power transistor drive protection circuit described in this application includes a threshold generation module that generates a threshold value based on changes in the gate voltage of the power transistor and provides it to the comparison module. This allows the comparison module to anticipate the gate voltage of the power transistor dropping to a desired two-level voltage (referred to as "advance") in advance, and then notify the switching discharge module to perform a switch. When the switching discharge module completes the switch, the gate voltage of the power transistor has dropped further (relative to when the comparison module completes its judgment, referred to as "delay"). By designing and adjusting various parameters so that the "advance" of the comparison module's judgment corresponds to the "delay" of the power transistor's gate voltage drop, the gate voltage of the power transistor can be stabilized at a predetermined value after the voltage drop, regardless of the type of power transistor connected. This is the desired two-level voltage. Thus, the power transistor drive protection circuit described in this application ensures safer operation of the power transistor and prevents damage. Attached Figure Description

[0020] The accompanying drawings described herein are for illustrative purposes only and are not intended to limit the scope of this application in any way. Furthermore, the shapes and scales of the components in the drawings are merely illustrative to aid in understanding this application and do not specifically limit the shapes and scales of the components. Those skilled in the art, guided by the teachings of this application, can select various possible shapes and scales to implement this application according to specific circumstances. In the drawings:

[0021] Figure 1 This is a schematic diagram of a power transistor drive protection circuit provided in the first embodiment of this application. Detailed Implementation

[0022] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this application.

[0023] Please see Figure 1 As shown, the first embodiment of this application provides a drive protection circuit for a power transistor, used for connection to a power transistor, the drive protection circuit for the power transistor including:

[0024] The sampling module 10 is coupled to the gate of the power transistor, obtains the current voltage of the gate of the power transistor, and generates a sampling voltage VFB;

[0025] The threshold generation module 20 is coupled to the gate of the power transistor, acquires the voltage change of the power transistor, and generates the change threshold VREF_dv;

[0026] The comparison module 30 is coupled to both the sampling module 10 and the threshold generation module 20, and obtains the sampling voltage VFB provided by the sampling module 10 and the change threshold VREF_dv provided by the threshold generation module 20, and outputs a first comparison result or a second comparison result.

[0027] The switch discharge module 40 is coupled to both the comparison module 30 and the gate of the power transistor. Based on the first comparison result or the second comparison result output by the comparison module 30, it has two operating states: a first operating state in which the switch discharge module 40 and the power transistor are in a conducting state; and a second operating state in which the switch discharge module 40 and the power transistor are in a high-resistance state.

[0028] First, it should be noted that the power transistor drive protection circuit described in this application and Figure 1The circuit shown only serves a "protective" function and does not include the drive control circuit for normal operation of the power transistor. That is, a separate drive control circuit generates a drive control signal to drive the power transistor to operate normally. Furthermore, the drive control circuit includes an overcurrent or short-circuit detection circuit (commonly known in the industry as DESAT detection). When an overcurrent or short circuit is detected in the power transistor, a detection signal is generated to release the drive control signal, causing the voltage and current of the power transistor to decrease. Simultaneously, the drive protection circuit for the power transistor described in this application is activated to provide protection during the voltage and current decrease of the power transistor. In one specific embodiment, the power transistor can be an IGBT (Insulated Gate Bipolar Transistor), having a gate (G terminal), collector (C terminal), and emitter (E terminal); of course, the power transistor can also be a device made of silicon carbide (SiC) material.

[0029] In one embodiment, a pull-up drive resistor ROH is connected between the sampling module 10 and the gate of the power transistor, and a pull-up drive signal OUTH is also connected between the sampling module 10 and the pull-up drive resistor ROH; a pull-down drive resistor ROL is connected between the switch discharge module 40 and the gate of the power transistor, and a pull-down drive signal OUTL is also connected between the switch discharge module 40 and the pull-down drive resistor ROL. The pull-up drive signal OUTH and the pull-down drive signal OUTL are the drive control signals generated by the aforementioned drive control circuit to drive the power transistor to operate normally. For example, in one specific embodiment, the pull-up drive signal OUTH is at a high level and the pull-down drive signal OUTL is at a low level, driving the power transistor to operate normally. When the overcurrent or short-circuit detection circuit detects an overcurrent or short circuit in the power transistor, it changes the pull-up drive signal OUTH to a low level while keeping the pull-down drive signal OUTL at a low level, causing the voltage at the gate of the power transistor to drop (at which point the power transistor does not operate normally), thus protecting the power transistor from damage. Simultaneously, the drive protection circuit for the power transistor described in this application also begins to operate. In other words, during the normal operation of the power transistor, the drive protection circuit of the power transistor described in this application is not in operation, that is, it is in a shielded state. This can be achieved by using the detection signal generated by the overcurrent or short circuit detection circuit as the enable signal of the drive protection circuit of the power transistor described in this application.

[0030] In one embodiment, the threshold generation module 20 includes a fixed threshold generation unit 21 and a pull-up voltage generation unit 22 connected together; the fixed threshold generation unit 21 includes a low-dropout linear regulator (LDO) to provide a fixed threshold voltage VREF; the pull-up voltage generation unit 22 includes a pull-up capacitor Cmom, a pull-up resistor Rd, a first MOSFET PM1, and a second MOSFET PM2, the first MOSFET PM1 and the second MOSFET PM2 forming a current mirror, and the sources of the first MOSFET PM1 and the second MOSFET PM2 are both coupled to the operating voltage. The gate of the first MOSFET, the gate of the second MOSFET PM2, and the drain of the second MOSFET PM2 are all connected to the first terminal of the pull-up capacitor Cmom. The second terminal of the pull-up capacitor Cmom is connected between the sampling module 10 and the pull-up drive resistor ROH. The drain of the first MOSFET PM1 is connected to the first terminal of the pull-up resistor Rd. The second terminal of the pull-up resistor Rd is connected to the low-dropout linear regulator, receiving the fixed threshold voltage VREF provided by the low-dropout linear regulator. The first terminal of the pull-up resistor Rd is connected to the comparator module 30, providing the changing threshold VREF_dv. The low-dropout linear regulator can be a common low-dropout linear regulator, such as... Figure 1 The zeroth MOSFET PM0, amplifier OP, zeroth resistor R0, and zeroth capacitor C0 shown together constitute a typical low-dropout linear regulator. Of course, those skilled in the art can easily conceive of transforming it into a low-dropout linear regulator with other structures, as long as a fixed voltage value (i.e., a fixed threshold voltage VREF) can be provided. The pull-up capacitor Cmom is connected to the gate of the power transistor and can sense the slew rate (VSR) of the gate voltage of the power transistor, converting it into current. This current is then mirrored (with a certain proportional relationship) to the pull-up resistor Rd, thereby forming a voltage difference Vdelta = VSR * Cmom * Rd * PM1 / PM2 (this can be called the pull-up voltage) between the first and second terminals (i.e., the fixed threshold voltage) of the pull-up resistor Rd. The voltage at the first terminal of the pull-up resistor Rd is VREF + VSR * Cmom * Rd * PM1 / PM2, which is the value of the variable threshold voltage VREF_dv. In one specific embodiment, the ratio PM1 / PM2 of the current mirror is 1. For simplicity and ease of understanding, the following description will use PM1 / PM2 as 1. Of course, in other embodiments, PM1 / PM2 may not be 1, and those skilled in the art can easily conceive of making appropriate changes and adjustments.

[0031] In one embodiment, the comparison module 30 includes a comparator COMP. The first end of the pull-up resistor Rd is connected to the negative input terminal of the comparator COMP. The sampling module 10 includes a first resistor R1 and a second resistor R2 connected in series. The connection point of the first resistor R1 and the second resistor R2 is connected to the positive input terminal of the comparator COMP. The free end of the first resistor R1 is connected to the pull-up drive resistor ROH. The free end of the second resistor R2 is grounded to GND. The output terminal of the comparator COMP outputs either the first comparison result or the second comparison result (the first comparison result and the second comparison result are collectively referred to as the output signal COMPOUT of the comparator COMP). The sampling voltage VFB generated by the sampling module 10 is provided to the positive input terminal of the comparator COMP, and the changing threshold VREF_dv generated by the threshold generation module 20 is provided to the negative input terminal of the comparator COMP. When an overcurrent or short circuit occurs in the power transistor, the voltage at the gate of the power transistor needs to drop to protect the power transistor. As the gate voltage of the power transistor decreases, the sampling voltage VFB also decreases accordingly. In the first stage, when the sampling voltage VFB is greater than the change threshold VREF_dv, the comparator COMP outputs a first comparison result (e.g., a high level). In the second stage, when the sampling voltage VFB drops below the change threshold VREF_dv, the comparator COMP outputs a second comparison result (e.g., a low level). The first comparison result or the second comparison result is provided to the switch discharge module 40 to enable the switch discharge module 40 to switch its operating state.

[0032] In one embodiment, the switch discharge module 40 includes a switch transistor 41. The output of the comparator COMP is coupled to the gate of the switch transistor 41. The source of the switch transistor 41 is connected to the negative operating voltage VEE, and the drain of the switch transistor 41 is connected to the gate of the power transistor. In one specific embodiment, the switch transistor is an LDMOS; in other embodiments, it can be a DEMOS or other high-voltage device. When the comparator COMP outputs a first comparison result, the switch transistor 41 is turned on, and the switch discharge module 40 and the power transistor are in a conducting state, causing the power transistor to discharge rapidly. When the comparator COMP outputs a second comparison result, the switch transistor 41 is turned off, and the switch discharge module 40 and the power transistor are in a high-impedance state, causing the power transistor to discharge slowly. These are the two operating states of the switch discharge module 40. Because the variable threshold VREF_dv connected to the negative input terminal of the comparator COMP is higher than the fixed threshold voltage VREF, the comparator COMP "prematurely" determines that the gate voltage of the power transistor has dropped to the "fixed threshold voltage VREF" (referred to as "advance"), and thus notifies the switch 41 to switch. There is a delay between the comparator COMP completing its determination and the switch 41 completing its switching, assuming this delay is Tdelay. By the time the switch 41 completes its switching, the gate voltage of the power transistor has dropped by another VSR*Tdelay (relative to the time when the comparator COMP completes its determination, referred to as "delay"). If the "advance" of the comparator COMP's determination corresponds to the "delay" of the power transistor's gate voltage drop, then the gate voltage of the power transistor can be stabilized at a desired value after the drop, which is the expected two-level voltage. The "advance" of the comparator COMP's determination and the "delay" of the power transistor's gate voltage drop should satisfy the following equation:

[0033] Vdelta=VSR*Cmom*Rd=VSR*Tdelay*R2 / R1+R2);

[0034] That is, Cmom*Rd=Tdelay*R2 / (R1+R2);

[0035] An equation independent of the slew rate VSR of the power transistor's gate voltage was obtained. By designing and adjusting the parameters of the pull-up capacitor Cmom, the pull-up resistor Rd, the delay Tdelay, the first resistor R1, and the second resistor R2, so that Cmom*Rd is equal to Tdelay*R2 / (R1+R2), it can be achieved that regardless of the type of power transistor, it can remain at the same two-level voltage.

[0036] In one embodiment, the switch discharge module 40 further includes a level conversion unit 42. The input terminal of the level conversion unit 42 is connected to the output terminal of the comparator COMP, and the output terminal of the level conversion unit 42 is coupled to the gate of the switching transistor 41. The level conversion unit 42 is also connected to the negative operating voltage VEE and ground GND. Because in some cases, the output signal COMPOUT of the comparator COMP cannot directly drive the switching transistor 41, the level conversion unit 42 is needed to convert the output signal COMPOUT.

[0037] In one embodiment, the switch discharge module 40 further includes a two-level turn-off control unit 43 and a soft turn-off control unit 44. The two-level turn-off control unit 43 and the soft turn-off control unit 44 are connected in parallel between the output terminal of the level conversion unit 42 and the gate of the switching transistor. They operate according to the first comparison result or the second comparison result output by the comparison module 30, respectively. In the first operating state, the two-level turn-off control unit 43 controls the switching transistor 41 to turn on, and the switch discharge module 40 and the power transistor are in a conducting state. In the second operating state, the soft turn-off control unit 44 controls the switching transistor 41 to turn off, and the switch discharge module 40 and the power transistor are in a high-impedance state. If the two-level turn-off control unit 43 and the soft turn-off control unit 44 are not present, the comparator COMP outputs the first comparison result, and the level conversion unit 42 can directly drive the switching transistor 41 to fully turn on; the comparator COMP outputs the second comparison result, and the level conversion unit 42 can directly drive the switching transistor 41 to fully turn off. However, when completely turned off, the current on the gate of the power transistor will be extremely small, which will prolong the voltage drop on the gate of the power transistor, potentially causing the power transistor to fail to receive the necessary protection. The two-level turn-off control unit 43 and the soft turn-off control unit 44 control the switching transistor 41 to turn on and off respectively. The two-level turn-off control unit 43 can output a digital signal to drive the switching transistor 41 to turn on completely, while the soft turn-off control unit 44 can provide a smaller current (relative to the current during normal conduction) to the gate of the power transistor. Although the switch discharge module 40 and the power transistor are also in a high-impedance state at this time, the switching transistor 41 is actually in a partially turned-off state. The voltage on the gate of the power transistor can drop more slowly (relative to normal conduction), but it is still faster than the drop rate when the switching transistor 41 is completely turned off, thus further ensuring that the power transistor can be protected in a timely manner. In one specific embodiment, the comparator COMP outputs the first comparison result, at which point the two-level shutdown control unit 43 becomes active; the comparator COMP outputs the second comparison result, at which point the soft shutdown control unit 44 becomes active. Of course, those skilled in the art can easily conceive of other suitable modifications and adjustments. It should be further noted that the operating delays of the two-level shutdown control unit 43, the soft shutdown control unit 44, the level conversion unit 42, the switching transistor 41, and other units and devices collectively constitute the aforementioned "delay Tdelay".

[0038] In one embodiment, the drive protection circuit of the power transistor further includes a connected pulse generation circuit 50 and a first switch K1. The two ends of the first switch K1 are connected in parallel to the two ends of the second resistor R2. The pulse generation circuit 50 is connected between the output of the comparator COMP and the first switch K1. When the comparator COMP outputs the first comparison result, the pulse generation circuit 50 does not work, and the first switch K1 is in an open state. When the comparator COMP outputs the second comparison result, the pulse generation circuit 50 generates a pulse output, controlling the first switch K1 to be in a closed state during the effective time of the pulse, and the second resistor R2 is short-circuited and shielded. At the instant the switch transistor 41 is turned off, due to the resonance of the parasitic output inductance and gate capacitance, a spike will appear in the gate voltage of the power transistor. This may cause the sampling voltage VFB to be higher than the change threshold VREF_dv again, and then the output of the comparator COMP will flip, the switch transistor 41 will be turned on again, and the gate voltage of the power transistor will drop again, causing the actual obtained "two-level voltage" to be inconsistent with the expectation. Therefore, by connecting the output of the comparator COMP and the second resistor R2 of the sampling module 10 through the pulse generation circuit 50 and the first switch K1, a pulse is generated when the output signal COMPOUT of the comparator COMP switches from the first comparison result to the second comparison result. This pulse short-circuits and shields the second resistor R2 for the effective time of the pulse. At this time, the sampling voltage VFB is actually zero and can never exceed the change threshold VREF_dv, thus preventing the output of the comparator COMP from flipping and allowing the entire circuit to work stably. Of course, the effective time of this pulse must be longer than the aforementioned "delay Tdelay" to ensure that the switch 41 is turned off before the shielding of the second resistor R2 is removed. At this time, the second resistor R2 resumes to form a voltage divider sampling circuit (sampling module 10) with the first resistor R1. If the voltage of the gate of the power transistor is still above the two-level voltage (the previous comparison switch of the comparator COMP may have been incorrect due to some uncertain factors), the circuit can continue to work to pull down the voltage of the gate of the power transistor to the two-level voltage, ensuring that the voltage of the gate of the power transistor can remain at the expected two-level voltage.

[0039] In one embodiment, the pull-up voltage generation unit 22 further includes a connected zero-current source Ibias0 and a zero-switch K0. The free end of the zero-current source Ibias0 is grounded to GND, and the free end of the zero-switch K0 is connected to the first terminal of the pull-up capacitor Cmom. The output terminal of the comparator COMP is also connected to the zero-switch K0. The comparator COMP outputs the first comparison result, and the zero-switch K0 is in an open state. The comparator COMP outputs the second comparison result, and the zero-switch K0 is in a closed state. The zero-current source Ibias0 provides a hysteresis voltage to the pull-up voltage generation unit 22. Because under different process corners, Cmom*Rd and Tdelay*R2 / (R1+R2) may not be equal and may differ by a certain value, this may cause the switch 41 to turn on again after the first shutdown, resulting in the actual two-level voltage being less than the target voltage by an error of VSR*Tdelay. This application utilizes the zeroth current source Ibias0 and the zeroth switch K0 to provide a bias current Ibias0 after the switch 41 is turned off. This ensures that the fixed threshold voltage VREF will have a hysteresis voltage Vos = Ibias0 * Rd after the switch 41 is turned off. As long as the hysteresis voltage Ibias0 * Rd can cover the deviation between Cmom * Rd and Tdelay * R2 / (R1 + R2), it can be ensured that the switch 41 will not be turned on a second time. This avoids the situation where the actual two-level voltage is less than the target voltage by an error of VSR * Tdelay.

[0040] In one embodiment, the pull-up voltage generation unit 22 further includes a first current source Ibias1 and a second current source Ibias2. The source of the first MOSFET PM1 is connected to the operating voltage via the first current source Ibias1, and the source of the second MOSFET PM2 is connected to the operating voltage via the second current source Ibias2. The function of the first current source Ibias1 and the second current source Ibias2 is to limit the maximum value of the pull-up voltage Vdelta, preventing the switching transistor 41 from turning off prematurely due to the instantaneous large slew rate VSR caused by the resonance interference on the gate of the power transistor. The maximum value of the first current source Ibias1 and the second current source Ibias2 is the product of the maximum slew rate VSR under normal application and the pull-up capacitor Cmom.

[0041] The power transistor drive protection circuit described in this application includes a threshold generation module that senses the slew rate (VSR) of the power transistor's gate voltage through the pull-up capacitor, converts it into current, and replicates (with a certain proportional relationship) this current to the pull-up resistor Rd via a current mirror. This creates a voltage difference between the first and second terminals of the pull-up resistor Rd, which is superimposed on the fixed threshold voltage VREF to form the variable threshold VREF_dv. This allows the comparator COMP to "advance" the drop in the power transistor's gate voltage to the "fixed threshold voltage VREF" (referred to as "advance amount"), thereby notifying the switch transistor 41 to switch. When the switch transistor 41 completes the switching, the power transistor's gate voltage drops by another VSR*Tdelay (referred to as "delay amount" relative to when the comparator COMP completes its judgment). By designing and adjusting various parameters, the comparator COMP's "advance" in making its judgment corresponds to the "delay" in the voltage drop at the power transistor's gate. This ensures that regardless of the type of power transistor connected, the gate voltage of the power transistor can be stabilized at a predetermined value after the voltage drop, which is the desired two-level voltage. Thus, the power transistor drive and protection circuit described in this application can guarantee safer operation of the power transistor and prevent damage.

[0042] It should be understood that the above description is for illustrative purposes and not for limitation. Many embodiments and applications beyond the provided examples will be apparent to those skilled in the art upon reading the above description. Therefore, the scope of this teaching should not be determined by reference to the above description, but rather by reference to the foregoing claims and the full scope of their equivalents. For purposes of completeness, all articles and references, including patent applications and publications, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the foregoing claims is not intended as a waiver of that subject matter, nor should it be construed as an indication that the applicant has not considered that subject matter as part of the disclosed application subject matter.

Claims

1. A drive and protection circuit for a power transistor, used for connection to a power transistor, characterized in that, The drive protection circuit for the power transistor includes: The sampling module is coupled to the gate of the power transistor, obtains the current voltage of the gate of the power transistor, and generates a sampling voltage; A threshold generation module is coupled to the gate of the power transistor to obtain the voltage change of the power transistor and generate a change threshold. The comparison module is coupled to both the sampling module and the threshold generation module, and acquires the sampling voltage provided by the sampling module and the change threshold provided by the threshold generation module, and outputs a first comparison result or a second comparison result. The switching discharge module is coupled to both the comparator module and the gate of the power transistor. Based on the first comparison result or the second comparison result output by the comparator module, it has two operating states: a first operating state in which the switching discharge module and the power transistor are in a conducting state; and a second operating state in which the switching discharge module and the power transistor are in a high-resistance state. A pull-up drive resistor is connected between the sampling module and the gate of the power transistor; the threshold generation module includes a fixed threshold generation unit and a pull-up voltage generation unit connected together; the fixed threshold generation unit includes a low-dropout linear regulator to provide a fixed threshold voltage; the pull-up voltage generation unit includes a pull-up capacitor, a pull-up resistor, a first MOSFET, and a second MOSFET. The first MOSFET and the second MOSFET form a current mirror. The source of the first MOSFET and the source of the second MOSFET are both coupled to the operating voltage. The gate of the first MOSFET, the gate of the second MOSFET, and the drain of the second MOSFET are all connected to the first terminal of the pull-up capacitor. The second terminal of the pull-up capacitor is connected between the sampling module and the pull-up drive resistor. The drain of the first MOSFET is connected to the first terminal of the pull-up resistor. The second terminal of the pull-up resistor is connected to the low-dropout linear regulator to receive the fixed threshold voltage provided by the low-dropout linear regulator. The first terminal of the pull-up resistor is connected to the comparator module to provide the changing threshold.

2. The power transistor drive protection circuit as described in claim 1, characterized in that, A pull-up drive signal is also connected between the sampling module and the pull-up drive resistor; a pull-down drive resistor is connected between the switch discharge module and the gate of the power transistor, and a pull-down drive signal is also connected between the switch discharge module and the pull-down drive resistor.

3. The power transistor drive protection circuit as described in claim 1, characterized in that, The comparison module includes a comparator. The first end of the pull-up resistor is connected to the negative input terminal of the comparator. The sampling module includes a first resistor and a second resistor connected in series. The connection point of the first resistor and the second resistor is connected to the positive input terminal of the comparator. The free end of the first resistor is connected to the pull-up drive resistor. The free end of the second resistor is grounded. The output terminal of the comparator outputs either the first comparison result or the second comparison result.

4. The power transistor drive protection circuit as described in claim 3, characterized in that, The drive protection circuit of the power transistor also includes a connected pulse generation circuit and a first switch. The two ends of the first switch are connected in parallel to the two ends of the second resistor. The pulse generation circuit is connected between the output of the comparator and the first switch. When the comparator outputs the first comparison result, the pulse generation circuit does not work and the first switch is in the open state. When the comparator outputs the second comparison result, the pulse generation circuit generates a pulse output, controlling the first switch to be in the closed state during the effective time of the pulse, and the second resistor is short-circuited and shielded.

5. The power transistor drive protection circuit as described in claim 4, characterized in that, The voltage boosting unit further includes a zero-current source and a zero-switch connected together. The free end of the zero-current source is grounded, and the free end of the zero-switch is connected to the first terminal of the boosting capacitor. The output terminal of the comparator is also connected to the zero-switch. The comparator outputs the first comparison result, and the zero-switch is in an open state. The comparator outputs the second comparison result, and the zero-switch is in a closed state. The zero-current source provides a hysteresis voltage to the voltage boosting unit.

6. The power transistor drive protection circuit as described in claim 1, characterized in that, The voltage boosting unit further includes a first current source and a second current source. The source of the first MOS transistor is connected to the operating voltage via the first current source, and the source of the second MOS transistor is connected to the operating voltage via the second current source.

7. The power transistor drive protection circuit as described in claim 3, characterized in that, The switching discharge module includes a switching transistor, the output terminal of the comparator is coupled to the gate of the switching transistor, the source of the switching transistor is connected to a negative operating voltage, and the drain of the switching transistor is connected to the gate of the power transistor.

8. The power transistor drive protection circuit as described in claim 7, characterized in that, The switch discharge module also includes a level conversion unit. The input terminal of the level conversion unit is connected to the output terminal of the comparator, and the output terminal of the level conversion unit is coupled to the gate of the switch transistor. The level conversion unit is also connected to the negative operating voltage and ground.

9. The power transistor drive protection circuit as described in claim 8, characterized in that, The switching discharge module further includes a two-level turn-off control unit and a soft turn-off control unit. The two-level turn-off control unit and the soft turn-off control unit are connected in parallel between the output terminal of the level conversion unit and the gate of the switching transistor. They operate according to the first comparison result or the second comparison result output by the comparison module. In the first operating state, the two-level turn-off control unit controls the switching transistor to turn on, and the switching discharge module and the power transistor are in a conducting state. In the second operating state, the soft turn-off control unit controls the switching transistor to turn off, and the switching discharge module and the power transistor are in a high-impedance state.

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