Heuristic neural network architecture search method

Abstract

The application discloses a heuristic neural network architecture search method and an information processing device. The provided heuristic neural network architecture search method comprises the following steps: acquiring a unit stack model of a neural network model to be searched, which is described by a hierarchical representation technology; sampling each edge of each unit of the plurality of units to obtain an instance of the neural network model to be searched; training and verifying the instance of the neural network model to obtain a verification set accuracy; updating operation performance of a sampling operation of each edge of each unit; updating a confidence upper limit of the sampling operation of each edge of each unit; updating a probability of each operation of each edge of each unit being sampled; removing operations from an operation space of each edge of each unit to narrow the operation space; and taking a last operation remaining in the operation space of each edge of each unit as a selected operation, and obtaining a neural network architecture to be searched.

Description

Technical Field

[0001] The present invention relates to the field of deep learning technology, and more particularly to a heuristic neural network architecture search method. Background Art

[0002] Deep learning has made tremendous progress in computer vision. However, optimizing performance relies on meticulously designed model structures. Neural network architectures, including parameters such as the number of convolutional layers and kernel size, are high-dimensional, discrete, and interdependent. Searching for neural architectures requires extensive domain expertise and consumes significant manpower, effort, and time. This is why Neural Architecture Search (NAS) has emerged as a technology to achieve this. This technology has already achieved excellent results in applications such as image classification and object detection.

[0003] Figure 1 The neural network model and its parameters are shown.

[0004] As an example, Figure 1 The neural network model design includes weight initialization (using random uniform initialization), activation function (using ReLU), loss function (using cross entropy error), hidden layer (number of 3), number of nodes per layer (p, p+1, P+2, P+3 and 10 respectively), optimizer (using SGD), dropout layer (L4). Hyperparameters involved in the neural network model include learning rate, dropout rate and batch size.

[0005] Figure 1 Hyperparameters of the neural network architecture: Model design includes weight initialization (random uniform initialization), activation function (ReLU), loss function (cross entropy error), hidden layer (3), number of nodes per layer, optimizer (SGD), dropout layer; hyperparameters include learning rate, dropout size, batch size.

[0006] Traditional neural architecture search trains and validates a complete network model architecture from scratch. Due to the huge search space, it requires huge computation and memory resources to traverse all candidate architectures. Existing techniques such as hierarchical representation, weight sharing, performance prediction, etc. can improve the efficiency of neural architecture search. One of the reasons for the low efficiency of neural architecture search is that the current network model architecture is stacked by many network layers, and the type (convolution, fully connected, pooling, etc.) and parameters (convolution kernel size, fully connected node number, etc.) of each network layer are different, which makes the network search space huge, thereby reducing the search efficiency. Hierarchical representation technology (for example, Zoph B, Vasudevan V, Shlens J, et al. Learning transferable architectures for scalable image recognition [C] / / Proceedings of the IEEE conference on computer vision and pattern recognition. 2018: 8697-8710, and Liu H, Simonyan K, Vinyals 0, et al. Hierarchical representations for efficient architecture search [J]. arXiv preprint arXiv: 1711.00436, 2017.) simplifies the complex network structure into different basic cells (Cells) stacked, and the type of Cell includes Normal Cell, ReductionCell and Conv Cell modules, which realize different functions. By using modular Cells to stack and reconstruct the model, it is equivalent to reduce the search space, thereby improving the search efficiency.

[0007] Figure 2 A schematic diagram of a hierarchical representation method of a neural network model is shown.

[0008] Figure 2 Two neural network models are shown, which are represented as network models stacked by different Cells respectively. For different neural network models, the number of stacked Cell layers and / or the type of each Cell can change.

[0009] Since different neural network architectures need to be trained to determine their performance, the time consumption in neural architecture search mainly occurs in the training process. Reducing the training time through weight sharing can greatly improve the search efficiency. One-Shot Architecture Search uses the training weights of a large network containing different structures as the basis, and the different small models obtained by dividing the large network share the weights, so as to realize fast search for the best model structure in the sub-models. Figure 3 A schematic diagram of neural architecture search is shown.

[0010] Another way to reduce the training time is to use a new proxy model, which can evaluate the performance of the model by using only a small number of training results, such as training an LSTM (Long Short-Term Memory) proxy model to evaluate the learning curve. Figure 4 A curve graph of evaluating the learning curve by using an LSTM proxy model is shown. SUMMARY

[0011] Although the prior art has effectively improved the search efficiency, the size of the search space increases exponentially with the number of possible operations at each node, and the existing neural architecture search technology still faces the challenge of intensive computation and memory cost. The efficient search strategy is limited by the contradiction between limited attempts and huge search space.

[0012] Therefore, the present application designs a heuristic search strategy based on the multi-armed bandit problem, estimates the potential of the model by using the performance confidence upper bound of the training process, and balances the efficiency of the architecture and the deviation of the calculation, greatly reduces the search space and the calculation cost, and improves the search efficiency.

[0013] In order to achieve the above object, the present application provides the following technical scheme: A heuristic neural network architecture search method, characterized in that it comprises the following steps: S1, obtaining a unit stack model of a neural network model to be searched, which is described by a hierarchical representation technique, the unit stack model comprising a plurality of stacked units, each unit being represented as a fully connected directed acyclic graph comprising a plurality of nodes and a plurality of edges, wherein the nodes represent tensors of the neural network, and the edges between the nodes represent operations selected from an operation space with limited operations; S2, sampling each edge of each unit of the plurality of units to select the operation represented by the edge, and obtaining an instance of the neural network model to be searched; S3, training and verifying the instance of the neural network model with a training set and a verification set to obtain a verification set accuracy; S4, updating the operation performance of the sampled operation of each edge of each unit with the verification set accuracy and the historical operation performance of each edge of each unit; S5, updating the confidence upper limit of the sampled operation of each edge of each unit with the operation performance of the sampled operation of each edge of each unit; S6, updating the probability of each operation of each edge of each unit being sampled with the confidence upper limit of each operation of each edge of each unit; S7, removing operations from the operation space of each edge of each unit according to the operation performance of each operation of each edge of each unit to reduce the operation space; and S8, taking the last operation remaining in the operation space of each edge of each unit as the selected operation, and obtaining the neural network architecture to be searched.

[0014] Advantages of the present application

[0015] 1. The present application designs a heuristic search strategy for neural network architecture, estimates the performance of the model architecture using the performance confidence upper limit during the training process, effectively alleviates the contradiction between the limited attempts and the huge search space, and improves the search efficiency.

[0016] 2. The present application designs a pre-evaluation strategy during the model training process, evaluates using the confidence upper bound, realizes pre-evaluation of the performance of the model architecture, and improves the exploration efficiency in the search process.

[0017] 3. The present application designs a model architecture abandonment strategy, gradually abandons these model structures as the training period increases, reduces the operation space, and saves the cost of calculation and storage.

[0018] 4. The present application designs a model architecture search strategy, early traversal of the search space, uses the pre-evaluation strategy to avoid random and insufficient exploration, and then retains high-potential architectures according to the abandonment strategy, to realize efficient neural architecture search. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to make the technical solutions of the embodiments of the present application or the prior art clearer, the accompanying drawings needed in the embodiments or prior art description will be briefly introduced. Obviously, the accompanying drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0020] Figure 1 A neural network model and its parameters are shown.

[0021] Figure 2 A schematic diagram of a hierarchical representation method of a neural network model is shown.

[0022] Figure 3 A schematic diagram of a neural network architecture search is shown.

[0023] Figure 4 A curve diagram of a learning curve evaluated by an LSTM agent model is shown.

[0024] Figure 5 A schematic diagram of a neural network search method according to the present application is shown.

[0025] Figure 6A The structure of a searched Normal Cell type is shown.

[0026] Figure 6B The structure of a searched Reduction Cell type is shown. DETAILED DESCRIPTION

[0027] It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the present application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0028] The embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0029] Figure 5 A schematic diagram of a neural network search method according to the present application is shown.

[0030] Figure 5 In the figure, the basic cells (Cell) of a neural network for hierarchical representation are shown. The searched neural network architecture is stacked by the basic cells Cell. The same neural network search method according to the present application is used to search the optimal network architecture for each basic cell constituting different neural network models.

[0031] As Figure 5As shown, the internal of each basic unit Cell includes nodes (represented by the rectangular boxes of Bx) and operations between nodes (represented by the lines with arrows). The nodes represent tensors of the convolutional neural network, and the directed edge (i, j) between i, j nodes (also called nodes Bi and Bj) represents an inter-node operation o in the operation space O (i，j) (·). Therefore, one basic unit Cell can be represented as a fully connected directed acyclic graph. For each directed edge, the operation space O is composed of, for example, K=8 candidate operations: 3x3 max pooling, 3x3 average pooling, 3x3 transpose convolution, 5x5 transpose convolution, 5x5 depthwise separable convolution, 3x3 depthwise separable convolution, no connection, direct connection. Each edge contains two directions of forward and backward, and therefore the total search space size of one Cell is K 2ε , and ε represents the number of edges in a unit Cell.

[0032] Figure 5 In the internal schematic diagram of the basic unit Cell shown on the left, the Cell is composed of nodes B-1~B4 (a total of 6 nodes), and the circular mark C represents a concatenation operation, and the output output after concatenation is the output of the basic unit (cell). One or more such cells are stacked to form a neural network model. Bi, B j The directed edge (i, j) between nodes represents an inter-node operation o in the operation space O (i，j) (·).

[0033] Figure 5 The right part is a schematic diagram of sampling operations o from the search space in the neural network architecture search process according to an embodiment of the present application to obtain a neural network model. (i，j) (·). Figure 5 The right part shows the sampling of the edge (i, j) of the unit (cell) in the t-th round of search, and each edge of each cell constituting the neural network model is sampled by the same method to obtain the sampling of the edge, and then the entire neural network model is obtained. The sampling of the edge (i, j) is to select an appropriate operation from the K possible operations of the edge (i, j) for constructing the neural network model.

[0034] The neural network model with the sampled edges is trained to evaluate the performance of the neural network model.

[0035] Each round of search process includes, for example, the following 5 steps.

[0036] (1) According to the potential (upper confidence limit) of each selectable operation k of the edge (i, j) calculated in the last round of training (t-1 round) (t is the current round, k represents the operation, 1<=k<=K, and the value of k represents the specific type of operation), calculate the probability of sampling edge (i, j) (also see formula 1.3 below), and randomly sample the operations of edge (i, j) according to the obtained probability (in accordance with the calculated sampling probability distribution) to obtain the operation of edge (i, j) in round t.

[0037] Figure 5 middle represents the number of times each optional operation (k) on edge (i, j) has been sampled in the t-1 round of search before the start of the t round of sampling. As an example, Figure 5 In the example, the operation k=1 is selected for edge (i, j), so For other operations that are not sampled, The value of remains unchanged.

[0038] The selection of operation k=1 for sampling edge (i, j) is determined according to the following formula 1.3: Formula 1.3 gives the probability of sampling various operations and selects the current operation k for edge (i, j) based on the probability of each operation.

[0039] (2) Sample each directed edge of the neural network model to obtain the neural network model used in the tth round of training, and train the model. During training, the accuracy of the validation set is obtained.

[0040] (3) Using the validation set accuracy obtained through training and historical operational performance Updated predicted operational performance (Formula 1.1). Optionally, the calculation is based on the formula 1.1. As the next round (t+1) of search

[0041] For example, see also Figure 5 , for edge (i, j), operation k = 1 is selected in the tth round of search. Next, after training the neural network model, update For the operation (k=2~8) where edge (i, j) is not selected, the corresponding Remain unchanged.

[0042] (4) Evaluate the neural network model to obtain the confidence upper bound of edge (i, j) (See also Equation 1.2.) For each edge in the neural network model, its predicted operational performance and confidence limit are updated in one round of search.

[0043] (5) The parameter t recording the search round is accumulated, and the process returns to step (1) to continue the next round of iterative search.

[0044] In the next round of search, the probability distribution of randomly sampling the operation of each edge is re-determined using the upper confidence bound of each operation of each edge.

[0045] The search process continues for TK rounds, where K is the size of the operation space of an edge and T is a specified constant.

[0046] After TK rounds of search, the current upper confidence bound of each edge is updated according to the current upper confidence bound of each edge The operation with the lowest potential is removed from the operation space of each edge (see also Equation 1.4), thereby reducing the operation space of each edge. The reduction of the operation space is performed edge by edge, and the removed operation of each edge can be the same or different. The iterative search of steps (1)-(5) is then repeated.

[0047] Thus, each search of TK rounds reduces the operation space of each edge of the neural network model by one element. After TK rounds of search, the element of the operation space of each edge is one, i.e., the optimal operation is searched, and the optimal neural network model is represented by the optimal operation of each edge.

[0048] Predictive performance evaluation method

[0049] Using Equation (1.1), the operation performance is updated in step (3) of the above iterative search using the validation accuracy of the constructed neural network model in the t-th round on the validation set:

[0050]

[0051] wherein, denotes the number of samplings of operation k on edge (i, j) in the t-th round (the cumulative sum of the number of samplings of operation k on the edge in the first t rounds), denotes the validation set accuracy corresponding to the operation, obtained from the validation process on the validation set, denotes the predicted operation performance of the corresponding operation, denotes the predicted operation performance of the corresponding operation obtained in the t-1-th iteration, and its initial value is, for example, 1 / K, representing equal probability selection from K operations. Y denotes the confidence of the current training epoch accuracy, which increases with the increase of the training epoch.

[0052] The confidence Y is estimated using the upper confidence bound (UCB, Upper Confidence Bound), and the upper confidence bound of operation k on edge (i, j) is calculated by Equation 1.2:

[0053]

[0054] The first term represents the predicted performance calculated by formula 1.1, which represents the tendency of the evaluation strategy of the application to directly utilize the historical training performance; the second term represents the tendency to explore more in future training, and the parameter δ is used to balance exploration and utilization.

[0055] Search strategy

[0056] Input: training set, validation set, structure diagram of the neural network model to be searched, candidate operation set of each edge of the neural network model to be searched;

[0057] Output: optimal neural network model.

[0058] According to an embodiment of the application, to search for a neural network model, first, for each edge of the neural network model to be searched, an operation of each edge is selected using a non-replacement sampling strategy, and an initial neural network model is obtained. The parameters of the neural network model are randomly initialized, and K rounds of training are performed, where K is the operation space size of the edge of the neural network. The number of rounds of search performed is recorded by the parameter t, and the current t = K.

[0059] Next, the neural network model is searched according to the processing flow expressed by the following pseudo code.

[0060]

[0061] When the operation space size of the edge is K, the search is performed for a maximum of (K-1)*TK rounds, where T is a specified parameter. Every TK rounds of search, the operation space of each edge is reduced according to the confidence upper limit of each operation of each edge, so that after (K-1)*TK rounds of operation, there is only a single operation left in the operation space of each edge, which is used as the preferred operation of each edge.

[0062] In each TK rounds of search (denoted as the t-th round) (also see Figure 5 ), first, the confidence upper limit of the edge (i, j) obtained in the last round (t-1 round) is used by formula 1.3 to obtain the probability of sampling each operation of the edge (i, j) in the t-th round of search and according to the probability, the operation of the edge (i, j) is randomly sampled to obtain the operation k of the edge (i, j) in the t-th round. The operations of each edge of the neural network model to be searched are sampled to obtain the neural network model used in the t-th round of search.

[0063] The obtained neural network model is trained using the training set, and the neural network model is verified using the validation set, to obtain the validation set accuracy where It represents the number of times the operation k on the edge (i, j) has been sampled at the current time (in the tth round) (the cumulative sum of the number of times the operation k on the edge was sampled in the previous t rounds).

[0064] Update the performance of each edge's operation k sampled in round t using Equation 1.1. Also update the confidence upper bound for each edge's operation k sampled in round t using Equation 1.2. Then proceed to the next round of iterative search.

[0065] After TK rounds of search have been performed, the abandonment strategy (Formula 1.4) is used to reduce the operation space of each side of the neural network model.

[0066] Sampling strategy

[0067]

[0068] in represents the confidence upper bound calculated using Formula 1.2 in round t-1, represents the sampling probability of operation k on the t-th round edge (i, j) in space O, and α regulates the variance of the probability distribution to achieve optimal convergence.

[0069] Abandonment Strategy

[0070]

[0071] As the training cycle increases, low-potential operations are gradually abandoned, reducing the operation space O, and the last remaining operation is regarded as the optimal operation. Optionally, during the iterative search process, if the operational performance and / or validation set accuracy of the neural network architecture discovered in a certain round of search has reached or exceeded the target, the search can be stopped early and the discovered neural network architecture can be regarded as the optimized neural network architecture.

[0072] The performance of neural architecture search is mainly limited by the contradiction between the huge search space and the limited number of training times. Therefore, this paper designs a heuristic search strategy for neural architecture search, which uses the performance confidence upper bound of the training process to estimate the model potential, thereby balancing the performance of the architecture and the deviation of limited calculations. By pre-eliminating low-potential operations, the search space is reduced, resource consumption is saved, and search efficiency is improved.

[0073] The present scheme is experimentally verified on the ClFAR-10 dataset (Learning Multiple Layers of Features from Tiny Images, Alex Krizhevsky, 2009.) (60000 32x32 size pictures, containing 10 categories of airplanes, cars, birds, cats, deer, dogs, frogs, horses, ships, trucks, etc.), the experimental hyperparameter settings in the search process are T = 3, K = 8, δ = 0.12, α = 0.6, the batch size is set to 512, the learning rate is 0.025, the cos attenuation strategy is adopted, the momentum is 0.9, and the weight decay is 3e-4.

[0074] The final Cell structure determined in the search process is as shown in Figure 6A and Figure 6B . Among them Figure 6A shows the structure of the Normal Cell (normal cell type) searched, Figure 6B shows the structure of the Reduction Cell (reduction cell type) searched.

[0075] After determining the network architecture, the neural network model is trained, the initial learning rate is 0.025, the momentum is 0.9, the weight decay is 3e-4, the dropout rate is 0.2, and the training process is performed on a GTX1080Ti. The experimental results are shown in Table 1, and it can be seen that the heuristic neural network architecture search strategy of the present application achieves a very good recognition accuracy, and the calculation time is only 0.05 GPU·day, achieving the saving of calculation resources and the improvement of search efficiency.

[0076] Table 1 Comparison of common neural network search architectures on the CIFAR-10 dataset

[0077]

[0078] The sources of the above neural network architectures are listed below, and the numbers after the names of the neural network architectures in Table 1 correspond to the numbers in the following text:

[0079] (1) Kaiming He, Xiangyu Zhang, Shaoqing Ren, and Jian Sun. Deep residual learning for image recognition. In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, pages 770-778, 2016.

[0080] (2) Gao Huang, Zhuang Liu, Laurens Van Der Maaten, and Kilian Q Weinberger. Dense ly connected convolutional networks. In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, pages 4700-4708, 2017.

[0081] (3) Barret Zoph, Vijay Vasudevan, Jonathon Shlens, and Quoc V Le. Learning transferable architectures for scalable image recognition. In Proceedings of the IEEE conference on computer vision and pattern recognition, pages 8697-8710, 2018.

[0082] (4) Esteban Real, Alok Aggarwal, Yanping Huang, and Quoc V Le. Regularized evolution for image classifier architecture search. In Proceedings of the Thirty-Third AAAI Conference on Artificial Intelligence, 2019.

[0083] (5) Chenxi Liu, Barret Z., Maxim N., Jonathon S., Wei H., Li-Jia L., Fei-Fei L. and Alan Y., Jonathan H., and Kevin M. Progressive neural architecture search. In Proceedings of the European Conference on Computer Vision, pages 19-34, 2018.

[0084] (6) Hieu Pham, Melody Y Guan, Barret Zoph, Quoc V Le, and Jeff Dean. Efficient neural architecture search via parameter sharing. Proceedings of the 35th International Conference on Machine Learning, 2018.

[0085] (7) Han Cai, Jiacheng Yang, Weinan Zhang, Song Han, and Yong Yu. Path level network transformation for efficient architecture search. In Proceedings of the International Conference on Machine Learning, 2018.

[0086] (8) Hanxiao Liu, Karen Simonyan, and Yiming Yang. DARTS: Differentiable architecture search. In Proceedings of International Conference on Learning Representations, 2019.

[0087] (9) Hanxiao Liu, Karen Simonyan, and Yiming Yang. DARTS: Differentiable architecture search. In Proceedings of International Conference on Learning Representations, 2019.

[0088] (10) Yuhui Xu, Lingxi Xie, Xiaopeng Zhang, Xin Chen, Guo-Jun Qi, Qi Tian, and Hongkai Xiong. PC-DARTS: Partial channel connections for memory-efficient architecture search. In Proceedings of International Conference on Learning Representations, 2020.

[0089] (11) Xiawu Zheng, Rongrong Ji, Lang Tang, Baochang Zhang, Jianzhuang Liu, and Qi Tian. Multinomial distribution learning for effective neural architecture search. In Proceedings of the IEEE International Conference on Computer Vision, 2019.

[0090] The above merely illustrates the preferred embodiments of the present application, and is not intended to limit the present application. Any modification, equivalent replacement, improvement, etc. made to the present application shall be included in the protection scope of the present application.

Claims

1. A heuristic neural network architecture search method, characterized in that: include: Step S1, obtaining a unit stacking model of a neural network model to be searched described by a hierarchical representation technology, wherein the unit stacking model includes a plurality of stacked units, and each unit is represented as a fully connected directed acyclic graph including a plurality of nodes and a plurality of edges, wherein the nodes represent tensors of the neural network, and the edges between the nodes represent operations selected from a finite operation space; Step S2, sampling each edge of each unit of the plurality of units to select the operation represented by the edge and obtain an instance of the neural network model to be searched; Step S3, training and verifying the examples of the neural network model using the training set and the verification set to obtain the verification set accuracy; Step S4, using the verification set accuracy and the historical operation performance of each side of each unit, updating the operation performance of the sampled operation of each side of each unit; Step S5, updating the confidence upper limit of the sampled operations of each side of each unit using the operational performance of the sampled operations of each side of each unit; Step S6, using the confidence upper bound of each operation on each side of each unit to update the probability of each operation on each side of each unit being sampled; Step S7: removing operations from the operation space of each side of each unit according to the operation performance of each operation of each side of each unit to reduce the operation space; as well as Step S8 takes the last remaining operation in the operation space of each side of each unit as the selected operation, and obtains the neural network architecture to be searched; In step 4, for the sampled operation k of edge (i, j) in the t-th round search, according to Update the performance of the sampled operation k of edge (i, j); represents the number of times the sampled operation k of edge (i, j) has been sampled in the t-th round of search, represents the accuracy of the verification set obtained in the t-th round of search, represents the performance of operation k of edge (i, j) obtained by the search in the t-1th round; In step S5, for the sampled operation k of edge (i, j) in the t-th round search, according to Update the confidence upper bound of the sampled operation k of edge (i, j), where δ is a specified parameter; In step S6, for the sampled operation k of edge (i, j) in the t-th round search, according to Update the probability of the sampled operation k of edge (i, j) being sampled in round t+1, where α is a specified parameter used to control the variance of the probability distribution; In step S2, for the edge (i, j) in the t+1 round of search, according to the probability Select operation k as the sampled operation for edge (i, j); in Steps S2 to S6 constitute one round of search; The method includes multiple rounds of searching that are repeatedly performed; After executing a specified number of rounds of searches in the multiple rounds of searches, executing step 7, and then returning to step 2 to perform the next round of searches in the multiple rounds of searches; In step S7, for edge (i, j), Remove an operation from its operation space To reduce the operating space (i,j) .

2. The method according to claim 1, wherein The number of rounds of the multi-round search is K-1 multiplied by the specified number of rounds, where K is the initial size of the operation space.

3. The method according to claim 2, wherein Before step 2, the method further includes randomly sampling the edges of each unit of the multiple units to obtain an instance of the neural network model to be searched, and performing K rounds of training on the instance of the neural network model.

4. The method according to claim 3, wherein For operations other than the sampled operation k of edge (i, j) in the t-th round of search, the operation performance remains unchanged.

5. The method according to claim 4, wherein In step S7, for edge (i, j), Remove an operation from its operation space To reduce the operating space (i,j) .

6. An information processing device comprising a memory, a processor, and a program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method according to any one of claims 1 to 5 is implemented.

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