Electronic device and charging management circuit thereof

Abstract

The present application relates to electronic equipment and its charging management circuit, charging management circuit includes first electronic switch tube, second electronic switch tube, third electronic switch tube, first diode, charging input and battery power input terminal;When the electronic equipment is not connected to the external power supply, the charging input is not connected with the external power supply, the control end of second electronic switch tube and the control end of third electronic switch tube are low level, second electronic switch tube and third electronic switch tube are turned on, first electronic switch tube is turned on, and the system power supply end is powered by battery power input terminal;When the electronic equipment is connected to the external power supply, second electronic switch tube and third electronic switch tube are cut off, and the system power supply end is powered by charging input.In the time of external power supply disconnection, the disconnection of second electronic switch tube and third electronic switch tube can effectively avoid battery discharge and avoid frequent charging and discharging of battery.

Description

Technical Field

[0001] This invention relates to the field of charging management technology, and in particular to an electronic device and its charging management circuit. Background Technology

[0002] In current consumer products, the use of lithium batteries is becoming increasingly widespread. However, many of these products have relatively simple internal power management and insufficient safety awareness. This simplistic power management manifests primarily in the lack of complete independence between charging and discharging, leading to the battery constantly alternating between these states. This reduces battery lifespan and, in severe cases, can cause abnormal overheating, swelling, bulging, leakage, or even fire.

[0003] In most charging circuits, the charging chip stops and shuts down charging to protect the battery once it is fully charged. However, a significant number of electronic products, with their simple design, stop providing current after the charging chip is fully charged, yet the product continues to consume power, causing the battery capacity to drop.

[0004] Comparing domestic and foreign charging management chips, they all have a built-in recharging function, that is, after the battery is fully charged, when the battery voltage drops to a certain level, the charging chip will recharge the battery.

[0005] Throughout this process, the battery will continuously cycle between charging and discharging, leading to a reduction in battery life and an increase in the risk of battery use. Summary of the Invention

[0006] Therefore, it is necessary to provide an electronic device and its charging management circuit.

[0007] A charging management circuit includes: a first electronic switch, a second electronic switch, a third electronic switch, a first diode, a charging input terminal, and a battery power supply input terminal;

[0008] The charging input terminal is connected to the positive terminal of the first diode, and the negative terminal of the first diode is used to connect to the system power supply terminal.

[0009] The battery power input terminal is connected to the first terminal of the first electronic switch, the second terminal of the first electronic switch is connected to the first terminal of the second electronic switch, the second terminal of the second electronic switch is connected to the second terminal of the third electronic switch, and the first terminal of the third electronic switch is used to connect to the system power supply terminal. The control terminal of the first electronic switch is connected to the battery power input terminal and is also used for grounding. The control terminals of the second and third electronic switches are respectively connected to the charging input terminal and are also used for grounding. The first electronic switch is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The second electronic switch is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The third electronic switch is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal.

[0010] In one embodiment, the first electronic switch, the second electronic switch, and the third electronic switch are all P-type MOS transistors.

[0011] In one embodiment, the first terminal of the first electronic switch is the source, the second terminal of the first electronic switch is the drain, and the control terminal of the first electronic switch is the gate; the first terminal of the second electronic switch is the source, the second terminal of the second electronic switch is the drain, and the control terminal of the second electronic switch is the gate; the first terminal of the third electronic switch is the source, the second terminal of the third electronic switch is the drain, and the control terminal of the third electronic switch is the gate.

[0012] In one embodiment, the device further includes a switch and a fourth electronic switch tube, wherein a first end of the fourth electronic switch tube is connected to the control end of the first electronic switch tube, a second end of the fourth electronic switch tube is used for grounding, and the control end of the fourth electronic switch tube is connected to the switch.

[0013] In one embodiment, the fourth electronic switch is a transistor, the first terminal of the fourth electronic switch is the collector, the second terminal of the fourth electronic switch is the emitter, and the control terminal of the fourth electronic switch is the base.

[0014] In one embodiment, a seventh resistor is also included, through which the switch is connected to the control terminal of the fourth electronic switch.

[0015] In one embodiment, the system further includes a first inverter, a second inverter, a second capacitor, and a fifth electronic switch. The input terminal of the first inverter is connected to the system power supply terminal. The output terminal of the first inverter is connected to the first terminal of the second capacitor, the input terminal of the second inverter, and the first terminal of the fifth electronic switch. The second terminal of the second capacitor is grounded. The output terminal of the second inverter is connected to the control terminal of the fourth electronic switch.

[0016] In one embodiment, the fifth electronic switch is a P-type MOS transistor, the first terminal of the fifth electronic switch is the source, the second terminal of the fifth electronic switch is the drain, and the control terminal of the fifth electronic switch is the gate.

[0017] In one embodiment, the device further includes a second diode and a third diode. The output terminal of the second inverter is connected to the negative terminal of the second diode, the positive terminal of the second diode is connected to the positive terminal of the third diode and the switch, and the negative terminal of the third diode is connected to the control terminal of the fourth electronic switch.

[0018] An electronic device includes the charging management circuit described in any of the above embodiments.

[0019] The beneficial effects of this invention are as follows: When the electronic device is not connected to an external power source, the charging input terminal is not connected to the external power source, the control terminals of the second and third electronic switches are at a low level, the second and third electronic switches are turned on, the control terminal of the first electronic switch is grounded, the control terminal of the first electronic switch is at a low level, the first electronic switch is turned on, and power is supplied from the battery power input terminal to the system power supply terminal; when the electronic device is connected to an external power source, the second and third electronic switches are turned off, and power is supplied from the charging input terminal to the system power supply terminal. By controlling the charging power supply through the on / off switching of the first, second, and third electronic switches, and by effectively preventing battery discharge when the external power source is disconnected, frequent battery charging and discharging can be effectively avoided. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of the circuit principle of a charging management circuit according to one embodiment;

[0022] Figure 2 This is a circuit block diagram of an electronic device according to one embodiment. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] like Figure 1 As shown, this is a charging management circuit according to an embodiment of the present invention, including: a first electronic switch Q1, a second electronic switch Q2, a third electronic switch Q3, a first diode D1, a charging input terminal, and a battery power supply input terminal; the charging input terminal is connected to the positive terminal of the first diode D1, and the negative terminal of the first diode D1 is used to connect to the system power supply terminal; the battery power supply input terminal is connected to the first terminal of the first electronic switch Q1, the second terminal of the first electronic switch Q1 is connected to the first terminal of the second electronic switch Q2, the second terminal of the second electronic switch Q2 is connected to the second terminal of the third electronic switch Q3, and the first terminal of the third electronic switch Q3 is used to connect to the system power supply terminal; the control terminal of the first electronic switch Q1 is connected to the battery power supply input terminal. The charging input terminal is connected, and the control terminal of the first electronic switch Q1 is also used for grounding. The control terminals of the second electronic switch Q2 and the third electronic switch Q3 are respectively connected to the charging input terminal, and the control terminals of the second electronic switch Q2 and the third electronic switch Q3 are also used for grounding. The first electronic switch Q1 is turned on when the voltage at the control terminal is less than the voltage at the first terminal, and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The second electronic switch Q2 is turned on when the voltage at the control terminal is less than the voltage at the first terminal, and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The third electronic switch Q3 is turned on when the voltage at the control terminal is less than the voltage at the first terminal, and turned off when the voltage at the control terminal is greater than the voltage at the first terminal.

[0025] In this embodiment, the charging input terminal is used to connect to an external power source, the battery power input terminal is used to connect to the battery of the electronic device, and the system power supply terminal is used to connect to the internal electrical components of the electronic device to provide power to the electronic device. The electronic device can be powered by an external power source; in this case, electrical energy is delivered from the external power source to the system power supply terminal via the charging input terminal. When no external power source is connected, the electronic device is powered by the battery; in this case, electrical energy is delivered from the battery power input terminal to the system power supply terminal. The voltage at the charging input terminal is Vchg (charging input voltage), the voltage at the battery power input terminal is Vbat (battery positive terminal), and the voltage at the system power supply terminal is Vsys (system power supply).

[0026] In this embodiment, the control terminals of the second electronic switch Q2 and the third electronic switch Q3 are respectively connected to the charging input terminal through the sixth resistor R6, and the control terminals of the second electronic switch Q2 and the third electronic switch Q3 are also used to ground through the eighth resistor R8.

[0027] Specifically, when the electronic device is not connected to an external power source, the charging input terminal is not connected to the external power source, the control terminals of the second electronic switch Q2 and the third electronic switch Q3 are at a low level, and the second electronic switch Q2 and the third electronic switch Q3 are turned on. The control terminal of the first electronic switch Q1 is grounded, the control terminal of the first electronic switch Q1 is at a low level, and the first electronic switch Q1 is turned on. At this time, power is supplied from the battery power input terminal to the system power supply terminal. When the electronic device is connected to an external power source, the second electronic switch Q2 and the third electronic switch Q3 are turned off, and power is supplied from the charging input terminal to the system power supply terminal. By controlling the on / off state of the first electronic switch Q1, the second electronic switch Q2, and the third electronic switch Q3, and by disconnecting the second electronic switch Q2 and the third electronic switch Q3 when the external power source is disconnected, battery discharge can be effectively prevented, thereby effectively avoiding frequent battery charging and discharging.

[0028] In one embodiment, the first electronic switch Q1, the second electronic switch Q2, and the third electronic switch Q3 are all P-type MOS (Metal-Oxide-Semiconductor) transistors, also known as Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs).

[0029] In one embodiment, the first terminal of the first electronic switch Q1 is the source, the second terminal of the first electronic switch Q1 is the drain, and the control terminal of the first electronic switch Q1 is the gate; the first terminal of the second electronic switch Q2 is the source, the second terminal of the second electronic switch Q2 is the drain, and the control terminal of the second electronic switch Q2 is the gate; the first terminal of the third electronic switch Q3 is the source, the second terminal of the third electronic switch Q3 is the drain, and the control terminal of the third electronic switch Q3 is the gate.

[0030] In this embodiment, the P-type MOS transistor is turned on when the gate voltage is less than the source voltage, and turned off when the gate voltage is greater than the source voltage.

[0031] In one embodiment, the device further includes a switch and a fourth electronic switch Q4, wherein a first end of the fourth electronic switch Q4 is connected to the control end of the first electronic switch Q1, a second end of the fourth electronic switch Q4 is grounded, and the control end of the fourth electronic switch Q4 is connected to the switch.

[0032] In one embodiment, the fourth electronic switch Q4 is a transistor, with its first terminal being the collector, its second terminal being the emitter, and its control terminal being the base. In this embodiment, the fourth electronic switch Q4 is an NPN transistor, and its base is grounded through the twelfth resistor R12.

[0033] In one embodiment, a seventh resistor R7 is also included, and the switch is connected to the control terminal of the fourth electronic switch Q4 via the seventh resistor R7.

[0034] In this embodiment, the switch is an electronic device switch. If the switch is in the OFF state, the seventh resistor R7 is an open circuit from the switch pin to the inside of the switch, and therefore has no effect. The fourth electronic switch Q4 is an NPN transistor, and its base is connected to ground through the twelfth resistor R12, so the fourth electronic switch Q4 is disconnected. Therefore, the gate of the first electronic switch Q1 ( Figure 1 Point A is connected to the battery through the second resistor R2R2. At this time, the gate voltage of the first electronic switch Q1 is equal to the source voltage (Vbat), so the first electronic switch Q1 is also in the off state. At this time, the battery is completely disconnected from the system, and no leakage current is generated in the system, thus providing the product with standby time.

[0035] When the switch is turned OFF again, the seventh resistor R7 connected to the switch is open again, and the gate voltage of the first electronic switch Q1 is once again equal to the source voltage, causing Q1 to disconnect. This operation inevitably results in some data loss, leading to a poor user experience. Therefore, during power-on, the system main controller simultaneously acquires the switch status. After power-on, the main controller's GPIO outputs a high level to... Figure 1 Point B is at a high level, pulling the base of the fourth electronic switch Q4 high, thus turning on Q4. After power-on, the power level at point A is simultaneously pulled low by the seventh resistor R7 and the fourth electronic switch Q4, maintaining stable system power supply. Furthermore, with the addition of system-controlled power-on, the system will no longer immediately power off upon shutdown. Instead, the main controller will receive the OFF signal and then, via GPIO, turn on the power supply. Figure 1 The voltage at point B drops, causing the fourth electronic switch Q4 to turn off again. The voltage at point A rises, causing the first electronic switch Q1 to turn off again.

[0036] In one embodiment, the device further includes a battery power detection terminal, a first resistor, and a fifth resistor. The first end of the first resistor is connected to the drain of the first electronic switch Q1, and the second end of the first resistor is connected to one end of the fifth resistor and the battery power detection terminal. The second end of the fifth resistor is used for grounding.

[0037] In this way, when the first electronic switch Q1, the second electronic switch Q2, and the third electronic switch Q3 are turned on, power is supplied by the battery power input terminal. By setting the battery power detection terminal, the remaining battery power can be detected by detecting the current flowing through the first resistor and the second resistor R2.

[0038] In one embodiment, the device further includes a second resistor R2 and a ninth resistor R9. The first end of the second resistor R2 is connected to the battery power input terminal, and the second end of the second resistor R2 is connected to the gate of the first electronic switch Q1. The gate of the first electronic switch Q1 is connected to the collector of the fourth electronic switch Q4 through the ninth resistor R9.

[0039] In one embodiment, the system further includes a first inverter U1, a second inverter U2, a second capacitor C2, and a fifth electronic switch Q5. The input terminal of the first inverter U1 is connected to the system power supply terminal. The output terminal of the first inverter U1 is connected to the first terminal of the second capacitor C2, the input terminal of the second inverter U2, and the first terminal of the fifth electronic switch Q5. The second terminal of the second capacitor C2 is grounded. The output terminal of the second inverter U2 is connected to the control terminal of the fourth electronic switch Q4. The second terminal of the fifth electronic switch Q5 is grounded, and the control terminal of the fifth electronic switch Q5 is connected to the system power supply terminal.

[0040] In one embodiment, the fifth electronic switch Q5 is a P-type MOS transistor, the first terminal of the fifth electronic switch Q5 is the source, the second terminal of the fifth electronic switch Q5 is the drain, and the control terminal of the fifth electronic switch Q5 is the gate.

[0041] Specifically, the input terminal of the first inverter U1 is connected to the system power supply terminal, the output terminal of the first inverter U1 is connected to the first terminal of the second capacitor C2 and the input terminal of the second inverter U2 through the tenth resistor R10, the output terminal of the first inverter U1 is connected to the source of the fifth electronic switch Q5 through the tenth resistor R10 and the eleventh resistor R11, the second terminal of the second capacitor C2 is grounded, the output terminal of the second inverter U2 is connected to the control terminal of the fourth electronic switch Q4, the drain of the fifth electronic switch Q5 is grounded, the gate of the fifth electronic switch Q5 is connected to the system power supply terminal through the thirteenth resistor R13, and the gate of the fifth electronic switch Q5 is grounded through the fourteenth resistor R14.

[0042] To prevent the system from having no output on the GPIO when the switch is turned OFF after a system failure (such as a system crash), this embodiment adds a first inverter U1 and a second inverter U2. After the switch is turned OFF, if the system is still supplying power after 10 seconds, the voltage at point B will be forcibly pulled down, causing the system to disconnect the battery. The principle is as follows: When the switch is in the OFF position, if Vsys is still powered for a long time, it is considered that the system cannot detect and output the switch state normally. If the system detects and outputs normally, the fourth electronic switch Q4 will be turned off, the voltage at point A will rise, the first electronic switch Q1 will be turned off again, Vsys will have no voltage, and the first inverter U1 and the second inverter U2 will continue to work. When the switch is in the OFF position, the input of the first inverter U1 is low and the output is high. The high level can slowly charge the second capacitor C2 through the tenth resistor R10. When the voltage at point C reaches the threshold voltage for the logic level flip of the second inverter U2, the output of the second inverter U2 is low, the second diode D2 conducts, pulls down the voltage at point B, and turns off the fourth electronic switch Q4. The thirteenth resistor R13, the fourteenth resistor R14, and the fifth electronic switch Q5 together form a fast discharge function. The purpose is to allow the charge stored in the second capacitor C2 to be quickly discharged through the path of the fifth electronic switch Q5, so that the second capacitor C2 is normally empty and can maintain a stable 10-second forced shutdown during rapid switching.

[0043] In one embodiment, the circuit further includes a second diode D2 and a third diode D3. The output terminal of the second inverter U2 is connected to the negative terminal of the second diode D2, the positive terminal of the second diode D2 is connected to the positive terminal of the third diode D3 and the switch, and the negative terminal of the third diode D3 is connected to the control terminal of the fourth electronic switch Q4. In this embodiment, the positive terminal of the second diode D2 is connected to the switch through a fourth resistor R4.

[0044] In one embodiment, an electronic device is provided, including the charging management circuit described in any of the above embodiments.

[0045] In this embodiment, as Figure 2 As shown, the electronic device includes a charging interface, a voltage conversion circuit, a charging management chip, a rechargeable battery, and a system main controller. The charging interface is connected to the input terminals of both the charging management chip and the voltage conversion circuit. The charging management chip is connected to the rechargeable battery. The output terminals of the rechargeable battery and the voltage conversion circuit are connected to the input terminals of the power control circuit. The power control output terminal is connected to the system main controller. In this embodiment, the charging management circuit can also be called the power control circuit. The charging interface is set as the charging input terminal, which is connected to the voltage conversion circuit. The voltage conversion circuit converts the voltage of the external power source connected to the charging interface into a voltage compatible with the power control circuit. The converted electrical energy is input to the power control circuit for power selection. When the charging interface is connected to an external power source, it is powered by the charging interface via the voltage conversion circuit. When the charging interface is not connected to an external power source, it is powered by the rechargeable battery.

[0046] In this embodiment, please refer to the following: Figure 1 When the electronic device is not connected to an external power source, the charging input terminal is not connected to the external power source. The control terminals of the second electronic switch Q2 and the third electronic switch Q3 are at a low level, and the second electronic switch Q2 and the third electronic switch Q3 are turned on. The control terminal of the first electronic switch Q1 is grounded, and the control terminal of the first electronic switch Q1 is at a low level, and the first electronic switch Q1 is turned on. At this time, power is supplied from the battery power input terminal to the system power supply terminal. When the electronic device is connected to an external power source, the second electronic switch Q2 and the third electronic switch Q3 are turned off, and power is supplied from the charging input terminal to the system power supply terminal. By controlling the on / off state of the first electronic switch Q1, the second electronic switch Q2, and the third electronic switch Q3, the charging power supply is controlled. Furthermore, when the external power source is disconnected, the disconnection of the second electronic switch Q2 and the third electronic switch Q3 can effectively prevent battery discharge, thereby effectively avoiding frequent battery charging and discharging.

[0047] The specific implementation method is as follows:

[0048] For ease of explanation, the following terms are explained in this implementation:

[0049] External charging / power supply: External power supply products such as USB that provide a certain voltage to charge the battery.

[0050] Vchg: Externally supplied charging input voltage. Generally, this voltage is 5V. This article originally used 5V to replace this voltage, but it does not mean that this circuit can only work at 5V. After testing, the usable range of Vchg is 4.5V to 25V.

[0051] Vsys: System operating voltage, the voltage that maintains stable system operation.

[0052] Vo: The voltage used for battery power detection, which is supplied to the system main controller.

[0053] Vbat: Battery voltage. This voltage ranges from 3 to 4.4V. Based on this voltage, this design is suitable for designs with battery voltages less than 4.5V. Typically, the highest battery voltage for digital consumer products is 4.45V.

[0054] GPIO: In this article, GPIO refers to the output signals of the relevant control pins of the main controller.

[0055] High level: The logic level of digital circuits.

[0056] Low level: The logic level of digital circuits.

[0057] OFF: The switch is in the off position, turning off the system.

[0058] ON: The switch is in the "on" position, which powers on / turns the system on.

[0059] Several situations exist in the operation of the system:

[0060] 1. Battery powered status;

[0061] 2. External charging connection status;

[0062] 3. Power off;

[0063] 1. Battery powered status

[0064] When no external power supply is connected, Vchg has no voltage. Figure 1 Point E is at a low level, and Q2 and Q3 are P-type MOSFETs. When the gate of the P-type MOSFET ( Figure 1 When the voltage at point E is less than the source voltage, the P-MOS transistor is turned on. Therefore, when no external power supply is connected, both Q2 and Q3 are in the on state.

[0065] If the switch is in the OFF state, R7 is an open circuit from the switch pin to the switch internally, and therefore has no effect. Q4 is an NPN transistor, and its base is connected to ground through resistor R12, so Q4 is disconnected. Therefore, the gate of P-MOS Q1 ( Figure 1 Point A is connected to the battery via R2. At this time, the gate voltage of Q1 is equal to the source voltage (Vbat), so Q1 is also in the off state. The battery is completely disconnected from the system, and no leakage current is generated, thus extending the product's standby time.

[0066] When the switch is in the ON position, resistor R7 is connected to ground through the switch, forming a voltage divider with resistor R2. This causes the gate voltage of Q1 to drop. Once the gate voltage is lower than the source voltage, Q1 turns on. Since Q2 and Q3 are both on when no external power is connected, Vsys is supplied by the battery, enabling the system to power on and operate.

[0067] After the switch is turned OFF again, R7 connected to the switch is open again, and the gate voltage of Q1 is equal to the source voltage again, causing Q1 to disconnect. This operation inevitably results in some data loss, leading to a poor user experience. Therefore, during power-on, the system controller simultaneously acquires the switch status. After power-on, the controller's GPIO outputs a high level to... Figure 1 Point B is at a high level, pulling the base of Q4 high and turning Q4 on. After power-on, the level at point A is simultaneously pulled low by R7 and Q4, maintaining stable system power supply. Furthermore, with the addition of system-controlled power-on, the system will no longer immediately power off upon shutdown. Instead, the main controller will receive the OFF signal and then, via GPIO, turn the power off... Figure 1 The voltage at point B drops, causing Q4 to disconnect again. The voltage at point A rises, causing Q1 to disconnect again.

[0068] To prevent a situation where the system GPIO has no output when the switch is turned OFF after a system failure (such as a system crash), add... Figure 1 The content within the dashed box serves the following purpose: After the switch is toggled to OFF, if the system is still supplying power after 10 seconds, it will forcibly pull down the voltage at point B, causing the system to disconnect the battery. The principle is as follows: When the switch is OFF, if Vsys still has power for an extended period (in which case the system is considered unable to properly detect and output the switch state; if the system could normally detect and output, Q4 would disconnect, the voltage at point A would rise, Q1 would disconnect again, and Vsys would have no voltage), then inverters U1 and U2 would continue to operate. When the switch is to the OFF position, the input to U1 is low, and the output is high. The high level can slowly charge capacitor C2 through R10. Once the voltage at point C in Figure 3 reaches the threshold voltage for U2's logic level to flip, U2 outputs a low level, diode D2 conducts, pulling down the voltage at point B and causing Q4 to disconnect.

[0069] R13, R14 and Q5 together form a fast discharge mechanism, which allows the charge stored in capacitor C2 to be quickly discharged through the Q5 path, keeping C2 at a normal empty charge, and ensuring that the switch can maintain a stable 10-second forced shutdown time during rapid toggling.

[0070] 2. External charging connection status;

[0071] Regardless of whether the system is powered on or off, external power supply will immediately pull the signal high. Figure 1 The voltage at point E disconnects Q2 and Q3, and the system is powered by Vchg.

[0072] If the system is powered on, Vbat supplies power to the system through Q1, Q2, and Q3. When an external power supply is connected, Vchg is generated momentarily. When Vchg rises to equal Vbat, Q2 and Q3 are disconnected, and the system is powered by Vchg. When the external power supply is removed, Vchg disappears momentarily. When Vchg drops below Vbat, Q2 and Q3 turn on, and Vbat resumes power supply to the system. The system will not suddenly lose power during this process.

[0073] At the same time, such as Figure 2 After an external power supply is connected, part of it powers the system and the other part charges the battery.

[0074] 3. Power off;

[0075] When the system is powered on or off, Q1, Q2, Q3, and Q4 remain disconnected. Vbat has no complete discharge path in the entire system, and the system will not consume battery power even if it is left powered off for a long time.

[0076] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0077] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A charging management circuit, characterized in that, include: First electronic switch, second electronic switch, third electronic switch, first diode, charging input terminal, battery power input terminal, switch, fourth electronic switch, first inverter, second inverter, second capacitor and fifth electronic switch; The charging input terminal is connected to the positive terminal of the first diode, and the negative terminal of the first diode is used to connect to the system power supply terminal. The battery power input terminal is connected to the first terminal of the first electronic switch transistor, the second terminal of the first electronic switch transistor is connected to the first terminal of the second electronic switch transistor, the second terminal of the second electronic switch transistor is connected to the second terminal of the third electronic switch transistor, and the first terminal of the third electronic switch transistor is used to connect to the system power supply terminal. The control terminal of the first electronic switch transistor is connected to the battery power input terminal and is also used for grounding. The control terminals of the second and third electronic switches transistors are respectively connected to the charging input terminal and are also used for grounding. The first electronic switch transistor is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The second electronic switch transistor is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The third electronic switch transistor is turned on when the voltage at the control terminal is less than the voltage at the first terminal and turned off when the voltage at the control terminal is greater than the voltage at the first terminal. The first terminal of the fourth electronic switch is connected to the control terminal of the first electronic switch, the second terminal of the fourth electronic switch is grounded, the control terminal of the fourth electronic switch is connected to the switch, the input terminal of the first inverter is connected to the system power supply terminal, the output terminal of the first inverter is connected to the first terminal of the second capacitor, the input terminal of the second inverter and the first terminal of the fifth electronic switch, the second terminal of the second capacitor is grounded, and the output terminal of the second inverter is connected to the control terminal of the fourth electronic switch.

2. The charging management circuit according to claim 1, characterized in that, The first electronic switch, the second electronic switch, and the third electronic switch are all P-type MOS transistors.

3. The charging management circuit according to claim 2, characterized in that, The first terminal of the first electronic switch is the source, the second terminal of the first electronic switch is the drain, and the control terminal of the first electronic switch is the gate; the first terminal of the second electronic switch is the source, the second terminal of the second electronic switch is the drain, and the control terminal of the second electronic switch is the gate; the first terminal of the third electronic switch is the source, the second terminal of the third electronic switch is the drain, and the control terminal of the third electronic switch is the gate.

4. The charging management circuit according to claim 1, characterized in that, The fourth electronic switch is a transistor, with its first terminal being the collector, its second terminal being the emitter, and its control terminal being the base.

5. The charging management circuit according to claim 1, characterized in that, It also includes a seventh resistor, through which the switch is connected to the control terminal of the fourth electronic switch tube.

6. The charging management circuit according to claim 1, characterized in that, The fifth electronic switch is a P-type MOS transistor, with its first terminal being the source, its second terminal being the drain, and its control terminal being the gate.

7. The charging management circuit according to claim 1, characterized in that, It also includes a second diode and a third diode. The output terminal of the second inverter is connected to the negative terminal of the second diode. The positive terminal of the second diode is connected to the positive terminal of the third diode and the switch. The negative terminal of the third diode is connected to the control terminal of the fourth electronic switch.

8. An electronic device, characterized in that, Includes the charging management circuit described in any one of claims 1-7.

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