A circuit board fault diagnosis method based on image recognition technology

By employing an image recognition-based circuit board fault diagnosis method, this method utilizes the copper positioning circle on the circuit board for image localization and rotation correction. Combined with image enhancement and edge extraction algorithms, it identifies component and circuit board-level faults on the circuit board, solving the problem of inaccurate circuit board fault identification in existing technologies and achieving efficient and accurate fault detection.

CN116168218BActive Publication Date: 2026-06-16CRRC CHANGCHUN RAILWAY VEHICLES CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CRRC CHANGCHUN RAILWAY VEHICLES CO LTD
Filing Date
2022-11-22
Publication Date
2026-06-16

AI Technical Summary

Technical Problem

Existing technologies struggle to accurately identify component and circuit board level faults on circuit boards, especially those other than component loss and collision. Furthermore, circuit board deflection can impair diagnostic results.

Method used

A circuit board fault diagnosis method based on image recognition technology is adopted. By locating the copper positioning circle on the circuit board, image positioning and rotation correction are performed. Combined with image enhancement, noise reduction, edge extraction algorithms and convolutional neural network, component faults and circuit board level faults are identified.

🎯Benefits of technology

It enables accurate identification of component faults such as missing components, component misalignment, component flipping, component skew, and incorrect components on circuit boards, as well as accurate detection of faults such as circuit board burnout and excessive solder, thereby improving the accuracy and reliability of diagnosis.

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Abstract

The application relates to a circuit board fault diagnosis method based on an image recognition technology, which comprises the following steps: collecting visible light image data of a circuit board by using a visible light camera; processing the visible light image data of the circuit board; comparing the components and elements on the measured circuit board with corresponding component and element pictures in a standard library according to cosine similarity, traversing all the components and elements, and judging the components and elements that may have faults; specifically judging the components and elements that may have faults, adopting an edge extraction algorithm and corresponding rules for judgment; detecting the measured circuit board by using a template matching algorithm, judging whether there is a circuit board level fault, and if there is a defect, specifically judging the circuit board level fault by using a Canny method and the like. The method can accurately identify faults such as missing components, element deviation, component rotation, element skew, wrong components, and circuit board level faults such as burning and multiple tins, and the diagnosis result is accurate and reliable.
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Description

Technical Field

[0001] This invention relates to the field of faulty circuit board testing technology, and more specifically to a circuit board fault diagnosis method based on image recognition technology. Background Technology

[0002] Circuit board fault identification is a fundamental step in the circuit board repair process. If surface faults or even internal faults of the circuit board can be detected in the early stages of testing, the repair efficiency will be greatly improved.

[0003] Typical circuit board failures include component failures and circuit board-level failures. Component failures include: missing components (components are missing or not mounted, or there is no component in the location); component misalignment (components are displaced horizontally and / or vertically, with a shift in the center point); component skew (the outer boundary of the component under test is at an angle to the standard component, i.e., there is a tilt angle); component tombstoning / sideways standing (the solder paste melting time at both ends of the component is inconsistent, resulting in uneven stress on both ends of the chip component, causing one side to lift up under stress); component flipping (reversed); and incorrect component placement (component model or type is incorrectly mounted). Circuit board-level failures include: contamination, burn-out, breakage, cracks, deformation (dents, warping, and other board surface deformations), and excessive solder.

[0004] Currently, circuit board fault identification mainly relies on experienced repair personnel to perform manual inspections using optical instruments, which is inefficient and cannot detect internal problems of the circuit board.

[0005] Chinese patent CN 113536868 A discloses a "circuit board fault identification method," which includes the following steps: acquiring an image of the circuit board under test, the circuit board under test including multiple components to be tested; annotating the multiple components to be tested in the image of the circuit board under test to obtain candidate images of each component to be tested; obtaining the position information of each component to be tested based on the candidate images of each component to be tested; extracting the component features of each candidate image based on the aggregation channel feature method to obtain the first feature vector of each candidate image; identifying the component type of each component to be tested based on the first feature vector of each candidate image; determining whether the circuit board under test has a fault based on the component type and position information of each component to be tested, and outputting fault information when the circuit board under test has a fault. However, this patent can only identify component faults, and cannot accurately identify other fault types except for component loss faults and component collision faults; in addition, if the circuit board is deflected during the processing of the circuit board image, it will directly affect the final diagnostic result, leading to inaccurate diagnostic results. Summary of the Invention

[0006] The purpose of this invention is to provide a circuit board fault diagnosis method based on image recognition technology. This method can accurately identify faults such as missing components, component misalignment, component flipping, component skew, and incorrect components, as well as circuit board-level faults such as burnout and excessive solder. The diagnosis results are accurate and reliable.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] A circuit board fault diagnosis method based on image recognition technology, the method includes the following steps:

[0009] Step S1: Adjust and control the light source, and use a visible light camera to acquire visible light image data of the circuit board;

[0010] Step S2: Process the visible light image data of the circuit board:

[0011] Step S2.1 Circuit board image positioning

[0012] Using copper positioning circles set at any three corners of the circuit board as markers, the centers of two of the three positioning circles are on the same horizontal line, and the centers of two of the copper positioning circles are on the same vertical line. The positioning circles are initially extracted using a method based on image color information, and the three HSI components are calculated. Then, the image is binarized according to the threshold of the HSI components, and dilation processing is performed. The positioning circles are extracted using a method based on connected component labeling. Finally, the centers of the three positioning circles are calculated and used as reference points.

[0013] Step S2.2 Rotation of the circuit board image

[0014] After locating the circuit board image, the coordinate information of three reference points is obtained, denoted as (x1, y1), (x2, y2), and (x3, y3) respectively. Based on the coordinate information of the three reference points, it is determined whether the circuit board image has been deflected. If it is deflected, rotation correction is performed. After rotation, the RGB color features of the image are saved, and the HSI component is calculated and saved using the conversion formula.

[0015] Step S2.3 Image Enhancement

[0016] The image is converted to a grayscale image, and then grayscale histogram equalization is used to enhance the image.

[0017] Step S2.4: Denoise the image using mean filtering;

[0018] Step S3: Perform component fault detection based on the circuit board image obtained in step S2.

[0019] Step S3.1: Identify and analyze the image of the circuit board under test, determine all the components and their positions on the circuit board under test, compare the components on the circuit board under test with the corresponding component pictures in the standard library using cosine similarity, and traverse all components to determine the components that may have faults.

[0020] Step S3.2: Conduct specific fault determination on the components that may have faults. The method for specific fault determination of components is as follows:

[0021] (1) Resistance missing component fault determination

[0022] Use the edge extraction algorithm to locate and detect the distribution of black and white points in the square welding area at both ends of the resistor on the circuit board image. Set a threshold s0, and calculate the proportion of white points in the area s = number of white points in the area / number of points in the area; if s < s0, it is determined as a missing component.

[0023] (2) Resistance offset fault determination

[0024] After being processed by the edge extraction algorithm, calculate the number of black and white points in the welding area, and determine whether left and right offsets occur based on the number of black and white points in the welding area; then starting from the center of the welding area, first move up or down a certain distance, and then move inward a certain distance. If a white point is encountered on the way, it is determined that there is no up and down offset; otherwise, it is determined that this resistor is offset downward or upward.

[0025] (3) Resistance flipped component fault determination

[0026] After being processed by the edge extraction algorithm, take a region in the center of the image as the determination region, calculate the proportion s of the number of black points in the region. If s is greater than 0.95, it is determined that this resistor is flipped front and back.

[0027] (4) Resistance skew fault determination

[0028] After being processed by the edge extraction algorithm, starting from the centers of the two welding areas at both ends, move towards the center of the image, find the first white point, then search around, find the white points with the same change trend within a certain range, and then perform least squares fitting to obtain the slope of the fitting line, calculate the angle between the line and the horizontal line. If the angle is less than the set threshold, it is determined that this resistor is skewed.

[0029] (5) Wrong component fault determination

[0030] Use a convolutional neural network model to identify the model on the component, and then compare it with the model of the component at the corresponding position on the standard circuit board to determine whether the component models are consistent. If they are not consistent, it is determined as a wrong component.

[0031] Step S4: Circuit board level fault detection:

[0032] Step S4.1 First, the template matching algorithm is used to detect the circuit board under test to determine whether there is a circuit board level fault. If there is a defect, then proceed to step S4.2.

[0033] Step S4.2: Specific determination of circuit board level faults.

[0034] (1) Circuit board level burn-out determination

[0035] The Canny operator is used for coarse edge localization of the image, locating the image edges at the pixel level. It detects the edges of each component and the edges of contamination in the circuit board image. The detected image edges are compared with the edges of the standard image. A threshold s0 is set, and the area s of the irrelevant edges outside the standard image is equal to the total number of irrelevant pixels. Then it is determined whether the area s of the irrelevant edges is greater than the set threshold s0. If it is higher than the threshold, there are burn or contamination defects in the area.

[0036] (2) Determination of excess solder at the circuit board level

[0037] After the standard circuit board image is denoised by mean filtering, it is binarized. Then, the image is repeatedly subjected to erosion and dilation operations to obtain a standard binary image, which is used as a template image.

[0038] After the image of the circuit board under test is filtered by mean filtering to remove noise, it is binarized. Then, the template image and the image under test are XORed to obtain the problem area of ​​the image under test. A threshold s0 is set, and the defect area s of the difference image is calculated as the number of white points in a certain area after XORing. If s>s0, then the area is considered to have excess tin.

[0039] As a preferred embodiment of the present invention, in step S2.1, the three components of HSI are calculated from the RGB values ​​between [0,1] of the image, and the calculation formula is as follows:

[0040]

[0041]

[0042]

[0043] As a preferred embodiment of the present invention, in step S2.3, when performing grayscale histogram equalization, let the total number of pixels be N, and there be L grayscale levels. Let nk be the number of pixels that appear in the k-th grayscale level rk. Then, the probability of the k-th grayscale level appearing is:

[0044]

[0045] The variation function for grayscale histogram equalization is:

[0046]

[0047] As a preferred embodiment of the present invention, when performing mean filtering to denoise the image in step S2.4, the weighting coefficients shown in the following formula are used to calculate a weighted average of the neighborhood points of the pixel to be processed, and the calculated result is assigned to that point, until every pixel in the image has been processed:

[0048]

[0049] The advantages and positive effects of this invention are:

[0050] (1) The method provided by the present invention utilizes three positioning circles on the circuit board and combines image processing technology to accurately position the circuit board image. If the circuit board is deflected, it can be rotated and corrected to ensure the accuracy and reliability of the obtained circuit board image data.

[0051] (2) The method provided by the present invention can further identify the fault type of the component after determining the component that may be faulty through edge extraction algorithm and other methods. It can accurately identify faults such as missing component fault, component offset fault, component flipping fault, component skew fault, and wrong component, so that the testing personnel can accurately understand the circuit board fault.

[0052] (3) The method provided by the present invention can also detect circuit board level faults, including burnout, contamination, excessive solder and other faults, and the diagnostic results are accurate and reliable. Attached Figure Description

[0053] Figure 1 This is a schematic diagram of the positioning circle being installed on the circuit board.

[0054] Figure 2 The images show a comparison of a deflected circuit board image and a rotated circuit board image; where a is the deflected circuit board image and b is the rotated circuit board image.

[0055] Figure 3 The images show a comparison of the circuit board before and after histogram equalization enhancement; where a is the image before enhancement and b is the image after enhancement.

[0056] Figure 4 The images show a comparison of the circuit board image before and after denoising; where a is the image before denoising and b is the image after denoising.

[0057] Figure 5 Comparison images of resistors on a circuit board before and after edge processing; where a is the image before edge processing and b is the image after edge processing.

[0058] Figure 6 This is an image of normal resistance after edge extraction algorithm processing.

[0059] Figure 7 Reverse image of the resistor

[0060] Figure 8 Extract the image from the edges of the resistor-flipped image;

[0061] Figure 9 The image of the tilted resistor after edge extraction algorithm processing;

[0062] Figure 10 This is a comparison image of solder joints on a standard circuit board and a test circuit board; where a is the image of the standard circuit board and b is the image of the test circuit board.

[0063] Figure 11 The images show a comparison between the binary image of the multi-solder joint and the image after XORing; where a is the binary image of the multi-solder joint and b is the image after XORing. Detailed Implementation

[0064] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0065] This invention provides a circuit board fault diagnosis method based on image recognition technology, the method comprising the following steps:

[0066] Step S1: Adjust and control the light source, and use a 20-megapixel visible light camera to acquire visible light image data of the circuit board;

[0067] Step S2: Process the visible light image data of the circuit board:

[0068] Step S2.1 Circuit board image positioning

[0069] Using copper positioning circles set at any three corners of the circuit board as markers, the centers of two of the three positioning circles are on the same horizontal line, and the centers of two of the copper positioning circles are on the same vertical line (see...). Figure 1 The method based on image color information is selected to initially extract the positioning circle, calculate the three HSI components, then perform image binarization based on the threshold of the HSI components, perform dilation processing, extract the positioning circle using the method based on connected component labeling, and finally calculate the center of the three positioning circles and use them as reference points.

[0070] The HSI three components are calculated from the RGB values ​​between [0,1] in the image, using the following formula:

[0071]

[0072]

[0073]

[0074] Where H represents hue, S represents saturation, and I represents density;

[0075] Step S2.2 Rotation of the circuit board image

[0076] After the circuit board image is located, the coordinate information of three reference points is obtained, denoted as (x1, y1), (x2, y2), and (x3, y3) respectively. If the horizontal coordinates x1 and x2 of the two positioning circles on the same vertical line are not equal, the circuit board in the image will be deflected, which is not conducive to the generation and preservation of standard information. Therefore, the image needs to be rotated and corrected according to its deflection.

[0077] Figure 2 For the circuit board image with deflection and the rotated circuit board image, using the two reference points (x1, y1) and (x2, y2) at the top left and bottom left as references, the image is rotated at an angle of... The image is rotated; after rotation, the RGB color features of the image within a rectangular range starting from (X1,Y1) and ending at (X3,Y2) are saved, and the HSI components are calculated and saved using the above conversion formula.

[0078] Step S2.3 Image Enhancement

[0079] Image enhancement involves processing an image to preserve its information. Histogram equalization, on the other hand, enhances contrast by non-linearly stretching and redistributing the pixel grayscale values. A grayscale histogram is plotted with the image's grayscale levels on the x-axis and the probability of each grayscale level on the y-axis. Histogram equalization enhances the image by altering the distribution of its grayscale values; the process is as follows:

[0080] Let the total number of pixels be N, and there be L gray levels, where the k-th gray level is r k The number of pixels that appear is n k The probability of the kth gray level appearing is:

[0081]

[0082] The variation function for grayscale histogram equalization is:

[0083]

[0084] This embodiment converts the image into a grayscale image, and then uses grayscale histogram equalization to enhance the image. Figure 3 These are comparison images of the circuit board before and after histogram equalization enhancement; where a is the image before enhancement and b is the image after enhancement.

[0085] Step S2.4 Image Denoising

[0086] Denoising is achieved through image filtering. In an image, noise can make a pixel appear significantly brighter or darker than its surroundings. Filtering is used to handle these outliers. Mean filtering, on the other hand, selects a neighborhood around a given pixel and replaces that pixel's value with the average value of all points within that neighborhood. This is represented by the following formula using modular operation coefficients:

[0087]

[0088] The effect of mean filtering can be improved by changing the weighting coefficients, resulting in a weighted average filter, as shown in the formula below:

[0089]

[0090] In this embodiment, the mean filtering process for the image is performed by using the weight coefficients shown in the above formula to calculate a weighted average of the neighborhood points of the pixel to be processed, and then assigning the result to that point until every pixel in the image has been processed.

[0091] Figure 4 The images show a comparison of the circuit board image before and after denoising; where a is the image before denoising and b is the image after denoising.

[0092] Step S3: Perform component fault detection based on the circuit board image obtained in step S2.

[0093] Step S3.1: Identify and analyze the image of the circuit board under test, determine all components and their positions on the circuit board under test, compare the cosine similarity of the components on the circuit board under test with the corresponding component images in the standard library, traverse all components, and identify components that may be faulty.

[0094] Step S3.2: Perform specific fault determination on potentially faulty components. After testing, mark the fault location and fault type on the tested circuit board with a box. The method for specific fault determination of components is as follows:

[0095] (1) Determining the fault of missing resistor components

[0096] There are square soldering areas at both ends of the resistor, which are only fully exposed when a component is missing. This can be used to determine whether a component is missing at this location.

[0097] Use the edge extraction algorithm to locate and detect the distribution of black and white dots in the square welding area at both ends of the resistor on the circuit board image. After edge extraction, the value of the image matrix is 0 at black areas and 255 at white areas, and the distribution of black and white dots in the square area can be roughly located and detected. If there is a missing component, most of them are black dots. Therefore, set a threshold s0 and calculate the proportion of white dots in the area s = number of white dots in the area / number of dots in the area; if s < s0, it is determined that there is a missing component.

[0098] Figure 5 Comparison diagrams before and after edge processing for the resistor on the circuit board; where, a is the image before edge processing and b is the image after edge processing.

[0099] (2) Judgment of resistor offset fault

[0100] After being processed by the edge extraction algorithm, the image of a normal resistor is as Figure 6 shown; if the resistor is offset left or right, the welding area on the left or right will be exposed. Therefore, judge whether the welding area on the left or right is exposed by calculating the number of black and white dots in the welding area, and then complete the judgment of left or right offset;

[0101] If the resistor is offset up or down, a section of the vertical edge inside the welding area will be exposed. Therefore, starting from the center of the welding area, first move up or down a certain distance (such as one-fourth of the image height), and then move inwards a certain distance (such as one-fourth of the image height). If a white dot is encountered on the way, it proves that no small section of the edge is exposed above or below; otherwise, it can be determined that this resistor is offset down or up.

[0102] (3) Judgment of resistor flipping fault

[0103] Considering that there is no pattern on the back of the surface-mounted resistor, as Figure 7 shown, therefore, on the basis of edge extraction, as Figure 8 shown, take a region in the center of the image, for example, a rectangle with the center at (w / 2, h / 2), a width of 2w / 5, and a height of h / 2 as the judgment region, calculate the proportion s of the number of black dots in the region. If s is greater than 0.95, it is determined that this resistor is flipped front and back.

[0104] (4) Judgment of resistor skew fault

[0105] After being processed by the edge extraction algorithm, the image of a skew resistor is as Figure 9As shown, starting from the center of the welding area at both ends, move towards the center of the image to find the first white point, and then search around to find white points within a certain range (e.g., less than 5 units away) with the same trend (e.g., moving to the upper left or lower right, which ensures they are roughly on a line). The set of these points is the left or right slant of the resistor. Then, perform least squares fitting to obtain the slope of the fitted line, and then calculate the angle between the line and the horizontal line. If the angle is less than the set threshold (e.g., 80 degrees), the resistor is determined to be skewed.

[0106] (5) Fault determination of incorrect components: The model of the component is identified by a convolutional neural network model, and then compared with the model of the corresponding component on the standard circuit board to determine whether the component model is correct.

[0107] Step S4: Circuit board level fault detection

[0108] Step S4.1 First, a template matching algorithm is used to inspect the circuit board under test to determine whether there is a circuit board-level fault. During template matching, a template image (standard circuit board image) and the image to be inspected are input. The images are preprocessed to extract information such as image features or grayscale. The similarity between the image to be inspected and the template image is calculated, and then an appropriate threshold is set to determine whether there is a defect in the circuit board under test. If a defect is found, step S4.2 is executed.

[0109] Step S4.2: Specific determination of circuit board level faults.

[0110] (1) Circuit board level burn-out determination

[0111] The Canny operator is used for coarse edge localization of the image, locating the image edges at the pixel level. The edges of each component and the contaminated edges in the circuit board image are detected. The edges of the image to be detected are compared with the edges of the standard image. A threshold s0 is set. The area s of the irrelevant edges outside the standard image is equal to the total number of irrelevant pixels. Then it is determined whether the area s of the irrelevant edges is greater than the set threshold s0. If it is higher than the threshold, there are contamination defects such as burns in the area.

[0112] (2) Determination of excess solder at the circuit board level

[0113] Set a binarization parameter c. If the gray value of a certain point is greater than c, the binarized value will be 255; otherwise, it will be 0. After the circuit board under test is filtered and denoised, it is binarized in the above manner. Then, the binary image is used for subsequent defect extraction and recognition.

[0114] First, the binary image of the standard circuit board is morphologically processed. Firstly, considering the influence of noise, the image is eroded. Secondly, considering deviations during binarization, tiny burrs and redundant connections may appear on the image; therefore, repeated erosion and dilation operations (opening and closing operations) are performed on the image. Specifically, using the same structuring element to erode and then dilate the image (opening operation) eliminates burrs and redundant connections. Using the same structuring element to dilate and then erode (closing operation) smooths out image defects and fills in minor breaks. After processing, the minor defects on the standard circuit board are removed, resulting in a standard binary image that can be used as a template image.

[0115] For the image being tested, no opening or closing operations are performed to preserve image defects. Then, an XOR operation is performed on the template image and the image being tested to obtain the problem area of ​​the image being tested. Due to noise, there may be minor flaws. A threshold s0 is set, and the area of ​​the flaws in the difference image is calculated as s = the number of white dots in a certain area after XOR. If s > s0, the area is considered to be defective; otherwise, it is filtered out to remove other interference.

[0116] This patent was funded by the National Key R&D Program of China, with the project title "Research on Key Technologies and Applications of Intelligent Maintenance for Rail Transit in Mega-Cities", project number "2020YFB1600704".

[0117] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, and are not intended to limit them; although the foregoing embodiments have described the embodiments of the present invention in detail, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the embodiments of the present invention.

Claims

1. A circuit board fault diagnosis method based on image recognition technology, characterized in that, The method includes the following steps: Step S1: Adjust the control light source and collect visible light image data of the circuit board using a visible light camera; Step S2: Process the visible light image data of the circuit board: Step S2.1 Circuit board image positioning Take the copper positioning circles set at any three corners of the circuit board as markers. Among the three positioning circles, the centers of two copper positioning circles are on the same horizontal line, and the centers of two copper positioning circles are on the same vertical line. Select a method based on image color information to preliminarily extract the positioning circles, calculate the three HSI components, then perform image binarization according to the thresholds of the HSI components, perform dilation processing, and use the method based on connected region labeling to extract the positioning circles. Finally, calculate the centers of the three positioning circles and use them as reference points; Step S2.2 Rotation of the circuit board image After the circuit board image is positioned, the coordinate information of the three reference points is obtained, denoted as (x1, y1), (x2, y2), and (x3, y3) respectively; judge whether the circuit board image is deflected according to the coordinate information of the three reference points; if deflected, perform rotation correction, save the RGB color characteristics of the image after rotation, and calculate and save the HSI components through the conversion formula; Step S2.3 Image enhancement Convert the image into a grayscale image and perform enhancement processing on the image using grayscale histogram equalization; Step S2.4: Denoise the image using mean filtering; Step S3: Perform component - type fault detection on the circuit board image obtained in step S2 Step S3.1 Identify and analyze the image of the measured circuit board, determine all the components and their positions on the measured circuit board, compare the components on the measured circuit board with the corresponding component pictures in the standard library using cosine similarity, and traverse all components to judge the components that may have faults; Step S3.2 Perform specific fault determination on the components that may have faults. The method for specific fault determination of components is as follows: (1) Resistance missing component fault determination Use the edge extraction algorithm to locate and detect the distribution of black and white points in the square welding area at both ends of the resistor on the circuit board image. Set a threshold s0, and calculate the proportion of white points in the area s = number of white points in the area / number of points in the area; if s < s0, it is determined as a missing component; (2) Resistance offset fault determination After being processed by the edge extraction algorithm, calculate the number of black and white points in the welding area, and judge whether there is left - right offset according to the number of black and white points in the welding area; then starting from the center of the welding area, first move up or down a certain distance, and then move inward a certain distance. If a white point is encountered on the way, it is determined that there is no up - down offset; otherwise, it is determined that this resistor is offset downward or upward; (3) Resistance flipped component fault determination After being processed by the edge extraction algorithm, take a region at the center of the image as the determination region, calculate the proportion s of the number of black points in the region. If s is greater than 0.95, it is determined that this resistor is flipped front - to - back; (4) Resistance skew fault determination After edge extraction algorithm processing, starting from the center of the welding area at both ends, move towards the center of the image to find the first white point, and then search around to find white points with the same trend of change within a certain range. Then perform least squares fitting to obtain the slope of the fitted line and calculate the angle between the line and the horizontal line. If the angle is less than the set threshold, the resistor is determined to be skewed. (5) Determination of faulty parts A convolutional neural network model is used to identify the model number on the component, and then it is compared with the model number of the corresponding component on the standard circuit board to determine whether the model numbers are consistent. If they are inconsistent, the component is identified as the wrong one. Step S4, Circuit Board Level Fault Detection: Step S4.1 First, the template matching algorithm is used to detect the circuit board under test to determine whether there is a circuit board level fault. If there is a defect, then proceed to step S4.

2. Step S4.2: Specific determination of circuit board level faults. (1) Circuit board level burn-out determination The Canny operator is used for coarse edge localization of the image, locating the image edges at the pixel level. It detects the edges of each component and the edges of contamination in the circuit board image. The detected image edges are compared with the edges of the standard image. A threshold s0 is set, and the area s of the irrelevant edges outside the standard image is equal to the total number of irrelevant pixels. Then it is determined whether the area s of the irrelevant edges is greater than the set threshold s0. If it is higher than the threshold, there are burn or contamination defects in the area. (2) Determination of excess solder at the circuit board level After the standard circuit board image is denoised by mean filtering, it is binarized. Then, the image is repeatedly subjected to erosion and dilation operations to obtain a standard binary image, which is used as a template image. After the image of the circuit board under test is filtered by mean filtering to remove noise, it is binarized. Then, the template image and the image under test are XORed to obtain the problem area of ​​the image under test. A threshold s0 is set, and the defect area s of the difference image is calculated as the number of white points in a certain area after XORing. If s>s0, then the area is considered to have excess tin.

2. The circuit board fault diagnosis method based on image recognition technology according to claim 1, characterized in that, In step S2.1, the three HSI components are calculated from the RGB values ​​between [0,1] in the image, using the following formula:

3. The circuit board fault diagnosis method based on image recognition technology according to claim 1, characterized in that, In step S2.3, during grayscale histogram equalization, let the total number of pixels be N, and there be L grayscale levels. Let nk be the number of pixels appearing at the k-th grayscale level rk. Then the probability of the k-th grayscale level appearing is: The variation function for grayscale histogram equalization is:

4. The circuit board fault diagnosis method based on image recognition technology according to claim 1, characterized in that, In step S2.4, when performing mean filtering to denoise the image, the weight coefficients shown in the following formula are used to calculate a weighted average of the neighborhood points of the pixel to be processed, and the result is assigned to that point until every pixel in the image has been processed: