Pixel circuit, driving method thereof and display panel

Abstract

The application discloses a pixel circuit, a driving method thereof and a display panel. The pixel circuit comprises a data writing module, a driving module, a light emitting module and a biasing module. The data writing module is connected between the driving module and a data line, and is used for writing data voltage provided by the data line into the driving module in a data writing stage. The first end of the driving module is connected to a first power supply, the second end of the driving module is connected to the first end of the light emitting module, the driving module is used for generating driving current according to the data voltage in a light emitting stage, the second end of the light emitting module is connected to a second power supply, and the light emitting module is used for emitting light in response to the driving current. The first end of the biasing module is connected to a biasing signal line, and the second end of the biasing module is connected to at least the second end of the driving module. The technical scheme of the embodiment of the application improves the display effect of the display panel.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] Organic light-emitting diode (OLED) display panels emit light by driving organic light-emitting diodes through pixel circuits. Specifically, the driving transistors in the pixel circuits generate driving current to drive the organic light-emitting diodes to emit light.

[0003] However, the characteristics of the driving transistors differ at different refresh rates of the display panel, resulting in a difference in display brightness after switching refresh rates compared to before switching refresh rates, which in turn leads to a poorer display effect of the display panel. Summary of the Invention

[0004] This invention provides a pixel circuit and its driving method, as well as a display panel, to improve the display effect of the display panel.

[0005] According to one aspect of the present invention, a pixel circuit is provided, the pixel circuit comprising: a data writing module, a driving module, a light-emitting module, and a biasing module;

[0006] The data writing module is connected between the driver module and the data line, and the data writing module is used to write the data voltage provided by the data line into the driver module during the data writing stage.

[0007] The first end of the driving module is connected to a first power supply, and the second end of the driving module is connected to the first end of the light-emitting module. The driving module is used to generate a driving current according to the data voltage during the light-emitting stage. The second end of the light-emitting module is connected to a second power supply, and the light-emitting module is used to emit light in response to the driving current.

[0008] The first end of the bias module is connected to the bias signal line, and the second end of the bias module is connected to at least the second end of the driving module. The bias module is used to write the bias voltage provided by the bias signal line into the first and second ends of the driving module after the data writing stage and before the light emission stage.

[0009] Optionally, the bias module includes a first bias unit;

[0010] The control terminal of the first bias unit is connected to the first scan signal line, the first end of the first bias unit is connected to the bias signal line, and the second end of the first bias unit is connected to the second end of the drive module.

[0011] Optionally, a driving cycle of the pixel circuit includes a data write frame and a data hold frame; the data write frame includes a data write phase and a first light-emitting phase, and the data hold frame includes a second light-emitting phase;

[0012] The first bias unit is used to write the first bias voltage provided by the bias signal line to the first terminal and the second terminal of the driving module after the data writing stage and before the first light-emitting stage; and to write the second bias voltage provided by the bias signal line to the first terminal and the second terminal of the driving module before the second light-emitting stage of the data holding frame.

[0013] Preferably, the second bias voltage is greater than the first bias voltage.

[0014] Optionally, the bias module includes a first bias unit and a second bias unit; the bias signal line includes a first bias sub-signal line and a second bias sub-signal line.

[0015] The control terminal of the first bias unit is connected to the first scan signal line, the first end of the first bias unit is connected to the first bias sub-signal line, and the second end of the first bias unit is connected to the first end of the drive module.

[0016] The control terminal of the second bias unit is connected to the second scan signal line, the first terminal of the second bias unit is connected to the second bias sub-signal line, and the second terminal of the second bias unit is connected to the second terminal of the drive module.

[0017] Optionally, a driving cycle of the pixel circuit includes a data write frame and a data hold frame; the data write frame includes a data write phase and a first light-emitting phase, and the data hold frame includes a second light-emitting phase;

[0018] The first bias unit is used to write the first bias voltage provided by the first bias sub-signal line to the first terminal of the driving module after the data writing stage and before the first light-emitting sub-stage; and to write the second bias voltage provided by the first bias sub-signal line to the first terminal of the driving module before the second light-emitting sub-stage of the data holding frame.

[0019] The second bias unit is used to write a third bias voltage provided by the second bias sub-signal line to the second terminal of the driving module after the data writing stage and before the first light-emitting stage; and to write a fourth bias voltage provided by the second bias sub-signal line to the second terminal of the driving module before the second light-emitting stage of the data holding frame.

[0020] Preferably, the second bias voltage is greater than the first bias voltage; and / or, the fourth bias voltage is greater than the third bias voltage.

[0021] Optionally, the pixel circuit further includes: a storage module, a threshold compensation module, a first initialization module, a first light emission control module, and a second light emission control module;

[0022] The control terminal of the data writing module is connected to the third scan signal line, the first terminal of the data writing module is connected to the data line, and the second terminal of the data writing module is connected to the first terminal of the drive module.

[0023] The storage module is connected between the first power supply and the control terminal of the drive module, and the storage module is used to store the data voltage.

[0024] The first end of the driving module is connected to a first power source through the first light-emitting control module, and the second end of the driving module is connected to the light-emitting module through the second light-emitting control module. The control end of the first light-emitting control module is connected to a first light-emitting control signal line, and the control end of the second light-emitting control module is connected to a second light-emitting control signal line. The first light-emitting control module and the second light-emitting control module are used to control whether the driving current generated by the driving module is transmitted to the light-emitting module.

[0025] The threshold compensation module is connected between the second end of the driving module and the control end of the driving module. The control end of the threshold compensation module is connected to the fourth scan signal line. The threshold compensation module is used to perform threshold compensation on the driving module during the threshold compensation stage.

[0026] The control terminal of the first initialization module is connected to the fifth scan signal line. The first initialization module is connected between the first reference signal line and the first terminal of the light-emitting module. The first initialization module is used to write the first reference voltage provided by the first reference signal line to the first terminal of the light-emitting module in the first initialization sub-stage of the data writing frame, and to write the first reference voltage to the driving module through the second light-emitting control module and the threshold compensation module; and to write the second reference voltage provided by the first reference signal line to the first terminal of the light-emitting module in the second initialization sub-stage of the data holding frame.

[0027] Preferably, the second reference voltage is greater than the first reference voltage.

[0028] Optionally, the pixel circuit further includes: a second initialization module;

[0029] The control terminal of the second initialization module is connected to the sixth scan signal line. The second initialization module is connected between the second reference signal line and the second terminal of the driving module. The second initialization module is used to write the third reference voltage provided by the second reference signal line into the second terminal and the control terminal of the driving module during the first initialization sub-stage.

[0030] Optionally, when the data voltage is different, the bias voltage provided by the bias signal line is different;

[0031] Preferably, the larger the data voltage, the larger the bias voltage.

[0032] According to another aspect of the present invention, a driving method for a pixel circuit is provided, the pixel circuit comprising: a data writing module, a driving module, a light-emitting module, and a bias module; the data writing module is connected between the driving module and a data line; a first end of the driving module is connected to a first power supply, a second end of the driving module is connected to a first end of the light-emitting module, and a second end of the light-emitting module is connected to a second power supply; a first end of the bias module is connected to a bias signal line, and a second end of the bias module is at least connected to a second end of the driving module;

[0033] The driving method includes:

[0034] During the data writing phase, the data writing module writes the data voltage provided by the data line into the driving module;

[0035] During the biasing phase, the biasing module writes the bias voltage provided by the biasing signal line into the first and second terminals of the driving module.

[0036] During the light-emitting phase, the driving module generates a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current.

[0037] According to another aspect of the present invention, a display panel is provided, the display panel including the pixel circuit described in any embodiment of the present invention.

[0038] In the technical solution of this invention, after the data writing stage and before the light emission stage, the bias module writes the bias voltage provided by the bias signal to the first and second terminals of the driving module, resetting the first and second terminals of the driving module and changing the voltage difference between the first terminal and its control terminal, thereby adjusting the bias state of the driving module and improving its characteristics. This ensures that the potential of the first terminal of the driving module is the same at different refresh frequencies, thus maintaining the same bias state before generating the driving current at different refresh frequencies. This makes the driving current generated by the driving module more consistent, thereby ensuring that the display brightness is consistent before and after switching refresh frequencies. By ensuring that the display brightness is consistent before and after switching refresh frequencies, the brightness change caused by switching refresh frequencies is reduced, improving the display effect of the display panel.

[0039] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0042] Figure 2 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0043] Figure 3 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0044] Figure 4 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0045] Figure 5 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention;

[0046] Figure 6 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0047] Figure 7 This is a timing diagram of another pixel circuit provided in an embodiment of the present invention;

[0048] Figure 8 This is a flowchart of a pixel circuit driving method provided in an embodiment of the present invention;

[0049] Figure 9 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0050] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0051] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the term "comprising" and any variations thereof are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0052] As mentioned in the background section, existing display panels suffer from a difference in brightness after refreshing frequency switching compared to before the switch, resulting in poor display quality. The applicant, through careful research, discovered that this problem arises because: LEDs emit light based on the driving current generated by the driving transistors. However, at different refresh rates, the holding time of the control electrode potential of the driving transistors varies. At higher refresh rates, the holding time of the control electrode potential is shorter, resulting in a shorter holding time of the gate-source voltage difference and thus a shorter time the driving transistor operates in a forward bias state, leading to a smaller threshold shift. At lower refresh rates, the holding time of the control electrode potential is longer, and the prolonged forward bias operation leads to a larger threshold shift. In other words, the threshold shift state of the driving transistors differs at different refresh rates, resulting in different characteristics of the driving transistors. Therefore, the different characteristics of the driving transistors at different refresh rates cause a difference in brightness after refreshing frequency switching compared to before the switch, resulting in poor display quality.

[0053] To address the aforementioned technical problems, embodiments of the present invention provide a pixel circuit. Figure 1 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, for reference. Figure 1 The pixel circuit provided in this embodiment of the invention includes: a data writing module 101, a driving module 102, a light-emitting module 103, and a bias module 104; the data writing module 101 is connected between the driving module 102 and the data line Data, and the data writing module 101 is used to write the data voltage provided by the data line Data into the driving module 102 during the data writing stage; the first end of the driving module 102 is connected to a first power supply VDD, and the second end of the driving module 102 is connected to the first end of the light-emitting module 103, and the driving module 102 is used to generate a driving current according to the data voltage during the light-emitting stage; the second end of the light-emitting module 103 is connected to a second power supply VSS, and the light-emitting module 103 is used to emit light in response to the driving current; the first end of the bias module 104 is connected to a bias signal line V1, and the second end of the bias module 104 is at least connected to the second end of the driving module 102, and the bias module 104 is used to write the bias voltage provided by the bias signal line V1 into the first and second ends of the driving module 102 after the data writing stage and before the light-emitting stage.

[0054] The data line (Data) provides a data voltage, which is written by the data writing module 101 to the driving module 102. The bias signal line (V1) provides a bias voltage, which is written by the bias module 104 to the first and second terminals of the driving module 102, resetting them. The first power supply (VDD) provides a first power supply voltage, and the driving module 102 generates a driving current based on the data voltage and the first power supply voltage. The light-emitting module 103, for example, is an organic light-emitting diode (OLED), which emits light in response to the driving current, thereby displaying the target brightness. The operation of the pixel circuit provided in this embodiment of the invention may include a data writing stage, a biasing stage, and a light-emitting stage.

[0055] Specifically, during the data writing phase, the data writing module 101 is turned on, and the data writing module 101 writes the data voltage provided by the data line Data to the driver module 102.

[0056] During the biasing phase, the biasing module 104 is turned on. The biasing module 104 writes the bias voltage provided by the bias signal line V1 to the first and second terminals of the driving module 102, resetting the first and second terminals of the driving module 102. This changes the voltage difference between the first terminal and the control terminal of the driving module 102, adjusting the ion polarization degree inside the driving module 102, thereby adjusting the bias state of the driving module 102 and improving its characteristics. Before the driving module 102 generates the driving current, the potential of the first terminal of the driving module 102 is the same at different refresh frequencies. Therefore, the bias state of the driving module 102 before generating the driving current is the same at different refresh frequencies, making the driving current generated by the driving module tend to be consistent, thus ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0057] During the light-emitting phase, the driving module 102 generates a driving current based on the first power supply voltage and the data voltage, and the light-emitting module 103 responds to the driving current to emit light. Because the first and second terminals of the driving module 102 are reset before the driving module 102 generates the driving current, adjusting the bias state of the driving module 102, the driving module 102 can generate the driving current more effectively, thereby enabling the light-emitting module 103 to better display the target brightness.

[0058] It should be noted that the bias module 104 can be connected to the second terminal of the drive module 102. This is because after writing a data voltage to the drive module 102, the drive module 102 is turned on. When the bias module 104 writes a bias voltage to the second terminal of the drive module 102, it can write to both the first and second terminals of the drive module 102, thus resetting both terminals. Alternatively, the bias module 104 can be connected to both the first and second terminals of the drive module 102 separately, writing different bias voltages to the first and second terminals of the drive module 102 according to the desired bias state. Figure 1 The diagram only illustrates the connection between the bias module 104 and the second end of the drive module 102, but does not limit the connection.

[0059] In this embodiment, after the data writing stage and before the light emission stage, the bias module writes the bias voltage provided by the bias signal to the first and second terminals of the driving module, resetting the first and second terminals of the driving module and changing the voltage difference between the first terminal and its control terminal. This adjusts the bias state of the driving module and improves its characteristics. This ensures that the potential of the first terminal of the driving module is the same at different refresh frequencies, resulting in a consistent bias state before the driving current is generated. Consequently, the driving current generated by the driving module tends to be consistent, thus ensuring consistent display brightness before and after refresh frequency switching. By ensuring consistent display brightness before and after refresh frequency switching, the brightness variation caused by refresh frequency switching is reduced, improving the display effect of the display panel.

[0060] Based on the above technical solution, optionally, the bias voltage provided by the bias signal line is different when the data voltage is different; preferably, the larger the data voltage, the larger the bias voltage.

[0061] Specifically, when the data voltage is different, the voltage at the control terminal of the drive module 102 is different, and the voltage difference between the control terminal and its first terminal is different. By setting different bias voltages, the characteristic changes of the drive module 102 caused by the different voltage differences are compensated, so that the bias state of the drive module 102 remains consistent after the bias voltage is written. For example, when the data voltage is larger, the voltage difference between the control terminal and the second terminal of the drive module 102 is larger. Therefore, a larger bias voltage can be written to the second terminal of the drive module 102 to reduce the voltage difference between the control terminal and the second terminal, compensating for the characteristic changes of the drive module 102 caused by the larger voltage difference. Similarly, when the data voltage is smaller, the voltage difference between the control terminal and the second terminal of the drive module 102 is smaller. Therefore, a smaller bias voltage can be written to the second terminal of the drive module 102 to increase the voltage difference between the control terminal and the second terminal, compensating for the characteristic changes of the drive module 102 caused by the smaller voltage difference, so that the bias state of the drive module 102 remains consistent after the bias voltage is written. When the target display brightness of the light-emitting module 103 is different, the data voltage is different. By setting different bias voltages, the characteristics of the driving module 102 are improved under different target display brightness, which is beneficial to improving the display effect of the display panel.

[0062] Based on the above technical solution, the bias module 104 may include one bias unit connected to the second end of the drive module 102; the bias module 104 may also include two bias units connected to the first and second ends of the drive module 102, respectively. The specific structure of the bias module 104 is described below, but this is not intended to limit the application.

[0063] In one implementation, Figure 2 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Optionally, refer to... Figure 2 The bias module 104 includes a first bias unit 1041; the control terminal of the first bias unit 1041 is connected to the first scan signal line S1, the first end of the first bias unit 1041 is connected to the bias signal line V1, and the second end of the first bias unit 1041 is connected to the second end of the drive module 102.

[0064] Specifically, the second end of the first bias unit 1041 is connected to the second end of the drive module 102. When the first scan signal provided by the first scan signal line S1 controls the first bias unit 1041 to be turned on, the bias module 104 can write a bias voltage to the second end and the first end of the drive module 102, reset the first end and the second end of the drive module 102, change the voltage difference between the first end of the drive module 102 and its control end, and adjust the bias state of the drive module 102.

[0065] Optionally, a driving cycle of the pixel circuit provided in this embodiment of the invention includes a data write frame and a data hold frame; the data write frame includes a data write stage and a first light-emitting stage, and the data hold frame includes a second light-emitting stage; the first bias unit 1041 is used to write a first bias voltage provided by the bias signal line to the first terminal and the second terminal of the driving module 102 after the data write stage and before the first light-emitting stage; and to write a second bias voltage provided by the bias signal line V1 to the first terminal and the second terminal of the driving module 102 before the second light-emitting stage of the data hold frame; preferably, the second bias voltage is greater than the first bias voltage.

[0066] Specifically, after the data writing phase of the data writing frame and before the first light-emitting phase, the first bias voltage provided by the bias signal line V1 is written to the first and second terminals of the driving module 102 to reset the first and second terminals of the driving module 102 and adjust the bias state of the driving module 102. Before the second light-emitting phase of the data holding frame, the second bias voltage provided by the bias signal line V1 is written to the first and second terminals of the driving module 102 to reset the first and second terminals of the driving module 102 and adjust the bias state of the driving module 102. This ensures that the bias state of the driving module 102 in the data writing frame is consistent with the bias state in the data holding frame, thereby avoiding a large difference in the driving current generated by the driving module 102 in the data writing frame and the data holding frame. This ensures that the light-emitting brightness of the light-emitting module 103 tends to be consistent in the data writing frame and the data holding frame, and avoids a jump in display brightness.

[0067] For example, the data holding frame time is generally long, and the control terminal potential of the drive module 102 changes significantly due to the long leakage time. By setting the second bias voltage corresponding to the data holding frame to be greater than the first bias voltage corresponding to the data write frame, the bias state of the drive module 102 in the data holding frame can be better improved, ensuring that the bias state of the drive module 102 in the data write frame and the data holding frame is consistent.

[0068] In another implementation, Figure 3 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Optionally, refer to... Figure 3 The bias module 104 includes a first bias unit 1041 and a second bias unit 1042; the bias signal line V1 includes a first bias sub-signal line V11 and a second bias sub-signal line V12; the control terminal of the first bias unit 1041 is connected to the first scan signal line S1, the first end of the first bias unit 1041 is connected to the first bias sub-signal line V11, and the second end of the first bias unit 1041 is connected to the first end of the drive module 102; the control terminal of the second bias unit 1042 is connected to the second scan signal line S2, the first end of the second bias unit 1042 is connected to the second bias sub-signal line V12, and the second end of the second bias unit 1042 is connected to the second end of the drive module 102.

[0069] Specifically, by setting a first bias unit 1041 and a second bias unit 1042, a bias voltage is written to the first terminal of the driving module 102 through the first bias unit 1041, and a bias voltage is written to the second terminal of the driving module 102 through the second bias unit 1042. The bias voltages written to the first and second terminals of the driving module 102 can be the same or different. The bias voltages written by the first bias unit 1041 and the second bias unit 1042 can be set according to the bias state that the driving module 102 needs to achieve. For example, if the bias voltage written to the first terminal of the driving module 102 by the first bias unit 1041 is greater than the bias voltage written to the second terminal of the driving module 102 by the second bias unit 1042, the bias current between the first and second terminals of the driving module 102 is increased, the degree of ion polarization inside the driving module 102 is better adjusted, and the bias state of the driving module 102 can be better improved.

[0070] Optionally, a driving cycle of the pixel circuit provided in this embodiment of the invention includes a data write frame and a data hold frame; the data write frame includes a data write stage and a first light-emitting stage, and the data hold frame includes a second light-emitting stage; the first bias unit 1041 is used to write a first bias voltage provided by the first bias sub-signal line V11 to the first terminal of the driving module 102 after the data write stage and before the first light-emitting stage; and to write a second bias voltage provided by the first bias sub-signal line V11 to the first terminal of the driving module before the second light-emitting stage of the data hold frame; the second bias unit is used to write a third bias voltage provided by the second bias sub-signal line V12 to the second terminal of the driving module 102 after the data write stage and before the first light-emitting stage; and to write a fourth bias voltage provided by the second bias sub-signal line V12 to the second terminal of the driving module 102 before the second light-emitting stage of the data hold frame; preferably, the second bias voltage is greater than the first bias voltage; and / or, the fourth bias voltage is greater than the third bias voltage.

[0071] Specifically, after the data writing phase of the data writing frame and before the first photon phase, the first bias unit 1041 writes the first bias voltage provided by the first bias sub-signal line V11 to the first terminal of the driving module 102, and the second bias unit 1042 writes the second bias voltage provided by the second bias sub-signal V12 to the second terminal of the driving module 102, thereby resetting the first and second terminals of the driving module 102 and changing the bias state of the driving module 102; before the second photon phase of the data holding frame, the first bias unit 1041 writes the third bias voltage provided by the first bias sub-signal line V11 to the first terminal of the driving module 102. At one end, the second bias unit 1042 writes the fourth bias voltage provided by the second bias sub-signal V12 into the second end of the driving module 102, resetting the first and second ends of the driving module 102, changing the voltage difference between the first end of the driving module 102 and its control end, and adjusting the bias state of the driving module 102 so that the bias state of the driving module 102 in the data writing frame is consistent with the bias state of the data holding frame. This avoids a large difference in the driving current generated by the driving module 102 in the data writing frame and the data holding frame, ensuring that the brightness of the light-emitting module 103 tends to be consistent in the data writing frame and the data holding frame, and avoiding jumps in display brightness.

[0072] The first bias unit 1041 and the second bias unit 1042 can write bias voltage to the drive module 102 simultaneously, or they can write bias voltage to the drive module 102 in a time-division manner. For example, the first bias unit 1041 first writes the first bias voltage to the first terminal of the drive module 102, and the second bias unit 1042 then writes the second bias voltage to the second terminal of the drive module 102.

[0073] For example, the data holding frame time is generally long, and the control terminal potential of the driving module 102 may change significantly due to leakage current. By setting the second bias voltage corresponding to the data holding frame to be greater than the first bias voltage corresponding to the data writing frame, and the fourth bias voltage corresponding to the data holding frame to be greater than the third bias voltage corresponding to the data writing frame, the bias state of the driving module 102 in the data holding frame can be better improved, ensuring that the bias state of the driving module 102 in the data writing frame and the data holding frame is consistent. This avoids a large difference in the driving current generated by the driving module 102 in the data writing frame and the data holding frame, ensuring that the brightness of the light-emitting module 103 tends to be consistent in the data writing frame and the data holding frame, and avoiding jumps in display brightness.

[0074] Based on the above technical solutions, optionally, refer to Figure 2 or Figure 3The pixel circuit also includes: a storage module 105, a threshold compensation module 106, a first initialization module 107, a first light emission control module 108, and a second light emission control module 109; the control terminal of the data writing module 101 is connected to the third scan signal line S3, the first terminal of the data writing module 101 is connected to the data line, and the second terminal of the data writing module 101 is connected to the first terminal of the driving module 102; the storage module 105 is connected between the first power supply and the control terminal of the driving module, and the storage module 105 is used to store data voltage; the first terminal of the driving module 102 is connected to the first power supply VDD through the first light emission control module 108, and the second terminal of the driving module 102 is connected to the light emission module 103 through the second light emission control module 109; the control terminal of the first light emission control module 108 is connected to the first light emission control signal line EM1, and the control terminal of the second light emission control module 109 is connected to the second light emission control signal line EM2; the first light emission control module 108 and the second light emission control module 109 are used to control whether the driving current generated by the driving module 102 is transmitted. The signal is transmitted to the light-emitting module 103; the threshold compensation module 106 is connected between the second end of the driving module 102 and the control end of the driving module 102, and the control end of the threshold compensation module 106 is connected to the fourth scan signal line S4. The threshold compensation module 106 is used to perform threshold compensation on the driving module 102 during the threshold compensation stage; the control end of the first initialization module 107 is connected to the fifth scan signal line S5, and the first initialization module 107 is connected between the first reference signal line Vref1 and the first end of the light-emitting module 103. The first initialization module 107 is used to write the first reference voltage provided by the first reference signal line Vref1 to the first end of the light-emitting module 103 during the first initialization sub-stage of the data writing frame, and to write the first reference voltage to the driving module 102 through the second light-emitting control module 109 and the threshold compensation module 106; and to write the second reference voltage provided by the first reference signal line Vref1 to the first end of the light-emitting module 103 during the second initialization sub-stage of the data holding frame; preferably, the second reference voltage is greater than the first reference voltage.

[0075] Specifically, the storage module 105 can store data voltage, maintain the potential of the control terminal of the driving module 102, and avoid large potential changes in the control terminal of the driving module 102, thus preventing large changes in the driving current generated by the driving module 102. The threshold compensation module 106 can perform threshold compensation on the driving module 102, thereby writing the threshold-compensated voltage to the control terminal of the driving module 102, avoiding changes in the driving current caused by changes in the threshold voltage of the driving module 102, which is beneficial for the light-emitting module 103 to better display the target display brightness. In the first initialization sub-stage of the data writing frame, the first initialization module 107 writes the first reference voltage provided by the first reference signal line Vref1 to the first terminal of the light-emitting module 103, and writes the first reference voltage through the second light-emitting control module 109 and the threshold compensation module 106 to the second terminal and control terminal of the driving module 102, thus initializing the light-emitting module 103 and the driving module 102 and clearing the residual charge of the previous frame. In the second initialization sub-stage of the data holding frame, the first initialization module 107 writes the second reference voltage provided by the first reference signal line Vref1 into the first terminal of the light-emitting module 103 to initialize the light-emitting module 103, clear the residual charge of the previous frame, and enable the light-emitting module 103 to better display the target display brightness.

[0076] The data holding frame has a relatively long duration, resulting in a longer time for the drive module 102 to maintain the potential at its control terminal. This leads to a longer period of leakage current generation at the control terminal of the drive module 102, which can easily cause significant potential changes at the control terminal of the drive module 102. By setting the second reference voltage corresponding to the data holding frame to be greater than the first reference voltage corresponding to the data writing frame, the initialization level of the light-emitting module 103 and the drive module 102 in the second initialization sub-stage of the data holding frame is lower than that in the data writing frame. This compensates for the potential changes of the drive module 102 in the data holding frame, making the drive current generated by the drive module 102 in the data holding frame and the data writing frame more consistent. Consequently, the light emission brightness of the light-emitting module 103 remains consistent in both the data holding frame and the data writing frame, preventing abrupt changes in display brightness.

[0077] For example, a driving cycle of the pixel circuit provided in the embodiment of the present invention includes a data write frame and a data hold frame. The data write frame includes a first initialization sub-stage, a data write stage, a threshold compensation stage, a first bias sub-stage, and a first light-emitting sub-stage. The data hold frame includes a second initialization sub-stage, a second bias sub-stage, and a second light-emitting sub-stage.

[0078] Specifically, in the first initialization sub-stage, the fifth scan signal provided by the fifth scan signal line S5 controls the first initialization module 107 to be turned on, the fourth scan signal provided by the fourth scan signal line S4 controls the threshold compensation module 106 to be turned on, and the second light emission control signal line EM2 controls the second light emission control module 109 to be turned on. The first initialization module 107 writes the first reference voltage provided by the first reference signal line Vref1 into the first terminal of the light emission module 103, and writes the first reference voltage into the second terminal and control terminal of the driving module 102 through the second light emission control module 109 and the threshold compensation module 106, thereby initializing the light emission module 103 and the driving module 102.

[0079] During the data writing phase, the second scan signal provided by the second scan signal line S2 controls the data writing module 101 to turn on, and the fourth scan signal provided by the fourth scan signal line S4 controls the threshold compensation module 106 to turn on. The data writing module 101 writes the data voltage Vdata provided by the data line Data to the control terminal of the drive module 102 through the threshold compensation module 106. At the same time, the threshold compensation module 106 performs preliminary threshold compensation on the drive module 102.

[0080] During the threshold compensation stage, the fourth scan signal provided by the fourth scan signal line S4 controls the threshold compensation module 106 to be turned on. The threshold compensation module 106 continues to perform threshold compensation on the drive module 102 until the potential of the control terminal of the drive module 102 is Vdata+Vth, where Vth is the threshold voltage of the drive module 102.

[0081] In the first bias sub-stage, the bias module 104 is turned on, and the bias module 104 writes the bias voltage to the first and second terminals of the drive module 102, resetting the first and second terminals of the drive module 102, changing the voltage difference between the first terminal and its control terminal of the drive module 102, thereby adjusting the bias state of the drive module 102, so that the bias state of the drive module 102 before generating the drive current remains consistent under different refresh frequencies, thereby making the drive current generated by the drive module 102 tend to be consistent, and thus ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0082] In the first light-emitting stage, the first light-emitting control signal line EM1 controls the first light-emitting control module 108 to be turned on, and the second light-emitting control signal line EM2 controls the second light-emitting control module 109 to be turned on. The driving module 102 generates a driving current based on the data voltage after threshold compensation and the first power supply voltage provided by the first power supply VDD. The light-emitting module 103 responds to the driving current to emit light.

[0083] In the second initialization sub-stage, the fifth scan signal provided by the fifth scan signal line S5 controls the first initialization module 107 to be turned on. The first initialization module 107 writes the second reference voltage provided by the second reference signal line Vref2 into the first terminal of the light-emitting module 103 to initialize the light-emitting module 103.

[0084] In the second bias sub-stage, the bias module 104 is turned on, and writes a bias voltage to the first and second terminals of the driver module 102, resetting the first and second terminals of the driver module 102. This changes the voltage difference between the first terminal and its control terminal, thereby adjusting the bias state of the driver module 102. This ensures that the bias state of the driver module 102 remains consistent before generating the drive current at different refresh frequencies, thus making the drive current generated by the driver module 102 more consistent and ensuring consistent display brightness before and after switching refresh frequencies. Furthermore, by changing the bias state of the driver module 102, the bias state of the driver module 102 in the data holding frame and the data writing frame remains consistent, thus avoiding a large difference in the drive current generated by the driver module 102 in the data writing frame and the data holding frame. This ensures that the brightness of the light-emitting module 103 is consistent in the data writing frame and the data holding frame, preventing abrupt changes in display brightness.

[0085] In the second light-emitting stage, the first light-emitting control signal line EM1 controls the first light-emitting control module 108 to be turned on, and the second light-emitting control signal line EM2 controls the second light-emitting control module 109 to be turned on. The driving module 102 generates a driving current based on the data voltage after threshold compensation and the first power supply voltage provided by the first power supply VDD. The light-emitting module 103 responds to the driving current to emit light.

[0086] It should be noted that in some implementations, the second bias sub-stage can be located between the second initialization sub-stage and the second photoluminescence sub-stage; in other implementations, the second bias sub-stage can be executed simultaneously with the second initialization sub-stage.

[0087] Optionally, continue to refer to Figure 2 The pixel circuit also includes: a second initialization module 110; the control terminal of the second initialization module 110 is connected to the sixth scan signal line S6, the second initialization module 110 is connected between the second reference signal line Vref2 and the second terminal of the driving module 102, and the second initialization module 110 is used to write the third reference voltage provided by the second reference signal line Vref2 into the second terminal and the control terminal of the driving module 102 in the first initialization sub-stage.

[0088] Specifically, by setting up a second initialization module 110, in the first initialization sub-stage, the second initialization module 110 writes the third reference voltage provided by the second reference signal line Vref2 into the control terminal and the second terminal of the driver module 102 to initialize the driver module 102. This eliminates the need for the first initialization module 107 to initialize the driver module 102; the first initialization module 107 only needs to initialize the light-emitting module 103. The second initialization module 110 initializes the driver module 102, and the first initialization module 107 initializes the light-emitting module 103, thus allowing different reference voltages to be written to the driver module 102 and the light-emitting module 103, enabling separate initialization of the driver module 102 and the light-emitting module 103 as needed.

[0089] In addition, refer to Figure 2 and Figure 3 When the control terminal of the drive module 102 leaks current, the leakage only occurs through the threshold compensation module 106, meaning there is only one leakage path. This reduces the leakage current of the drive module 102, further ensuring the stability of the control terminal potential of the drive module 102, reducing the change in the drive current generated by the drive module 102, and thus ensuring that the light-emitting module 102 can better display the target display brightness, which is beneficial to improving the display effect of the display panel.

[0090] As a further implementation of this embodiment, based on the above technical solutions, the specific circuit structure of the pixel circuit will be further described below, but this is not intended to limit this application.

[0091] In one implementation, Figure 4 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Optionally, refer to... Figure 4 , Figure 4 yes Figure 2The corresponding specific circuit structure includes: data writing module 101 including a first transistor T1; driving module 102 including a second transistor T2; threshold compensation module 106 including a third transistor T3; first light-emitting control module 108 including a fourth transistor T4; second light-emitting control module 109 including a fifth transistor T5; first initialization module 107 including a sixth transistor T6; second initialization module 110 including a seventh transistor T7; first bias unit 1041 including an eighth transistor T8; storage module 105 including a first capacitor C1; and light-emitting module 103 including a light-emitting diode D1. The control electrode of the first transistor T1 is connected to the third scan signal line S3, and the first transistor T1 is connected between the second transistor T2 and the data line Data. The first capacitor C1 is connected between the first power supply VDD and the control electrode of the second transistor T2. The first electrode of the second transistor T2 is connected to the first power supply VDD through the fourth transistor T4, and the second electrode of the second transistor T2 is connected to the light-emitting diode D1 through the fifth transistor T5. The first terminal of LED D1 is connected to the first power supply VSS; the second terminal of LED D1 is connected to the second power supply VSS; the control terminal of the third transistor T3 is connected to the fourth scan signal line S4, and the third transistor T3 is connected between the second terminal of the second transistor T2 and the control terminal of the second transistor T2; the control terminal of the fourth transistor T4 is connected to the first light emission control signal line EM1; the control terminal of the fifth transistor T5 is connected to the second light emission control signal EM2; the control terminal of the sixth transistor T6 is connected to the fifth scan signal line S5, and the sixth transistor T6 is connected between the first reference signal line Vref1 and the first terminal of LED D1; the control terminal of the seventh transistor T7 is connected to the sixth scan signal line S6, and the seventh transistor T7 is connected between the second reference signal line Vref2 and the second terminal of the second transistor T2; the control terminal of the eighth transistor T8 is connected to the first scan signal line S1, the first terminal of the eighth transistor T8 is connected to the bias signal line V1, and the second terminal of the eighth transistor T8 is connected to the second terminal of the second transistor T2. The third transistor T3, for example, is a low-temperature polycrystalline oxide transistor (LTO), which can reduce leakage current and help extend the potential maintenance time of the control terminal of the drive module 102; the remaining transistors can be either low-temperature polycrystalline silicon transistors (LTSi) or low-temperature polycrystalline oxide transistors (LTO). Figure 4 The illustration only shows the case where the third transistor T3 is a low-temperature polycrystalline oxide transistor and the other transistors are low-temperature polycrystalline silicon transistors, but does not limit it.

[0092] Figure 5 This is a timing diagram of a pixel circuit provided in an embodiment of the present invention, combined with... Figure 4 and Figure 5 The driving process of the pixel circuit will be explained below, but without limitation.

[0093] Specifically, in the first initialization sub-stage t11 of the data writing frame t1, the sixth scan signal Scan6 provided by the sixth scan signal line S6 is at a low level, the seventh transistor T7 is turned on, the fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, the third transistor T3 is turned on, and the seventh transistor T7 writes the third reference voltage Vr3 provided by the second reference signal line Vref2 to the control electrode of the second transistor T2 through the third transistor T3, thereby initializing the second transistor T2.

[0094] During the data writing phase t12 of data writing frame t1, the third scan signal Scan3 provided by the third scan signal line S3 is at a low level, and the first transistor T1 is turned on. The fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, and the third transistor T3 is turned on. The first transistor T1 writes the data voltage Vdata provided by the data line Data to the second transistor T2. At the same time, the third transistor T3 performs threshold compensation on the second transistor T2.

[0095] During the threshold compensation stage t13 of the data writing frame t1, the fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, the third transistor T3 is turned on, and the third transistor T3 continues to perform threshold compensation on the second transistor T2 until the voltage of the control electrode of the second transistor T2 is Vdata+Vth, that is, the threshold-compensated data voltage is written to the second transistor T2.

[0096] In the first bias sub-stage t14 of data writing frame t1, the fifth scan signal Scan5 provided by the fifth scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the first scan signal Scan1 provided by the first scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The sixth transistor T6 writes the first reference voltage Vr1 provided by the first reference signal line Vref1 to the first terminal of the light-emitting diode D1, initializing the light-emitting diode D1. The eighth transistor T8 writes the first bias voltage VEH1 provided by the bias signal line V1 to the first and second terminals of the second transistor T2, resetting the first and second terminals of the second transistor T2, changing the voltage difference between the first terminal and its control terminal of the second transistor T2, and changing the voltage difference between the second terminal and its control terminal of the second transistor T2, thereby changing the bias state of the second transistor T2. This ensures that the bias state of the second transistor T2 remains consistent before generating the drive current at different refresh frequencies, thus making the drive current generated by the second transistor T2 tend to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0097] In the first light-emitting stage t15 of the data writing frame t1, the first light-emitting control signal E1 provided by the first light-emitting control signal line EM1 is at a low level, the second light-emitting control signal E2 provided by the second light-emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the data voltage after threshold compensation and the first power supply voltage provided by the first power supply VDD, and the light-emitting diode D1 emits light in response to the driving current.

[0098] In the second bias sub-stage t21 (second initialization sub-stage) of data holding frame t2, the fifth scan signal Scan5 provided by the fifth scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the first scan signal Scan1 provided by the first scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The sixth transistor T6 writes the second reference voltage Vr2 provided by the first reference signal line Vref1 to the first terminal of the light-emitting diode D1, initializing the light-emitting diode D1. The eighth transistor T8 writes the second bias voltage VEH2 provided by the bias signal line V1 to the first and second terminals of the second transistor T2, resetting the first and second terminals of the second transistor T2, changing the voltage difference between the first terminal and its control terminal of the second transistor T2, and changing the voltage difference between the second terminal and its control terminal of the second transistor T2, thereby changing the bias state of the second transistor T2. This ensures that the bias state of the second transistor T2 remains consistent before generating the drive current at different refresh frequencies, thus making the drive current generated by the second transistor T2 tend to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching refresh frequencies. Furthermore, by changing the bias state of the second transistor T2, the bias state of the second transistor T2 in the data holding frame and the data writing frame is kept consistent, thereby avoiding a large difference in the driving current generated by the second transistor T2 in the data writing frame and the data holding frame. This ensures that the light emission brightness of the light-emitting diode D1 tends to be consistent in the data writing frame and the data holding frame, and avoids a jump in display brightness.

[0099] In the second light-emitting sub-stage t22 of the data holding frame t2, the first light-emitting control signal E1 provided by the first light-emitting control signal line EM1 is at a low level, the second light-emitting control signal E2 provided by the second light-emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the data voltage stored in the first capacitor C1 and the first power supply voltage provided by the first power supply VDD, and the light-emitting diode D1 emits light in response to the driving current.

[0100] It should be noted that during data write frame t1, the sixth transistor T6 can be turned on simultaneously with the seventh transistor T7, that is, the LED D1 and the second transistor T2 can be initialized simultaneously. Alternatively, the seventh transistor T7 can initialize the second transistor T2 in the first initialization sub-stage t11, and the sixth transistor T6 can initialize the LED D1 in the first bias sub-stage t14. Figure 5 The timing diagram only shows the case where the seventh transistor T7 initializes the second transistor T2 in the first initialization sub-stage t11, and the sixth transistor T6 initializes the light-emitting diode D1 in the first bias sub-stage t14, but it does not limit the possibilities. In the data holding frame t2, the sixth transistor T6 can initialize the light-emitting diode D1 in the second bias sub-stage t21, meaning the second bias sub-stage t21 and the second initialization sub-stage are the same stage; the sixth transistor T6 can also initialize the light-emitting diode D1 before the second bias sub-stage t21. Figure 5 The timing diagram only shows the case where the sixth transistor T6 can initialize the light-emitting diode D1 in the second bias sub-stage t21, but does not limit it.

[0101] Furthermore, when the sixth transistor T6 initializes the light-emitting diode D1 in the first bias sub-stage t14 and the second bias sub-stage t21, the timing of the fifth scan signal Scan5 provided by the fifth scan signal line S5 is the same as the timing of the first scan signal Scan1 provided by the first scan signal line S1. The sixth transistor T6 and the eighth transistor T8 can be connected to the same scan signal line, meaning the first scan signal line S1 can be multiplexed as the fifth scan signal line S5, reducing the number of signal lines, which is beneficial for layout design and can reduce costs. The timing of the first light-emitting control signal E1 and the second light-emitting control signal E2 is the same, and the first light-emitting control signal line EM1 and the second light-emitting control signal line EM2 can be connected to the same shift register, reducing the number of shift registers and saving costs.

[0102] It should also be noted that the pulse width and frequency of the first scan signal Scan1 can be adjusted, allowing for flexible adjustment of the bias state of the second transistor T2. The pulse width and frequency of the first light-emitting control signal E1 and the second light-emitting control signal E2 can also be adjusted, regulating the brightness of the light-emitting diode D1 to minimize the difference in display brightness before and after the refresh frequency switch. Furthermore, except for the data writing stage t12, the timing of other stages can be flexibly adjusted, which is beneficial for achieving wideband drive display.

[0103] As can be seen from the above driving process, by resetting the first and second terminals of the second transistor T2 in the first and second bias sub-stages, the voltage difference between the first terminal and its control terminal of the second transistor T2 is changed, and the voltage difference between the second terminal and its control terminal of the second transistor T2 is also changed, thereby adjusting the bias state of the second transistor T2. Before the second transistor T2 generates a driving current, the potential of the first terminal of the second transistor T2 is the same at different refresh frequencies; and the potential of the second terminal of the second transistor T2 is the same at different refresh frequencies, so that the bias state of the second transistor T2 before generating a driving current remains consistent at different refresh frequencies, thereby making the driving current generated by the second transistor T2 tend to be consistent, thus ensuring that the display brightness tends to be consistent before and after switching refresh frequencies. Furthermore, by changing the bias state of the second transistor T2, the bias state of the second transistor T2 in the data holding frame and the data writing frame is kept consistent, thereby avoiding a large difference in the driving current generated by the second transistor T2 in the data writing frame and the data holding frame, ensuring that the light emission brightness of the light-emitting diode D1 tends to be consistent in the data writing frame and the data holding frame, and avoiding abrupt changes in display brightness.

[0104] In another implementation, Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. Optionally, refer to... Figure 6 , Figure 6 yes Figure 3The corresponding specific circuit structure includes: data writing module 101 including a first transistor T1; driving module 102 including a second transistor T2; threshold compensation module 106 including a third transistor T3; first light-emitting control module 108 including a fourth transistor T4; second light-emitting control module 109 including a fifth transistor T5; first initialization module 107 including a sixth transistor T6; first bias unit 1041 including an eighth transistor T8; second bias unit 1042 including a ninth transistor T9; storage module 105 including a first capacitor C1; and light-emitting module 103 including a light-emitting diode D1. The control electrode of the first transistor T1 is connected to the third scan signal line S3, and the first transistor T1 is connected between the second transistor T2 and the data line Data. The first capacitor C1 is connected between the first power supply VDD and the control electrode of the second transistor T2. The first electrode of the second transistor T2 is connected to the first power supply VDD through the fourth transistor T4, and the second electrode of the second transistor T2 is connected to the first electrode of the light-emitting diode D1 through the fifth transistor T5. The second terminal of LED D1 is connected to the second power supply VSS; the control terminal of the third transistor T3 is connected to the fourth scan signal line S4, and the third transistor T3 is connected between the second terminal of the second transistor T2 and the control terminal of the second transistor T2; the control terminal of the fourth transistor T4 is connected to the first light emission control signal line EM1, and the control terminal of the fifth transistor T5 is connected to the second light emission control signal EM2; the control terminal of the sixth transistor T6 is connected to the fifth scan signal line S5, and the sixth transistor T6 is connected between the first reference signal line Vref1 and the first terminal of LED D1; the control terminal of the eighth transistor T8 is connected to the first scan signal line S1, the first terminal of the eighth transistor T8 is connected to the first bias sub-signal line V11, and the second terminal of the eighth transistor T8 is connected to the first terminal of the second transistor T2; the control terminal of the ninth transistor T9 is connected to the second scan signal line S2, the first terminal of the ninth transistor T9 is connected to the second bias sub-signal line V12, and the second terminal of the ninth transistor T9 is connected to the second terminal of the second transistor T2. The third transistor T3, for example, is a low-temperature polycrystalline oxide transistor (LTO), which can reduce leakage current and help extend the potential maintenance time of the control terminal of the drive module 102; the remaining transistors can be either low-temperature polycrystalline silicon transistors (LTSi) or low-temperature polycrystalline oxide transistors (LTO). Figure 6 The illustration only shows the case where the third transistor T3 is a low-temperature polycrystalline oxide transistor and the other transistors are low-temperature polycrystalline silicon transistors, but does not limit it.

[0105] Figure 7 This is a timing diagram of another pixel circuit provided in an embodiment of the present invention, combined with... Figure 6 and Figure 7 The driving process of the pixel circuit will be explained below, but without limitation.

[0106] Specifically, in the first initialization sub-stage t11 of the data writing frame t1, the fifth scan signal Scan5 provided by the fifth scan signal line S5 is at a low level, the sixth transistor T6 is turned on, the fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, the third transistor T3 is turned on, the second light emission control signal E2 provided by the second light emission control signal line EM2 is at a low level, the fifth transistor T5 is turned on, the sixth transistor T6 writes the first reference voltage Vr1 provided by the first reference signal line Vref1 into the first terminal of the light emission diode D1, and writes the first reference voltage Vr1 into the control terminal of the second transistor T2 through the fifth transistor T5 and the third transistor T3, thus initializing the light emission diode D1 and the second transistor T2.

[0107] During the data writing phase t12 of data writing frame t1, the third scan signal Scan3 provided by the third scan signal line S3 is at a low level, and the first transistor T1 is turned on. The fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, and the third transistor T3 is turned on. The first transistor T1 writes the data voltage Vdata provided by the data line Data to the second transistor T2. At the same time, the third transistor T3 performs threshold compensation on the second transistor T2.

[0108] During the threshold compensation stage t13 of the data writing frame t1, the fourth scan signal Scan4 provided by the fourth scan signal line S4 is at a high level, the third transistor T3 is turned on, and the third transistor T3 continues to perform threshold compensation on the second transistor T2 until the voltage of the control electrode of the second transistor T2 is Vdata+Vth, that is, the threshold-compensated data voltage is written to the second transistor T2.

[0109] In the first bias sub-stage t14 of data write frame t1, the eighth transistor T8 and the ninth transistor T9 can simultaneously write bias voltage to the second transistor T2, or they can write bias voltage to the second transistor T2 in a time-division manner. When writing bias voltage in a time-division manner, the first bias sub-stage t14 includes a first bias interval t141 and a second bias interval t142. In the first bias interval t141, the second scan signal Scan2 provided by the second scan signal line S2 is at a low level, and the ninth transistor T9 is turned on. The ninth transistor T9 writes the third bias voltage VEH3 provided by the second bias sub-signal line V12 to the second terminal of the second transistor T2, changing the voltage difference between the second terminal of the second transistor T2 and its control terminal. In the second bias interval t142, the first scan signal Scan1 provided by the first scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The eighth transistor T8 writes the first bias voltage VEH1 provided by the first bias sub-signal line V11 into the first terminal of the second transistor T2, resetting the first terminal of the second transistor T2 and changing the voltage difference between the first terminal and its control terminal; thereby changing the bias state of the second transistor T2, so that the bias state of the second transistor T2 before generating the drive current remains consistent under different refresh frequencies, thus making the drive current generated by the second transistor T2 tend to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0110] In the first light-emitting stage t15 of the data writing frame t1, the first light-emitting control signal E1 provided by the first light-emitting control signal line EM1 is at a low level, the second light-emitting control signal E2 provided by the second light-emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the data voltage after threshold compensation and the first power supply voltage provided by the first power supply VDD, and the light-emitting diode D1 emits light in response to the driving current.

[0111] In the second initialization sub-stage t20 of the data holding frame t2, the fifth scan signal Scan5 provided by the fifth scan signal line S5 is at a low level, the sixth transistor T6 is turned on, and the sixth transistor T6 writes the first reference voltage Vr1 provided by the first reference signal line Vref1 into the first terminal of the light-emitting diode D1 to initialize the light-emitting diode D1.

[0112] In the second bias sub-stage t21 of the data holding frame t2, the eighth transistor T8 and the ninth transistor T9 can simultaneously write bias voltages to the second transistor T2, or they can write bias voltages to the second transistor T2 in a time-division manner. When writing bias voltages in a time-division manner, the second bias sub-stage t21 includes a third bias interval t211 and a fourth bias interval t212. In the third bias interval t211, the second scan signal Scan2 provided by the second scan signal line S2 is at a low level, and the ninth transistor T9 is turned on. The ninth transistor T9 writes the fourth bias voltage VEH4 provided by the second bias sub-signal line V12 to the second terminal of the second transistor T2, changing the voltage difference between the second terminal of the second transistor T2 and its control terminal. In the fourth bias interval t212, the first scan signal Scan1 provided by the first scan signal line S1 is at a low level, and the eighth transistor T8 is turned on. The eighth transistor T8 writes the second bias voltage VEH2 provided by the first bias sub-signal line V11 into the first terminal of the second transistor T2, resetting the first terminal of the second transistor T2 and changing the voltage difference between the first terminal and its control terminal; thereby changing the bias state of the second transistor T2, so that the bias state of the second transistor T2 before generating the drive current remains consistent under different refresh frequencies, thus making the drive current generated by the second transistor T2 tend to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0113] In the second light-emitting sub-stage t22 of the data holding frame t2, the first light-emitting control signal E1 provided by the first light-emitting control signal line EM1 is at a low level, the second light-emitting control signal E2 provided by the second light-emitting control signal line EM2 is at a low level, the fourth transistor T4 and the fifth transistor T5 are turned on, the second transistor T2 generates a driving current according to the data voltage stored in the first capacitor C1 and the first power supply voltage provided by the first power supply VDD, and the light-emitting diode D1 emits light in response to the driving current.

[0114] It should be noted that the third scan signal Scan3 and the fifth scan signal Scan5 are only different in phase. Therefore, the third scan signal line S3 and the fifth scan signal line S5 can be connected to the same set of shift registers. That is, the shift register connected to the third scan signal line S3 and the shift register connected to the fifth scan signal line S5 are cascaded, which can facilitate the design of shift registers.

[0115] As can be seen from the above driving process, by resetting the first and second terminals of the second transistor T2 in the first and second bias sub-stages, the voltage difference between the first terminal and its control terminal of the second transistor T2 is changed, and the voltage difference between the second terminal and its control terminal of the second transistor T2 is also changed, thereby changing the bias state of the second transistor T2. Before the second transistor T2 generates a driving current, the potential of the first terminal of the second transistor T2 is the same at different refresh frequencies; and the potential of the second terminal of the second transistor T2 is the same at different refresh frequencies, so that the bias state of the second transistor T2 before generating a driving current remains consistent at different refresh frequencies, thereby making the driving current generated by the second transistor T2 tend to be consistent, thus ensuring that the display brightness tends to be consistent before and after switching refresh frequencies. Furthermore, by changing the bias state of the second transistor T2, the bias state of the second transistor T2 in the data holding frame and the data writing frame is kept consistent, thereby avoiding a large difference in the driving current generated by the second transistor T2 in the data writing frame and the data holding frame, ensuring that the light emission brightness of the light-emitting diode D1 tends to be consistent in the data writing frame and the data holding frame, and avoiding abrupt changes in display brightness.

[0116] Optionally, refer to Figure 4 or Figure 6 The pixel circuit also includes a second capacitor C2. The first terminal of the second capacitor C2 is connected to the first power supply VDD, and the second terminal of the second capacitor C2 is connected to the first terminal of the driving module 102. By adjusting the capacitance value of the second capacitor C2, the time for the first transistor T1 to write data voltage can be adjusted, thereby adjusting the threshold compensation time of the threshold compensation module 106.

[0117] This embodiment also provides a pixel circuit driving method for driving the pixel circuit provided in any of the above embodiments. Figure 8 This is a flowchart of a pixel circuit driving method provided in an embodiment of the present invention. Optionally, refer to... Figure 1 and Figure 8 The driving methods for pixel circuits include:

[0118] S201. During the data writing phase, the data writing module writes the data voltage provided by the data line to the driver module.

[0119] Specifically, during the data writing phase, the data writing module 101 is turned on, and the data writing module 101 writes the data voltage provided by the data line Data to the driver module 102.

[0120] S202. During the biasing phase, the bias module writes the bias voltage provided by the bias signal line into the first and second terminals of the driver module.

[0121] Specifically, during the biasing phase, the biasing module 104 is turned on. The biasing module 104 writes the bias voltage provided by the bias signal line V1 to the first and second terminals of the driving module 102, resetting the first and second terminals of the driving module 102. This changes the voltage difference between the first and second terminals of the driving module 102 and the control terminal, thereby changing the bias state of the driving module 102, i.e., changing the characteristics of the driving module 102. Before the driving module 102 generates the driving current, the potential of the first terminal of the driving module 102 is the same at different refresh frequencies; and the potential of the second terminal of the driving module 102 is the same at different refresh frequencies. This ensures that the bias state of the driving module 102 before generating the driving current is the same at different refresh frequencies, thus making the driving current generated by the driving module tend to be consistent, thereby ensuring that the display brightness tends to be consistent before and after switching refresh frequencies.

[0122] S203. During the light-emitting stage, the driving module generates a driving current based on the data voltage, and the light-emitting module responds to the driving current to emit light.

[0123] Specifically, during the light-emitting stage, the driving module 102 generates a driving current based on the first power supply voltage and the data voltage, and the light-emitting module 103 emits light in response to the driving current. Because the first and second terminals of the driving module 102 are reset before the driving module 102 generates the driving current, changing the bias state of the driving module 102, the driving module 102 can generate the driving current more effectively, thereby enabling the light-emitting module 103 to better display the target display brightness.

[0124] The technical solution of this invention also provides a display panel, which includes the pixel circuit provided in any of the above embodiments. Figure 9 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, for reference. Figure 9 The display panel can be applied to mobile phones, tablets, monitors, smartwatches, MP3 players, MP4 players, or other wearable devices. Since it contains the pixel circuit provided in any embodiment of the present invention, it also has the same beneficial effects, which will not be elaborated here.

[0125] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0126] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, include: Data writing module, driver module, light emission module, and bias module; The data writing module is connected between the driver module and the data line, and the data writing module is used to write the data voltage provided by the data line into the driver module during the data writing stage. The first end of the driving module is connected to a first power supply, and the second end of the driving module is connected to the first end of the light-emitting module. The driving module is used to generate a driving current according to the data voltage during the light-emitting stage. The second end of the light-emitting module is connected to a second power supply, and the light-emitting module is used to emit light in response to the driving current. The first end of the bias module is connected to the bias signal line, and the second end of the bias module is connected to at least the second end of the driving module. The bias module is used to write the bias voltage provided by the bias signal line into the first and second ends of the driving module after the data writing stage and before the light emission stage; wherein, the bias voltage provided by the bias signal line is different when the data voltage is different. The bias module includes a first bias unit; The control terminal of the first bias unit is connected to the first scan signal line, the first terminal of the first bias unit is connected to the bias signal line, and the second terminal of the first bias unit is connected to the second terminal of the drive module. One driving cycle of the pixel circuit includes a data write frame and a data hold frame; the data write frame includes a data write phase and a first light-emitting phase, and the data hold frame includes a second light-emitting phase. The first bias unit is used to write the first bias voltage provided by the bias signal line to the first terminal and the second terminal of the driving module after the data writing stage and before the first light-emitting stage; and to write the second bias voltage provided by the bias signal line to the first terminal and the second terminal of the driving module before the second light-emitting stage of the data holding frame. The second bias voltage is greater than the first bias voltage.

2. The pixel circuit according to claim 1, characterized in that, Also includes: Storage module, threshold compensation module, first initialization module, first light emission control module and second light emission control module; The control terminal of the data writing module is connected to the third scan signal line, the first terminal of the data writing module is connected to the data line, and the second terminal of the data writing module is connected to the first terminal of the drive module. The storage module is connected between the first power supply and the control terminal of the drive module, and the storage module is used to store the data voltage. The first end of the driving module is connected to a first power source through the first light-emitting control module, and the second end of the driving module is connected to the light-emitting module through the second light-emitting control module. The control end of the first light-emitting control module is connected to a first light-emitting control signal line, and the control end of the second light-emitting control module is connected to a second light-emitting control signal line. The first light-emitting control module and the second light-emitting control module are used to control whether the driving current generated by the driving module is transmitted to the light-emitting module. The threshold compensation module is connected between the second end of the driving module and the control end of the driving module. The control end of the threshold compensation module is connected to the fourth scan signal line. The threshold compensation module is used to perform threshold compensation on the driving module during the threshold compensation stage. The control terminal of the first initialization module is connected to the fifth scan signal line. The first initialization module is connected between the first reference signal line and the first end of the light-emitting module. The first initialization module is used to write the first reference voltage provided by the first reference signal line to the first end of the light-emitting module in the first initialization sub-stage of the data writing frame, and to write the first reference voltage to the driving module through the second light-emitting control module and the threshold compensation module. In the second initialization sub-stage of the data holding frame, the second reference voltage provided by the first reference signal line is written into the first terminal of the light-emitting module.

3. The pixel circuit according to claim 2, characterized in that, The second reference voltage is greater than the first reference voltage.

4. The pixel circuit according to claim 2, characterized in that, Also includes: Second initialization module; The control terminal of the second initialization module is connected to the sixth scan signal line. The second initialization module is connected between the second reference signal line and the second terminal of the driving module. The second initialization module is used to write the third reference voltage provided by the second reference signal line into the second terminal and the control terminal of the driving module during the first initialization sub-stage.

5. The pixel circuit according to claim 1, characterized in that, The larger the data voltage, the larger the bias voltage.

6. A pixel circuit, characterized in that, include: Data writing module, driver module, light emission module, and bias module; The data writing module is connected between the driver module and the data line, and the data writing module is used to write the data voltage provided by the data line into the driver module during the data writing stage. The first end of the driving module is connected to a first power supply, and the second end of the driving module is connected to the first end of the light-emitting module. The driving module is used to generate a driving current according to the data voltage during the light-emitting stage. The second end of the light-emitting module is connected to a second power supply, and the light-emitting module is used to emit light in response to the driving current. The first end of the bias module is connected to the bias signal line, and the second end of the bias module is connected to at least the second end of the driving module. The bias module is used to write the bias voltage provided by the bias signal line into the first and second ends of the driving module after the data writing stage and before the light emission stage; wherein, the bias voltage provided by the bias signal line is different when the data voltage is different. The bias module includes a first bias unit and a second bias unit; the bias signal line includes a first bias sub-signal line and a second bias sub-signal line. The control terminal of the first bias unit is connected to the first scan signal line, the first end of the first bias unit is connected to the first bias sub-signal line, and the second end of the first bias unit is connected to the first end of the drive module. The control terminal of the second bias unit is connected to the second scan signal line, the first terminal of the second bias unit is connected to the second bias sub-signal line, and the second terminal of the second bias unit is connected to the second terminal of the drive module. One driving cycle of the pixel circuit includes a data write frame and a data hold frame; the data write frame includes a data write phase and a first light-emitting phase, and the data hold frame includes a second light-emitting phase. The first bias unit is used to write the first bias voltage provided by the first bias sub-signal line to the first terminal of the driving module after the data writing stage and before the first light-emitting sub-stage; and to write the second bias voltage provided by the first bias sub-signal line to the first terminal of the driving module before the second light-emitting sub-stage of the data holding frame. The second bias unit is used to write a third bias voltage provided by the second bias sub-signal line to the second terminal of the driving module after the data writing stage and before the first light-emitting stage; and to write a fourth bias voltage provided by the second bias sub-signal line to the second terminal of the driving module before the second light-emitting stage of the data holding frame. The second bias voltage is greater than the first bias voltage; And / or, the fourth bias voltage is greater than the third bias voltage.

7. The pixel circuit according to claim 6, characterized in that, Also includes: Storage module, threshold compensation module, first initialization module, first light emission control module and second light emission control module; The control terminal of the data writing module is connected to the third scan signal line, the first terminal of the data writing module is connected to the data line, and the second terminal of the data writing module is connected to the first terminal of the drive module. The storage module is connected between the first power supply and the control terminal of the drive module, and the storage module is used to store the data voltage. The first end of the driving module is connected to a first power source through the first light-emitting control module, and the second end of the driving module is connected to the light-emitting module through the second light-emitting control module. The control end of the first light-emitting control module is connected to a first light-emitting control signal line, and the control end of the second light-emitting control module is connected to a second light-emitting control signal line. The first light-emitting control module and the second light-emitting control module are used to control whether the driving current generated by the driving module is transmitted to the light-emitting module. The threshold compensation module is connected between the second end of the driving module and the control end of the driving module. The control end of the threshold compensation module is connected to the fourth scan signal line. The threshold compensation module is used to perform threshold compensation on the driving module during the threshold compensation stage. The control terminal of the first initialization module is connected to the fifth scan signal line. The first initialization module is connected between the first reference signal line and the first end of the light-emitting module. The first initialization module is used to write the first reference voltage provided by the first reference signal line to the first end of the light-emitting module in the first initialization sub-stage of the data writing frame, and to write the first reference voltage to the driving module through the second light-emitting control module and the threshold compensation module. In the second initialization sub-stage of the data holding frame, the second reference voltage provided by the first reference signal line is written into the first terminal of the light-emitting module.

8. The pixel circuit according to claim 7, characterized in that, The second reference voltage is greater than the first reference voltage.

9. The pixel circuit according to claim 7, characterized in that, Also includes: Second initialization module; The control terminal of the second initialization module is connected to the sixth scan signal line. The second initialization module is connected between the second reference signal line and the second terminal of the driving module. The second initialization module is used to write the third reference voltage provided by the second reference signal line into the second terminal and the control terminal of the driving module during the first initialization sub-stage.

10. The pixel circuit according to claim 1, characterized in that, The larger the data voltage, the larger the bias voltage.

11. A method for driving a pixel circuit, used to drive the pixel circuit as described in any one of claims 1-10, characterized in that, The pixel circuit includes: a data writing module, a driving module, a light-emitting module, and a bias module; the data writing module is connected between the driving module and the data line; the first end of the driving module is connected to a first power supply, the second end of the driving module is connected to the first end of the light-emitting module, and the second end of the light-emitting module is connected to a second power supply; the first end of the bias module is connected to a bias signal line, and the second end of the bias module is at least connected to the second end of the driving module. The driving method includes: During the data writing phase, the data writing module writes the data voltage provided by the data line into the driving module; During the biasing phase, the biasing module writes the bias voltage provided by the biasing signal line into the first and second terminals of the driving module; wherein, when the data voltage is different, the bias voltage provided by the biasing signal line is different; During the light-emitting phase, the driving module generates a driving current based on the data voltage, and the light-emitting module emits light in response to the driving current.

12. A display panel, characterized in that, Includes the pixel circuit according to any one of claims 1-10.

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