Message processing method, device, electronic device and computer-readable storage medium

Abstract

An embodiment of the present invention proposes a message processing method, device, electronic device and computer-readable storage medium, which belong to the field of communication technology. When a network device monitors that an external device starts to send a data packet of a service message, if the current packet receiving is in a congested state, the received data packet is written into a double-speed synchronous dynamic random access memory. If the current packet receiving is not in a congested state, the message header data in the received data packet is directly written into the cache of the central processing unit, and other data other than the message header data is written into the double-speed synchronous dynamic random access memory. Therefore, when the central processing unit processes the service message, the message header data is already in the cache, and there is no need to access the double-speed synchronous dynamic random access memory to obtain the message header data. This can effectively reduce the memory access pressure of the central processing unit on the double-speed synchronous dynamic random access memory, thereby improving the overall performance of soft forwarding.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a message processing method, device, electronic device and computer-readable storage medium. Background Art

[0002] When a network device receives a message, it stores the message information, identifies it based on the stored message information, and forwards it based on the identification result.

[0003] The traditional soft message forwarding process is as follows: the DMA (Direct Memory Access) controller first writes the packet to the DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory). After writing the corresponding message, it updates the DMA descriptor or updates the DMA descriptor and provides an interrupt. The CPU (central processing unit) senses the message reception by polling the DMA descriptor or the interrupt provided by the DMA. The CPU then obtains the message data address according to the DMA descriptor, reads the message data from the DDR, and parses and forwards the message data. However, due to the long latency of the CPU reading the DDR, the CPU cannot continue to process the received message before retrieving the data, resulting in idle CPU resources and a significant decrease in overall performance. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a message processing method, device, electronic device and computer-readable storage medium, which can improve the problems of CPU resource waste and significant overall performance degradation caused by traditional message soft forwarding methods.

[0005] In order to achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0006] In a first aspect, an embodiment of the present invention provides a message processing method, applied to a network device, wherein the network device includes a central processing unit and a double data rate synchronous dynamic random access memory, the method comprising:

[0007] When detecting that an external device starts to send a data packet of a service message, it determines whether the current packet receiving is in a congested state;

[0008] If not, receiving the data packet, extracting the header data of the service message from the data packet, writing the header data into the cache of the central processing unit, and writing the data packet except the header data into the double data rate synchronous dynamic random access memory;

[0009] If so, the data packet is received and written into the double data rate synchronous dynamic random access memory.

[0010] Furthermore, the step of receiving the data packet includes:

[0011] Using direct memory access, receiving a data packet of a service message sent by an external device, and updating a state value of a DMA descriptor from a first state value to a second state value;

[0012] The first state value indicates that the message data reception is incomplete, and the second state value indicates that the message data reception is complete.

[0013] Before the step of writing the data packet excluding the message header data into the double data rate synchronous dynamic random access memory, or before the step of writing the data packet into the double data rate synchronous dynamic random access memory, the method further includes:

[0014] In the double data rate synchronous dynamic random access memory, a data address of a storage area storing the data packet is determined.

[0015] Furthermore, the step of determining whether the current packet receiving is in a congested state includes:

[0016] Determine the total number of descriptors representing the message data reception completion state from all DMA descriptors;

[0017] It is determined whether the total number of descriptors exceeds a preset threshold value. If so, it is determined that the current packet receiving is in a congested state. If not, it is determined that the current packet receiving is not in a congested state.

[0018] Furthermore, the step of writing the message header data into the cache of the central processing unit includes:

[0019] Sending the message header data and data address to a bus; wherein the data address is the address of a storage area in the double rate synchronous dynamic random access memory storing the data packet;

[0020] The message header data is stored in an allocated specific area in the cache of the central processing unit through the bus according to the data address.

[0021] Furthermore, before the step of sending the message header data and the data address to the bus, the method includes:

[0022] A specific idle area is allocated from the cache of the central processing unit for the message header data.

[0023] Furthermore, the step of extracting the message header data of the service message from the data packet includes:

[0024] The starting field of the data packet is used as the starting point of the message header, and data with a preset length is extracted from the data packet as message header data.

[0025] In a second aspect, an embodiment of the present invention provides a message processing method, applied to a network device, the network device including a central processing unit and a double data rate synchronous dynamic random access memory, the method comprising:

[0026] Polling the DMA descriptor, if the currently polled DMA descriptor is a second state value, obtaining a data address from the DMA descriptor and determining the service message corresponding to the DMA descriptor; wherein the second state value indicates that the message data reception is completed;

[0027] Identify whether the header data of the service message exists in the cache of the central processor, and if so, parse and identify the header data in the cache, and perform a table lookup based on the identification result to determine the forwarding information;

[0028] Acquire the remaining data of the service message from the storage area corresponding to the data address in the double rate synchronous dynamic random access memory, and edit the remaining data to obtain a message to be forwarded;

[0029] Based on the forwarding information, the message to be forwarded is forwarded to a next-hop device, the DMA descriptor is set to a first state value, and the data address in the DMA descriptor is released.

[0030] In a third aspect, an embodiment of the present invention provides a message processing device, applied to a network device, wherein the network device includes a central processing unit and a double-rate synchronous dynamic random access memory, and the message processing device includes a congestion determination module and a storage module;

[0031] The congestion judgment module is used to judge whether the current packet receiving is in a congested state when monitoring the data packet of the service message started to be sent by the external device;

[0032] The storage module is configured to, if not, receive the data packet, extract the message header data of the service message from the data packet, write the message header data into the cache of the central processing unit, and write the data packet excluding the message header data into the double data rate synchronous dynamic random access memory;

[0033] The storage module is further configured to receive the data packet and write the data packet into the double rate synchronous dynamic random access memory.

[0034] In a fourth aspect, an embodiment of the present invention provides an electronic device comprising a processor and a memory, wherein the memory stores machine-executable instructions that can be executed by the processor, and the processor can execute the machine-executable instructions to implement the message processing method as described in the first aspect or the second aspect.

[0035] In a fifth aspect, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the message processing method as described in the first aspect or the second aspect is implemented.

[0036] The message processing method, device, electronic device and computer-readable storage medium provided by the embodiments of the present invention are such that, when a network device detects that an external device starts to send a data packet of a service message, if the current packet receiving is in a congested state, the data packet is written into a double-speed synchronous dynamic random access memory; if the current packet receiving is not in a congested state, the message header data in the data packet is directly written into the cache of the central processing unit, and other data other than the message header data is written into the double-speed synchronous dynamic random access memory. As a result, when the central processing unit processes the service message, the message header data is already in the cache, and there is no need to access the double-speed synchronous dynamic random access memory to obtain the message header data. This can effectively reduce the memory access pressure of the central processing unit on the double-speed synchronous dynamic random access memory, thereby improving the overall performance of soft forwarding.

[0037] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0039] Figure 1 A block diagram of a message processing system provided by an embodiment of the present invention is shown.

[0040] Figure 2 One of the flow charts of the message processing method provided by an embodiment of the present invention is shown.

[0041] Figure 3 The second flowchart of the message processing method provided by the embodiment of the present invention is shown.

[0042] Figure 4 Shown Figure 2 or Figure 3 Schematic diagram of the flow of some sub-steps of step S12.

[0043] Figure 5 Shown Figure 2 or Figure 3 One of the flow charts of some sub-steps of step S14.

[0044] Figure 6 A schematic diagram showing the structure of message processing by a network device provided by an embodiment of the present invention is shown.

[0045] Figure 7 Shown Figure 5 Shown Figure 2 or Figure 3 FIG2 is a flow chart of some sub-steps of step S14.

[0046] Figure 8 The third flowchart of the message processing method provided by the embodiment of the present invention is shown.

[0047] Figure 9 A block diagram of a message processing device provided by an embodiment of the present invention is shown.

[0048] Figure 10 A block diagram of an electronic device provided by an embodiment of the present invention is shown.

[0049] Figure numerals: 100 - message processing system; 110 - network device; 120 - external device; 130 - message processing device; 140 - congestion judgment module; 150 - storage module; 160 - polling module; 170 - identification module; 180 - editing module; 190 - forwarding module; 200 - electronic device. DETAILED DESCRIPTION

[0050] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0051] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but is merely intended to represent selected embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative work are within the scope of protection of the present invention.

[0052] It should be noted that relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0053] In the soft forwarding scenario of packets, due to the complexity of the services, software is usually used to identify, search, process, edit, and forward service packets.

[0054] Due to the complex software processing of service messages (i.e., soft forwarding) and the large number of service table entries, the soft forwarding process generally includes the following steps: receiving and sending line-side messages through hardware; storing messages in a storage device, such as DRAM; software sensing message reception; software parsing the messages stored in the storage device; performing a service table lookup based on the parsing results, and performing service processing and editing on the messages, such as flow learning, statistics, deep analysis, security policies, and encryption and decryption; and forwarding the processed and edited messages according to the forwarding decision based on the table lookup results, completing message transmission.

[0055] In the current soft forwarding method for service messages, the DMA controller first writes the message data packet to the DDR. After writing the message, it updates the DMA descriptor or simultaneously generates an interrupt. The CPU detects the message reception by polling the DMA descriptor or the interrupt provided by the DMA. The CPU then obtains the message data address according to the DMA descriptor, reads the message data from the DDR, and then parses and forwards the message data. However, due to the long latency of the CPU reading the DDR, the CPU cannot continue to process the received message before retrieving the data, resulting in idle CPU resources and a significant decrease in overall performance.

[0056] Another existing approach typically offloads some critical services to hardware for parsing, lookup, and editing. However, router services are large in size, requiring hardware table entries to be stored in SRAM, resulting in high hardware costs. Furthermore, this approach only offloads a portion of the services, leaving a significant number of service table entries stored in DDR. This allows table entries on DDR to easily reach the M-level or even G-level, while the majority of services stored in DDR must still be processed by the CPU. Consequently, CPU resources remain wasted, significantly reducing overall performance.

[0057] Based on the above considerations, an embodiment of the present invention provides a message processing method that can improve the problems of CPU resource waste and significant overall performance degradation caused by current message soft forwarding methods.

[0058] The message processing method provided by the embodiment of the present invention can be applied to Figure 1 In the message processing system shown, the message processing system 100 may include a network device 110 and multiple external devices 120. The network device 110 can be communicatively connected with the multiple external devices 120 via a network, and the network device 110 may include a central processing unit and a double-rate synchronous dynamic random access memory.

[0059] The external device 120 may be used to send data packets of service messages to the network device 110 .

[0060] The network device 110 is used to detect when the external device 120 starts to send data packets of business messages, determine whether the current packet receiving is in a congested state, and if not, receive the data packets, extract the message header data of the business message from the data packets, write the message header data into the cache of the central processing unit, and write the data packets except the message header data into the double-rate synchronous dynamic random access memory.

[0061] The network devices 110 include, but are not limited to, switches, gateways, terminal devices, and servers. Similarly, the external devices 120 may include, but are not limited to, independent servers, server clusters, terminal devices, wearable portable devices, personal computers, laptops, mobile terminals, switches, and gateways.

[0062] In a possible implementation manner, the embodiment of the present invention provides a message processing method, referring to Figure 2 , the message processing method may include the following steps. In this embodiment, the message processing method is applied to Figure 1 Take the network device 110 in FIG. 1 as an example.

[0063] S12, when monitoring the external device starts to send a data packet of a service message, determine whether the current packet receiving is in a congested state. If not, execute step S14, if so, execute step S16.

[0064] It should be noted that, in this embodiment, receiving a data packet means receiving the data packet but not storing it in any storage device. Currently receiving a packet refers to a series of processing procedures including message reception, message storage, and message forwarding.

[0065] S14, receiving a data packet, extracting the header data of the service message from the data packet, writing the header data into the cache of the central processing unit, and writing the data packet except the header data into the double rate synchronous dynamic random access memory.

[0066] S16, receiving a data packet, and writing the data packet into the double rate synchronous dynamic random access memory.

[0067] When the network device 110 detects that any external device 120 has begun to send a data packet of a service message and has not yet received and stored the data packet, if the current packet receiving service of the network device 110 is not in a congested state, the network device 110 extracts the header data from the data packet and writes the header data directly to the cache of the central processing unit. The network device 110 also writes the body data of the data packet excluding the header data (in this embodiment, the body data refers to the data in the data packet excluding the header data) to the double data rate synchronous dynamic random access memory. If the current packet receiving service of the network device 110 is in a congested state, the entire data packet is written to the double data rate synchronous dynamic random access memory.

[0068] Compared with the traditional message soft forwarding method, the message processing method provided by the embodiment of the present invention directly writes the message header data of the received service message into the cache of the central processing unit when the current packet receiving is not in a congested state. Therefore, when the central processing unit processes the service message, the message header data is already in the cache, and there is no need to access the double-rate synchronous dynamic random access memory to obtain the message header data. This can effectively reduce the memory access pressure of the central processing unit on the double-rate synchronous dynamic random access memory, thereby improving the overall performance of soft forwarding.

[0069] To achieve more efficient soft forwarding of packets, in one possible implementation, direct memory access and DMA descriptors are introduced, and a certain number of DMA descriptors are pre-set in the network device 110. DMA descriptors may include, but are not limited to, status values ​​used to represent the processing status of service packets and data addresses of storage areas used to record data packets of service packets.

[0070] For example, the status value may include a first status value of "0" and a second status value of "1." The first status value of "0" indicates that the message data reception state is incomplete, and the second status value of "1" indicates that the message data reception state is complete. When the status value is the first status value of "0," the data address in the DMA descriptor is empty. When the status value is the second status value of "1," the data address in the DMA descriptor is not empty, indicating that the message data corresponding to the data address is in a state to be processed, edited, or forwarded.

[0071] It should be noted that all DMA descriptors in the network device 110 may have a sequential relationship, and may be in a circular order. Each DMA descriptor may record the identifier or address of the descriptor that follows it. For example, if there are three DMA descriptors with sequence numbers 1, 2, and 3, the DMA descriptor with sequence number 1 may record the identifier or address of the DMA descriptor with sequence number 2, the DMA descriptor with sequence number 2 may record the identifier or address of the DMA descriptor with sequence number 3, and the DMA descriptor with sequence number 3 may record the identifier or address of the DMA descriptor with sequence number 1, thereby forming a circular order.

[0072] Further, refer to Figure 3 In steps S14 and S16, receiving the data packet can be further implemented as follows: using direct memory access to receive the data packet of the service message sent by the external device, and updating the state value of a DMA descriptor from the first state value to the second state value.

[0073] In this embodiment, the first state value indicates that the message data reception is incomplete, and the second state value indicates that the message data reception is complete. In addition, step S14 may include steps S141 and S142, and step S16 may include steps S161 and S162.

[0074] S141, using direct memory access, receiving a data packet of a service message sent by an external device, and updating a state value of a DMA descriptor from a first state value to a second state value.

[0075] S142, extracting the header data of the service message from the data packet, writing the header data into the cache of the central processing unit, and writing the data packet except the header data into the double data rate synchronous dynamic random access memory.

[0076] S161, using direct memory access, receiving a data packet of a service message sent by an external device, and updating a state value of a DMA descriptor from a first state value to a second state value.

[0077] S162, writing the data packet into the double data rate synchronous dynamic random access memory.

[0078] Direct Memory Access (DMA), that is, the network device 110 receives data packets of service messages sent by the external device 120 through the DMA RING.

[0079] It should be understood that the DMA descriptor selected in step S141 and step S161 is a DMA descriptor whose status value is the first status value. The method of selecting the DMA descriptor can be flexibly selected. For example, it can be the first DMA descriptor whose status value is the first status value after the DMA descriptor whose status value is the second status value, or it can be a DMA descriptor randomly selected from all DMA descriptors whose status value is the first status value. In this embodiment, there is no specific limitation.

[0080] Furthermore, in the above-mentioned step S142, before writing the data packet except the message header data into the double rate synchronous dynamic random access memory, and in step S16, before writing the data packet into the double rate synchronous dynamic random access memory, it can also include: determining the data address of the storage area for storing the data packet in the double rate synchronous dynamic random access memory.

[0081] The network device 110 can determine the free storage area in the double-speed synchronous dynamic random access memory by monitoring or recording, and thereby determine the storage area for storing the entire data packet or the message body data in the data packet from all the free storage areas of the double-speed synchronous dynamic random access memory by any storage method such as length matching and sequential storage.

[0082] It should be noted that the DMA descriptor in steps S141 and S161 may include the data address of a storage area for storing a data packet or header data in a data packet. This storage area may be written into the DMA descriptor in real time by the hardware when the data address of the storage area is determined, or it may be written into the DMA descriptor in advance. In the case where the data address is written into the DMA descriptor in advance, when the DMA descriptor switches from the second state value to the first state value, the CPU or hardware may randomly determine a storage area from all free storage areas of the double data rate synchronous dynamic random access memory, and then fill the data address of the storage area into the DMA descriptor.

[0083] For each service message sent by the external device 120 , there is a corresponding DMA descriptor that records information such as the storage area and status value of the service message.

[0084] In a possible implementation, in order to quickly and accurately determine the current state of receiving packets, a threshold value is introduced. The DMA RING can be pre-configured with a threshold value, namely, Threshold. Figure 4 , you can use the following steps to determine whether the current packet receiving is in a congested state.

[0085] S121 , determining the total number of descriptors indicating that message data reception is complete from all DMA descriptors.

[0086] S122: Determine whether the total number of descriptors exceeds a preset threshold. If yes, execute step S123; if no, execute step S124.

[0087] S123, determining that the current packet receiving is in a congested state.

[0088] S124: Determine that the current packet receiving is not in a congested state.

[0089] From all DMA descriptors configured on the network device 110, the total number of DMA descriptors whose status value is the second status value is determined as the total number of descriptors. When the total number of descriptors is less than or equal to the threshold value, the current packet receiving is not in a congestion state (burst state), that is, the central processing unit's memory access to the double data rate synchronous dynamic random access memory has not reached the memory access upper limit; otherwise, the current packet receiving is in a congestion state, that is, the central processing unit's memory access to the double data rate synchronous dynamic random access memory has reached the memory access upper limit.

[0090] For step S14, the method of extracting the message header data from the data packet can be flexibly selected. For example, a specified field can be used as the message header data, or a field of a preset length can be used as the message header data. In this embodiment, no specific limitation is made.

[0091] In a possible implementation, extracting the header data of the service message from the data packet can be further implemented as follows: using the start field of the data packet as the starting point of the header, extracting data with a preset length from the data packet as the header data.

[0092] The data in the data packet except the message header is the message body data of the service message.

[0093] Further, for step S142, refer to Figure 5 ,Writing the message header data into the cache of the ,CPU can be achieved by the following steps.

[0094] S1422, send the message header data and data address to the bus.

[0095] It should be noted that the data address is the address of the storage area in the double rate synchronous dynamic random access memory where the data packet is stored.

[0096] S1424, through the bus, according to the data address, the message header data is stored in a specific area allocated in the cache of the central processing unit.

[0097] After the bus receives the data address and message header data, it stores the message header data in a specific area allocated in the cache of the central processing unit according to the data address.

[0098] Reference Figure 6 The central processing unit may include multiple cores, each core may include multiple cache areas (also called cache lines), and each cache line can store data of a certain length.

[0099] In step S1422, for the header data of each service message, when the length of the header data exceeds the length of a cache line, the DMA controller may divide the header data into multiple segments, thereby sending one segment at a time. The DMA controller sends the data address and header data to the bus through multiple transmissions. For example, the DMA controller may send the data address and header data to the bus through a typical ARM entity, namely, the ACE5-Lite ACP Master interface.

[0100] After the bus receives the data address and message header data, it writes the message header data into a specific area allocated in the CPU's cache through the CPU side interface (for example, ARM's typical physical ACE5-LiteACP Slave interface) in cache lines according to the data address.

[0101] Further, refer to Figure 7 , before step S142, step S141 may also be included.

[0102] S1421, allocate a specific idle area for the message header data from the CPU's cache.

[0103] The method for allocating a specific free area for message header data can be flexibly configured. For example, the central processor can randomly select an area from an area in the cache that does not store data. Alternatively, when the DMA RING receives a data packet of a service message, the DMA RING can allocate a specific area from an area in the cache that does not store data based on the results of monitoring the cache. This is not specifically limited in this embodiment.

[0104] In one possible implementation, when the DMA RING or the central processing unit determines to allocate a free specific area for the message header data, the cache address of the specific area and the data address of the storage area storing the message body data can be notified to the bus in a paired relationship, so that when the bus receives the data address and the message header data, it can determine the cache address paired with the data address based on the data address, and write the message header data into the cache area corresponding to the cache address in the cache.

[0105] In the above-mentioned message processing method provided by the embodiment of the present invention, whether the current packet receiving is in a congested state is determined based on the backlog number of unprocessed DMA descriptors of the DMA RING and a pre-configured threshold value. Then, in a non-congested state, the corresponding message header data is directly written into the CPU's cache through bus instructions when receiving the packet. Therefore, when the CPU perceives that the message is received, the message header data is already in the CPU's cache, and there is no need to access the DDR to obtain the message header data. This can effectively reduce the memory access delay when the CPU processes the message, thereby greatly improving the soft forwarding efficiency and enhancing the overall forwarding bandwidth and forwarding performance.

[0106] In a possible implementation manner, the embodiment of the present invention further provides a message processing method, referring to Figure 8 , may include the following steps. In this embodiment, the message processing method can be applied to Figure 1 Furthermore, at this time, the network device 110 stores the data packets of the service messages sent by the external device 120 using the message processing method provided in the above embodiment.

[0107] S21, polling the DMA descriptor. If the currently polled DMA descriptor is in the second state value, obtaining the data address from the DMA descriptor and determining the service message corresponding to the DMA descriptor.

[0108] The second state value indicates that the message data reception is complete. After obtaining the data address, the service message corresponding to the DMA descriptor can be determined.

[0109] S23, identifying whether there is header data of the service message in the cache of the central processing unit. If so, parsing and identifying the header data in the cache, and performing a table lookup based on the identification result to determine forwarding information.

[0110] S25 , obtaining the remaining data of the service message from the storage area corresponding to the data address in the double rate synchronous dynamic random access memory, and editing the remaining data to obtain a message to be forwarded.

[0111] It should be noted that the remaining data refers to the message body data in the data packet of the service message excluding the message header data. Step S25 and step S23 can be executed simultaneously or one after the other.

[0112] S27: forward the message to be forwarded to the next-hop device based on the forwarding information, set the DMA descriptor to the first state value, and release the data address in the DMA descriptor.

[0113] In this embodiment, the first state value represents an uncompleted message data reception state.

[0114] For step S23, if not, obtain the data packet of the service message from the storage area corresponding to the data address in the double-rate synchronous dynamic random access memory (DDR), parse, identify, look up and edit the data packet to obtain the message to be forwarded and forwarding information, and then forward the message to be forwarded to the next-hop device based on the forwarding information.

[0115] Through the above steps S21-S27, when the status value of the currently polled DMA descriptor indicates that the message data reception is completed, and the message header data of the message described by the DMA descriptor is in the CPU's cache, the network device 110 can directly process the message header data in the cache to obtain forwarding information, and then based on the forwarding information, edit the remaining data to obtain the message to be forwarded for forwarding, so that during the message forwarding process, the network device 110 only needs to obtain the remaining data when accessing the DDR, which can effectively reduce the access pressure on the DDR, thereby greatly improving the soft forwarding efficiency, overall forwarding bandwidth and forwarding performance of the network device 110.

[0116] Based on the same inventive concept as the above-mentioned message processing method, in a possible implementation manner, the present invention further provides a message processing device 130, which can be applied to Figure 1 The network device 110 in FIG. Figure 9 The message processing device 130 may include a congestion determination module 140 and a storage module 150.

[0117] The congestion determination module 140 is configured to determine whether the current packet receiving is in a congested state when detecting that an external device starts to send a data packet of a service message.

[0118] The storage module 150 is used to receive data packets when the current packet receiving is not in a congested state, extract the header data of the service message from the data packet, write the header data into the cache of the central processing unit, and write the data packet except the header data into the double-rate synchronous dynamic random access memory.

[0119] The storage module 150 is further configured to receive data packets and write the data packets into the double rate synchronous dynamic random access memory when the current packet receiving is in a congested state.

[0120] Furthermore, the message processing device 130 may further include a polling module 160 , an identification module 170 , an editing module 180 and a forwarding module 190 .

[0121] The polling module 160 is configured to poll the DMA descriptor, and if the currently polled DMA descriptor is in the second state value, obtain the data address from the DMA descriptor and determine the service message corresponding to the DMA descriptor.

[0122] The identification module 170 is used to identify whether there is a message header data of the service message in the cache of the central processing unit. If so, the message header data in the cache is parsed and identified, and a table is looked up based on the identification result to determine the forwarding information.

[0123] The editing module 180 is configured to obtain the remaining data of the service message from the storage area corresponding to the data address in the double rate synchronous dynamic random access memory, and edit the remaining data to obtain the message to be forwarded.

[0124] The forwarding module 190 is configured to forward the message to be forwarded to the next-hop device based on the forwarding information, set the DMA descriptor to a first state value, and release the data address in the DMA descriptor. The first state value indicates that the message data reception is incomplete.

[0125] In the above-mentioned message processing device 130, through the coordinated action of the congestion judgment module 140, the storage module 150, the polling module 160, the identification module 170, the editing module 180 and the forwarding module 190, when the current packet receiving is not in a congested state, the message header data of the received service message is directly written into the cache of the central processing unit, so that when the central processing unit processes the service message, the message header data is already in the cache, and there is no need to access the double-speed synchronous dynamic random access memory to obtain the message header data, which can effectively reduce the memory access pressure of the central processing unit on the double-speed synchronous dynamic random access memory, thereby improving the overall performance of soft forwarding.

[0126] For specific definitions of the message processing device 130, please refer to the definitions of the message processing method above and will not be repeated here. Each module in the above-mentioned message processing device 130 can be implemented in whole or in part through software, hardware, or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the processor of the electronic device in hardware form, or can be stored in the memory of the electronic device in software form, so that the processor can call and execute the corresponding operations of each of the above modules.

[0127] In one embodiment, an electronic device 200 is provided. The electronic device 200 may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 10As shown. The electronic device 200 includes a processor, a memory, a communication interface, a display screen and an input device connected via a system bus. Among them, the processor of the electronic device 200 is used to provide computing and control capabilities. The memory of the electronic device 200 includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The communication interface of the electronic device 200 is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, an operator network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, the message processing method provided in the above embodiment is implemented.

[0128] Figure 10 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present invention, and does not constitute a limitation on the electronic device 200 to which the solution of the present invention is applied. The specific electronic device 200 may include Figure 10 More or fewer components may be shown, or some components may be combined, or the components may be arranged differently.

[0129] In one embodiment, the message processing device 130 provided by the present invention can be implemented in the form of a computer program. The computer program can be used in Figure 10 The memory of the electronic device 200 may store various program modules constituting the message processing device 130, such as: Figure 9 The congestion determination module 140, storage module 150, polling module 160, identification module 170, editing module 180 and forwarding module 190 are shown. The computer program composed of various program modules enables the processor to execute the steps of the message processing method described in this specification.

[0130] For example, Figure 10 The electronic device 200 shown may be Figure 8 The congestion determination module 140 in the message processing device 130 shown executes step S12. The electronic device 200 may execute steps S14 and S16 via the storage module 150. The electronic device 200 may execute step S21 via the polling module 160. The electronic device 200 may execute step S23 via the identification module 170. The electronic device 200 may execute step S25 via the editing module 180. The electronic device 200 may execute step S27 via the forwarding module 190.

[0131] In one embodiment, an electronic device 200 is provided, including a memory and a graphics processor, the memory storing machine-executable instructions, and the processor implementing the following steps when executing the machine-executable instructions: upon detecting that an external device starts sending a data packet of a business message, determining whether the current packet receiving is in a congested state; if not, receiving the data packet, extracting the message header data of the business message from the data packet, writing the message header data to a cache of a central processing unit, and writing the data packet excluding the message header data to a double-speed synchronous dynamic random access memory; if so, receiving the data packet and writing the data packet to the double-speed synchronous dynamic random access memory.

[0132] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When executed by a graphics processor, the computer program implements the following steps: when detecting that an external device begins to send a data packet of a business message, determining whether the current packet receiving is in a congested state; if not, receiving the data packet, extracting message header data of the business message from the data packet, writing the message header data to a cache of a central processing unit, and writing the data packet excluding the message header data to a double-bit rate synchronous dynamic random access memory; if so, writing the data packet to the double-bit rate synchronous dynamic random access memory.

[0133] In one embodiment, an electronic device 200 is provided, including a memory and a graphics processor, the memory storing machine-executable instructions, and the processor implementing the following steps when executing the machine-executable instructions: polling a DMA descriptor, and if the currently polled DMA descriptor is a second state value, obtaining a data address from the DMA descriptor, and determining a service message corresponding to the DMA descriptor; identifying whether there is message header data of the service message in a cache of a central processing unit, and if so, parsing and identifying the message header data in the cache, and performing a table lookup based on the identification result to determine forwarding information; obtaining remaining data of the service message from a storage area corresponding to the data address in a double-rate synchronous dynamic random access memory, editing the remaining data to obtain a message to be forwarded; and forwarding the message to be forwarded to a next-hop device based on the forwarding information, setting the DMA descriptor to the first state value, and releasing the data address in the DMA descriptor.

[0134] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When executed by a graphics processor, the computer program implements the following steps: polling a DMA descriptor, and if the currently polled DMA descriptor is in a second state value, obtaining a data address from the DMA descriptor and determining a service message corresponding to the DMA descriptor; identifying whether message header data of the service message exists in a cache of a central processing unit, and if so, parsing and identifying the message header data in the cache, and performing a table lookup based on the identification result to determine forwarding information; obtaining remaining data of the service message from a storage area corresponding to the data address in a double-rate synchronous dynamic random access memory, editing the remaining data to obtain a message to be forwarded; and forwarding the message to be forwarded to a next-hop device based on the forwarding information, setting the DMA descriptor to a first state value, and releasing the data address in the DMA descriptor.

[0135] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architectures, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a portion of code, and the module, program segment or a portion of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or can be implemented using a combination of dedicated hardware and computer instructions.

[0136] In addition, the functional modules in the various embodiments of the present invention may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0137] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device 110, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0138] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A message processing method, characterized in that: Applied to a network device, the network device includes a central processing unit and a double data rate synchronous dynamic random access memory, and the method includes: When detecting that an external device starts to send a data packet of a service message, determining whether the current packet receiving is in a congested state includes: determining, from all DMA descriptors, a total number of descriptors indicating that the message data reception is complete, and determining whether the total number of descriptors exceeds a preset threshold value; if so, determining that the current packet receiving is in a congested state; if not, determining that the current packet receiving is not in a congested state; If not, receiving the data packet, extracting the header data of the service message from the data packet, writing the header data into the cache of the central processing unit, and writing the data packet except the header data into the double data rate synchronous dynamic random access memory; If so, the data packet is received and written into the double data rate synchronous dynamic random access memory.

2. The message processing method according to claim 1, characterized in that: The step of receiving the data packet comprises: Using direct memory access, receiving a data packet of a service message sent by an external device, and updating a state value of a DMA descriptor from a first state value to a second state value; The first state value indicates that the message data reception is incomplete, and the second state value indicates that the message data reception is complete. Before the step of writing the data packet excluding the message header data into the double data rate synchronous dynamic random access memory, or before the step of writing the data packet into the double data rate synchronous dynamic random access memory, the method further includes: In the double data rate synchronous dynamic random access memory, a data address of a storage area storing the data packet is determined.

3. The message processing method according to claim 1 or 2, characterized in that: The step of writing the message header data into the cache of the central processing unit comprises: Sending the message header data and data address to a bus; wherein the data address is the address of a storage area in the double rate synchronous dynamic random access memory storing the data packet; The message header data is stored in an allocated specific area in the cache of the central processing unit through the bus according to the data address.

4. The message processing method according to claim 3, characterized in that: Before the step of sending the message header data and the data address to the bus, the method includes: A specific idle area is allocated from the cache of the central processing unit for the message header data.

5. The message processing method according to claim 1 or 2, characterized in that: The step of extracting the header data of the service message from the data packet includes: The starting field of the data packet is used as the starting point of the message header, and data with a preset length is extracted from the data packet as message header data.

6. A message processing device, characterized in that: Applicable to a network device, the network device includes a central processing unit and a double-rate synchronous dynamic random access memory, and the message processing device includes a congestion judgment module and a storage module; The congestion judgment module is configured to, when detecting that an external device starts to send a data packet of a service message, judge whether the current packet receiving is in a congested state, including: determining the total number of descriptors representing the message data reception completion state from all DMA descriptors, and judging whether the total number of descriptors exceeds a preset threshold value; if so, judging that the current packet receiving is in a congested state; if not, judging that the current packet receiving is not in a congested state; The storage module is configured to, if not, receive the data packet, extract the message header data of the service message from the data packet, write the message header data into the cache of the central processing unit, and write the data packet excluding the message header data into the double data rate synchronous dynamic random access memory; The storage module is further configured to receive the data packet and write the data packet into the double rate synchronous dynamic random access memory.

7. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores machine executable instructions that can be executed by the processor, and the processor can execute the machine executable instructions to implement the message processing method according to any one of claims 1 to 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the message processing method according to any one of claims 1 to 5 is implemented.

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