Data stream key generation method, encryption device and storage medium
By identifying packet headers and messages, the storage array key data is dynamically obtained, and vector data is generated in real time. This solves the problems of high resource overhead and incompatibility in existing key calling and replacement schemes, and achieves efficient key management and algorithm switching.
Patent Information
- Application Number
- CN202211737919.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-31
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2042-12-31
AI Technical Summary
Existing key retrieval and replacement schemes cannot dynamically manage key streams and data streams of multiple algorithm modes in storage applications, resulting in unsuitable hardware acceleration systems, high resource consumption, and the inability to achieve independence and efficient key replacement between groups.
By identifying the header and message in the data packet, the key data in the storage array is dynamically obtained, vector data is generated in real time, dynamic algorithm switching is supported, and the key replacement efficiency is improved and resource overhead is reduced by changing the block key.
It achieves efficient management of key replacement, increases the frequency of key replacement, reduces hardware and software resource overhead, and improves the efficiency of dynamic encryption of data streams and algorithm switching.
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Figure CN116232574B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of data security technology, specifically to a data stream key generation method, an encryption device, and a flash memory device. Background Technology
[0002] In terms of data security, AES and SM4 symmetric block ciphers are currently the mainstream encryption standards. Symmetric encryption algorithms, as the name suggests, use the same key for both encryption and decryption. The key is the most fundamental private information and must never be leaked; it directly determines data security. For different application scenarios, symmetric encryption algorithms are extended into different working modes (such as ECB / CBC / CFB / OFB / CTR / XTS / GCM / CCM, etc.). Storage applications primarily use the XTS working mode, which introduces an Initialization Vector (IV) to improve security strength. Both the IV and the key are private information, collectively referred to as the key in this paper. Key protection and management mechanisms must be implemented throughout its entire lifecycle. Key management mainly includes: generation, storage, transfer, use, and replacement. Key generation is the responsibility of the key sharer or a trusted institution, or it can be derived from the root key. Transfer and storage can occur in ciphertext form or through a secure channel and are stored in reliable non-volatile memory. Key retrieval is temporarily stored in a cache for later use, primarily for data encryption / decryption. Key replacement must be carried out before the expiration period or when the key is compromised. This means that the data packet completes the process of decrypting the old key and encrypting with the new key.
[0003] In the process of conceiving and implementing this application, the inventors discovered at least the following problems: In storage applications, the implementation of data stream encryption is generally to fix the size of data units according to disk sectors, and to group sectors with key groups, and to assign a key by marking (lba or index) each data unit. This is the key retrieval scheme for disk encryption, which is generally applicable to XTS mode.
[0004] Key replacement primarily concerns ciphertext. It involves taking ciphertext generated with the old key, converting it back to plaintext using the old key, and then regenerating the ciphertext using the new key. Traditional key replacement typically reuses the data encryption-decryption circuit, but it cannot dynamically allocate new keys according to data packets. It can only handle key replacement statically, lacking independence between packets and unsuitable for hardware acceleration systems that handle data key grouping. Alternatively, a separate key replacement circuit relies heavily on software scheduling, increasing resource overhead. With the development of security algorithms and the diversification of application scenarios, as well as the demands for large data volumes and high throughput, there is a need to support more algorithms and modes, and more efficient hardware acceleration. Existing key invocation and key replacement schemes rely too heavily on software scheduling, lack granular group management, and cannot dynamically manage the key streams and data streams of multiple algorithm modes (such as XTS / ECB / CBC / CFB / OFB / CTR / GCM / CCM, etc.), requiring improvement in both compatibility and efficiency. Summary of the Invention
[0005] To alleviate the above problems, this application provides a data stream key generation method, including:
[0006] In response to receiving a data packet, identify the data header and data packet in the data packet;
[0007] Based on the data header, key data is obtained from the storage array;
[0008] The data packet is processed using the key data.
[0009] Optionally, the step of identifying the data packet header in the data packet includes:
[0010] Based on the data header, extract the index field, indicator field, and count value field of the data packet, respectively.
[0011] Optionally, the step of obtaining key data from the storage array based on the data header includes:
[0012] Based on the index field, the key group of the storage array is indexed, the algorithm configuration, pre-stored key and initial vector value in the corresponding key group are obtained, and the vector generation circuit is started to sample the count value field and the initial vector value to generate vector data according to the algorithm configuration and pre-stored key.
[0013] Optionally, the step of indexing the key group of the storage array according to the index field, obtaining the algorithm configuration, pre-stored key and initial vector value in the corresponding key group, and starting the vector generation circuit to sample the count value field and the initial vector value to generate vector data online according to the algorithm configuration and pre-stored key, and the subsequent steps include:
[0014] When the indication field indicates encryption or decryption, obtain the current key from the corresponding key group;
[0015] The vector generation circuit generates current vector data based on the current key;
[0016] The algorithm configuration, current key, and current vector data are encoded for use in encrypting or decrypting the data packet.
[0017] Optionally, the step of indexing the key group of the storage array according to the index field, obtaining the algorithm configuration, pre-stored key and initial vector value in the corresponding key group, and starting the vector generation circuit to sample the count value field and the initial vector value to generate vector data online according to the algorithm configuration and pre-stored key, and the subsequent steps include:
[0018] When the indication field indicates a key change, retrieve the current key and the target key from the corresponding key group;
[0019] The vector generation circuit generates current vector data based on the current key and generates target vector data based on the target key;
[0020] The algorithm configuration, current key, target key, current vector data, and target vector data are encoded for decryption and encryption processing, and the key of the data packet is replaced.
[0021] Optionally, the step of the startup vector generation circuit sampling the count value field and the initial vector value to generate vector data online according to the algorithm configuration and the target key includes:
[0022] Based on the algorithm configuration, obtain the configuration mode of the data packet;
[0023] Based on the configuration mode, determine the vector standard requirements;
[0024] The vector data is generated according to the vector standard requirements.
[0025] Optionally, the step of generating the vector data according to the vector standard requirements includes:
[0026] When the vector standard corresponding to the configuration mode requires uniqueness, the vector data is generated by combining the initial vector value with the count value field of the data packet; or,
[0027] When the vector standard requirement corresponding to the configuration mode is randomness, the count value field of the data packet is forward encrypted, and the output ciphertext is the vector data.
[0028] Optionally, the step of performing key processing on the data packet based on the key data includes:
[0029] The algorithm configuration, target key, vector data, and data packet are sent to a preset algorithm engine for key processing of the data packet.
[0030] Optionally, the step of indexing the key group of the storage array according to the index field and obtaining the algorithm configuration, target key and initial vector value in the corresponding key group further includes:
[0031] Based on the data packet, the key for pre-fetching subsequent data packets is predicted.
[0032] Optionally, the method for dynamically processing classified data streams further includes at least one of the following:
[0033] In the data stream, each data packet triggers a key acquisition action once;
[0034] The storage array is divided into multiple groups according to disk sectors or application scenarios;
[0035] Each group of the storage array includes an algorithm configuration table, a data key table, an adjustment key table, and an initialization vector table;
[0036] Each group of the storage array expands a new set of key tables in parallel.
[0037] This application also provides an encryption device, which includes a processor and a memory;
[0038] The memory stores a computer program that, when executed by the processor, performs the steps of generating the data stream key as described above.
[0039] This application also provides a storage medium storing a computer program, which, when executed by a processor, implements the data stream key generation steps described above.
[0040] As described above, the data stream key generation method, encryption device, and flash memory device provided in this application, in response to receiving a data packet, identify the data header and data packet in the data packet; obtain key data from the storage array according to the data header; and perform key processing on the data packet according to the key data. This allows for the real-time dynamic establishment of vector data based on the data stream, enabling dynamic algorithm switching; and improves key replacement efficiency by changing the block key, thereby increasing the key replacement frequency and reducing software and hardware resource overhead. Attached Figure Description
[0041] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0042] Figure 1 This is a flowchart of a data stream key generation method according to an embodiment of this application.
[0043] Figure 2 This is a schematic diagram of key block information of a storage array according to an embodiment of this application.
[0044] Figure 3 This is a schematic diagram illustrating three logic combination methods: RAW, SWAP, and XOR, according to an embodiment of this application.
[0045] Figure 4 This is a schematic diagram of the encryption device structure according to an embodiment of this application.
[0046] Figure 5 This is a schematic diagram illustrating the decomposition of data packet fields according to an embodiment of this application.
[0047] Figure 6 This is a schematic diagram of the block key of an encryption / decryption index storage array according to an embodiment of this application.
[0048] Figure 7 This is a schematic diagram of a block key in a key replacement index storage array according to an embodiment of this application.
[0049] Figure 8 This is a schematic diagram of a unique vector logic combination method according to an embodiment of this application.
[0050] Figure 9 This is a schematic diagram illustrating the generation logic of a dynamic vector for encryption / decryption instructions according to an embodiment of this application.
[0051] Figure 10 This is a schematic diagram illustrating the generation logic of a key replacement indicator dynamic vector according to an embodiment of this application.
[0052] Figure 11 This is a schematic diagram of the re-encryption engine circuit logic processing according to an embodiment of this application.
[0053] Figure 12 This is a schematic diagram illustrating the re-encryption flow of a single batch of data blocks according to an embodiment of this application.
[0054] Figure 13 This is a schematic diagram of continuous batch re-encryption flow according to an embodiment of this application.
[0055] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation
[0056] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0057] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.
[0058] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.
[0059] First Embodiment
[0060] This application provides a data stream key generation method. Figure 1 This is a flowchart of a data stream key generation method according to an embodiment of this application.
[0061] like Figure 1 As shown, in one embodiment, the data stream key generation method includes:
[0062] S10: In response to receiving a data packet, identify the data header and data message in the data packet.
[0063] A data stream is an ordered sequence of bytes of data with a start and an end. It includes input streams and output streams. Originally a concept used in communications, data streams represent a sequence of digitally encoded signals used in transmission. A data stream is a sequence of data packets, consisting of multiple packets transmitted in an ordered manner through a communication channel. Data packets, also called data frames, each consist of at least two parts: a header and a body. The header identifies the valid start of the data packet, while the body contains the main data content.
[0064] S20: Obtain key data from the storage array based on the data header.
[0065] Key data can include a data key, a tweak key, a raw IV (initialization vector), and configuration information such as a config. Key data can be pre-stored in a storage array, and when needed, it is linked to a specific address based on the index in the datagram header. For example, during the encryption phase, a data packet request is awaited, and then the hardware automatically indexes the key.
[0066] S30: Perform key processing on the data packet based on the key data.
[0067] Key processing includes encryption, decryption, and re-encryption with a different key. Once the key data is obtained, the data packets can be processed accordingly using the re-encryption engine.
[0068] This embodiment can dynamically establish real-time vector data based on the data stream, enabling dynamic switching of key algorithms; the method to improve key replacement efficiency can increase the frequency of key replacement and reduce software and hardware resource overhead.
[0069] Optionally, in response to receiving a data packet, the steps of identifying the data header and data message in the data packet are preceded by:
[0070] During the initialization phase, true random numbers are obtained from the random number generator through the scheduling unit;
[0071] Based on the initial configuration, true random numbers are used as keys and written to the storage array in groups.
[0072] A Random Number Generator (RNG) is a program or hardware used to generate random numbers. RNGs produce pseudo-random numbers, or sequences of values calculated using a complex method, thus requiring a different seed value for each operation. Different seed values result in different sequences, thus representing truly random numbers. For example, during the initialization phase, the host obtains truly random numbers from the RNG via a scheduling unit as the key source. The host then writes the initialization configuration and key blocks into a key buffer array for automatic hardware indexing of the key data during the encryption phase.
[0073] Figure 2 This is a schematic diagram of key block information of a storage array according to an embodiment of this application.
[0074] Please refer to Figure 2 The key can be flexibly divided into N groups according to disk sectors or application scenarios. Each group is independent, and the complete key information consists of four information tables: a data key table, a tweak key table, an initialization vector (raw IV) table, and an algorithm configuration table. The configuration table contains detailed management information for each group, such as encryption / decryption permissions, bypass settings, algorithm mode configuration, and host intervention protection. The other information tables contain the initialization key (key) and vector IV information required for encryption. A new set of key tables is also extended in parallel within the grouping scheme, providing a completely new set of dkey, tkey, and riv data.
[0075] Optionally, the steps of identifying the data header in the data packet include:
[0076] Based on the data header, extract the index field, indicator field, and count value field of the data packet respectively.
[0077] For example, each data packet is encoded upstream and consists of a header and a payload. The header may carry an index field, a directive field, and a nonce field, primarily used to index the block key and generate the packet vector data. The initialization vector (IV) in the Wired Equivalent Privacy (WEP) protocol is used to combine with the key to form a key seed, which serves as input to the RC4 algorithm to generate an encrypted byte stream for encrypting data. The standard 64-bit WEP uses a 40-bit key followed by a 24-bit initialization vector to form the RC4 key. For example, it is generally required that the initialization vector be a random number or a pseudo-random number. Using an initialization vector generated by random numbers achieves semantic security (hash functions and CAPTCHAs have the same requirement) and makes it difficult for attackers to crack ciphertext using the same key. In block ciphers, the encryption mode that uses the initialization vector is called a block cipher mode.
[0078] Optionally, the steps of retrieving key data from the storage array based on the data header include:
[0079] Based on the index field, the key group of the storage array is indexed, the algorithm configuration, pre-stored key and initial vector value in the corresponding key group are obtained, and the vector generation circuit is started to sample the count value field and the initial vector value to generate vector data according to the algorithm configuration and pre-stored key.
[0080] For example, based on the indication field carried in the data packet indicating encryption, decryption, or key replacement, the hardware first automatically indexes the corresponding group in the storage array using the index field, retrieving the algorithm configuration and pre-stored key data stored within that group. The algorithm configuration specifies information such as the algorithm, mode, and key size. Then, based on the algorithm configuration and key data, the hardware automatically activates the vector generation circuit, sampling the initial vector and count value fields to generate vector data in real time. Finally, the acquired configuration, pre-stored key data, and generated vector data are encoded and sent along with the data packet to the downstream re-encryption engine to complete the encryption or decryption of the data packet.
[0081] Optionally, the steps of indexing the key group of the storage array according to the index field, obtaining the algorithm configuration, pre-stored key and initial vector value in the corresponding key group, and starting the vector generation circuit to sample the count value field and the initial vector value to generate vector data online according to the algorithm configuration and pre-stored key, and the following steps include:
[0082] When the indication field indicates encryption or decryption, the current key in the corresponding key block is obtained; the vector generation circuit generates current vector data based on the current key; the algorithm configuration, the current key, and the current vector data are encoded for use in encrypting or decrypting data packets.
[0083] For example, when the direct field in the data header indicates encryption or decryption, the hardware automatically indexes to a specific packet in the storage array (e.g., ...) based on the index field. Figure 4 The system retrieves the algorithm configuration and current key stored within the first group. The algorithm configuration specifies the algorithm, mode, key size, and other information. Then, based on the algorithm configuration and current key, the hardware automatically initiates the IV vector generation circuit, sampling the initial vector `riv` and the count value field `nonce` to generate the IV in real time. Finally, the configuration, current key, and generated IV are packaged and encoded together, and sent along with the data packet to a downstream re-encryption engine that supports encryption or decryption to complete the encryption or decryption of the data packet.
[0084] Optionally, the steps of indexing the key group of the storage array according to the index field, obtaining the algorithm configuration, pre-stored key and initial vector value in the corresponding key group, and starting the vector generation circuit to sample the count value field and the initial vector value to generate vector data online according to the algorithm configuration and pre-stored key, and the following steps include:
[0085] When the indicator field indicates a key change, the current key and target key in the corresponding key group are obtained; the vector generation circuit generates current vector data based on the current key and target vector data based on the target key; the algorithm configuration, current key, target key, current vector data and target vector data are encoded for decryption and encryption processing, and the key of the data packet is changed.
[0086] For example, when the direct indication key carried in the data packet header is changed, the hardware first automatically indexes to a specific packet in the storage array based on the index field (e.g., ...). Figure 5 The system retrieves the algorithm configuration, current key, and new key stored within the first group. Then, based on the algorithm configuration and the Nonce value, the hardware automatically generates the current vector IV (current) using the current key; and automatically generates the target vector IV (new) based on the new target key. Finally, the configuration, current key, new key, IV (current), and IV (new) are uniformly encoded and sent along with the data packet to the downstream re-encryption engine that supports decryption-encryption combination mode, completing the key replacement for the data packet.
[0087] Optionally, the step of initiating the vector generation circuit to sample the count value field and the initial vector value to generate vector data online according to the algorithm configuration and the target key includes:
[0088] Based on the algorithm configuration, obtain the configuration mode of the data packet; based on the configuration mode, determine the vector standard requirements; based on the vector standard requirements, generate vector data.
[0089] Considering the different IV standard requirements for different modes: ECB requires no IV; CBC and CFB require randomness in their IVs; OFB, CTR, XTS, GCM, and CCM require uniqueness in their IVs. The generation of IVs in this scheme depends on the specific mode. Optionally, the uniqueness of the IV is satisfied by the nonce inherent in the data packet, and the randomness of the IV is satisfied by the encryption result of the nonce.
[0090] Optionally, according to vector standard requirements, the steps for generating vector data include:
[0091] When the vector standard corresponding to the configuration mode requires uniqueness, vector data is generated by combining the initial vector value with the count value field of the data packet.
[0092] Figure 3 This is a schematic diagram illustrating three logic combination methods: RAW, SWAP, and XOR, according to an embodiment of this application.
[0093] Please refer to Figure 3 Optionally, when the uniqueness of the IV is satisfied by the nonce carried by the data packet, three logical combinations of RAW, SWAP and XOR can be used for the unique IV.
[0094] Optionally, according to vector standard requirements, the steps for generating vector data include:
[0095] When the vector standard requirement corresponding to the configuration mode is randomness, the count value field of the data packet is forward encrypted, and the output ciphertext is used as vector data.
[0096] For example, for random IVs, the CIPHER encryptor can be used, with the block configuration and key (dkey) obtained from the current index as input parameters, to perform forward encryption on the Nonce field of the data packet, and the output ciphertext is used as the final obtained vector data IV value, which is returned to the data packet and finally sent to the re-encryption engine.
[0097] Optionally, the steps of key processing of the data packet based on the key data include:
[0098] Send the algorithm configuration, target key, vector data, and data packets to the preset algorithm engine for key processing of the data packets.
[0099] For example, when the `direct` field in the data header indicates encryption or decryption, the configuration, current key, and generated IV are uniformly packaged and encoded, and sent along with the data packet to the downstream re-encryption engine that supports encryption or decryption to complete the encryption or decryption of the data packet. For example, when the `direct` field in the data header indicates key change, the configuration, current key, new key, IV (current), and IV (new) are uniformly encoded, and sent along with the data packet to the downstream re-encryption engine that supports decryption-encryption combination mode to complete the key change of the data packet. Optionally, during the acquisition of vector data, the output ciphertext is used as the final acquired vector data IV value and returned to the data packet, which can then be sent together with the data packet to the re-encryption engine for processing.
[0100] Optionally, the step of indexing the key group of the storage array based on the index field and obtaining the algorithm configuration, target key, and initial vector value in the corresponding key group further includes:
[0101] Based on the data packets, predict and pre-fetch the key for subsequent data packets.
[0102] Optionally, based on the current data packet request, the scheduling unit's hardware circuitry can provide the key for the current packet and simultaneously predict and pre-fetch the key for subsequent packets. For example, when a data packet is received, the hardware circuitry processes this packet while simultaneously processing the next packet in advance, pre-fetching its key. Upon receiving the next data packet, a judgment is made: if the next data packet matches the prediction, the pre-processed key result is directly provided; if the next data packet does not match the prediction, the pre-processed key result is discarded, and temporary processing is performed on the new data packet to obtain the correct key result. This pre-processing method effectively reduces the latency of obtaining keys for continuous data streams, effectively improving the processing efficiency of the data stream.
[0103] Optionally, the dynamic processing method for classified data streams may also include:
[0104] In the data stream, each data packet triggers a key acquisition action once.
[0105] For example, the data packet payload in a data packet is the plaintext or ciphertext of the data to be processed. Each data packet can trigger a key acquisition action, thereby allowing the data packet to undergo the necessary key processing. A data stream can consist of multiple consecutive data packets, and therefore the corresponding key acquisitions can also be sequential, allowing for continuous processing of the data stream.
[0106] Please refer to Figure 2 Optionally, the dynamic processing method for classified data streams may also include:
[0107] Storage arrays are divided into multiple groups based on disk sectors or application scenarios;
[0108] Please refer to Figure 2 Optionally, the dynamic processing method for classified data streams may also include:
[0109] Each group of the storage array includes an algorithm configuration table, a data key table, an adjustment key table, and an initialization vector table;
[0110] Please refer to Figure 2 Optionally, the dynamic processing method for classified data streams may also include:
[0111] Each group of the storage array expands a new set of key tables in parallel.
[0112] Please continue to refer to this. Figure 2 The key can be flexibly divided into N groups according to disk sectors or application scenarios. Each group is independent, and the complete key information consists of four information tables: a data key table, a tweak key table, an initialization vector (raw IV) table, and an algorithm configuration table. The configuration table contains detailed management information for each group, such as encryption / decryption permissions, bypass settings, algorithm mode configuration, and host intervention protection. The other information tables contain the initialization key (key) and vector IV information required for encryption. Optionally, a new set of key tables is also extended in parallel within the grouping scheme, providing a completely new set of dkey, tkey, and riv data.
[0113] This application also provides an encryption device, which includes a processor and a memory;
[0114] The memory stores a computer program, which, when executed by the processor, implements the steps of the data stream key generation method described above.
[0115] For example, the encryption device may include a packet identification module, a key matching module, and a packet processing module.
[0116] Optionally, in response to receiving a data packet, the data packet identification module identifies the data header and data packet within the data packet. The key matching module retrieves key data from the storage array based on the data header. The data packet processing module performs key processing on the data packet based on the key data.
[0117] Optionally, in the process of the encryption device implementing the specific function of the dynamic processing method for classified data streams through hardware devices, the parameters of the hardware devices involved can be configured through computer programs stored in memory, or the actions of the hardware devices involved can be triggered to implement the steps of the data stream key generation method described above.
[0118] Figure 4This is a schematic diagram of the encryption device structure according to an embodiment of this application.
[0119] Please refer to Figure 4 In one embodiment, the encryption device combines hardware automatic indexing and real-time multi-mode IV generation to improve data encryption throughput and compatibility, and introduces decryption-encryption combination mode and dual-key (new-old key pair) distribution to achieve hardware acceleration of key replacement.
[0120] Figure 5 This is a schematic diagram illustrating the decomposition of data packet fields according to an embodiment of this application.
[0121] For example, the encryption device supports a host interface. During the initialization phase, the host obtains a truly random number from a random number generator (TRNG) as the key source via a scheduling unit. The host then writes the initialization configuration and key blocks into a key buffer array. During the encryption phase, it waits for packet requests, and then the hardware automatically indexes the key. Each packet is encoded upstream, such as... Figure 5 As shown, it consists of two parts: a header and a payload. The header carries the index, direct, and nonce, mainly used for indexing the block key and generating the IV. The payload is the plaintext or ciphertext of the data to be processed. Each data packet triggers a key acquisition action, and the data stream can be multiple consecutive data packets, with corresponding key acquisitions also being consecutive. Furthermore, the scheduling unit in the scheme supports a preprocessing mechanism, that is, based on the request of the current data packet, the hardware circuit not only provides the key for the current packet but also pre-fetches the key for subsequent packets, effectively reducing the latency of key acquisition for continuous data streams.
[0122] Please refer to Figure 2 , Figure 2 This refers to the key grouping information of the storage array, which can be flexibly divided into N groups according to disk sectors or application scenarios. Each group is independent, and the complete key information consists of four information tables: the data key table, the tweak key table, the raw IV table, and the configuration table. The configuration table contains detailed management of each group (encryption / decryption permissions, bypass, algorithm mode configuration, host intervention protection), while the other information tables contain the initial key and IV information required for encryption. A new set of key tables (i.e., a completely new set of dkey, tkey, and riv) is also extended in parallel within the grouping scheme.
[0123] Figure 6 This is a schematic diagram of the block key of an encryption / decryption index storage array according to an embodiment of this application.
[0124] like Figure 6As shown, exemplarily, when a data packet carries {index, direct, nonce}, where direct indicates encryption or decryption, the hardware first automatically indexes to a specific packet in the storage array based on the index (e.g., ...). Figure 4 The system retrieves the algorithm configuration and current key stored within the first group. Based on the algorithm configuration, information such as the algorithm, mode, and key size is determined. Then, according to the algorithm configuration and current key, the hardware automatically starts the IV generation circuit, sampling the riv and nonce to generate the IV in real time. Finally, the {configuration, current key, generated IV} is encoded and sent along with the data packet to the downstream re-encryption engine (supporting encryption or decryption) to complete the encryption or decryption of the data stream.
[0125] Figure 7 This is a schematic diagram of a block key in a key replacement index storage array according to an embodiment of this application.
[0126] like Figure 7 As shown, exemplarily, when the packet carries {index, direct, nonce}, and its direct indicates a key change, the hardware first automatically indexes to a specific packet in the storage array based on the index (e.g., ...). Figure 5 The system retrieves the algorithm configuration, current key, and new key stored within the first group. Then, based on the algorithm configuration and the Nonce value, the hardware automatically generates an IV (current) based on the current key and an IV (new) based on the new key. Finally, the {configuration, current key, new key, IV (current), IV (new)} is encoded and sent along with the data packet to the downstream re-encryption engine (supporting decryption-encryption combination mode) to complete the key replacement of the data stream.
[0127] Figure 8 This is a schematic diagram of a unique vector logic combination method according to an embodiment of this application.
[0128] For example, considering the IV standard requirements of different modes: ECB does not require an IV; CBC and CFB require randomness in their IVs; OFB, CTR, XTS, GCM, and CCM require uniqueness in their IVs. The generation of the IV in this scheme depends on the mode. The uniqueness of the IV is satisfied by the nonce inherent in the data packet, and the randomness of the IV is satisfied by the encryption result of the nonce. For unique IVs, three logical combination methods are supported: RAW, SWAP, and XOR. Figure 8 As shown.
[0129] Figure 9 This is a schematic diagram illustrating the generation logic of a dynamic vector for encryption / decryption instructions according to an embodiment of this application. Figure 10 This is a schematic diagram illustrating the generation logic of a key replacement indicator dynamic vector according to an embodiment of this application.
[0130] Optionally, for random IVs, a CIPHER encryptor is used, employing the block configuration and key (dkey) obtained from the current index as input parameters to perform forward encryption on the packet's nonce. The output ciphertext is used as the final obtained IV value, returned to the packet, and finally sent to the re-encryption engine. Dynamic IV generation for encryption / decryption and key replacement is as follows: Figure 9 and Figure 10 As shown.
[0131] Third Embodiment
[0132] In one embodiment, the encryption device in the downstream encryption engine combines key replacement and data encryption circuitry. In addition to supporting data packet encryption and decryption, it also extends a data packet re-encryption mode, MRE (Media Re-Encrypt), to achieve dynamic hardware acceleration of key replacement.
[0133] Figure 11 This is a schematic diagram of the re-encryption engine circuit logic processing according to an embodiment of this application.
[0134] like Figure 11 As shown, exemplarily, the engine circuit supporting MRE mode, upon receiving an upstream encoded data packet (Header and Payload), automatically buffers the payload in a buffer and parses the information carried in the Header. Balancing resources and efficiency, the circuit integrates a CIPHER for encryption or decryption multiplexing, internally designed with a 2-round / cycle pipeline structure (tentatively 2 rounds / cycle, considering timing issues at high-frequency clocks, such as above 600MHz), compatible with SM4 (32 rounds), AES128 (10 rounds), AES192 (12 rounds), and AES256 (14 rounds). The circuit achieves automatic hardware decryption-encryption combination through internal data flow loop control. It also supports pure data packet encryption and decryption.
[0135] Figure 12 This is a schematic diagram illustrating the re-encryption flow of a single batch of data blocks according to an embodiment of this application. Figure 13 This is a schematic diagram of continuous batch re-encryption flow according to an embodiment of this application.
[0136] Optionally, the underlying CIPHER engine of the MRE uses an 8-level pipeline structure. When the algorithm is encryption or decryption, the data flow can be pipelined to achieve high throughput. When the algorithm is key change, the loop control logic of the circuit will process the entire data packet in batches of 8 data blocks (128 bits / block), following the process of first executing step 1 (decrypting with the current key) and then executing step 2 (encrypting with the new key). The final output will only be performed after each data block has completely executed steps 1 and 2. Figure 12 It involves re-encrypting and circulating eight data blocks in a single batch. The data blocks circulate within the CIPHER pipeline. Data block 0 has already completed step 1 (decryption) and is output from the CIPHER. It then loops back to the CIPHER input to execute step 2 (encryption). The batch size of eight is to match the eight-level pipeline structure, ensuring that the data block circulation forms a closed-loop link and fully utilizes the throughput of the pipe-CIPHER. Figure 13 It involves re-encrypting and transferring two consecutive batches of data blocks. After the data block 7 of the previous batch is input into the CIPHER to execute step 2, the data block 0 of the next batch can be input into the CIPHER to execute step 1. This ensures a seamless connection between the two batches and also guarantees the throughput of the pipe-CIPHER.
[0137] To conserve resources, this embodiment integrates only one set of bidirectional CIPHERs. Decryption and encryption can be performed separately, effectively divided into two steps, Step 1 and Step 2. This makes the throughput of the re-encryption mode half that of pure encryption or decryption. In another improved embodiment, to address performance-critical requirements, two CIPHER engines are integrated, supporting simultaneous encryption and decryption. This doubles the throughput of key replacement (re-encryption), effectively improving the processing performance of the encryption device.
[0138] In the above embodiments, by automatically indexing the block key in hardware and automatically generating associated IVs online, real-time keys can be provided for the data stream of hybrid algorithms, greatly improving the efficiency of dynamic encryption and algorithm switching of the data stream. Furthermore, by expanding the key table, new and old keys are provided to the data stream in real time, and combined with a novel re-encryption engine, path reuse and performance acceleration for data encryption and key replacement are achieved. Integrating key replacement and data encryption into the same encryption system, sharing data paths, key management, and encryption engines, significantly improves performance acceleration, resource optimization, and software efficiency.
[0139] This application also provides a storage medium storing a computer program, which, when executed by a processor, implements the steps of the data stream key generation method described above.
[0140] Optionally, in the process of implementing the specific functions of the dynamic processing method for classified data streams through hardware devices, the parameters of the hardware devices involved can be configured through computer programs stored in memory, or the actions of the hardware devices involved can be triggered to implement the steps of the data stream key generation method described above.
[0141] In the embodiments of the encryption device and storage medium provided in this application, all the technical features of any of the above embodiments may be included. The extended and explanatory content of the specification is basically the same as that of the embodiments of the above methods, and will not be repeated here.
[0142] As described above, the data stream key generation method, encryption device, and flash memory device provided in this application, in response to receiving a data packet, identify the data header and data packet in the data packet; obtain key data from the storage array according to the data header; and perform key processing on the data packet according to the key data. This allows for the real-time dynamic establishment of vector data based on the data stream, enabling dynamic algorithm switching; and improves key replacement efficiency by changing the block key, thereby increasing the key replacement frequency and reducing software and hardware resource overhead.
[0143] It is understood that the above scenarios are merely examples and do not constitute a limitation on the application scenarios of the technical solutions provided in the embodiments of this application. The technical solutions of this application can also be applied to other scenarios. For example, as those skilled in the art will know, with the evolution of system architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.
[0144] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0145] The steps in the method of this application embodiment can be adjusted, combined, or deleted according to actual needs.
[0146] The units in the device of this application embodiment can be merged, divided, and deleted according to actual needs.
[0147] In this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions are generally described in detail only when they appear for the first time. When they appear again, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions that are not described in detail later can be referred to their previous relevant detailed descriptions.
[0148] In this application, the descriptions of the various embodiments have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0149] The technical features of the present application can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.
[0150] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.
Claims
1. A method for generating a data stream key, characterized in that, include: In response to receiving a data packet, identify the data header and data packet in the data packet; Based on the data header, key data is obtained from the storage array; the key data includes algorithm configuration, pre-stored key, and initial vector value. Based on the key data, the data packet is subjected to key processing; The step of obtaining key data from the storage array based on the data header includes: Based on the index field of the data packet, the key group of the storage array is indexed, and the algorithm configuration, pre-stored key and initial vector value in the corresponding key group are obtained.
2. The data stream key generation method as described in claim 1, characterized in that, The step of identifying the data header in the data packet includes: Based on the data header, extract the index field, indicator field, and count value field of the data packet, respectively.
3. The data stream key generation method as described in claim 2, characterized in that, The step of obtaining key data from the storage array based on the data header and thereafter includes: The startup vector generation circuit samples the count value field and the initial vector value to generate vector data according to the algorithm configuration and pre-stored key.
4. The data stream key generation method as described in claim 3, characterized in that, The step of the startup vector generation circuit sampling the count value field and the initial vector value to generate vector data online according to the algorithm configuration and the pre-stored key, and subsequent steps, include: When the indication field indicates encryption or decryption, obtain the current key from the corresponding key group; The vector generation circuit generates current vector data based on the current key; The algorithm configuration, current key, and current vector data are encoded for use in encrypting or decrypting the data packet.
5. The data stream key generation method as described in claim 3, characterized in that, The step of the startup vector generation circuit sampling the count value field and the initial vector value to generate vector data online according to the algorithm configuration and the pre-stored key, and subsequent steps, include: When the indication field indicates a key change, retrieve the current key and the target key from the corresponding key group; The vector generation circuit generates current vector data based on the current key and generates target vector data based on the target key; The algorithm configuration, current key, target key, current vector data, and target vector data are encoded for decryption and encryption processing, and the key of the data packet is replaced.
6. The data stream key generation method as described in claim 3, characterized in that, The step of the startup vector generation circuit sampling the count value field and the initial vector value to generate vector data online according to the algorithm configuration and the target key includes: Based on the algorithm configuration, obtain the configuration mode of the data packet; Based on the configuration mode, determine the vector standard requirements; The vector data is generated according to the vector standard requirements.
7. The data stream key generation method as described in claim 6, characterized in that, The step of generating the vector data according to the vector standard requirements includes: When the vector standard corresponding to the configuration mode requires uniqueness, the vector data is generated by combining the initial vector value with the count value field of the data packet; or, When the vector standard requirement corresponding to the configuration mode is randomness, the count value field of the data packet is forward encrypted, and the output ciphertext is the vector data.
8. The data stream key generation method as described in claim 3, characterized in that, The step of performing key processing on the data packet based on the key data includes: The algorithm configuration, pre-stored key, vector data, and data packet are sent to a preset algorithm engine to perform key processing on the data packet.
9. The data stream key generation method as described in claim 3, characterized in that, The step of indexing the key group of the storage array according to the index field and obtaining the algorithm configuration, pre-stored key and initial vector value in the corresponding key group further includes: Based on the data packet, the key for pre-fetching subsequent data packets is predicted.
10. The data stream key generation method according to any one of claims 1-9, characterized in that, The data stream key generation method further includes at least one of the following: In the data stream, each data packet triggers a key acquisition action once; The storage array is divided into multiple groups according to disk sectors or application scenarios; Each group of the storage array includes an algorithm configuration table, a data key table, an adjustment key table, and an initialization vector table; Each group of the storage array expands a new set of key tables in parallel.
11. An encryption device, characterized in that, The encryption device includes a processor and a memory; The memory stores a computer program that, when executed by the processor, implements the steps of the data stream key generation method as described in any one of claims 1-10.
12. A storage medium, characterized in that, The storage medium stores a computer program, which, when executed by a processor, implements the steps of the data stream key generation method as described in any one of claims 1-10.
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