Boot display method and device, electronic equipment and storage medium

Abstract

Embodiments of the present application provide a boot display method and device, electronic equipment and storage medium, and relate to the technical field of computer. The method comprises: scanning each device mounted, each device comprising at least two graphic processors; recording the device information of each graphic processor through different structure pointers; initializing each graphic processor respectively according to the structure pointer of each graphic processor; and each graphic processor respectively acquires corresponding boot display data and outputs to a display. In the present application, the device information of other GPUs except the first scanned GPU can also be recorded, and other GPUs are also initialized according to the recorded device information, so that other GPUs can work normally subsequently, and then each GPU acquires boot display data and outputs to the associated display for display. In this way, the processor can realize multi-GPU display support in the boot stage of firmware running.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to a boot display method, a boot display device, an electronic device and a storage medium. BACKGROUND

[0002] The display card can be used to output display graphics, has the function of graphics processing, and is one of the most important accessories of electronic computer. The core component of the display card is the graphics processing unit (GPU).

[0003] With the improvement of the display requirements of users, the current single GPU cannot meet the multi-screen 4K output, so the multi-GPU technology emerges as the times require. However, the current part of the firmware (such as pmon) only supports single GPU, so for the central processing unit whose starting firmware is pmon or the firmware similar to pmon in GPU processing mechanism, the multi-GPU display support cannot be realized in the boot stage of the firmware running. SUMMARY

[0004] In view of the above problems, the present application is proposed to provide a boot display method to overcome the above problems or at least partially solve the above problems, so that the central processing unit realizes the multi-GPU display support in the boot stage of the firmware running.

[0005] Correspondingly, the present application also provides a boot display device, an electronic device and a storage medium to ensure the implementation and application of the above method.

[0006] In order to solve the above problems, the present application discloses a boot display method, comprising:

[0007] Scanning each device mounted, wherein the devices include at least two graphics processing units;

[0008] Recording the device information of each graphics processing unit through different structure body pointers respectively;

[0009] Initializing each graphics processing unit according to the corresponding structure body pointer of each graphics processing unit respectively;

[0010] Obtaining the corresponding boot display data by each graphics processing unit respectively, and outputting the boot display data to the associated display for display.

[0011] Optionally, the step of initializing each graphics processing unit according to the corresponding structure body pointer of each graphics processing unit respectively, comprises:

[0012] According to a graphic processor scanning order, the structure body pointer corresponding to each graphic processor is taken as a calling parameter, and is sequentially transmitted to a graphic processor initialization interface function, so as to initialize each graphic processor through the graphic processor initialization interface function.

[0013] Optionally, the step of initializing each graphic processor through the graphic processor initialization interface function comprises:

[0014] The first graphic processor is initialized through the graphic processor initialization interface function, wherein the first graphic processor is the first scanned graphic processor in the at least two graphic processors.

[0015] It is judged through the graphic processor initialization interface function whether the second structure body pointer corresponding to the second graphic processor is empty, wherein the second graphic processor is any one of the remaining graphic processors in the at least two graphic processors except the first scanned graphic processor.

[0016] When the second structure body pointer is not empty, it is determined that the second graphic processor exists, and the existing second graphic processor is initialized through the graphic processor initialization interface function.

[0017] Optionally, the frame buffer addresses corresponding to each graphic processor are different; and the step of acquiring the boot display data corresponding to each graphic processor respectively and outputting the boot display data to the associated display for display comprises:

[0018] Each graphic processor reads the corresponding boot display data according to the frame buffer address corresponding to the graphic processor.

[0019] Each graphic processor outputs the obtained boot display data to the display associated with the graphic processor for display.

[0020] Optionally, before the step of acquiring the boot display data corresponding to each graphic processor respectively and outputting the boot display data to the associated display for display, the method further comprises:

[0021] The display-related underlying function is modified to operate the frame buffer address corresponding to the second graphic processor, wherein the second graphic processor is any one of the remaining graphic processors in the at least two graphic processors except the first scanned graphic processor.

[0022] Optionally, each of the graphic processors corresponds to the same frame buffer address; and the step of acquiring, by each of the graphic processors, corresponding boot display data and outputting the boot display data to an associated display for display, comprises:

[0023] Each of the graphic processors reads the boot display data according to the frame buffer address.

[0024] Each of the graphic processors outputs the acquired boot display data to the display associated with the graphic processor for display.

[0025] Optionally, the device information includes display controller information corresponding to the graphic processor and resources allocated to the graphic processor.

[0026] The embodiment of the application further discloses a boot display device, comprising:

[0027] The scanning module is configured to scan each of the devices, wherein the devices include at least two graphic processors.

[0028] The recording module is configured to record device information of each of the graphic processors through different structure body pointers respectively.

[0029] The initialization module is configured to initialize each of the graphic processors according to the structure body pointer corresponding to each of the graphic processors respectively.

[0030] The display module is configured to acquire, by each of the graphic processors, corresponding boot display data and output the boot display data to an associated display for display.

[0031] The embodiment of the application further discloses an electronic device, comprising a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors, and the one or more programs comprise instructions for performing the following operations:

[0032] The scanning module is configured to scan each of the devices, wherein the devices include at least two graphic processors.

[0033] The recording module is configured to record device information of each of the graphic processors through different structure body pointers respectively.

[0034] The initialization module is configured to initialize each of the graphic processors according to the structure body pointer corresponding to each of the graphic processors respectively.

[0035] The display module is configured to acquire, by each of the graphic processors, corresponding boot display data and output the boot display data to an associated display for display.

[0036] The application further discloses a readable storage medium, which enables an electronic device to execute the boot display method according to one or more of the embodiments of the application when instructions in the storage medium are executed by a processor of the electronic device.

[0037] The embodiments of the application have the following advantages:

[0038] In the embodiments of the application, first, the central processor can scan each device mounted, wherein each device includes at least two graphic processors. Then, the central processor can record device information of each graphic processor through different structure pointers, that is, device information of other graphic processors except for the first scanned graphic processor can also be recorded. After that, the central processor can initialize each graphic processor according to the corresponding structure pointer of each graphic processor, that is, the central processor can also initialize other graphic processors according to the device information of other graphic processors except for the first scanned graphic processor, so that other graphic processors can also work normally subsequently. Since each graphic processor can be initialized, each graphic processor can obtain corresponding boot display data and output the boot display data to a display associated with the graphic processor for display, so that the central processor can realize display support of multiple graphic processors in the boot stage of firmware running. BRIEF DESCRIPTION OF DRAWINGS

[0039] Figure 1 is a step flow chart of a boot display method embodiment of the application;

[0040] Figure 2 is a step flow chart of another boot display method embodiment of the application;

[0041] Figure 3 is a schematic diagram of reading boot display data by each graphic processor according to different frame buffer addresses according to an example provided by the application;

[0042] Figure 4 is a schematic diagram of reading boot display data by each graphic processor according to the same frame buffer address according to another example provided by the application;

[0043] Figure 5 is a structural block diagram of a boot display device embodiment of the application;

[0044] Figure 6 is a structural block diagram of an electronic device for boot display according to an example embodiment. DETAILED DESCRIPTION

[0045] In order to make the above objectives, features and advantages of the present application more apparent, further specific embodiments of the present application will be described in detail with reference to the drawings and specific embodiments.

[0046] Before the embodiments of the present application are described in detail, the current boot display process will be introduced first, and the following will take the processor with firmware pmon as an example for description.

[0047] After the electronic device is powered on, the central processor of the electronic device can complete the initialization of various devices in the electronic device by executing the pmon firmware. First, the firmware pmon performs scanning on each device mounted on the bus, such as a graphics card, a network port, a serial port, and / or a universal serial bus (USB), etc. Among them, no matter for a multi-GPU graphics card including at least two graphics processing units (hereinafter referred to as GPU), or for a plurality of single-GPU graphics cards, each GPU in the graphics card can be regarded as a device during the scanning. No matter how many GPUs the central processor has accessed, the central processor can scan in this scanning stage. After the scanning is completed, the central processor can initialize the GPU. However, the pmon firmware can only support a single GPU, that is, even if the central processor scans more than two GPUs, the pmon firmware can only initialize the first scanned GPU. Further, since only the first GPU can complete the initialization, and other GPUs cannot complete the initialization, only the first GPU can work normally, and other GPUs cannot work normally, so that, in the case that each GPU is associated with a display, only the display associated with the first GPU can normally perform boot display, that is, display some debugging information, boot screen, etc. before entering the operating system, and the displays associated with other GPUs cannot realize boot display.

[0048] One of the core ideas of the embodiment of the present application is that after the central processor completes the scanning of the accessed devices (each device includes at least two GPUs), the device information of each GPU can be recorded through different structure pointers, that is, the device information recording mechanism of the other GPUs except the first scanned GPU is added, so that the device information of the other GPUs can also be recorded. Then, the central processor can initialize each GPU in turn according to the structure pointer corresponding to each GPU according to the GPU scanning order, that is, the central processor can initialize the other GPUs according to the device information of the other GPUs, so that the other GPUs can also work normally subsequently. After that, since each GPU accessed to the central processor can be initialized, each GPU can obtain the corresponding boot display data and output the boot display data to the display associated with the GPU for display, so that the central processor can realize the display support of multiple GPUs in the boot stage of the firmware running.

[0049] It should be noted that the boot display method provided by the embodiment of the present application can be applied to an electronic device using a pmon firmware of a central processor, or an electronic device using a firmware similar to the pmon of a GPU processing mechanism (that is, having the same or similar problems as the above-mentioned pmon firmware). The architecture of the central processor is a Reduced Instruction Set Computer (RISC) architecture. The electronic device can include at least two displays, wherein one GPU is associated with at least one display.

[0050] Referring to Figure 1 , a step flowchart of an embodiment of a boot display method of the present application is shown, which can specifically include the following steps:

[0051] Step 101, scanning each device mounted, wherein the devices include at least two GPUs.

[0052] In the embodiment of the present application, after the electronic device is powered on, the firmware starts running. During the running of the firmware, each device mounted on the Peripheral Component Interconnect Express (PCIE) bus and / or the Peripheral Component Interconnect (PCI) bus, such as a GPU in a graphics card, a network port, a serial port, and / or a USB, etc., can be scanned, and the scanned devices can be allocated with resources. In actual application, if the central processor board card is a PCIE interface, and the device is mounted on the PCIE interface, the scanning performed by the firmware is PCIE scanning; if the central processor board card is a PCI interface, and the device is mounted on the PCI interface, the scanning performed by the firmware is PCI scanning. The PCI scanning or the PCIE scanning is to load the corresponding driver of the device, and each software in the electronic device is to control each device through the driver.

[0053] In specific application, the GPU can correspond to the graphics card one by one, that is, at least two single-GPU graphics cards (that is, one graphics card includes one GPU) can be mounted on the bus. Of course, the number of GPUs can be greater than the number of graphics cards, that is, at least one multi-GPU graphics card can be mounted on the bus, and the embodiment of the present application does not make specific limitation thereto.

[0054] In step 102, the device information of each graphics processor is recorded through different structure body pointers respectively.

[0055] In the embodiment of the present application, a structure body can be defined in the code in advance to provide a saving format of the GPU device information. A structure body pointer can also be defined in the code in advance to provide an embodiment form of the storage address of the GPU device information.

[0056] After the scanning is completed, the firmware can record the device information of each scanned GPU through different structure body pointers respectively, that is, the device information of each GPU can be saved in accordance with the defined format of the structure body. The device information of one GPU saved in accordance with the defined format of the structure body is one structure body data, and the structure body pointer points to the structure body data. In this way, the device information of each GPU can correspond to one structure body pointer. The structure body pointer can be assigned with a variable, and in the embodiment of the present application, the assigned value is the specific storage address of the GPU device information. In actual application, the corresponding structure body data can be obtained from the memory according to the value of one structure body pointer, that is, one GPU device information can be obtained.

[0057] In step 103, each graphics processor is initialized respectively according to the corresponding structure body pointer of each graphics processor.

[0058] In the embodiment of the present application, the firmware can first obtain the device information of the first scanned GPU according to the structure pointer corresponding to the first scanned GPU in the scan order of the GPUs, and then initialize the first scanned GPU by using the device information, and then obtain the device information of the second scanned GPU according to the structure pointer corresponding to the second scanned GPU, and then initialize the second scanned GPU by using the device information, and so on, until all the GPUs are initialized. After successful initialization, the GPUs can perform subsequent normal work.

[0059] The scan order of the GPUs can be predefined according to requirements, and in actual application, the GPUs can be scanned according to the predefined scan order.

[0060] In step 104, each GPU obtains corresponding boot display data and outputs the boot display data to an associated display for display.

[0061] In the embodiment of the present application, since each GPU can be successfully initialized, each GPU can put the processed data to be displayed into a frame buffer, and then a display controller outputs the data in the frame buffer to an associated display for display. In actual application, one GPU can be associated with at least one display, and the display data output by each GPU can be displayed by the associated display.

[0062] In the embodiment of the present application, first, the central processor can scan each device mounted, wherein the devices include at least two GPUs. Then, the central processor can record the device information of each GPU through different structure pointers, that is, the device information of the GPUs other than the first scanned GPU can also be recorded. Then, the central processor can initialize each GPU according to the structure pointer corresponding to each GPU, that is, the central processor can initialize the GPUs other than the first scanned GPU according to the device information of the GPUs, so that the GPUs can also perform normal work subsequently. Since each GPU can be initialized, each GPU can obtain corresponding boot display data and output the boot display data to a display associated with the GPU for display, so that the central processor can realize display support of multiple GPUs in the boot stage of the firmware.

[0063] With reference to Figure 2FIG. 3 shows a flow chart of steps of another embodiment of the method for displaying boot-up information, which can include the following steps:

[0064] In step 201, each device mounted is scanned, wherein the devices include at least two graphic processors.

[0065] The specific implementation of this step can refer to step 101 described above, and will not be repeated here.

[0066] In step 202, device information of each graphic processor is recorded through different structure pointers respectively.

[0067] In the embodiment of the application, a storage space for storing device information of each GPU can be allocated in the firmware in advance, and a structure pointer corresponding to each storage space is added, which is used to record device information of each scanned GPU in the corresponding storage space. For example, there is a first structure pointer in the firmware, and device information of a first scanned GPU is recorded in a storage space corresponding to the first structure pointer. In the case that the central processor needs to mount another GPU, i.e., in the case of dual-GPU, a second structure pointer can be added in the firmware in advance, and device information of a second scanned GPU is recorded in a storage space corresponding to the second structure pointer. Similarly, assuming that the central processor needs to mount N GPUs, (N-1) structure pointers can be added in the firmware in advance in the case that there is already one structure pointer in the firmware. One structure pointer can be used to point to one structure data, which is device information of a GPU corresponding to the structure pointer.

[0068] Optionally, in actual application, the structure pointer can be a device structure pointer, such as a pcie_dev structure pointer, i.e., when device information of a certain GPU is stored in a storage space corresponding to the structure pointer, the device information needs to be stored according to a format of a device structure defined in advance.

[0069] Optionally, the device information includes display controller information corresponding to the graphic processor and resources allocated for the graphic processor. The display controller (DC) information can specifically include PCI type, bus number, device number, and / or function number of the graphic processor, etc. The resources allocated for the graphic processor can include frame buffer storage space, etc.

[0070] Since the recorded device information includes resources allocated for the GPU, a step of allocating corresponding resources for each GPU needs to be performed before recording device information of each GPU.

[0071] In step 203, the structure body pointer corresponding to each of the graphic processors is respectively taken as a calling parameter according to the graphic processor scanning sequence, and is sequentially passed to the graphic processor initialization interface function, so as to initialize each of the graphic processors through the graphic processor initialization interface function.

[0072] In the embodiment of the application, a formal parameter for passing the scanned structure body pointer corresponding to the second and subsequent GPUs can be added in the firmware in advance, and the formal parameter can be taken as a calling parameter of the GPU initialization interface function, and is used to call the GPU initialization interface function.

[0073] Correspondingly, the firmware can first take the formal parameter for indicating the structure body pointer of the first GPU as a calling parameter, call and run the GPU initialization interface function, and initialize the first GPU through the GPU initialization interface function according to the GPU scanning sequence. Then, the formal parameter for indicating the structure body pointer of the second GPU is taken as a calling parameter again, the GPU initialization interface function is called and run again, and the second GPU is initialized through the GPU initialization interface function. In this way, all the GPUs are initialized until the scanning is completed.

[0074] In actual application, the GPU initialization interface function can be configured in the vga_bios_init module interface, and the embodiment of the application does not make a specific limitation.

[0075] Optionally, the step of initializing each of the graphic processors through the graphic processor initialization interface function can specifically include:

[0076] The first graphic processor is initialized through the graphic processor initialization interface function, wherein the first graphic processor is the first scanned graphic processor in the at least two graphic processors;

[0077] It is judged through the graphic processor initialization interface function whether the second structure body pointer corresponding to the second graphic processor is empty, wherein the second graphic processor is any one of the remaining graphic processors in the at least two graphic processors except the first scanned graphic processor;

[0078] When the second structure body pointer is not empty, it is determined that the second graphic processor exists, and the existing second graphic processor is initialized through the graphic processor initialization interface function.

[0079] In specific application, the firmware can identify whether it is a multi-GPU by judging whether the structure body pointer is empty, so as to determine whether the GPUs other than the first GPU need to be initialized.

[0080] Specifically, the GPU initialization interface function can judge whether the structure pointer passed through the formal parameter is empty. If only one GPU is mounted, the first structure pointer is not empty, indicating that the first GPU exists, and the second structure pointer is empty, indicating that the second GPU does not exist. If two GPUs are mounted, the first structure pointer is not empty, indicating that the first GPU exists, and the second structure pointer is also not empty, indicating that the second GPU also exists.

[0081] To ensure that boot display can be realized, the first GPU must exist. Therefore, for the first GPU, it can be determined whether the first structure pointer is empty. By default, the first structure pointer is not empty, and the first GPU can be directly initialized. For other GPUs except the first GPU, it is necessary to judge whether the structure pointer is empty. The GPU with the non-empty structure pointer is initialized.

[0082] Of course, in actual application, for the first GPU, the first structure pointer can also be judged to be empty, and the processing mode of the second GPU and the third GPU is the same, that is, the structure pointer of each GPU can be judged to be empty. The present embodiment does not limit whether the first scanned GPU is judged to be empty.

[0083] In step 204, each of the GPUs obtains corresponding boot display data, and outputs the boot display data to the associated display for display.

[0084] In the embodiment of the present application, the GPU successfully completing the initialization can obtain corresponding boot display data, and output the boot display data to the associated display for display. Each GPU can put the processed boot display data into a frame buffer, and then a DC module (that is, a display controller) in the GPU can read the data indicated by the frame buffer address. In the boot stage, the data stored in the frame buffer address is the boot display data, including some debugging information, boot screen, etc. The DC module can output the data stored in the frame buffer address to the display associated with the GPU, thereby realizing display.

[0085] In an optional implementation, the frame buffer address corresponding to each GPU can be different, and accordingly, the present step can be realized by the following manner, including: each GPU respectively reads corresponding boot display data according to the corresponding frame buffer address; each GPU respectively outputs the obtained boot display data to the associated display for display.

[0086] In the above implementation, the corresponding frame buffer address of the second and subsequent GPUs can be increased in advance, and different frame buffer addresses correspond to different boot display data of different GPUs. In this way, each GPU can read the corresponding boot display data according to the corresponding frame buffer address. For example, referring to Figure 3 the first GPU corresponds to the first frame buffer address such as framebuffer0, the second GPU corresponds to the second frame buffer address such as framebuffer1, and the first DC of the first GPU such as DC0 can read the first boot display data indicated by the first frame buffer address and output the obtained first boot display data to the associated first display such as display0 for display. The second DC of the second GPU such as DC1 can read the second boot display data indicated by the second frame buffer address and output the obtained second boot display data to the associated second display such as display1 for display. The first boot display data and the second boot display data can be the same or different, and the embodiments of the present application do not make specific limitations thereon.

[0087] For the above implementation, the following steps can also be performed before booting:

[0088] The display-related underlying function is modified to operate the frame buffer address corresponding to the second graphics processor, wherein the second graphics processor is any one of the remaining graphics processors in the at least two graphics processors except for the first scanned graphics processor.

[0089] For the above implementation, the display-related underlying function also needs to be modified to operate multiple frame buffer addresses in advance, for example, the clear screen function video_cls for the second frame buffer address such as framebuffer1, the scroll screen function console_scrollup for the second frame buffer address such as framebuffer1, and the cursor function console_cursor for the second frame buffer address such as framebuffer1. Because the original underlying function is for the first frame buffer address such as framebuffer0, if the display-related underlying function is not modified, the operation on the frame buffer address corresponding to the second GPU cannot be realized.

[0090] Specifically, the code of the above various related underlying functions can be written in the operation code corresponding to the second frame buffer address, so that when these underlying functions are called, the object of action is the second frame buffer address.

[0091] In another optional implementation, the frame buffer address corresponding to each graphics processor can be the same, and accordingly, step 204 can also be implemented by the following manner, including: each graphics processor reads the boot display data according to the frame buffer address; and each graphics processor outputs the obtained boot display data to the associated display for display.

[0092] In the above implementation, for the case that the boot display data of all GPUs are the same, the frame buffer address corresponding to each GPU can be the same, that is, the boot display data corresponding to different GPUs can be indicated by one frame buffer address, so that all the DC modules of the GPUs are modified to read data from the frame buffer address, that is, each GPU can read the corresponding boot display data according to the frame buffer address. For example, referring to Figure 4 , the first GPU and the second GPU both correspond to the second frame buffer address such as framebuffer1, the first DC such as DC0 of the first GPU can read the boot display data indicated by the second frame buffer address and output the obtained boot display data to the associated first display such as display0 for display, and the second DC such as DC1 of the second GPU can also read the boot display data indicated by the second frame buffer address and output the obtained boot display data to the associated second display such as display1 for display.

[0093] In actual application, if the boot display data of all GPUs are the same, either of the above two implementation manners can be used to realize the boot display of the multi-GPU. If the boot display data of all GPUs are not completely the same, the first implementation manner can be used to realize the boot display of the multi-GPU.

[0094] The central processor can be connected with a bridge for expanding interfaces, and the graphics card can be a dual-GPU graphics card which can be plugged on the PCIE bus interface of the bridge. It can be understood that the above example is only an optional example, and the embodiments of the present application are not limited to the processor model, whether the processor is connected with the bridge, the GPU model, etc.

[0095] In the embodiment of the present application, first, the central processor can scan each device mounted, wherein the devices include at least two graphic processors. Then, the central processor can record the device information of each graphic processor through different structure pointers respectively, that is, the device information of the graphic processors other than the first scanned graphic processor can also be recorded. After that, the central processor can initialize each graphic processor according to the structure pointer corresponding to each graphic processor, that is, the central processor can also initialize the other graphic processors according to the device information of the other graphic processors, so that the other graphic processors can also work normally subsequently. Since each graphic processor can be initialized, each graphic processor can obtain corresponding boot display data and output the boot display data to the display associated with the graphic processor for display, so that the central processor can realize display support of multiple graphic processors in the boot stage of firmware running.

[0096] It should be noted that, for the method embodiments, in order to simply describe, they are all described as a series of action combinations, but those skilled in the art should know that the embodiments of the present application are not limited to the order of the actions described, because according to the embodiments of the present application, some steps can be performed in other order or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the actions involved are not necessarily necessary for the embodiments of the present application.

[0097] Referring to Figure 5 , a structural block diagram of an embodiment of a boot display device of the present application is shown, and the device 300 can specifically include the following modules:

[0098] The scanning module 301 is configured to scan each device mounted, wherein the devices include at least two graphic processors.

[0099] The recording module 302 is configured to record the device information of each graphic processor through different structure pointers respectively.

[0100] The initialization module 303 is configured to initialize each graphic processor according to the structure pointer corresponding to each graphic processor respectively.

[0101] The display module 304 is configured to obtain corresponding boot display data by each graphic processor respectively, and output the boot display data to the associated display for display.

[0102] Optionally, the initialization module 303 includes:

[0103] The initialization submodule is configured to sequentially pass the structure body pointer corresponding to each of the graphic processors as a calling parameter to a graphic processor initialization interface function in a graphic processor scanning order, so as to initialize each of the graphic processors through the graphic processor initialization interface function.

[0104] Optionally, the initialization submodule is specifically configured to initialize a first graphic processor through the graphic processor initialization interface function, where the first graphic processor is a first scanned graphic processor in the at least two graphic processors.

[0105] The graphic processor initialization interface function is configured to determine whether a second structure body pointer corresponding to a second graphic processor is empty, where the second graphic processor is any one of the remaining graphic processors in the at least two graphic processors except the first scanned graphic processor.

[0106] When the second structure body pointer is not empty, it is determined that the second graphic processor exists, and the graphic processor initialization interface function is configured to initialize the existing second graphic processor.

[0107] Optionally, the frame buffer addresses corresponding to the graphic processors are different, and the display module 304 includes:

[0108] The first reading submodule is configured to read the boot display data corresponding to each of the graphic processors according to the frame buffer address corresponding to the graphic processor.

[0109] The first display module is configured to output the obtained boot display data to a display associated with the graphic processor for display.

[0110] Optionally, the apparatus further includes a modification module configured to modify a display-related bottom function to operate the frame buffer address corresponding to the second graphic processor, where the second graphic processor is any one of the remaining graphic processors in the at least two graphic processors except the first scanned graphic processor.

[0111] Optionally, the frame buffer addresses corresponding to the graphic processors are the same, and the display module 304 includes:

[0112] The second reading submodule is configured to read the boot display data according to the frame buffer address through each of the graphic processors.

[0113] The second display module is configured to output the obtained boot display data to a display associated with the graphic processor for display.

[0114] Optionally, the structure pointer is a device structure pointer.

[0115] Optionally, the device information includes display controller information corresponding to the graphic processor and resource allocated to the graphic processor.

[0116] In the embodiment of the present application, first, the central processor can scan each device mounted, wherein each device includes at least two graphic processors. Then, the central processor can record device information of each graphic processor through different structure pointers respectively, that is, device information of other graphic processors except the first scanned graphic processor can also be recorded. After that, the central processor can initialize each graphic processor according to the structure pointer corresponding to each graphic processor respectively, that is, the central processor can also initialize other graphic processors according to device information of other graphic processors except the first scanned graphic processor, so that other graphic processors can also work normally subsequently. Since each graphic processor can be initialized, each graphic processor can obtain corresponding boot display data respectively and output the boot display data to the display associated with the graphic processor for display, so that the central processor can realize display support of multiple graphic processors in the boot stage of firmware running.

[0117] For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the related parts refer to the part of the method embodiment.

[0118] Figure 6 is a structural block diagram of an electronic device 400 for boot display according to an exemplary embodiment. For example, the electronic device 400 can be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0119] Referring to Figure 6 , the electronic device 400 can include one or more of the following components: a processing component 402, a memory 404, a power supply component 406, a multimedia component 408, an audio component 410, an input / output (I / O) interface 412, a sensor component 414, and a communication component 416.

[0120] The processing component 402 generally controls the overall operations of the electronic device 400, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 402 can include one or more processors 420 to execute instructions and manipulate data to perform all or a subset of the steps described in the above methods. Furthermore, the processing component 402 can include one or more modules to facilitate interaction between the processing component 402 and other components. For example, the processing component 402 can include a multimedia module to facilitate the interaction between the multimedia component 408 and the processing component 402.

[0121] The memory 404 is configured to store various types of data to support operations of the electronic device 400. Examples of these data include instructions to perform any of the applications or methods on the electronic device 400, contact data, phonebook data, messages, pictures, videos, and so on. The memory 404 can be implemented by any type of volatile or non-volatile storage devices or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read only memory (EEPROM), erasable programmable read only memory (EPROM), programmable read only memory (PROM), read only memory (ROM), magnetic memory, flash memory, magnetic disks, or optical disks.

[0122] The power component 406 provides power to the various components of the electronic device 400. The power component 406 can include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 400.

[0123] The multimedia component 408 includes a screen to provide an output interface between the electronic device 400 and a user. In some embodiments, the screen can include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes the touch panel, the screen can be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense a touch, a slide, and a gesture on the touch panel. The touch sensors can not only sense a boundary of a touching or sliding action, but also detect duration and pressure related to the touching or sliding action. In some embodiments, the multimedia component 408 includes a front camera and / or a rear camera. The front and / or rear camera can receive external multimedia data when the electronic device 400 is in an operation mode, such as a shooting mode or a video mode. Each of the front and rear camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0124] The audio component 410 is configured to output and / or input audio signals. For example, the audio component 410 includes a microphone (MIC) that is configured to receive an external audio signal when the electronic device 400 is in an operation mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 404 or transmitted via the communication component 416. In some embodiments, the audio component 410 also includes a speaker for outputting audio signals.

[0125] The I / O interface 412 provides an interface between the processing component 402 and peripheral interface modules, which can be a keypad, a click wheel, buttons, and the like. The buttons can include, but are not limited to, a home button, a volume button, a start button, and a lock button.

[0126] The sensor component 414 includes one or more sensors for providing status assessments of various aspects of the electronic device 400. For example, the sensor component 414 can detect an open / closed position of the device 400, relative positioning of components, such as a display and a keypad of the electronic device 400, a change of position of the electronic device 400 or a component of the electronic device 400, presence or absence of user contact with the electronic device 400, orientation or acceleration / deceleration of the electronic device 400, and a temperature change of the electronic device 400. The sensor component 414 can include a proximity sensor configured to detect presence of a nearby object without any physical touch. The sensor component 414 can also include a light sensor, such as a CMOS or CCD image sensor, for use in an imaging application. In some embodiments, the sensor component 414 can further include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0127] The communication component 416 is configured to facilitate wired or wireless communication between the electronic device 400 and other devices. The electronic device 400 can access a wireless network based on a corresponding communication standard, such as WiFi, 2G, or 3G, or a combination thereof. In an example embodiment, the communication component 416 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In an example embodiment, the communication component 416 further includes a Near Field Communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technology.

[0128] In an exemplary embodiment, the electronic device 400 can be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, micro-controllers, microprocessors, or other electronic elements for performing the above-described methods.

[0129] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions, such as the memory 404 including instructions, is also provided, which can be executed by the processor 420 of the electronic device 400 to complete the above-described methods. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0130] A readable storage medium, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to perform a method of displaying at booting, the method comprising:

[0131] Scanning each device mounted, wherein the devices include at least two graphic processors;

[0132] Recording device information of each graphic processor through different structure body pointers, respectively;

[0133] Initializing each graphic processor according to a corresponding structure body pointer of each graphic processor, respectively;

[0134] Each graphic processor acquires corresponding booting display data, respectively, and outputs the booting display data to an associated display for display.

[0135] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same or similar parts between each embodiment can be referred to each other.

[0136] Those skilled in the art should understand that the embodiments of the present embodiments can be provided as a method, device, or computer program product. Therefore, the embodiments of the present embodiments can be in the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present embodiments can be in the form of a computer program product implemented on one or more computer usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

[0137] The embodiments of the present application are described with reference to the flowchart illustrations and / or block diagrams of the methods, terminal devices (systems) and computer program products according to the embodiments of the present application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal devices to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal devices, create means for implementing the functions specified in the flowchart illustrations and / or block diagrams. Figure 1 one or more of the flowcharts and / or block diagrams. Figure 1 means for functionally implementing one or more of the flowcharts and / or block diagrams.

[0138] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal devices to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the flowcharts and / or block diagrams. Figure 1 one or more of the flowcharts and / or block diagrams. Figure 1 means for functionally implementing one or more of the flowcharts and / or block diagrams.

[0139] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal devices to cause a series of operational steps to be performed on the computer or other programmable terminal devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal devices provide steps for implementing the flowcharts and / or block diagrams. Figure 1 one or more of the flowcharts and / or block diagrams. Figure 1 means for functionally implementing one or more of the flowcharts and / or block diagrams.

[0140] While the preferred embodiments of the application have been described, additional variations and modifications can be made to the embodiments by those of skill in the art once they have the benefit of the present disclosure. Therefore, the appended claims are intended to cover all such variations and modifications as falling within the scope of the embodiments of the present application.

[0141] Finally, it is to be understood that the phraseology or terminology such as "first" and "second" etc. used herein is merely intended to differentiate one entity or operation from another entity or operation, without necessarily requiring or implying any actual such relationship or order between such entities or operations. Moreover, the terms "comprising", "including", or any other variation thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can also include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element preceded by "comprises a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the recited element.

[0142] The above provides a detailed description of the boot display method and device, the electronic device and the storage medium provided by the present application. The principles and implementation manners of the present application are described by using specific examples. The above description of the embodiments is only used to help understand the method of the present application and its core idea. Meanwhile, for those skilled in the art, the specific implementation manners and application ranges can be changed according to the idea of the present application. In summary, the content of the specification should not be understood as a limitation of the present application.

Claims

1. A power-on display method, characterized in that, include: Scan each mounted device, wherein each device includes at least two graphics processors; Each graphics processor's device information is recorded using different structure pointers; Each graphics processor is initialized according to the structure pointer corresponding to each graphics processor; Each of the graphics processors acquires its own boot display data and outputs the boot display data to the associated display for display.

2. The method according to claim 1, characterized in that, The step of initializing each graphics processor according to the structure pointer corresponding to each graphics processor includes: According to the scanning order of the graphics processors, the structure pointers corresponding to each graphics processor are passed as calling parameters to the graphics processor initialization interface function in sequence, so as to initialize each graphics processor separately through the graphics processor initialization interface function.

3. The method according to claim 2, characterized in that, The step of initializing each graphics processor separately through the graphics processor initialization interface function includes: The first graphics processor is initialized through the graphics processor initialization interface function, wherein the first graphics processor is the first graphics processor scanned among the at least two graphics processors; The graphics processor initialization interface function determines whether the pointer to the second structure corresponding to the second graphics processor is empty, wherein the second graphics processor is any one of the graphics processors other than the first scanned graphics processor among the at least two graphics processors; When the pointer to the second structure is not null, it is determined that the second graphics processor exists, and the existing second graphics processor is initialized through the graphics processor initialization interface function.

4. The method according to claim 1, characterized in that, Each graphics processor has a different frame buffer address; the step of obtaining the corresponding boot display data for each graphics processor and outputting the boot display data to the associated display for display includes: Each of the graphics processors reads the corresponding boot display data according to its own frame buffer address; Each of the graphics processors outputs the obtained boot display data to its associated display for display.

5. The method according to claim 4, characterized in that, Before acquiring the corresponding boot display data through each of the graphics processors and outputting the boot display data to the associated display, the method further includes: Modify the underlying display-related functions to operate on the frame buffer address corresponding to the second graphics processor, wherein the second graphics processor is any one of the at least two graphics processors other than the first scanned graphics processor.

6. The method according to any one of claims 1-5, characterized in that, Each of the graphics processors has the same frame buffer address; the step of obtaining the corresponding boot display data for each graphics processor and outputting the boot display data to the associated display for display includes: Each of the graphics processors reads the boot display data according to the frame buffer address; Each of the graphics processors outputs the obtained boot display data to its associated display for display.

7. The method according to any one of claims 1-5, characterized in that, The device information includes the display controller information corresponding to the graphics processor and the resources allocated to the graphics processor.

8. A power-on display device, characterized in that, include: A scanning module is used to scan each mounted device, wherein each device includes at least two graphics processors; The recording module is used to record the device information of each graphics processor through different structure pointers; An initialization module is used to initialize each graphics processor according to the structure pointer corresponding to each graphics processor; The display module is used to acquire the corresponding boot display data through each of the graphics processors and output the boot display data to the associated display for display.

9. An electronic device, characterized in that, It includes memory and one or more programs, wherein one or more programs are stored in memory and configured to be executed by one or more processors. The one or more programs contain instructions for performing the following operations: Scan each mounted device, wherein each device includes at least two graphics processors; Each graphics processor's device information is recorded using different structure pointers; Each graphics processor is initialized according to the structure pointer corresponding to each graphics processor; Each of the graphics processors acquires its own boot display data and outputs the boot display data to the associated display for display.

10. A readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform one or more of the power-on display methods as described in claims 1-7.

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