Pixel circuit, display substrate and pixel driving method
By designing a pixel circuit that includes sensing and data writing circuits, and using data lines for sensing and compensation during the blanking period, the problem of uneven light emission caused by the drift of driving transistors in AMOLED panels is solved, simplifying the pixel driving circuit structure and achieving high PPI OLED displays.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2023-03-30
- Publication Date
- 2026-07-07
AI Technical Summary
The threshold voltage and mobility of the driving transistors in AMOLED panels drift after long-term operation, resulting in uneven OLED light emission. Existing compensation methods are complex or affect the driving current, and external compensation requires the addition of sensing lines.
Design a pixel circuit that includes a sensing circuit, a data writing circuit, an energy storage circuit, and a driving transistor. Sensing and compensation are performed during the blanking period via a data line, and read and write functions are performed simultaneously using the data line. This simplifies the pixel driving circuit structure and externally compensates for the threshold voltage and mobility drift of the driving transistor.
It effectively improves the uneven brightness of OLEDs, simplifies the pixel driving circuit structure, and enables OLED display products with narrow bezels and high PPI.
Smart Images
Figure CN116312378B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology. More specifically, it relates to a pixel circuit, a display substrate, and a pixel driving method. Background Technology
[0002] Currently, AMOLED (Active-Matrix Organic Light Emitting Diode) panels are being used more and more widely. AMOLED panels emit light by providing driving current to the driving transistors in the pixel circuitry, which in turn drives the OLED light-emitting device to emit light. To ensure the uniformity of OLED light emission, the characteristics of the driving transistors must be consistent. However, for example, the driving transistors of TFT (Thin Film Transistor) exhibit characteristic drift during operation, especially after prolonged use, including threshold voltage drift and mobility drift, resulting in poor OLED light emission uniformity. Summary of the Invention
[0003] The purpose of this disclosure is to provide a pixel circuit, a display substrate, and a pixel driving method to solve at least one of the problems existing in the prior art.
[0004] To achieve the above objectives, the present disclosure adopts the following technical solution:
[0005] The first aspect of this disclosure provides a pixel circuit, including a sensing circuit, a data writing circuit, a first energy storage circuit, a driving transistor, and a light-emitting device;
[0006] The first terminal of the sensing circuit, the control electrode of the driving transistor, the first terminal of the first energy storage circuit, and the first terminal of the data writing circuit are coupled to the first node.
[0007] The first terminal of the driving transistor, the second terminal of the first energy storage circuit, and the first power supply terminal are coupled to the second node;
[0008] The control terminal of the data writing circuit is coupled to the first scan line, and the second terminal of the data writing circuit and the second terminal of the sensing circuit are respectively coupled to the data line;
[0009] The control terminal of the sensing circuit is coupled to the second scan line;
[0010] The third terminal of the sensing circuit, the second terminal of the driving transistor, and the first terminal of the light-emitting device are coupled to the third node;
[0011] The fourth terminal of the sensing circuit is coupled to the second power supply terminal, and the second electrode of the light-emitting device is coupled to the third power supply terminal.
[0012] Optionally, the sensing circuit includes a first transistor and a second transistor;
[0013] The first terminal of the first transistor is coupled to the first node;
[0014] The control electrode of the first transistor is coupled to the second scan line;
[0015] The second terminal of the first transistor is coupled to the first terminal of the second transistor at a fourth node, and the fourth node is coupled to the data line;
[0016] The control electrode of the second transistor is coupled to the third node;
[0017] The second terminal of the second transistor is coupled to the second power supply terminal.
[0018] Optionally, the driving transistor, the first transistor, and the second transistor are all N-type transistors.
[0019] Optionally, the data writing circuit includes a switching transistor, the first electrode of which is coupled to the first node, the control electrode of which is coupled to the first scan line, and the second electrode of which is coupled to the data line.
[0020] Optionally, the switching transistor is an N-type transistor.
[0021] Optionally, the first energy storage circuit includes a first capacitor, with a first electrode of the first capacitor coupled to the first node and a second electrode of the first capacitor coupled to the second node.
[0022] A second aspect of this disclosure provides a pixel driving method, the pixel driving method being based on the pixel circuit provided in the first aspect of this disclosure, the pixel driving method comprising:
[0023] During the writing phase of the current frame display period, the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driver chip outputs a display data signal to the data writing circuit through the data line to write the display data signal to the first node.
[0024] During the light-emitting phase of the current frame display period, the first energy storage circuit keeps the driving transistor on, and the driving transistor generates a driving current corresponding to the display data signal to drive the light-emitting device to emit light;
[0025] During the preparation phase of the blanking period between the current frame and the next frame, for at least one pixel circuit: the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driving chip outputs a sensing data signal to the data writing circuit through the data line to write the sensing data signal into the first node. The voltage of the sensing data signal is equal to the voltage of the first power supply terminal.
[0026] During the sensing phase of the blanking period between the current frame and the next frame, the control circuit outputs a second scan signal to the control terminal of the sensing circuit through the second scan line. The driving chip senses the second terminal voltage value of the sensing circuit through the data line, and after the second terminal voltage value of the sensing circuit stabilizes, it reads the stable second terminal voltage value of the sensing circuit, which includes the threshold voltage of the driving transistor, the mobility drift voltage of the driving transistor, and the influence voltage of the sensing circuit. The stable second terminal voltage value of the sensing circuit is used as compensation data.
[0027] During the writing phase of the next frame display period, the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driver chip outputs a compensated display data signal that is compensated according to the compensation data to the data writing circuit through the data line, so as to write the compensated display data signal to the first node.
[0028] During the light-emitting phase of the next frame display period, the first energy storage circuit keeps the driving transistor on, and the driving transistor generates a driving current corresponding to the compensated display data signal to drive the light-emitting device to emit light.
[0029] Optionally, the sensing circuit includes a first transistor and a second transistor; the first electrode of the first transistor is coupled to the first node; the control electrode of the first transistor is coupled to the second scan line; the second electrode of the first transistor and the first electrode of the second transistor are coupled to a fourth node, and the fourth node is coupled to the data line; the control electrode of the second transistor is coupled to the third node; the second electrode of the second transistor is coupled to the second power supply terminal; the stable voltage value of the second terminal of the sensing circuit is the stable voltage value of the fourth node, and the stable voltage value of the fourth node includes the threshold voltage of the driving transistor, the mobility drift voltage of the driving transistor, and the threshold voltage of the second transistor.
[0030] A third aspect of this disclosure provides a display substrate including the pixel circuit provided in the first aspect of this disclosure.
[0031] Optionally, the display substrate further includes a control circuit, which includes a first unit for outputting the first scan signal and a second unit for outputting the second scan signal. The second unit includes a selection circuit. The first controlled terminal of the selection circuit is coupled to the first scan signal output terminal of the first unit and the first scan line at a fifth node. The second controlled terminal of the selection circuit is coupled to a control signal terminal. The first input terminal of the selection circuit is coupled to a low-level power supply terminal, and the second input terminal of the selection circuit is coupled to a high-level power supply terminal. The output terminal of the selection circuit is coupled to the second scan line. The selection circuit is used to output a low-level or high-level second scan signal through the output terminal in response to the first scan signal received by the first controlled terminal and the control signal received by the second controlled terminal.
[0032] Optionally, the selection circuit includes a first P-type transistor, a second P-type transistor, a first N-type transistor, a second N-type transistor, a third N-type transistor, and a second capacitor;
[0033] The control electrode of the first P-type transistor, the control electrode of the first N-type transistor, and the control signal terminal are coupled to the sixth node;
[0034] The first terminal of the first P-type transistor, the first terminal of the second P-type transistor, and the low-level power supply terminal are coupled to the seventh node;
[0035] The second terminal of the first P-type transistor, the control terminal of the second P-type transistor, the first terminal of the second N-type transistor, the control terminal of the third N-type transistor, and the first terminal of the second capacitor are coupled to the eighth node;
[0036] The first terminal of the first N-type transistor is coupled to the control terminal of the second N-type transistor, and the second terminals of the first N-type transistor and the second N-type transistor are coupled to the fifth node;
[0037] The second terminal of the second capacitor, the second terminal of the third N-type transistor, and the high-level power supply terminal are coupled to the ninth node;
[0038] The second terminal of the second P-type transistor, the first terminal of the third N-type transistor, and the second scan line are coupled to the tenth node.
[0039] The beneficial effects of this disclosure are as follows:
[0040] The technical solution disclosed herein can effectively compensate for the threshold voltage and mobility drift of transistors in pixel circuits, improve the uneven brightness of OLEDs, and effectively simplify the pixel driving circuit structure, which is conducive to realizing OLED display products with narrow bezels and high PPI (Pixels Per Inch). Attached Figure Description
[0041] The specific embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.
[0042] Figure 1 This diagram illustrates a circuit structure of a pixel circuit according to an embodiment of the present disclosure.
[0043] Figure 2 This diagram illustrates another circuit structure of a pixel circuit provided in an embodiment of the present disclosure.
[0044] Figure 3 Show Figure 2 The diagram shows the timing sequence of the pixel circuit.
[0045] Figure 4 Show Figure 2 The diagram shows the circuit state of the pixel circuit during the writing phase.
[0046] Figure 5 Show Figure 2 The diagram shows the circuit state of the pixel circuit during the sensing phase.
[0047] Figure 6 Implementation shown Figure 3 The diagram shows a circuit structure of the gate drive circuit for the pixel circuit's operating timing.
[0048] Figure 7 Implementation shown Figure 3 Another circuit structure diagram of the gate drive circuit for the pixel circuit operation timing shown.
[0049] Figure 8 Show Figure 7 The diagram shows the timing sequence of the gate drive circuit. Detailed Implementation
[0050] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0051] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are used to distinguish different components. Similarly, terms such as “comprising” or “including” mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “upper and lower,” “left and right,” etc., are used only to indicate relative positional relationships. “On,” “formed on,” and “set on” can indicate that one layer is directly formed or set on another layer, or that one layer is indirectly formed or set on another layer, i.e., there are other layers between the two layers.
[0052] In this disclosure, the light-emitting device can be a current-driven light-emitting device, including LEDs (Light Emitting Diodes) or OLEDs in the prior art. In this embodiment, OLED is used as an example for illustration.
[0053] In all embodiments of this disclosure, the transistors used can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. In these embodiments, the gate of the transistor is referred to as the control electrode, and one of the source and drain is referred to as the first electrode, and the other as the second electrode. The embodiments of this disclosure can be applied to products using LPTS technology (i.e., the circuit includes only low-temperature polysilicon transistors) or LTPO technology (i.e., the circuit includes both low-temperature polysilicon transistors and metal-oxide-semiconductor transistors). Furthermore, transistors can be classified into N-type and P-type based on their characteristics. When using an N-type transistor, it conducts when the gate input is high and is turned off when the gate input is low. When using a P-type transistor, it is turned off when the gate input is high and is turned on when the gate input is low.
[0054] The following disclosure provides numerous different embodiments or examples for implementing various structures of this disclosure. To simplify this disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this disclosure. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, this disclosure provides examples of various specific processes and materials, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0055] To ensure uniform OLED light emission, the characteristics of the driving transistors must be consistent. However, for example, the driving transistors of TFTs (Thin Film Transistors) exhibit characteristic drift during operation, especially after prolonged use. This drift includes threshold voltage drift and mobility drift, resulting in poor OLED light emission uniformity. Existing technologies offer some compensation methods, but most address threshold voltage drift. Furthermore, these methods introduce the impact of threshold voltage drift from other transistors in the pixel circuit on the driving current. Additionally, internal compensation methods in existing technologies result in complex pixel circuit structures, while external compensation methods require sensing lines, increasing pixel circuit traces.
[0056] In view of this, one embodiment of the present disclosure provides a pixel circuit that is applied to an array substrate in an OLED display substrate, such as... Figure 1 As shown, the pixel circuit includes a sensing circuit 101, a data writing circuit 102, a first energy storage circuit 103, a driving transistor DTFT, and a light-emitting device OLED.
[0057] The first terminal of the sensing circuit 101, the control electrode of the driving transistor DTFT, the first terminal of the first energy storage circuit 103, and the first terminal of the data writing circuit 102 are coupled to the first node N1.
[0058] The first terminal of the driving transistor DTFT, the second terminal of the first energy storage circuit 103, and the first power supply terminal Vdd are coupled to the second node N2;
[0059] The control terminal of the data writing circuit 102 is coupled to the first scan line Gate1(n), and the second terminal of the data writing circuit 102 and the second terminal of the sensing circuit 101 are respectively coupled to the data line Data.
[0060] The control terminal of the sensing circuit 101 is coupled to the second scan line Gate2(n);
[0061] The third terminal of the sensing circuit 101, the second terminal of the driving transistor DTFT, and the first terminal of the light-emitting device OLED are coupled to the third node N3;
[0062] The fourth terminal of the sensing circuit 101 is coupled to the second power supply terminal, and the second terminal of the light-emitting device OLED is coupled to the third power supply terminal.
[0063] The pixel circuit provided in this embodiment can effectively compensate for the threshold voltage and mobility drift of the transistors in the pixel circuit through external compensation, thereby improving the uneven brightness of OLED. The data line can be used to perform both read and write functions. For example, it can write display data signals during the display period and be used as a sensing line during the blanking phase between two frames to read compensation data from the sensing circuit 101 for external compensation when the next frame is displayed. This can effectively simplify the pixel driving circuit structure and facilitate the realization of OLED display products with narrow bezels and high PPI.
[0064] For example Figure 1 As shown, the second power supply terminal and the third power supply terminal are grounded (GND).
[0065] For example Figure 1 As shown, the first electrode of the light-emitting device OLED is the anode, and the second electrode is the cathode.
[0066] Wherein, the first scan line is denoted as Gate1(n) and the second scan line is denoted as Gate2(n), representing... Figure 1 The pixel circuit shown is the pixel circuit for the nth row of pixels, coupled to the first and second scan lines of the nth row.
[0067] Figure 2 It shows the basis Figure 1 This is a specific alternative to the pixel circuit shown.
[0068] In one possible implementation, such as Figure 2 As shown, the data writing circuit 102 includes a switching transistor STFT, the first electrode of the switching transistor STFT is coupled to the first node N1, the control electrode of the switching transistor STFT is coupled to the first scan line Gate1(n), and the second electrode of the switching transistor STFT is coupled to the data line Data.
[0069] In this circuit, the control electrode of the switching transistor STFT is its gate, and the first scan line Gate1(n) can also be called the first gate line. The first scan signal output by the first scan line Gate1(n) to the control electrode (gate) of the switching transistor STFT can also be called the first gate drive signal. The first electrode of the switching transistor STFT serves as the first terminal of the data writing circuit 102, and is coupled to the first terminal of the sensing circuit 101, the control electrode (gate) of the driving transistor DTFT, and the first terminal of the first energy storage circuit 103 at the first node N1. The second electrode of the switching transistor STFT serves as the second terminal of the data writing circuit 102, and is coupled to the data line Data.
[0070] In one possible implementation, such as Figure 2 As shown, the switching transistor STFT is an N-type transistor.
[0071] In one possible implementation, such as Figure 2 As shown, the first energy storage circuit 103 includes a first capacitor C1, the first terminal of the first capacitor C1 is coupled to the first node N1, and the second terminal of the first capacitor C1 is coupled to the second node N2.
[0072] The first terminal of the first capacitor C1 serves as the first end of the first energy storage circuit 103, and is coupled to the first end of the sensing circuit 101, the control terminal of the driving transistor DTFT, and the first end of the data writing circuit 102 at the first node N1. The second terminal of the first capacitor C1 serves as the second end of the first energy storage circuit 103, and is coupled to the first terminal of the driving transistor DTFT and the first power supply terminal Vdd at the second node N2.
[0073] In one possible implementation, such as Figure 2 As shown, the sensing circuit 101 includes a first transistor T1 and a second transistor T2;
[0074] The first terminal of the first transistor T1 is coupled to the first node N1. That is, the first terminal of the first transistor T1 serves as the first end of the sensing circuit 101. The first terminal of the first transistor T1, the control terminal of the driving transistor DTFT, the first end of the first energy storage circuit 103, and the first end of the data writing circuit 102 are coupled to the first node N1.
[0075] The control electrode of the first transistor T1 is coupled to the second scan line Gate2(n). That is, the control electrode of the first transistor T1 is coupled to the second scan line Gate2(n) as the control terminal of the sensing circuit 101. The control electrode of the first transistor T1 is its gate. The second scan line Gate2(n) can also be called the second gate line. The second scan signal output by the second scan line Gate2(n) to the control electrode (gate) of the first transistor T1 can also be called the second gate drive signal.
[0076] The second terminal of the first transistor T1 and the first terminal of the second transistor T2 are coupled to the fourth node N4. The fourth node N4 is coupled to the data line Data. That is, the fourth node N4 serves as the second terminal of the sensing circuit 101 and is coupled to the data line Data.
[0077] The control electrode of the second transistor T2 is coupled to the third node N3. That is, the control electrode of the second transistor T2 serves as the third terminal of the sensing circuit 101, and is coupled to the second electrode of the driving transistor DTFT and the first electrode of the light-emitting device OLED at the third node N3.
[0078] The second terminal of the second transistor T2 is coupled to the second power supply terminal, that is, the second terminal of the second transistor T2 serves as the fourth terminal of the sensing circuit 101 and is coupled to the second power supply terminal, for example, ground GND.
[0079] In one possible implementation, such as Figure 2 As shown, the driving transistor DTFT, the first transistor T1, and the second transistor T2 are all N-type transistors.
[0080] Figure 2 The operating timing sequence of the pixel circuit with the 4T1C structure shown can be as follows: Figure 3 As shown, Figure 3 In this diagram, Gate1(n) represents the waveform of the first scan signal output from the first scan line, Gate2(n) represents the waveform of the second scan signal output from the second scan line, and Data represents the display data signal output from the data line. It should be noted that... Figure 3 The high and low potentials shown in the timing diagram are only schematic and do not represent the actual potential values or relative proportions.
[0081] like Figure 3 As shown, Figure 2 The driving process of the pixel circuit shown includes:
[0082] During the writing phase t1 of the current frame display period, for example, the control circuit of the gate drive circuit (GOA) outputs a high-level first scan signal to the control electrode of the switching transistor STFT through the first scan line Gate1(n), and the driver chip outputs a display data signal to the second electrode of the switching transistor STFT through the data line Data, so as to write the display data signal to the first node N1, thereby turning on the driving transistor DTFT and charging the first capacitor C1, such as... Figure 4 As shown, it is understandable that during the writing stage t1, the control electrode of the second transistor T2 is at the same potential as the first electrode of the OLED, such as the anode. The second transistor T2 cannot be fully turned on and will not affect the writing of the display data signal to the first node N1.
[0083] During the light-emitting phase t2 of the current frame display period, both the switching transistor STFT and the first transistor T1 are turned off, and the driving chip also stops outputting display data signals. The first capacitor C1 keeps the driving transistor DTFT on, and the driving transistor DTFT generates a driving current corresponding to the display data signal to drive the light-emitting device OLED to emit light.
[0084] During the preparation phase t3 of the blanking period between the current frame and the next frame, for the pixel circuit provided in this embodiment: for example, the control circuit of the gate drive circuit (GOA) outputs a high-level first scan signal to the control electrode of the switching transistor STFT through the first scan line Gate1(n), and the drive chip outputs a sensing data signal to the second electrode of the switching transistor STFT through the data line Data, so as to write the sensing data signal into the first node N1. The voltage of the sensing data signal is equal to the voltage of the first power supply terminal Vdd. Figure 3 In the preparation phase t3, the sensed data signal voltage is represented by Vdd, meaning that preparation phase t3 involves writing Vdd into the first node N1. It can be understood that the first scan line is represented by Gate1(n), which represents... Figure 2 The pixel circuit shown is the pixel circuit for the nth row of pixels. Figure 3 Between the light-emitting phase t2 and the preparation phase t3, the process also includes the writing phase for the (n+1)th row, (n+2)th row to the last row of pixels in the current frame's display period. Furthermore, as... Figure 3 As shown, in the preparation stage t3, for example, the control circuit of the gate drive circuit (GOA) also outputs a high-level second scan signal to the control electrode of the first transistor T1 through the second scan line Gate2(n). However, in the preparation stage t3, the control electrode of the second transistor T2 is at the same potential as the first electrode of the OLED, for example, the anode. The second transistor T2 cannot be fully turned on, so the second transistor T2 is equivalent to a resistor, thus the first transistor T1 is still cut off, and the circuit state is similar. Figure 4 The only difference is that the display data signal written to the first node N1 changes from the write phase t1 to the sensing data signal in the preparation phase t3.
[0085] During the sensing phase t4 of the blanking period between the current frame and the next frame, for example, the control circuit of the gate drive circuit (GOA) outputs a high-level second scan signal to the control electrode of the first transistor T1 through the second scan line Gate2(n). The drive chip senses the voltage value of the fourth node N4 through the data line Data, and after the voltage value of the fourth node N4 stabilizes, it reads the stable voltage value of the fourth node N4, which includes the threshold voltage VthD of the drive transistor DTFT, the mobility drift voltage ΔVμ_D of the drive transistor DTFT, and the threshold voltage Vth2 of the second transistor T2. The stable voltage value of the fourth node N4 is used as compensation data. The principle is as follows: In the sensing phase t4, the data line Data is used as the sensing line. For example, the control circuit of the gate drive circuit (GOA) does not output the first scan signal or outputs a low-level first scan signal through the first scan line Gate21(n), causing the switching transistor STFT to be turned off. It then outputs a high-level second scan signal to the control electrode of the first transistor T1 through the second scan line Gate2(n), causing the first transistor T1 to turn on. Thus, when the voltage of the first node N1 is Vdd in the preparation phase t3, the driving transistor DTFT turns on when entering the sensing phase t4, and the control electrode of the second transistor T2 reaches a high potential, thereby turning on the second transistor T2. Figure 5As shown, the first node N1 leaks current through the first transistor T1 and the second transistor T2. When the potential of the first node N1 is (VthD+ΔVμ_D+Vth2), the driving transistor DTFT is turned off, and the potential of the first node N1 no longer decreases but becomes a stable value. In addition, since the first transistor T1 is fully turned on in the sensing stage t4, the potential of the first node N1 and the fourth node N4 are equal. The driving chip can then read the stable voltage value of the fourth node N4, which is equal to (VthD+ΔVμ_D+Vth2), through the data line Data. This value is used as compensation data for external compensation of threshold voltage drift and mobility drift of the pixel circuit during subsequent frame display.
[0086] For a pixel circuit that has acquired compensation data, during the writing phase of the next frame display period, for example, the control circuit of the gate drive circuit (GOA) outputs a high-level first scan signal to the control electrode of the switching transistor STFT via the first scan line Gate1(n). The driver chip outputs the compensated display data signal, which is compensated according to the compensation data, to the second electrode of the switching transistor STFT via the data line Data, so as to write the compensated display data signal into the first node N1, thereby turning on the driving transistor DTFT and charging the first capacitor C1. Then, during the light emission phase of the next frame display period, the first capacitor C1 keeps the driving transistor DTFT on, and the driving transistor DTFT generates a driving current corresponding to the compensated display data signal to drive the light-emitting device OLED to emit light, thereby compensating for the threshold voltage drift and mobility drift of the pixel circuit.
[0087] Another embodiment of this disclosure also provides a pixel driving method based on the pixel circuit provided in the above embodiments.
[0088] During the writing phase of the current frame display period, the control circuit outputs a first scan signal to the control terminal of the data writing circuit 102 through the first scan line Gate1(n), and the driver chip outputs a display data signal to the data writing circuit 102 through the data line Data, so as to write the display data signal to the first node N1.
[0089] During the light-emitting phase of the current frame display period, the first energy storage circuit 103 keeps the driving transistor DTFT on and generates a driving current corresponding to the display data signal to drive the light-emitting device OLED to emit light.
[0090] During the preparation phase of the blanking period between the current frame and the next frame, for at least one pixel circuit: the control circuit outputs a first scan signal to the control terminal of the data writing circuit 102 through the first scan line Gate1(n), and the driver chip outputs a sensing data signal to the data writing circuit 102 through the data line Data to write the sensing data signal to the first node N1. The voltage of the sensing data signal is equal to the voltage of the first power supply terminal Vdd.
[0091] During the blanking period between the current frame and the next frame, the control circuit outputs a second scan signal to the control terminal of the sensing circuit 101 through the second scan line Gate2(n). The driving chip senses the voltage value of the second terminal of the sensing circuit 101 through the data line Data. After the voltage value of the second terminal of the sensing circuit 101 stabilizes, it reads the stable voltage value of the second terminal of the sensing circuit 101, which includes the threshold voltage of the driving transistor DTFT, the mobility drift voltage of the driving transistor DTFT, and the influence voltage of the sensing circuit 101. The stable voltage value of the second terminal of the sensing circuit 101 is used as compensation data.
[0092] During the writing phase of the next frame display period, the control circuit outputs the first scan signal to the control terminal of the data writing circuit 102 through the first scan line Gate1(n), and the driver chip outputs the compensated display data signal, which is compensated according to the compensation data, to the data writing circuit 102 through the data line Data, so as to write the compensated display data signal to the first node N1.
[0093] During the light-emitting phase of the next frame display period, the first energy storage circuit 103 keeps the driving transistor DTFT on, and the driving transistor DTFT generates and compensates the driving current corresponding to the display data signal to drive the light-emitting device OLED to emit light.
[0094] In one possible implementation, during the preparation phase, the control circuit outputs a first scan signal to the control terminal of the data writing circuit 102 via the first scan line Gate1(n) and outputs a second scan signal to the sensing circuit 101 via the second scan line Gate2(n). The driver chip outputs a sensing data signal to the data writing circuit 102 via the data line Data to write the sensing data signal to the first node N1.
[0095] In one possible implementation, the sensing circuit 101 includes a first transistor T1 and a second transistor T2. The stable voltage value at the second terminal of the sensing circuit 101 is the stable voltage value at the fourth node N4. The stable voltage value at the fourth node N4 includes the threshold voltage of the driving transistor DTFT, the mobility drift voltage of the driving transistor DTFT, and the threshold voltage of the second transistor T2.
[0096] It should be noted that the pixel circuit uses Figure 2 In the case of the specific alternative solutions shown, the pixel driving method provided in the embodiments of this disclosure can be referred to the above embodiments for... Figure 2 The driving process of the pixel circuit shown will not be described again here.
[0097] Furthermore, in the pixel driving method provided in this embodiment, the pixel circuits in the display substrate can be compensated using a line-by-line compensation method during the blanking period. For example, compensation data of the pixel circuits of one row of pixels can be acquired during a blanking period, and the pixel circuits with acquired compensation data can be compensated in subsequent displays. Specifically, the driving chip acquires the compensation data of the pixel circuits of the first row of pixels during the first blanking period and compensates the pixel circuits of the first row of pixels when displaying the second frame. In the second blanking period, it acquires the compensation data of the pixel circuits of the second row of pixels and compensates the pixel circuits of the first and second rows of pixels when displaying the third frame, and so on. Alternatively, random compensation or power-off compensation can also be used to compensate the pixel circuits.
[0098] Another embodiment of this disclosure provides a display substrate including the pixel circuit provided in the above embodiments.
[0099] In one possible implementation, the display substrate also includes, for example, control circuitry for a gate drive circuit (GOA), such as... Figure 6 As shown, the control circuit includes a first unit 601 for outputting a first scan signal and a second unit 602 for outputting a second scan signal. The second unit 602 includes a selection circuit. The first controlled terminal of the selection circuit is coupled to the first scan signal output terminal and the first scan line Gate1(n) of the first unit 601 at the fifth node N5. The second controlled terminal of the selection circuit is coupled to the control signal terminal SW. The first input terminal of the selection circuit is coupled to the low-level power supply terminal VGL. The second input terminal of the selection circuit is coupled to the high-level power supply terminal VGH. The output terminal of the selection circuit is coupled to the second scan line Gate2(n). The selection circuit is used to respond to the first scan signal received by the first controlled terminal and the control signal received by the second controlled terminal, and output a low-level or high-level second scan signal through the output terminal.
[0100] For example, the first unit 601 for outputting the first scan signal is a shift register unit in a conventional gate drive circuit (GOA).
[0101] Figure 7 It shows the basis Figure 6 This is a specific alternative to the control circuit shown.
[0102] In one possible implementation, it is suitable for implementing line-by-line compensation, and implements... Figure 3The pixel circuit timing selection circuit shown includes a first P-type transistor T3, a second P-type transistor T6, a first N-type transistor T7, a second N-type transistor T4, a third N-type transistor T5, and a second capacitor C2.
[0103] The control electrode of the first P-type transistor T3, the control electrode of the first N-type transistor T7, and the control signal terminal SW are coupled to the sixth node N6. For example, the control signal terminal SW is coupled to the driver chip through the control signal line. That is, the control signal is output by the driver chip. The control signal is, for example, the full-screen control signal output by the driver chip.
[0104] The first terminal of the first P-type transistor T3, the first terminal of the second P-type transistor T6, and the low-level power supply terminal VGL are coupled to the seventh node N7.
[0105] The second terminal of the first P-type transistor T3, the control terminal of the second P-type transistor T6, the first terminal of the second N-type transistor T4, the control terminal of the third N-type transistor T5, and the first terminal of the second capacitor C1 are coupled to the eighth node N8.
[0106] The first terminal of the first N-type transistor T7 is coupled to the control terminal of the second N-type transistor T4, and the second terminal of the first N-type transistor T7 and the second terminal of the second N-type transistor T4 are coupled to the fifth node N5;
[0107] The second terminal of the second capacitor C2, the second terminal of the third N-type transistor T5, and the high-level power supply terminal VGH are coupled to the ninth node N9;
[0108] The second terminal of the second P-type transistor T6, the first terminal of the third N-type transistor T5, and the second scan line Gate2(n) are coupled to the tenth node N10. The second P-type transistor T6 and the third N-type transistor T5 form a buffer device structure to enhance the output driving capability of the second scan signal.
[0109] Suitable for implementing line-by-line compensation, and achieving Figure 3 The pixel circuit operating timing shown Figure 7 The operating timing of the control circuit corresponding to, for example, the gate drive circuit (GOA) shown can be as follows: Figure 8 As shown, Figure 8 In the diagram, the blanking period is used to acquire compensation data for the nth row pixel circuit. Gate1(n-1) represents the waveform of the first scan signal output from the first scan line of the (n-1)th row, Gate1(n) represents the waveform of the first scan signal output from the first scan line of the nth row, Gate2(n-1) represents the waveform of the second scan signal output from the second scan line of the (n-1)th row, Gate2(n) represents the waveform of the second scan signal output from the second scan line of the nth row, and SW represents the waveform of the control signal output from the control signal terminal. It should be noted that... Figure 8 The high and low potentials shown in the timing diagram are only schematic and do not represent the actual potential values or relative proportions.
[0110] like Figure 8 As shown, Figure 7 During the control process of the control circuit shown:
[0111] (1) During the display period, the driver chip outputs a low-level control signal SW, thereby turning on the first P-type transistor T3 and turning off the first N-type transistor T7, turning on the second P-type transistor T6 and turning off the third N-type transistor T5, and the tenth node N10 outputs a low-level second scan signal to the second scan line.
[0112] (2) During the blanking period used to obtain the compensation data for the nth row pixel circuit:
[0113] (2.1) For the control circuit corresponding to the nth row pixel circuit, corresponding to the preparation stage t3, the driver chip outputs a high-level control signal SW. As a result, the first P-type transistor T3 is turned off and the first N-type transistor T7 is turned on. Since the first scan signal Gate1(n) is high, the second N-type transistor T4 is turned on (Vgs > Vth of T4), writing the first scan signal Gate1(n) into the sixth node N6. This turns on the third N-type transistor T5 and charges the second capacitor C2, while turning off the second P-type transistor T6. The tenth node N10 outputs a high-level second scan signal to the second scan line. Corresponding to the sensing stage t4, the driver chip outputs a high-level control signal SW. The first scan signal Gate1(n) changes from the high level of the preparation stage t3 to a low level. The second N-type transistor T4 is turned off (Vgs < 0 of T4). The second capacitor C2 keeps the third N-type transistor T5 on, and the tenth node N10 outputs a high-level second scan signal to the second scan line.
[0114] (2.2) For the control circuit corresponding to the (n-1)th row pixel circuit, the driver chip outputs a low-level control signal SW, and its tenth node outputs a low-level second scan signal to the second scan line.
[0115] Another embodiment of this disclosure provides a control method based on the display substrate provided in the above embodiments. The control method includes:
[0116] During the preparation phase of the blanking period between the current frame and the next frame, the first unit 601 outputs a high-level first scan signal and the control signal terminal SW outputs a high-level control signal, and the second unit 602 outputs a high-level second scan signal.
[0117] During the sensing phase of the blanking period between the current frame and the next frame, the first unit 601 outputs a low-level first scan signal and the control signal terminal SW outputs a high-level control signal. The second capacitor C2 keeps the third N-type transistor T5 on, and the second unit 602 outputs a high-level second scan signal.
[0118] The control method provided in this disclosure can be found in the above embodiments for... Figure 7 The control process of the control circuit shown will not be described again here.
[0119] Another embodiment of this disclosure provides a display device including the aforementioned display substrate. The display device can be any product or component with display functionality, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator; this embodiment does not limit the scope of the application.
[0120] Obviously, the above embodiments of this disclosure are merely examples for clearly illustrating this disclosure, and are not intended to limit the implementation of this disclosure. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all implementation methods here. Any obvious variations or modifications derived from the technical solutions of this disclosure are still within the protection scope of this disclosure.
Claims
1. A pixel circuit, characterized in that, It includes a sensing circuit, a data writing circuit, a first energy storage circuit, a driving transistor, and a light-emitting device; The first terminal of the sensing circuit, the control electrode of the driving transistor, the first terminal of the first energy storage circuit, and the first terminal of the data writing circuit are coupled to the first node. The first terminal of the driving transistor, the second terminal of the first energy storage circuit, and the first power supply terminal are coupled to the second node; The control terminal of the data writing circuit is coupled to the first scan line, and the second terminal of the data writing circuit and the second terminal of the sensing circuit are respectively coupled to the data line; The control terminal of the sensing circuit is coupled to the second scan line; The third terminal of the sensing circuit, the second terminal of the driving transistor, and the first terminal of the light-emitting device are coupled to the third node; The fourth terminal of the sensing circuit is coupled to the second power supply terminal, and the second electrode of the light-emitting device is coupled to the third power supply terminal.
2. The pixel circuit according to claim 1, characterized in that, The sensing circuit includes a first transistor and a second transistor; The first terminal of the first transistor is coupled to the first node; The control electrode of the first transistor is coupled to the second scan line; The second terminal of the first transistor is coupled to the first terminal of the second transistor at a fourth node, and the fourth node is coupled to the data line; The control electrode of the second transistor is coupled to the third node; The second terminal of the second transistor is coupled to the second power supply terminal.
3. The pixel circuit according to claim 2, characterized in that, The driving transistor, the first transistor, and the second transistor are all N-type transistors.
4. The pixel circuit according to claim 1, characterized in that, The data writing circuit includes a switching transistor, the first electrode of which is coupled to the first node, the control electrode of which is coupled to the first scan line, and the second electrode of which is coupled to the data line.
5. The pixel circuit according to claim 4, characterized in that, The switching transistor is an N-type transistor.
6. The pixel circuit according to claim 1, characterized in that, The first energy storage circuit includes a first capacitor, with a first electrode of the first capacitor coupled to the first node and a second electrode of the first capacitor coupled to the second node.
7. A pixel driving method, characterized in that, The pixel driving method is based on the pixel circuit according to any one of claims 1-6, and the pixel driving method includes: During the writing phase of the current frame display period, the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driver chip outputs a display data signal to the data writing circuit through the data line to write the display data signal to the first node. During the light-emitting phase of the current frame display period, the first energy storage circuit keeps the driving transistor on, and the driving transistor generates a driving current corresponding to the display data signal to drive the light-emitting device to emit light; During the preparation phase of the blanking period between the current frame and the next frame, for at least one pixel circuit: the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driving chip outputs a sensing data signal to the data writing circuit through the data line to write the sensing data signal into the first node. The voltage of the sensing data signal is equal to the voltage of the first power supply terminal. During the sensing phase of the blanking period between the current frame and the next frame, the control circuit outputs a second scan signal to the control terminal of the sensing circuit through the second scan line. The driving chip senses the second terminal voltage value of the sensing circuit through the data line, and after the second terminal voltage value of the sensing circuit stabilizes, it reads the stable second terminal voltage value of the sensing circuit, which includes the threshold voltage of the driving transistor, the mobility drift voltage of the driving transistor, and the influence voltage of the sensing circuit. The stable second terminal voltage value of the sensing circuit is used as compensation data. During the writing phase of the next frame display period, the control circuit outputs a first scan signal to the control terminal of the data writing circuit through the first scan line, and the driver chip outputs a compensated display data signal that is compensated according to the compensation data to the data writing circuit through the data line, so as to write the compensated display data signal to the first node. During the light-emitting phase of the next frame display period, the first energy storage circuit keeps the driving transistor on, and the driving transistor generates a driving current corresponding to the compensated display data signal to drive the light-emitting device to emit light.
8. The method according to claim 7, characterized in that, The sensing circuit includes a first transistor and a second transistor; the first electrode of the first transistor is coupled to the first node; the control electrode of the first transistor is coupled to the second scan line; the second electrode of the first transistor and the first electrode of the second transistor are coupled to a fourth node, and the fourth node is coupled to the data line; the control electrode of the second transistor is coupled to the third node; the second electrode of the second transistor is coupled to the second power supply terminal; the stable voltage value of the second terminal of the sensing circuit is the stable voltage value of the fourth node, and the stable voltage value of the fourth node includes the threshold voltage of the driving transistor, the mobility drift voltage of the driving transistor, and the threshold voltage of the second transistor.
9. A display substrate, characterized in that, Includes the pixel circuit as described in any one of claims 1-6.
10. The display substrate according to claim 9, characterized in that, The display substrate further includes a control circuit, which includes a first unit for outputting a first scan signal and a second unit for outputting a second scan signal. The second unit includes a selection circuit. The first controlled terminal of the selection circuit is coupled to the first scan signal output terminal of the first unit and the first scan line at a fifth node. The second controlled terminal of the selection circuit is coupled to a control signal terminal. The first input terminal of the selection circuit is coupled to a low-level power supply terminal, and the second input terminal of the selection circuit is coupled to a high-level power supply terminal. The output terminal of the selection circuit is coupled to the second scan line. The selection circuit is used to respond to the first scan signal received by the first controlled terminal and the control signal received by the second controlled terminal, and output a low-level or high-level second scan signal through the output terminal of the selection circuit.
11. The display substrate according to claim 10, characterized in that, The selection circuit includes a first P-type transistor, a second P-type transistor, a first N-type transistor, a second N-type transistor, a third N-type transistor, and a second capacitor; The control electrode of the first P-type transistor, the control electrode of the first N-type transistor, and the control signal terminal are coupled to the sixth node; The first terminal of the first P-type transistor, the first terminal of the second P-type transistor, and the low-level power supply terminal are coupled to the seventh node; The second terminal of the first P-type transistor, the control terminal of the second P-type transistor, the first terminal of the second N-type transistor, the control terminal of the third N-type transistor, and the first terminal of the second capacitor are coupled to the eighth node; The first terminal of the first N-type transistor is coupled to the control terminal of the second N-type transistor, and the second terminals of the first N-type transistor and the second N-type transistor are coupled to the fifth node; The second terminal of the second capacitor, the second terminal of the third N-type transistor, and the high-level power supply terminal are coupled to the ninth node; The second terminal of the second P-type transistor, the first terminal of the third N-type transistor, and the second scan line are coupled to the tenth node.