Adaptive rate burst spread spectrum demodulation device for broadband anti-interference communication

Abstract

The present invention discloses a burst spread spectrum demodulation device with adaptive rate for broadband anti-interference communication, which relates to the field of broadband communication and covert satellite communication. The device adopts a unified chip clock processing, reduces the processing clock frequency, uses parallel frequency scanning, parallel capture, parallel tracking and despreading, and parses the data rate through the identification rate field for subsequent data despreading and demodulation. The data rate is variable burst by burst, which can adapt to the burst data demodulation with large spread spectrum ratio under a certain range of Doppler frequency deviation. It is flexible and scalable, and is suitable for most application scenarios such as drone communication in broadband satellite communication, covert communication behind special weapon platforms such as missiles, and anti-interference communication.

Description

Technical Field

[0001] The present invention relates to the fields of broadband communication and covert satellite communication, and in particular to an adaptive rate burst spread spectrum demodulation device for broadband anti-interference communication, which can be used in the fields of covert communication and anti-interference communication of special weapon platforms such as broadband satellites, unmanned aerial vehicles and missile-borne weapons. Background Art

[0002] Spread spectrum communication is widely used in satellite communication systems due to its strong anti-interference, anti-interception and concealment capabilities. With the increasing demand for communication bandwidth and communication anti-interference capabilities, the requirements for clocks in broadband spread spectrum communication despreading and demodulation are correspondingly improved.

[0003] In traditional spread spectrum signal demodulation, the rate is fixed and configurable, but not adaptive. In the demodulation process, a high-frequency clock (integer multiples of the chip clock) is used to achieve capture, tracking, correlation and other processing. If the bandwidth is increased or the spread spectrum ratio is increased, the corresponding processing clock must be increased exponentially. However, FPGA processing has restrictions on clock frequency and power consumption. Too high a clock frequency will exceed the processing capacity of the chip or affect the compilation stability and compilation results. Therefore, a despreading and demodulation processing technology that reduces the processing clock is urgently needed. Parallel demodulation has become the most direct demodulation method to reduce the processing clock. Summary of the invention

[0004] In view of this, the present invention provides an adaptive rate burst spread spectrum demodulation device for broadband anti-interference communication, which adopts a unified code chip clock processing, reduces the processing clock frequency, uses parallel scanning, parallel capture, parallel tracking and despreading, and parses the data rate through the identification rate field for subsequent data despreading and demodulation. The data rate is variable frame by frame, can adapt to burst large spread spectrum ratio data demodulation under a certain range of Doppler frequency deviation, and is flexible and expandable to use.

[0005] The technical solution adopted by the present invention is:

[0006] A burst spread spectrum demodulation device with adaptive rate for broadband anti-interference communication, used for despreading and demodulating burst broadband spread spectrum signals at a receiving end, comprising:

[0007] The resampling module is used to perform parallel resampling on the input parallel data to be demodulated, and output the resampled data to the extraction module;

[0008] The extraction module is used to extract the parallel data of each channel after resampling, so that the data rate is reduced to the chip rate, and the extracted data is output to the matched filter module;

[0009] The matched filter module is used to perform matched filtering on the extracted parallel data to eliminate inter-symbol interference, and output the filtered data to the parallel capture module;

[0010] The parallel capture module is used to perform parallel capture of the matched filtered data to achieve coarse synchronization of the local codeword and the received data, obtain a pseudocode synchronization identifier and a synchronization routing identifier, output the pseudocode synchronization identifier to the code generator, and output the received parallel data and the synchronization routing identifier to the first data adjustment module;

[0011] The code generator is used to output the spread spectrum code to the first data adjustment module under the instruction of the pseudo code synchronization mark;

[0012] The first data adjustment module is used to adjust the input parallel data according to the synchronization routing identifier, and adjust the data delay and sample point of the adjusted parallel data and spread spectrum code according to the advance or lag indication output by the first tracking detection module, and output the adjusted parallel data and spread spectrum code to the first correlator group;

[0013] The first correlator group is used to despread the input parallel data using the spread spectrum code according to the spread spectrum ratio set in the frame header, output the leading branch, the middle branch and the lagging branch data to the first tracking and monitoring module, output the middle branch data to the rate analysis module, and output the input parallel data and the spread spectrum code to the data processing module;

[0014] The first tracking and detecting module is used to identify the data of the leading branch, the intermediate branch and the lagging branch, obtain the leading or lagging indication, and output it to the first data adjustment module;

[0015] The rate analysis module is used to match the intermediate branch data with different rate indication fields to obtain the data rate value and output it to the second correlator and the data processing module;

[0016] The data processing module is used to store and read the parallel data and spread spectrum code output by the first correlator group according to the processing delay of the rate analysis module, and output the parallel data and spread spectrum code to the second data adjustment module;

[0017] The second correlator group generates a corresponding data spreading ratio according to the data rate value output by the rate analysis module, despreads the input parallel data and the spreading code according to the data spreading ratio, outputs the leading branch, the middle branch and the lagging branch data to the second tracking and detection module, and outputs the middle branch data to the carrier recovery module;

[0018] The second tracking and detection module is used to identify the leading branch, the middle branch and the lagging branch data, and output the leading or lagging indication to the second data adjustment module;

[0019] The second data adjustment module is used for adjusting the delay and sample points of the input data and the spread spectrum code according to the advance or lag indication output by the second tracking and detection module, and then outputting the parallel data and the spread spectrum code to the second correlator group;

[0020] The carrier recovery module is used to estimate the carrier frequency and phase of the correlation demodulation intermediate branch data output by the second correlator group, and compensate it to the correlation demodulation intermediate branch data to realize carrier phase recovery of the demodulated data for subsequent decoding processing.

[0021] Furthermore, the first tracking detection module and the second tracking detection module compare the input leading, lagging and middle three-way demodulated data after power accumulation, and output an leading indication if the leading branch is larger than the other two branches, and output a lagging indication if the lagging branch is larger than the other two branches, otherwise no indication is output.

[0022] Furthermore, the first data adjustment module and the second data adjustment module perform two chip data delays on the input parallel data and spread spectrum code, output a chip-delayed spread spectrum code, and adjust the data sample points according to the advance or lag indication, adjust the sampling points backward for the advance indication, and adjust the sampling points forward for the lag indication, otherwise output data with a chip delay.

[0023] Compared with the background technology, the present invention has the following advantages:

[0024] (1) The present invention adopts parallel demodulation, which can reduce the processing clock from a high chip clock frequency to the chip clock frequency, thereby expanding the rate processing range.

[0025] (2) The burst spread spectrum demodulation of the present invention can realize frame-by-frame rate adaptive recognition and demodulation.

[0026] (3) The demodulation performance of the present invention is comparable to that of conventional demodulation methods, and the capture probability is also comparable. In addition, the present invention adopts sliding matching capture, and its symbol-by-symbol search method saves more time than traditional window capture. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 It is the transmission frame structure demodulated by the present invention.

[0028] Figure 2 It is a principle block diagram of the burst spread spectrum demodulation device of the present invention. DETAILED DESCRIPTION

[0029] The present invention is described in further detail below.

[0030] A burst spread spectrum demodulation device with adaptive rate for broadband anti-interference communication is used for despreading and demodulating burst broadband spread spectrum signals at a receiving end, such as Figure 2 Shown include:

[0031] The resampling module is used to perform parallel resampling on the input parallel data to be demodulated after serial-to-parallel processing, and output the resampled data to the extraction module;

[0032] The extraction module is used to extract the parallel data of each channel after resampling, so that the data rate is reduced to the chip rate, and the extracted data is output to the matched filter module;

[0033] The matched filter module is used to perform matched filtering on the extracted parallel data to eliminate inter-symbol interference, and output the filtered data to the parallel capture module;

[0034] The parallel capture module is used to perform parallel capture of the matched filtered data to achieve coarse synchronization of the local codeword and the received data, obtain a pseudocode synchronization identifier and a synchronization routing identifier, output the pseudocode synchronization identifier to the code generator, and output the received parallel data and the synchronization routing identifier to the first data adjustment module;

[0035] The code generator is used to output the spread spectrum code to the first data adjustment module under the instruction of the pseudo code synchronization mark;

[0036] The first data adjustment module is used to adjust the input parallel data according to the synchronization routing identifier, and adjust the data delay and sample point of the adjusted parallel data and spread spectrum code according to the advance or lag indication output by the first tracking detection module, and output the adjusted parallel data and spread spectrum code to the first correlator group;

[0037] The first correlator group is used to despread the input parallel data using the spread spectrum code according to the spread spectrum ratio set in the frame header, output the leading branch, the middle branch and the lagging branch data to the first tracking and monitoring module, output the middle branch data to the rate analysis module, and output the input parallel data and the spread spectrum code to the data processing module;

[0038] The first tracking and detecting module is used to identify the data of the leading branch, the intermediate branch and the lagging branch, obtain the leading or lagging indication, and output it to the first data adjustment module;

[0039] The rate analysis module is used to match the intermediate branch data with different rate indication fields to obtain the data rate value and output it to the second correlator and the data processing module;

[0040] The data processing module is used to store and read the parallel data and spread spectrum code output by the first correlator group according to the processing delay of the rate analysis module, and output the parallel data and spread spectrum code to the second data adjustment module;

[0041] The second correlator group generates a corresponding data spreading ratio according to the data rate value output by the rate analysis module, despreads the input parallel data and the spreading code according to the data spreading ratio, outputs the leading branch, the middle branch and the lagging branch data to the second tracking and detection module, and outputs the middle branch data to the carrier recovery module;

[0042] The second tracking and detection module is used to identify the leading branch, the middle branch and the lagging branch data, and output the leading or lagging indication to the second data adjustment module;

[0043] The second data adjustment module is used for adjusting the delay and sample points of the input data and the spread spectrum code according to the advance or lag indication output by the second tracking and detection module, and then outputting the parallel data and the spread spectrum code to the second correlator group;

[0044] The carrier recovery module is used to estimate the carrier frequency and phase of the correlation demodulation intermediate branch data output by the second correlator group, and compensate it to the correlation demodulation intermediate branch data to realize carrier phase recovery of the demodulated data for subsequent decoding processing.

[0045] Among them, the first tracking detection module and the second tracking detection module compare the input leading, lagging and middle three-way demodulated data after power accumulation. If the leading branch is greater than the other two, an leading indication is output; if the lagging branch is greater than the other two, a lagging indication is output; otherwise, no indication is output.

[0046] The first data adjustment module and the second data adjustment module perform two chip data delays on the input parallel data and spread spectrum code, output a chip-delayed spread spectrum code, and adjust the data sample points according to the advance or lag indication, adjust the sampling points backward for the advance indication, and adjust the sampling points forward for the lag indication, otherwise output data with a chip delay.

[0047] The present invention converts the serial-to-parallel processing into 4 channels of parallel data. After extraction, the rate of the 4 parallel data channels is reduced to the chip rate or twice the chip rate. At the same time, the processing clock is reduced to the chip clock or twice the chip clock. The specific processing clock size is determined by the actual chip clock. A single chip clock is used for a higher rate, and a double chip clock is used conversely. The input of the parallel capture module is multi-channel parallel data, which can be used for 4 times and 8 times sampling data. The error is half a chip, and a routing indication is output while outputting a pseudo-code synchronization indication, indicating which channel of the parallel data is aligned with the pseudo-code, so as to facilitate the adjustment of the data and spread spectrum code phase input by the first correlator group. Taking into account resource consumption and application needs, the capture length L is selected as 4096 at most in the present invention, and expansion is supported. Parallel capture realizes frame positioning of burst data. The demodulated transmission frame structure is as follows Figure 1 shown.

[0048] In summary, the present invention adopts a unified low-multiple code chip clock processing to reduce the processing clock frequency and save chip power consumption, uses parallel processing methods such as parallel scanning, parallel capture, parallel tracking and despreading, and parses the data rate by identifying the rate field for subsequent payload data despreading and demodulation. It supports the payload data rate to be variable burst by burst, is flexible and extensible to use, and is suitable for most application scenarios such as broadband covert communication and anti-interference communication.

Claims

1. A burst spread spectrum demodulation device with adaptive rate for broadband anti-interference communication, characterized in that: Used for despreading and demodulating burst broadband spread spectrum signals at the receiving end, including: The resampling module is used to perform parallel resampling on the input parallel data to be demodulated, and output the resampled data to the extraction module; The extraction module is used to extract the parallel data of each channel after resampling, so that the data rate is reduced to the chip rate, and the extracted data is output to the matched filter module; The matched filter module is used to perform matched filtering on the extracted parallel data to eliminate inter-symbol interference, and output the filtered data to the parallel capture module; The parallel capture module is used to perform parallel capture of the matched filtered data to achieve coarse synchronization of the local codeword and the received data, obtain a pseudocode synchronization identifier and a synchronization routing identifier, output the pseudocode synchronization identifier to the code generator, and output the received parallel data and the synchronization routing identifier to the first data adjustment module; The code generator is used to output the spread spectrum code to the first data adjustment module under the instruction of the pseudo code synchronization mark; The first data adjustment module is used to adjust the input parallel data according to the synchronization routing identifier, and adjust the data delay and sample point of the adjusted parallel data and spread spectrum code according to the advance or lag indication output by the first tracking detection module, and output the adjusted parallel data and spread spectrum code to the first correlator group; The first correlator group is used to despread the input parallel data using the spread spectrum code according to the spread spectrum ratio set in the frame header, output the leading branch, the middle branch and the lagging branch data to the first tracking and monitoring module, output the middle branch data to the rate analysis module, and output the input parallel data and the spread spectrum code to the data processing module; The first tracking and detecting module is used to identify the data of the leading branch, the intermediate branch and the lagging branch, obtain the leading or lagging indication, and output it to the first data adjustment module; The rate analysis module is used to match the intermediate branch data with different rate indication fields to obtain the data rate value and output it to the second correlator and the data processing module; The data processing module is used to store and read the parallel data and spread spectrum code output by the first correlator group according to the processing delay of the rate analysis module, and output the parallel data and spread spectrum code to the second data adjustment module; The second correlator group generates a corresponding data spreading ratio according to the data rate value output by the rate analysis module, despreads the input parallel data and the spreading code according to the data spreading ratio, outputs the leading branch, the middle branch and the lagging branch data to the second tracking and detection module, and outputs the middle branch data to the carrier recovery module; The second tracking and detection module is used to identify the leading branch, the middle branch and the lagging branch data, and output the leading or lagging indication to the second data adjustment module; The second data adjustment module is used for adjusting the delay and sample points of the input data and the spread spectrum code according to the advance or lag indication output by the second tracking and detection module, and then outputting the parallel data and the spread spectrum code to the second correlator group; The carrier recovery module is used to estimate the carrier frequency and phase of the correlation demodulation intermediate branch data output by the second correlator group, and compensate it to the correlation demodulation intermediate branch data to realize carrier phase recovery of the demodulated data for subsequent decoding processing.

2. The adaptive rate burst spread spectrum demodulation device for broadband anti-interference communication according to claim 1, characterized in that: The first tracking detection module and the second tracking detection module compare the input leading, lagging and middle three-way despread data after power accumulation. If the leading branch is greater than the other two, an leading indication is output; if the lagging branch is greater than the other two, a lagging indication is output; otherwise, no indication is output.

3. The adaptive rate burst spread spectrum demodulation device for broadband anti-interference communication according to claim 1, characterized in that: The first data adjustment module and the second data adjustment module perform two chip data delays on the input parallel data and spread spectrum code, output a chip-delayed spread spectrum code, and adjust the data sample points according to the advance or lag indication, adjust the sampling points backward for the advance indication, and adjust the sampling points forward for the lag indication, otherwise output data with a chip delay.

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