Electroluminescent display device

Abstract

An electroluminescent display device is disclosed. The electroluminescent display device includes a plurality of pixels. Each of the plurality of pixels includes a drive element including a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level drive voltage; a light emitting device connected between the source node and an input terminal of a low-level drive voltage, configured to emit light during a light emitting period in response to a drive current applied from the drive element; and an internal compensation circuit including a first capacitor connected to the first gate node and the source node, configured to sample a threshold voltage of the drive element during a sampling period preceding the light emitting period to reflect the sampled threshold voltage in a gate-source voltage of the drive element. A sampling boost voltage that increases a sampling current flowing in the drive element is applied to the second gate electrode of the drive element during the sampling period.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2021-0180763, filed on December 16, 2021, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] This disclosure relates to electroluminescent display devices. Background Technology

[0004] An electroluminescent display device includes a plurality of pixels arranged in a matrix, and image data synchronized with a scan signal is supplied to the pixels, thereby enabling the pixels to achieve brightness corresponding to the image data. Each of the plurality of pixels includes a driving element that generates a driving current corresponding to the image data and a light-emitting device that emits light having a brightness proportional to the level of the driving current.

[0005] The level of the drive current is determined based on the gate-source voltage and the threshold voltage of the drive element. However, in a pixel, the threshold voltage of the drive element may shift due to pixel process variations and degradation of the drive element caused by increased usage time.

[0006] The brightness achieved in a pixel is proportional to the level of the driving current. Therefore, when the threshold voltage of the driving element differs between pixels, brightness discrepancies may occur in pixels that have received the same image data. Such brightness discrepancies degrade display quality. Summary of the Invention

[0007] In order to overcome the aforementioned problems of the related technologies, this disclosure provides an electroluminescent display device in which the threshold voltage of the driving element is sampled and compensated during the operation of the pixel, so that the brightness achieved in the pixel is independent of the change of the threshold voltage.

[0008] This disclosure provides an electroluminescent display device capable of accurately sampling the threshold voltage of the driving element during pixel operation.

[0009] To achieve these and other advantages and for the purposes of this disclosure, as embodied and broadly described herein, an electroluminescent display device includes a plurality of pixels, each of the plurality of pixels including: a driving element including a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; a light-emitting device connected between the source node and an input of a low-level driving voltage, the light-emitting device being configured to emit light in response to a driving current applied from the driving element during a light-emitting period; and an internal compensation circuit including a first capacitor connected to the first gate node and the source node, the internal compensation circuit being configured to sample a threshold voltage of the driving element during a sampling period prior to the light-emitting period to reflect the sampled threshold voltage in the gate-source voltage of the driving element, wherein, during the sampling period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element.

[0010] In another aspect of this disclosure, an electroluminescent display device includes a plurality of pixels, wherein each of the plurality of pixels includes: a driving element including a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; a light-emitting device connected between the source node and an input terminal of a low-level driving voltage, the light-emitting device being configured to emit light in response to a driving current applied from the driving element during a light-emitting period; and an internal compensation circuit including a first capacitor connected to the first gate node and the source node, the internal compensation circuit being configured to sample a threshold voltage of the driving element during a sampling period prior to the light-emitting period to reflect the sampled threshold voltage in the gate-source voltage of the driving element, wherein during the sampling period prior to the light-emitting period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element, and during a programming period between the sampling period and the light-emitting period, an image quality compensation voltage less than the sampling enhancement voltage is applied to the second gate electrode of the driving element. Attached Figure Description

[0011] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the specification, serve to explain the principles of the disclosure. In the drawings:

[0012] Figure 1 This is a block diagram illustrating an electroluminescent display device according to an embodiment of the present disclosure;

[0013] Figure 2 It is an equivalent circuit diagram of the pixel according to the first embodiment;

[0014] Figure 3 This is an equivalent circuit diagram of a pixel according to the second embodiment;

[0015] Figure 4 It is an equivalent circuit diagram of a pixel according to the third embodiment;

[0016] Figure 5 This is an equivalent circuit diagram of a pixel according to the fourth embodiment;

[0017] Figure 6 It is a driving waveform diagram of the pixel according to the first to fourth embodiments;

[0018] Figure 7 This is an equivalent circuit diagram of a pixel according to the fifth embodiment;

[0019] Figure 8 and Figure 9 It is a driving waveform diagram of the pixel according to the fifth embodiment; and

[0020] Figure 10 This is a graph showing the characteristic curves of the driving elements included in the pixel according to the fifth embodiment. Detailed Implementation

[0021] In the following description, this disclosure will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of this disclosure are illustrated. The same reference numerals throughout refer to the same elements. In the following description, detailed descriptions of relevant known functions or configurations will be omitted where it is determined that such detailed descriptions unnecessarily obscure the essential points of this disclosure. Embodiments of this specification will be described in detail below with reference to the accompanying drawings.

[0022] In electroluminescent display devices, pixel circuitry may include one or more N-channel (NMOS) transistors and P-channel (PMOS) transistors. A transistor may be a three-electrode device comprising a gate, a source, and a drain. The source may be the electrode that supplies charge carriers to the transistor. In a transistor, charge carriers may begin to flow from the source. The drain may be the electrode that allows charge carriers to flow out of the transistor. In a transistor, charge carriers flow from the source to the drain. In an N-channel transistor, since the charge carriers are electrons, the source voltage may be lower than the drain voltage, causing electrons to flow from the source to the drain. In an N-channel transistor, current can flow from the drain to the source. In a P-channel transistor, since the charge carriers are holes, the source voltage may be greater than the drain voltage, causing holes to flow from the source to the drain. In a P-channel transistor, since holes flow from the source to the drain, current can flow from the source to the drain. It should be noted that the source and drain of a transistor are not fixed. For example, the source and drain of a transistor can switch based on the voltage applied to them. Therefore, this disclosure is not limited to the source and drain of a transistor.

[0023] The gate signal applied to a pixel can swing between a gate-on voltage and a gate-off voltage. The gate-on voltage can be set to a voltage greater than the transistor's threshold voltage, and the gate-off voltage can be set to a voltage less than the transistor's threshold voltage. The transistor can turn on in response to the gate-on voltage and turn off in response to the gate-off voltage. In an N-channel transistor, the gate-on voltage can be a gate high voltage (VGH), and the gate-off voltage can be a gate low voltage (VGL). In a P-channel transistor, the gate-on voltage can be a gate low voltage (VGL), and the gate-off voltage can be a gate high voltage (VGH).

[0024] Figure 1 This is a block diagram illustrating an electroluminescent display device according to an embodiment of the present disclosure.

[0025] Reference Figure 1 An electroluminescent display device according to embodiments of this disclosure may include a display panel 10, a timing controller 11, a data driver 12, a gate driver 13, and a power supply circuit 16. Figure 1 In this process, all or some of the timing controller 11, data driver 12, and power supply circuit 16 may be integrated into a driver integrated circuit (IC).

[0026] In the screen displaying the input image in the display panel 10, a first signal line 14 extending along the column direction (or vertical direction) may intersect with a second signal line 15 extending along the row direction (or horizontal direction), and pixels (PIX) may be arranged in a matrix type in the intersection area between the first signal line 14 and the second signal line 15 to construct a pixel array. The first signal line 14 may be a data line supplying data voltage thereto, and the second signal line 15 may be a gate line supplying gate signals thereto.

[0027] A pixel array can include multiple pixel lines. Here, a pixel line does not represent a physical signal line, but can be defined as a set of pixels or a block of pixels arranged in a row adjacent to each other in the horizontal direction. Pixels can be grouped into multiple groups and can display various colors. When the pixel group used for color representation is defined as a unit pixel, a unit pixel can include red (R) pixels, green (G) pixels, and blue (B) pixels, and may also include white (W) pixels.

[0028] Each of the pixels can include a light-emitting device and a driving element, the driving element using its gate-source voltage to generate a driving current to drive the light-emitting device.

[0029] A light-emitting device may include an anode electrode, a cathode electrode, and an organic compound layer formed between the electrodes. The organic compound layer may include, but is not limited to, a hole injection layer (HIL), a hole transport layer (HTL), an emissive layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). When a driving current flows in the light-emitting device, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) can move to the emissive layer (EML) to generate excitons, and thus, the emissive layer (EML) can emit visible light.

[0030] The driving element can be implemented as a thin-film transistor (TFT). The electrical characteristics of the driving element (e.g., threshold voltage) should be consistent across all pixel PIXs, but differences may exist between pixel PIXs due to process variations. The electrical characteristics of the driving element may change due to degradation over time, but the degree of change may vary between pixel PIXs. To compensate for these electrical characteristic variations, internal compensation techniques can be applied to electroluminescent display devices. Internal compensation techniques compensate for these variations by sampling the threshold voltage of the driving element using an internal compensation circuit included in the pixel PIX, and by reflecting the sampled threshold voltage in the gate-source voltage of the driving element, ensuring that changes in the threshold voltage do not affect the drive current. The internal compensation circuit may include multiple switching elements and one or more capacitors, all of which are implemented as TFTs.

[0031] Each of the driving and switching elements included in the pixel circuit can be implemented as an oxide transistor. Oxide transistors can use oxides such as indium gallium zinc oxide (IGZO), which combines indium (In), gallium (Ga), zinc (Zn), and oxygen (O), instead of polycrystalline silicon, as the semiconductor material. The electron mobility of oxide transistors can be 10 times or more that of amorphous silicon transistors, and they can be manufactured at a lower cost than low-temperature polycrystalline silicon (LTPS) transistors. Furthermore, due to the low turn-off current of oxide transistors, drive stability and reliability are high in low-speed drives with relatively long transistor turn-off periods. Therefore, oxide transistors can be used in large-screen and high-resolution display panels that require low-power driving or do not require adjusting screen size through LTPS processes.

[0032] However, the electron mobility of oxide transistors can be greater than that of amorphous silicon transistors and less than that of LTPS transistors. Therefore, compared to LTPS transistors, oxide transistors have the following disadvantages: the sampling rate of the threshold voltage of the driving element is relatively slow when performing internal compensation operations. When the threshold voltage of the driving element is not sufficiently sampled within a predetermined sampling time, threshold voltage variations may not be accurately compensated. This problem is particularly pronounced when sampling times are short, and for example, when large-screen and high-resolution display panels are driven at high speeds.

[0033] To address this problem, the pixel circuit according to this embodiment can use a dual-gate driving element, which includes a first gate electrode supplied with a data voltage and a second gate electrode facing the first gate electrode, and the sampling current flowing in the driving element can be increased within a predetermined sampling time by applying a sampling enhancement voltage to the second gate electrode of the driving element.

[0034] Furthermore, in a particular embodiment of the various embodiments described below, the pixel circuit can increase the threshold voltage sampling rate by applying a sampling enhancement voltage to the second gate electrode of the driving element within a predetermined sampling time, and then apply an image quality compensation voltage less than the sampling enhancement voltage to the second gate electrode of the driving element within a programmed time after the predetermined sampling time, thereby reducing the slope of the characteristic curve of the driving element to prevent display trailing during emission.

[0035] A touch sensor for sensing touch input can be further disposed on the pixel array of the display panel 10. The touch sensor can be embedded in the pixel array.

[0036] The pixel array may further include a first power line supplying a high-level driving voltage EVDD thereto, a second power line supplying a low-level driving voltage EVSS thereto, a third power line supplying an initial voltage Vini thereto, and a fourth power line supplying a reference voltage Vref thereto. In certain embodiments of the various embodiments described below, the third power line may be omitted, and in this case, the initial voltage Vini can be supplied to the pixel PIX (see [link to relevant documentation]) via the first signal line 14. Figure 7 Furthermore, the second electric field line can be replaced by a single electrode connected to the light-emitting device above or below it.

[0037] The first to fourth power lines can be connected to the power supply circuit 16.

[0038] Power supply circuit 16 can adjust the DC input voltage supplied from the host system (not shown) using a DC-DC converter to generate the gate turn-on voltage VGH and gate turn-off voltage VGL required for the operation of data driver 12 and gate driver 13, and to generate the high-level drive voltage EVDD, initial voltage Vini, reference voltage Vref, and low-level drive voltage EVSS required for pixel driving. In certain embodiments of the various implementations described below, power supply circuit 16 may include an external power supply for generating sampling enhancement voltages (see [link to relevant documentation]). Figure 2 ), and may include an external power supply for generating image quality compensation voltage (see Figure 7 ).

[0039] The high-level drive voltage EVDD can be greater than the initial voltage Vini, and the initial voltage Vini can be greater than the reference voltage Vref. The reference voltage Vref can be less than or equal to the low-level drive voltage EVSS.

[0040] Timing controller 11 can supply digital image data DATA transmitted from a host system (not shown). Timing controller 11 can receive timing signals from the host system, such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a dot clock DCLK, to generate timing control signals for controlling the operating timing of data driver 12 and gate driver 13. The timing control signals may include a gate timing control signal GDC for controlling the operating timing of gate driver 13 and a data timing control signal DDC for controlling the operating timing of data driver 12.

[0041] The data driver 12 can sample and latch the digital image data DATA input from the timing controller 11 based on the data control signal DDC to generate parallel data. It converts the digital image data DATA into an analog data voltage using a digital-to-analog converter (DAC) based on a gamma reference voltage, and supplies the analog data voltage to the pixel PIX via the first signal line 14. The data voltage can be an analog gamma-compensated voltage corresponding to the image grayscale level to be represented in the pixel PIX. The data driver 12 can be configured with multiple source driver ICs.

[0042] The source driver IC may include a shift register, a latch, a level shifter, a DAC, and an output buffer. The shift register can shift a clock input from the timing controller 11 to sequentially output clocks for data sampling. The latch can sample and latch digital image data DATA according to the sampling clock sequence sequentially input from the shift register to simultaneously output the latched image data DATA. The level shifter can adjust the voltage of the image data input from the latch to the input voltage range of the DAC, and the DAC can convert the image data DATA from the level shifter into a data voltage and supply the data voltage to the first signal line 14 via the output buffer. In certain embodiments of the various implementations described below, the source driver IC may receive an initial voltage from the power supply circuit 60 and may alternately supply the data voltage and the initial voltage to the first signal line 14 (see [link to implementation details]). Figure 7 and Figure 8 ).

[0043] The gate driver 13 can generate a gate signal based on the gate control signal GDC and supply the gate signal to the second signal line 15. The gate driver 13 may include multiple gate driver ICs, each including a gate shift register, a level shifter for converting the output signal of the gate shift register into a swing width suitable for TFT driving of the pixel, and an output buffer. Furthermore, the gate driver 13 can be directly mounted on the substrate of the display panel 10 based on the in-panel gate driver (GIP) type. In the GIP type, the level shifter can be mounted on a printed circuit board (PCB), and the gate shift register can be located in the bezel area, which is a non-display area of ​​the display panel 10.

[0044] A gate shift register may include multiple output stages connected to each other in a cascaded manner. Each output stage may be independently connected to a gate line and may output a gate signal to the gate line. The gate signal used to drive a pixel arranged in a pixel line and the number of output stages can be determined based on the number of corresponding gate lines.

[0045] In some embodiments described below, the output stage, gate signal, and second signal line 15 for driving pixels arranged in a pixel line can each be configured as three (see [link]). Figures 2 to 5 ).

[0046] In some embodiments described below, the output stage, gate signal, and second signal line 15 for driving pixels arranged in a pixel line can each be configured as five (see [link]). Figure 7 ).

[0047] The host system can be an application processor (AP) in mobile devices, wearable devices, and virtual / augmented reality devices. Furthermore, the host system can be a motherboard in systems such as television systems, set-top boxes, navigation systems, personal computers (PCs), and home theater systems, but is not limited to these.

[0048] Figure 2 It is an equivalent circuit diagram of a pixel according to the first embodiment. Figure 6 It is a driving waveform diagram of the pixel according to the first embodiment.

[0049] Reference Figure 2 A pixel (PIX) can include a driving element (DT), a light-emitting device (EL), and internal compensation circuitry. For example... Figure 6 As shown, the pixel PIX can be driven in the order of initial time period P1, sampling time period P2, programming time period P3, and emission time period P4.

[0050] The driving element DT can generate a driving current for driving the light-emitting device EL during the light-emitting period P4. The first gate electrode G1 of the driving element DT can be connected to the first gate node DTG1, its drain electrode can be connected to the input of the high-level driving voltage EVDD, and its source electrode can be connected to the source node DTS.

[0051] The driving element DT may further include a second gate electrode G2 facing the first gate electrode G1. The second gate electrode G2 of the driving element DT may be connected to an external power supply VTS, and during the sampling period P2 for sampling the threshold voltage Vth of the driving element DT, a sampling enhancement voltage VX may be supplied from the external power supply VTS to the second gate electrode G2. The sampling enhancement voltage VX may increase the sampling current flowing in the driving element DT during the sampling period P2, thereby increasing the sampling rate of the threshold voltage Vth of the driving element DT. When the sampling rate of the driving element DT is increased, the threshold voltage Vth of the driving element DT can be accurately sampled in a high-resolution and high-speed model with a short sampling period P2.

[0052] The light-emitting device (EL) can be connected between the source node DTS and the input of the low-level drive voltage EVSS, and can emit light in response to the drive current from the driving element DT during the light-emitting period P4. The EL may include an anode electrode connected to the source node DTS, a cathode electrode connected to the input of the low-level drive voltage EVSS, and a light-emitting layer between the electrodes. The EL can be implemented as an organic light-emitting diode (OLED) including an organic light-emitting layer, or as an inorganic light-emitting diode including an inorganic light-emitting layer.

[0053] The internal compensation circuit can be used to compensate for the threshold voltage variation of the drive element DT. The internal compensation circuit can sample the threshold voltage Vth of the drive element DT during the sampling period P2, and can reflect the sampled threshold voltage Vth in the gate-source voltage Vgs (or VDTG1-VDTS) of the drive element DT. Therefore, it can compensate for the threshold voltage variation of the drive element DT so that the threshold voltage variation of the drive element DT does not affect the drive current.

[0054] Furthermore, the internal compensation circuit can initialize the first gate node DTG1 and source node DTS of the pixel PIX during the initial period P1, and can apply the data voltage Vdata to the first gate node DTG1 during the programming period P3 to program the gate-source voltage Vgs of the driving element DT based on the drive current. During the emission period P4, the light-emitting device EL can emit light in response to the drive current already programmed during the programming period P3. During the emission period P4, the equation for the drive current contributing to the emission of the light-emitting device EL can be K(Vgs-Vth).2 Here, K can represent a constant value determined based on the electron mobility and channel capacity of the driving element. In the equation for the driving current, since the threshold voltage Vth of the driving element DT is pre-reflected in the gate-source voltage Vgs of the driving element DT, the driving current is not affected by the threshold voltage Vth of the driving element DT, and therefore, changes in the threshold voltage Vth of the driving element DT can be compensated.

[0055] The internal compensation circuit may include a first capacitor C1 connected between the first gate node DTG1 and the source node DTS, and may also include a first switching element ST1, a second switching element ST2 and a third switching element ST3.

[0056] The first capacitor C1 can store the threshold voltage Vth of the driving element DT sampled during the sampling period P2, so as to reflect the threshold voltage Vth of the driving element DT in the gate-source voltage Vgs of the driving element DT. Furthermore, it can store the data voltage Vdata during the programming period P3, so as to further reflect the data voltage Vdata in the gate-source voltage Vgs of the driving element DT. By using the first capacitor C1, during the programming period P3, the threshold voltage Vth and the data voltage Vdata of the driving element DT can be reflected in the gate-source voltage Vgs of the driving element DT.

[0057] In response to the first gate signal INIT, the first switching element ST1 can apply an initial voltage Vini to the first gate node DTG1 from the initial period P1 to the sampling period P2. The initial voltage Vini can be a sufficiently high voltage to turn on the driving element DT. The gate electrode of the first switching element DT1 can be connected to the first gate line 151, its drain electrode can be connected to the input of the initial voltage Vini, and its source electrode can be connected to the first gate node DTG1.

[0058] The first gate signal INIT, input via the first gate line 151, can be input at an on level from the initial period P1 to the sampling period P2, and at an off level from the programming period P3 to the light-emitting period P4. In response to the first gate signal INIT, the first switching element ST1 can be turned on from the initial period P1 to the sampling period P2, and turned off from the programming period P3 to the light-emitting period P4.

[0059] In response to the second gate signal SEN, the second switching element ST2 can apply a reference voltage Vref, which is lower than the initial voltage Vini, to the source node DTS during the initial time period P1. The reference voltage Vref can be a sufficiently low voltage to turn on the driving element DT. That is, the voltage difference between the initial voltage Vini and the reference voltage Vref can be sufficiently greater than the threshold voltage Vth of the driving element DT. The gate electrode of the second switching element ST2 can be connected to the second gate line 152, its drain electrode can be connected to the input of the reference voltage Vref, and its source electrode can be connected to the source node DTS.

[0060] The second gate signal SEN, input via the second gate line 152, can be input at an ON level only during the initial period P1, and at an OFF level during the other periods P2 to P4. In response to the second gate signal SEN, the second switching element ST2 can be ON only during the initial period P1, and OFF during the other periods P2 to P4.

[0061] In response to the third gate signal, the third switching element ST3 can apply a data voltage Vdata corresponding to the image data to the first gate node DTG1 during the third programming period P3. The gate electrode of the third switching element ST3 can be connected to the third gate line 153, its drain electrode can be connected to the data line 14, and its source electrode can be connected to the first gate node DTG1.

[0062] The third gate signal SCAN, input via the third gate line 153, can be input at an ON level only during the programming period P3, and at an OFF level during the other periods P1, P2, and P4. In response to the third gate signal SCAN, the third switching element ST3 can be ON only during the programming period P3, and OFF during the other periods P1, P2, and P4.

[0063] In pixel PIX, as in Figure 6 In this process, when the gate-source voltage Vgs of the driving element DT is set to "Vini-Vref" based on the turn-on operation conditions during the initial period P1, the sampling current can flow between the drain and source of the driving element DT based on the turn-on operation during the sampling period P2. The voltage level of the source node DTS of the driving element DT can be increased based on the voltage level of the first gate node DTG1 (i.e., the initial voltage Vini) based on the sampling current, and the threshold voltage Vth of the driving element DT can be sampled during the sampling period P2.

[0064] When the sampling period P2 is short or the electron mobility of the driving element DT is low, it may be difficult to accurately sample the threshold voltage Vth of the driving element DT during the predetermined sampling period P2. To solve this problem, a sampling enhancement voltage VX can be applied to the second gate electrode G2 of the driving element DT from an external power supply VTS. When the sampling enhancement voltage VX is applied to the second gate electrode G2 of the driving element DT, the sampling current can be increased during the sampling period P2, and therefore, the threshold voltage Vth of the driving element DT can be sampled quickly and accurately.

[0065] The inventors have conducted experiments to confirm the voltage application condition that results in the highest sampling current during the sampling period P2. This voltage application condition allows the same voltage to be applied to the first gate electrode G1 and the second gate electrode G2 of the drive element DT. Therefore, the sampling enhancement voltage VX can be applied at the same voltage level as the initial voltage Vini, and the first gate electrode G1 and the second gate electrode G2 can be at the same potential during the sampling period P2.

[0066] During the programming period P3, the threshold voltage Vth and data voltage Vdata of the driving element DT can be reflected in the gate-source voltage Vgs of the driving element DT, and during the light emission period P4, the light-emitting device EL can emit light in response to a driving current independent of the threshold voltage Vth of the driving element DT.

[0067] Figure 3 This is an equivalent circuit diagram of a pixel according to the second embodiment. Figure 6 It is a driving waveform diagram of the pixel according to the second embodiment.

[0068] Figure 3 The pixel PIX can differ in the connection configuration of the second gate electrode G2 of the driving element DT. Figure 2 The pixel PIX, and in other elements besides the connection configuration. Figure 3 The pixel PIX can be with Figure 2 The pixel counts are basically the same for all PIXs.

[0069] Reference Figure 3 and Figure 6 The second gate electrode G2 of the driving element DT can be connected to the source electrode of the driving element DT, and a sampling enhancement voltage VX can be supplied from the source node DTS of the driving element DT during the sampling period P2. When the second gate electrode G2 and the source electrode of the driving element DT are connected to each other, the separate power line for connecting to an external power supply can be omitted, and the pixel array can be simplified.

[0070] During the sampling period P2, the sampling enhancement voltage VX applied from the source electrode of the driving element DT can be a variable voltage that increases toward the initial voltage Vini. That is, during the sampling period P2, the sampling enhancement voltage VX can increase from the reference voltage Vref to the saturation voltage, and the saturation voltage can be smaller than the threshold voltage Vth of the driving element than the initial voltage Vini.

[0071] Since the voltage at the second gate electrode G2 of the driving element DT increases toward the initial voltage Vini during the sampling period P2, the sampling current can be increased and the sampling performance can be enhanced.

[0072] Figure 4 This is an equivalent circuit diagram of a pixel according to the third embodiment. Figure 6 It is a driving waveform diagram of the pixel according to the third embodiment.

[0073] Figure 4 The pixel PIX can differ in the connection configuration of the second gate electrode G2 of the driving element DT. Figure 2 The pixel PIX, and in other elements besides the connection configuration. Figure 4 The pixel PIX can be with Figure 2 The pixel counts are basically the same for all PIXs.

[0074] Reference Figure 4 and Figure 6 The second gate electrode G2 of the driving element DT can be connected to the first gate electrode G1 of the driving element DT, and a sampling enhancement voltage VX can be supplied from the first gate electrode G1 of the driving element DT during the sampling period P2. When the first gate electrode G1 and the second gate electrode G2 of the driving element DT are connected to each other, the separate power line for connection to an external power supply can be omitted, and the pixel array can be simplified.

[0075] During the sampling period P2, the first gate electrode G1 and the second gate electrode G2 of the driving element DT can have the same voltage (e.g., the initial voltage Vini). When the first gate electrode G1 and the second gate electrode G2 of the driving element DT are at the same potential during the sampling period P2, the sampling current can be maximized, and the sampling performance can be maximized.

[0076] Figure 5 This is an equivalent circuit diagram of a pixel according to the fourth embodiment. Figure 6 It is a driving waveform diagram of the pixel according to the fourth embodiment.

[0077] Figure 5 The pixel PIX can differ in the connection configuration of the second gate electrode G2 of the driving element DT. Figure 2 The pixel PIX, and in other elements besides the connection configuration. Figure 5 The pixel PIX can be with Figure 2 The pixel counts are basically the same for all PIXs.

[0078] and Figure 2 Compared to the pixel PIX, Figure 5 The pixel PIX may also include a second capacitor C2 and a fourth switching element ST4. The second capacitor C2 and the fourth switching element ST4 may be included in the internal compensation circuit of the pixel PIX, and the stability of pixel operation associated with the supply and storage of the sampling enhancement voltage VX may be increased.

[0079] The second capacitor C2 can be connected to the source node DTS of the driving element DT and the second gate node DTG2 connected to the second gate electrode G2 of the driving element DT. The second capacitor C2 can store the sampling enhancement voltage VX applied to the second gate electrode G2 during the sampling period P2.

[0080] In response to the first gate signal INIT, the fourth switching element ST4 can apply the initial voltage Vini to the second gate node DTG2 from the initial period P1 to the sampling period P2. The gate electrode of the fourth switching element ST4 can be connected to the first gate line 151, its drain electrode can be connected to the input of the initial voltage Vini, and its source electrode can be connected to the second gate node DTG2. In response to the first gate signal INIT, the fourth switching element ST4 can be turned on from the initial period P1 to the sampling period P2, and turned off from the programming period P3 to the emission period P4.

[0081] The second gate electrode G2 of the driving element DT can be supplied with an initial voltage Vini as a sampling enhancement voltage VX through the fourth switching element ST4 during the sampling period P2. During the sampling period P2, the first gate electrode G1 and the second gate electrode G2 of the driving element DT can have the same voltage (e.g., the initial voltage Vini). When the first gate electrode G1 and the second gate electrode G2 of the driving element DT are at the same potential during the sampling period P2, the sampling current can be maximized, and the sampling performance can be maximized.

[0082] Figure 7 This is an equivalent circuit diagram of a pixel according to the fifth embodiment. Figure 8 and Figure 9 It is a driving waveform diagram of the pixel according to the fifth embodiment. Figure 10 This is a graph showing the characteristic curves of the driving elements included in the pixel according to the fifth embodiment.

[0083] Reference Figure 7 A pixel (PIX) can include a driving element (DT), a light-emitting device (EL), and internal compensation circuitry. For example... Figure 8As shown, the pixel PIX can be driven in the order of initial time period P1, sampling time period P2, programming time period P3, and emission time period P4.

[0084] The driving element DT can generate a driving current for driving the light-emitting device EL during the light-emitting period P4. The first gate electrode G1 of the driving element DT can be connected to the first gate node DTG1, the high-level driving voltage EVDD can be input to its drain electrode, and its source electrode can be connected to the source node DTS.

[0085] The driving element DT may further include a second gate electrode G2 facing the first gate electrode G1. The second gate electrode G2 of the driving element DT may be supplied with a sampling enhancement voltage VX during a sampling period P2 for sampling the threshold voltage Vth of the driving element DT, and may be supplied with an image quality compensation voltage VY smaller than the sampling enhancement voltage VX during a programming period P3 following the sampling period P2. The sampling enhancement voltage VX may increase the sampling current flowing in the driving element DT during the sampling period P2, thereby increasing the sampling rate of the threshold voltage Vth of the driving element DT. When the sampling rate of the driving element DT increases, the threshold voltage Vth of the driving element DT can be accurately sampled in a high-resolution and high-speed model with a short sampling period P2. The image compensation voltage VY may ensure that the voltage level of the second gate electrode G2 of the driving element DT is smaller than the voltage level of the first gate electrode G1 of the driving element DT during the programming period P3, thereby preventing display trailing.

[0086] The light-emitting device (EL) can be connected between the source node DTS and the input of the low-level drive voltage EVSS, and can emit light in response to the drive current from the driving element DT during the light-emitting period P4. The EL may include an anode electrode connected to the source node DTS, a cathode electrode connected to the input of the low-level drive voltage EVSS, and a light-emitting layer between the electrodes. The EL can be implemented as an organic light-emitting diode (OLED) including an organic light-emitting layer, or as an inorganic light-emitting diode including an inorganic light-emitting layer.

[0087] The internal compensation circuit can be used to compensate for the threshold voltage variation of the driving element DT. During the sampling period P2, the internal compensation circuit can sample the threshold voltage Vth of the driving element DT based on the initial voltage Vini of the first gate node DTG1 and the second gate node DTG2 applied to the pixel PIX as a sampling enhancement voltage VX, and can reflect the sampled threshold voltage Vth in the gate-source voltage Vgs (or VDTG1-VDTS) of the driving element DT. Therefore, the threshold voltage variation of the driving element DT can be compensated so that the threshold voltage variation of the driving element DT does not affect the driving current.

[0088] Furthermore, the internal compensation circuit can initialize the source node DTS and the first gate node DTG1 and second gate node DTG2 of pixel PIX during the initial period P1, and can apply a data voltage Vdata greater than the initial voltage Vini to the first gate electrode G1 of the driving element DT during the programming period P3 to program the gate-source voltage Vgs of the driving element DT based on the driving current. Additionally, during the programming period P3, the internal compensation circuit can apply an image quality compensation voltage VY less than the initial voltage Vini to the second gate electrode G2 of the driving element DT to program the gate-source voltage Vgs of the driving element DT based on the driving current. The image quality compensation voltage VY can be less than the sampling enhancement voltage VX.

[0089] During the emission period P4, the light-emitting device EL can emit light in response to the drive current that was programmed during the programming period P3. The equation for the drive current contributing to the emission of the light-emitting device EL during the emission period P4 can be K(Vgs-Vth). 2 Here, K can represent a constant value determined based on the electron mobility and channel capacity of the driving element. In the equation for the driving current, since the threshold voltage Vth of the driving element DT is pre-reflected in the gate-source voltage Vgs of the driving element DT, the driving current is not affected by the threshold voltage Vth of the driving element DT, and therefore, changes in the threshold voltage Vth of the driving element DT can be compensated.

[0090] The internal compensation circuit may include a first capacitor C1 connected between the first gate node DTG1 and the source node DTS, and may also include a first switching element ST1, a second switching element ST2, a third switching element ST3, a fourth switching element ST4, a fifth switching element ST5, and a second capacitor C2.

[0091] The first capacitor C1 can store the threshold voltage Vth of the driving element DT sampled during the sampling period P2, so as to reflect the threshold voltage Vth of the driving element DT in the gate-source voltage Vgs of the driving element DT. Furthermore, it can store the data voltage Vdata during the programming period P3, so as to further reflect the data voltage Vdata in the gate-source voltage Vgs of the driving element DT. By using the first capacitor C1, during the programming period P3, the threshold voltage Vth and the data voltage Vdata of the driving element DT can be reflected in the gate-source voltage Vgs of the driving element DT.

[0092] In response to the first gate signal SCAN1, the first switching element ST1 can apply a reference voltage Vref to the source node DTS during the initial time period P1. The reference voltage Vref can be a voltage sufficiently smaller than the initial voltage Vini to turn off the light-emitting device EL. The gate electrode of the first switching element ST1 can be connected to the first gate line 151, its drain electrode can be connected to the input of the reference voltage Vref, and its source electrode can be connected to the source node DTS.

[0093] The first gate signal SCAN1, input via the first gate line 151, can be input at an ON level only during the initial period P1, and at an OFF level during other periods P2 to P4. In response to the first gate signal SCAN1, the first switching element ST1 can be ON only during the initial period P1, and OFF during other periods P2 to P4.

[0094] In response to the second gate signal SCAN2, the second switching element ST2 can apply an initial voltage Vini to the first gate node DTG1 from the initial period P1 until the sampling period P2, and can apply a data voltage Vdata to the first gate node DTG1 during the programming period P3. The initial voltage Vini can be a sufficiently high voltage to turn on the driving element DT. That is, the voltage difference between the initial voltage Vini and the reference voltage Vref can be sufficiently greater than the threshold voltage Vth of the driving element DT. The data voltage Vdata can correspond to image data and can be greater than the initial voltage Vini. The gate electrode of the second switching element ST2 can be connected to the second gate line 152, its drain electrode can be connected to the data line 14, and its source electrode can be connected to the first gate node DTG1.

[0095] The second gate signal SCAN2, input via the second gate line 152, can be input at an on level during the initial period P1, the sampling period P2, and the programming period P3, and at an off level during the light-emitting period P4. In response to the second gate signal SCAN2, the second switching element ST2 can be turned on during the initial period P1, the sampling period P2, and the programming period P3, and can be turned off during the light-emitting period P4.

[0096] In response to the third gate signal SCAN3, the third switching element ST3 can electrically short-circuit the first gate electrode G1 and the second gate electrode G2 of the driving element DT from the initial period P1 to the sampling period P2, and can electrically disconnect the first gate electrode G1 and the second gate electrode G2 of the driving element DT from the programming period P3 to the emission period P4. When the first gate electrode G1 and the second gate electrode G2 of the driving element DT are short-circuited to each other during the sampling period P2, the initial voltage Vini can be applied to the second gate electrode G2 of the driving element DT as the sampling enhancement voltage VX. During the sampling period P2, the first gate electrode G1 and the second gate electrode G2 of the driving element DT can have the same voltage (e.g., the initial voltage Vini).

[0097] The gate electrode of the third switching element ST3 can be connected to the third gate line 153, its drain electrode can be connected to the first gate node DTG1, and its source electrode can be connected to the second gate node DTG2. In response to the third gate signal SCAN3, the third switching element ST3 can be turned on from the initial period P1 to the sampling period P2, and can be turned off from the programming period P3 to the light emission period P4.

[0098] In response to the fourth gate signal SCAN4, the fourth switching element ST4 can apply an image quality compensation voltage VY, which is less than the initial voltage Vini, to the second gate electrode G2 of the driving element DT during the programming period P3.

[0099] The gate electrode of the fourth switching element ST4 can be connected to the fourth gate line 154, its drain electrode can be connected to the external power supply VTS included in the power supply circuit, and its source electrode can be connected to the second gate node DTG2. In response to the fourth gate signal SCAN4, the fourth switching element ST4 can be turned on only during the programming period P3 and can be turned off during other periods P1, P2, and P4.

[0100] In response to the fifth gate signal SCAN5, the fifth switching element ST5 can electrically disconnect the drain electrode of the driving element DT from the input terminal of the high-level driving voltage EVDD during the initial period P1, and can apply the high-level driving voltage EVDD to the drain electrode of the driving element DT from the sampling period P2 to the emission period P4.

[0101] The gate electrode of the fifth switching element ST5 can be connected to the fifth gate line 155, its drain electrode can be connected to the input of the high-level drive voltage EVDD, and its source electrode can be connected to the drain electrode of the driving element DT. In response to the fifth gate signal SCAN5, the fifth switching element ST5 can be turned off only during the initial period P1, and can be turned on during other periods P1, P2, and P4.

[0102] The second capacitor C2 can be connected to the second gate node DTG2 and the source node DTS. The second capacitor C2 can store the sampling enhancement voltage VX during the sampling period P2 and the image quality compensation voltage VY during the programming period P3.

[0103] In pixel PIX, as in Figure 7 and Figure 8 In this process, when the gate-source voltage Vgs of the driving element DT is set to "Vini-Vref" based on the turn-on operation conditions during the initial period P1, the sampling current can flow between the drain and source of the driving element DT based on the turn-on operation during the sampling period P2. The voltage level of the source node DTS of the driving element DT can be increased based on the voltage level of the first gate node DTG1 (i.e., the initial voltage Vini) based on the sampling current, and the threshold voltage Vth of the driving element DT can be sampled during the sampling period P2.

[0104] When the sampling period P2 is short or the electron mobility of the driving element DT is low, it may be difficult to accurately sample the threshold voltage Vth of the driving element DT during the predetermined sampling period P2. To solve this problem, the first gate electrode G1 and the second gate electrode G2 of the driving element DT can be short-circuited to each other during the sampling period P2, and therefore, a sampling enhancement voltage VX can be applied from the first gate electrode G1 to the second gate electrode G2 of the driving element DT. When the sampling enhancement voltage VX is applied to the second gate electrode G2 of the driving element DT, the sampling current can be increased during the sampling period P2, and therefore, the threshold voltage Vth of the driving element DT can be sampled quickly and accurately.

[0105] Since the sampling enhancement voltage VX is applied at the same voltage level as the initial voltage Vini, and the first gate electrode G1 and the second gate electrode G2 are at the same potential during the sampling period P2, sampling performance can be maximized. In other words, as in Figure 10 In the curve “A”, the sampling current can be maximized and the sampling performance can be maximized when the first gate electrode G1 and the second gate electrode G2 of the driving element DT have the same voltage during the sampling period P2 (e.g., the initial voltage Vini (or VX)).

[0106] The first gate electrode G1 and the second gate electrode G2 of the driving element DT can be disconnected from each other during the programming period P3. During the programming period P3, a data voltage Vdata greater than the initial voltage Vini can be applied to the first gate electrode G1 of the driving element DT, and an image quality compensation voltage VY less than the initial voltage Vini can be applied to the second gate electrode G2 of the driving element DT.

[0107] The image quality compensation voltage VY, data voltage Vdata, and sampling threshold voltage Vth of the driving element DT can be further reflected in the gate-source voltage Vgs of the driving element DT, and during the light-emitting period P4, the light-emitting device EL can emit light in response to a driving current independent of the threshold voltage Vth of the driving element DT.

[0108] In addition, the image quality compensation voltage VY can, during the programming period P3, make the voltage level of the second gate electrode G2 of the driving element DT less than the voltage level of the first gate electrode G1 of the driving element DT, thereby preventing the occurrence of display trailing and improving image quality. In other words, as shown in Figure 10 the graph “B” of, when the first gate electrode G1 and the second gate electrode G2 of the driving element DT have different voltages (e.g., data voltage Vdata and image quality compensation voltage VY (VY < Vdata)) during the programming period P3, in the characteristic curve of the driving element, the change slope of the drain current with respect to the gate voltage can be reduced, and thus, the occurrence of display trailing can be prevented.

[0109] The following effects can be achieved in this embodiment.

[0110] In this embodiment, the threshold voltage of the driving element can be sampled and compensated during the operation of the pixel, and thus, the luminance achieved in the pixel is independent of the change in the threshold voltage.

[0111] In this embodiment, the sampling current flowing in the driving element can be increased by applying a sampling enhancement voltage to the second gate electrode of the driving element during the sampling process before the pixel emits light, and thus, even when the sampling time is insufficient or the electron mobility of the driving element is low, the threshold voltage of the driving element can be accurately sampled.

[0112] In this embodiment, the sampling performance can be maximized by applying a sampling enhancement voltage to the first gate electrode and the second gate electrode of the driving element during the sampling process before the pixel emits light, and the occurrence of display trailing can be prevented by applying an image quality enhancement voltage less than the data voltage applied to the first gate electrode of the driving element to the second gate electrode of the driving element during the programming process after the sampling process.

[0113] The effects according to the present disclosure are not limited to the above examples, and various other effects can be included in the specification.

[0114] Although the present disclosure has been specifically shown and described with reference to the exemplary embodiments of the present disclosure, those of ordinary skill in the art will understand that various changes in form and detail can be made therein without departing from the spirit and scope of the present disclosure defined by the appended claims.

Claims

1. An electroluminescent display device, comprising: Multiple pixels, each of the multiple pixels comprising: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device, connected between the source node and the input of a low-level drive voltage, configured to emit light in response to a drive current applied from the driving element during a light-emitting period; and An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period between the sampling period and the emission period to program the gate-source voltage of the driving element based on the driving current.

2. The electroluminescent display device according to claim 1, wherein, The internal compensation circuit also includes: A first switching element is configured to apply an initial voltage to the first gate node in response to a first gate signal from an initial period before the sampling period until the sampling period; A second switching element, configured to apply a reference voltage less than the initial voltage to the source node in response to a second gate signal during the initial time period; and A third switching element is configured to apply the data voltage corresponding to the image data to the first gate node in response to a third gate signal during the programming period.

3. The electroluminescent display device according to claim 2, wherein, The second gate electrode of the driving element is connected to an external power supply, and the sampling enhancement voltage is supplied from the external power supply during the sampling period.

4. The electroluminescent display device according to claim 3, wherein, The sampling enhancement voltage has the same voltage level as the initial voltage, and during the sampling period, the first gate electrode and the second gate electrode of the driving element have the same voltage.

5. The electroluminescent display device according to claim 2, wherein, The second gate electrode of the driving element is connected to the source electrode of the driving element, and the sampling enhancement voltage is supplied from the source electrode during the sampling period.

6. The electroluminescent display device according to claim 5, wherein, During the sampling period, the sampling enhancement voltage increases from the reference voltage to the saturation voltage, and the saturation voltage is lower than the threshold voltage of the driving element than the initial voltage.

7. The electroluminescent display device according to claim 2, wherein, The second gate electrode of the driving element is connected to the first gate electrode of the driving element, and the sampling enhancement voltage is supplied from the first gate electrode during the sampling period.

8. The electroluminescent display device according to claim 7, wherein, The sampling enhancement voltage is the initial voltage, and during the sampling period, the first gate electrode and the second gate electrode of the driving element have the same voltage as the initial voltage.

9. The electroluminescent display device according to claim 2, wherein, The internal compensation circuit also includes: A second capacitor is connected to the source node of the driving element and a second gate node connected to the second gate electrode of the driving element; and A fourth switching element, configured to apply the initial voltage to the second gate node in response to the first gate signal from the initial time period until the sampling time period. During the sampling period, the second gate electrode of the driving element is supplied with the initial voltage as the sampling enhancement voltage through the fourth switching element.

10. The electroluminescent display device according to claim 9, wherein, During the sampling period, the first gate electrode and the second gate electrode of the driving element have the same voltage as the initial voltage.

11. An electroluminescent display device, comprising: Multiple pixels, each of the multiple pixels comprising: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device, connected between the source node and the input of a low-level drive voltage, configured to emit light in response to a drive current applied from the driving element during a light-emitting period; and An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period preceding the light emission period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element. During the programming period between the sampling period and the emission period, an image quality compensation voltage smaller than the sampling enhancement voltage is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period to program the gate-source voltage of the driving element based on the driving current.

12. The electroluminescent display device according to claim 11, wherein, The first and second gate electrodes of the driving element are short-circuited to each other during the sampling period, and the first and second gate electrodes of the driving element are electrically disconnected from each other from the programming period until the light emission period.

13. The electroluminescent display device according to claim 12, wherein, The sampling enhancement voltage is the initial voltage, and during the sampling period, the first gate electrode and the second gate electrode of the driving element have the same voltage as the initial voltage.

14. The electroluminescent display device according to claim 13, wherein, During the programming period, a data voltage greater than the initial voltage is applied to the first gate electrode of the driving element, and an image quality compensation voltage less than the initial voltage is applied to the second gate electrode of the driving element.

15. The electroluminescent display device according to claim 13, wherein, The internal compensation circuit includes: A first switching element is configured to apply a reference voltage less than the initial voltage to the source node during an initial period prior to the sampling period in response to a first gate signal. A second switching element is configured to apply the initial voltage to the first gate node in response to a second gate signal from the initial period to the sampling period, and to apply a data voltage greater than the initial voltage to the first gate node during the programming period; A third switching element is configured to electrically short-circuit the first and second gate electrodes of the driving element in response to a third gate signal from the initial period to the sampling period, and to electrically disconnect the first gate electrode of the driving element from the second gate electrode of the driving element from the programming period to the light emission period. A fourth switching element is configured to apply an image quality compensation voltage, less than the initial voltage, to the second gate electrode of the driving element during the programming period in response to a fourth gate signal; A fifth switching element, configured to electrically disconnect the drain electrode of the driving element from the input of the high-level driving voltage during the initial period in response to a fifth gate signal, and to apply the high-level driving voltage to the drain electrode of the driving element from the sampling period until the emission period; and The second capacitor is connected to the second gate node and the source node, which are connected to the second gate electrode.

16. An electroluminescent display device, comprising: The display panel includes multiple pixels; A data driver configured to supply data voltage to the plurality of pixels; A gate driver configured to supply gate signals to the plurality of pixels; A timing controller configured to generate timing control signals that control the operating timing of the data driver and the gate driver; as well as A power supply circuit is configured to generate the voltage signals required for the operation of the data driver and the gate driver, as well as for pixel driving. Each of the plurality of pixels includes: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device, connected between the source node and the input of a low-level drive voltage, configured to emit light in response to a drive current applied from the driving element during a light-emitting period; and An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period between the sampling period and the emission period to program the gate-source voltage of the driving element based on the driving current.

17. A pixel, comprising: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device connected between the source node and the input of a low-level drive voltage, the light-emitting device being configured to emit light in response to a drive current applied from the drive element during a light-emitting period; as well as An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period between the sampling period and the emission period to program the gate-source voltage of the driving element based on the driving current.

18. An electroluminescent display device, comprising: The display panel includes multiple pixels; A data driver configured to supply data voltage to the plurality of pixels; A gate driver configured to supply gate signals to the plurality of pixels; A timing controller configured to generate timing control signals that control the operating timing of the data driver and the gate driver; as well as A power supply circuit is configured to generate the voltage signals required for the operation of the data driver and the gate driver, as well as for pixel driving. Each of the plurality of pixels includes: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device, connected between the source node and the input of a low-level drive voltage, configured to emit light in response to a drive current applied from the driving element during a light-emitting period; and An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period preceding the light emission period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element. During the programming period between the sampling period and the emission period, an image quality compensation voltage smaller than the sampling enhancement voltage is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period to program the gate-source voltage of the driving element based on the driving current.

19. A pixel, comprising: A driving element, the driving element comprising a first gate electrode connected to a first gate node, a second gate electrode facing the first gate electrode, a source electrode connected to a source node, and a drain electrode supplied with a high-level driving voltage; A light-emitting device connected between the source node and the input of a low-level drive voltage, the light-emitting device being configured to emit light in response to a drive current applied from the drive element during a light-emitting period; as well as An internal compensation circuit, comprising a first capacitor connected to the first gate node and the source node, is configured to sample the threshold voltage of the driving element during a sampling period prior to the emission period, so as to reflect the sampled threshold voltage in the gate-source voltage of the driving element. During the sampling period preceding the light emission period, a sampling enhancement voltage that increases the sampling current flowing in the driving element is applied to the second gate electrode of the driving element. During the programming period between the sampling period and the emission period, an image quality compensation voltage smaller than the sampling enhancement voltage is applied to the second gate electrode of the driving element, and The internal compensation circuit applies a data voltage to the driving element during the programming period to program the gate-source voltage of the driving element based on the driving current.

Images