Heterogeneous nanographie substrate, method for manufacturing and use thereof

Abstract

This invention discloses a heterogeneous nanopatterned substrate, its preparation method, and its applications, belonging to the field of semiconductor technology. This invention utilizes the selectivity of the heterogeneous nanopatterned material and sapphire material to the etching solution, achieving GaN stripping from the substrate without introducing damage through chemical etching. This invention improves epitaxial quality and effectively strips the substrate, effectively solving the uniformity control problem in the wet stripping process, and improving the performance and yield of subsequently fabricated Micro-LEDs.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a heterogeneous nanopatterned substrate, its preparation method, and a method for peeling off LED epitaxial wafers. Background Technology

[0002] Micro-LEDs, as a future-oriented display technology, have great potential in the display market due to their advantages such as high contrast and brightness, high display resolution, and long lifespan. However, some fabrication technologies currently restrict the development of Micro-LEDs, one of which is substrate removal.

[0003] If the sapphire substrate can be removed, the size and volume limitations in the Micro-LED fabrication process will be significantly reduced. The vertically structured Micro-LED after removal will have higher efficiency, and combining it with substrates such as silicon, which are easy to integrate, will greatly expand the application areas of Micro-LEDs. Short-wavelength lasers can effectively remove the GaN epitaxial layer on sapphire. However, due to the uneven energy distribution of the laser, especially the overlap or gaps at the edge of the laser spot, the gallium nitride scanned by the laser spot will suffer severe damage, thereby deteriorating the electrical characteristics of the device.

[0004] Conical or cellular patterned sapphire structures reduce dislocation density in the LED epitaxial layer, improving the internal quantum efficiency of the LED. The patterned sapphire structure also improves the propagation direction of light at the GaN epitaxial layer and sapphire interface, increasing the external quantum efficiency of the LED. Currently, patterned sapphire substrate technology has been widely used in the LED lighting industry. However, traditional micron-scale patterned sapphire substrates cannot effectively mitigate the stress problem caused by lattice mismatch between sapphire and gallium nitride epitaxial layers, making it difficult to fabricate epitaxial wafers with high wavelength uniformity, high internal quantum efficiency, and surface flatness required for Micro-LEDs.

[0005] Nanopatterned substrates (NPSS) have patterns an order of magnitude smaller than ordinary micron-sized patterns, allowing more light to be scattered across a unit area, thus increasing the probability of light being scattered into the emission cone. Secondly, the nanopatterns act similarly to photonic crystals; due to the diffraction effect caused by light incident on the periodic pattern, NPSS can couple with the incident light, modulating the emission light field distribution and increasing the emission probability. However, during laser lift-off on NPSS substrates, the scattering of the laser by the pattern increases the laser energy threshold required for lift-off. The higher energy density can then cause more severe damage or even cracks at the lift-off interface, creating leakage paths that significantly reduce chip yield and severely impact the chip's optoelectronic performance. On the other hand, for Micro-LEDs, as the size shrinks, the sidewall area ratio is much larger than that of ordinary LEDs, amplifying the impact of damage. Therefore, Micro-LEDs require even higher standards for stress defect control than ordinary LEDs. Summary of the Invention

[0006] To overcome the shortcomings of existing technologies, this invention provides a heterogeneous nano-patterned sapphire substrate (HNPSS) and its preparation and lift-off method. This invention effectively releases the stress in sapphire and epitaxial layers through nano-patterning. GaN nucleates and grows at the gaps between the patterns, eventually submerging the patterns. At the same time, dislocations bend and eventually annihilate on the sidewalls of the patterns, effectively improving the epitaxial quality of GaN and enabling non-destructive wet lift-off of sapphire substrates.

[0007] The technical solution of the present invention is as follows:

[0008] A heterogeneous nanopatterned substrate is characterized by patterned groove structures etched on the surface of a sapphire substrate, the groove structures being interconnected and filled with a heterogeneous dielectric material, patterned cellular nanostructures being deposited on the surface of the sapphire substrate, the cellular nanostructures being connected by nanolines, the cellular nanostructures and nanolines using the same material as the heterogeneous dielectric material filled in the groove structures, and a portion of the heterogeneous dielectric material in the patterned cellular nanostructures and nanolines overlapping the heterogeneous dielectric material filled in the groove structures both vertically and horizontally.

[0009] The method for preparing heterogeneous nanopatterned substrates provided by this invention includes the following steps:

[0010] 1) First, apply a layer of organic adhesive to the sapphire wafer and pattern the organic adhesive;

[0011] 2) The sapphire substrate coated with organic adhesive is etched in the first step to obtain a patterned groove structure, and the groove structures are interconnected.

[0012] 3) Deposit a heterodielectric layer on a sapphire substrate, the thickness of which is the same as the groove depth;

[0013] 4) Perform chemical mechanical polishing on the sapphire substrate, retaining only the heterogeneous dielectric material in the grooves;

[0014] 5) Deposit the same heterodielectric material again on the sapphire substrate, ensuring that the thickness of the dielectric layer is greater than that of the cellular nanostructure.

[0015] 6) Apply a layer of organic adhesive and shape it into a pattern;

[0016] 7) Using organic adhesive as a mask, the heterogeneous medium is etched to form a nanostructure of the heterogeneous medium material. The nanostructures are connected by nanolines of the same material, and part of the heterogeneous medium material in the patterned nanostructure or nanolines overlaps with the heterogeneous medium material filled in the groove structure, thus obtaining a heterogeneous nanopatterned substrate HNPSS.

[0017] Furthermore, this invention grows a GaN epitaxial layer on a heterogeneous nanopatterned sapphire substrate (HNPSS) using metal-organic chemical vapor deposition (MOCVD) to obtain an epitaxial wafer on the HNPSS. The epitaxial wafer is then immersed in an etchant, and all the heterogeneous dielectric materials in the cellular nanostructures and grooves are interconnected, allowing the etchant to be evenly distributed. This process can completely etch away all the heterogeneous dielectric materials, leaving only the GaN in the gaps between the nanopatterns, thus achieving the peeling of the sapphire substrate from the epitaxial wafer.

[0018] In the above steps, the width of the groove structure ranges from 1 to 5 μm, and the depth ranges from 0.5 to 2 μm. The depth and diameter of the cellular nanostructure are both nanoscale dimensions of less than 1 micrometer. The organic adhesive patterning can be generated by nanoimprinting, electron beam lithography, step-through lithography, etc.

[0019] Technical effects of the present invention:

[0020] First, the nanopatterned substrate can bend dislocations, causing them to annihilate on the sidewalls of the nanopattern, thus effectively reducing dislocation density. Second, since there are no chemical bonds between the heterodielectric material and GaN, and it is easily etched, the disassembly can be achieved by chemical etching simply by connecting the cellular nanostructures, avoiding the damage caused by laser disassembly. Furthermore, since the N-plane becomes the light-emitting surface after disassembly, and the light-emitting surface of the micro-LED has regular nanopatterns after bonding, the light-emitting efficiency of the LED can be further improved. Additionally, nucleus growth on the sidewalls of the pattern is suppressed during epitaxy. Due to the ripening effect, large nucleation islands can devour smaller nuclei, and the overlap of atomic layers can introduce defects such as stacking faults. However, since there are no chemical bonds between the heterodielectric material and GaN, nuclei will not form on the sidewalls, thus reducing the possibility of stacking faults introduced by atomic layer overlap, thereby improving the quality of the epitaxial wafer. Attached Figure Description

[0021] Figure 1-9 This is a flowchart illustrating the method for manufacturing a substrate structure for GaN epitaxial growth according to the present invention.

[0022] Figure 1 The first imprinting of adhesive patterning is shown in a specific embodiment of the present invention;

[0023] Figure 2 The first etching in the specific embodiment of the present invention shown yields a groove structure;

[0024] Figure 3 The first deposition of a heterogeneous medium layer is shown in a specific embodiment of the present invention;

[0025] Figure 4 The groove in the specific embodiment of the present invention shown is filled with a heterogeneous medium material;

[0026] Figure 5 All the groove structures in the specific embodiment of the present invention shown are interconnected;

[0027] Figure 6 The second deposition of a heterogeneous medium layer is shown in a specific embodiment of the present invention;

[0028] Figure 7 The diagram shown is a schematic representation of the second imprinting in a specific embodiment of the present invention.

[0029] Figure 8 The image shown is a top view of the cellular nanostructure in a specific embodiment of the present invention.

[0030] Figure 9 The image shows a side view of a cellular nanostructure in a specific embodiment of the present invention.

[0031] Wherein 101 is the sapphire substrate; 102 is the imprinting adhesive; 103 is the groove; and 104 is the heterogeneous dielectric material. Detailed Implementation

[0032] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can understand the advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details of this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0033] The substrate used in this embodiment of the invention is a sapphire substrate, and the patterning is performed using nanoimprinting. The nanoimprinting method includes thermal imprinting, ultraviolet imprinting, and microcontact imprinting, as well as combinations thereof. The organic adhesive used is SUN-1601N ultraviolet nanoimprinting photoresist. This embodiment employs a two-step method of thermal imprinting and ultraviolet imprinting for nanoimprinting, with the two etching steps corresponding to the imprinting of the patterns in these two steps. The specific steps are as follows:

[0034] 1. Imprint a pattern onto a sapphire substrate, with the gaps in the imprinting adhesive forming the desired groove structure. The groove should be 2µm wide, 200nm deep, and 20µm in period, corresponding to the desired micro-LED chip size. The pattern can also use any periodic structure, but the period must be at least ten times greater than the period of subsequent nano-patterns. The thickness of the imprinting adhesive needs to match the etching conditions: spin coating speed 3000 rpm, pre-baking at 100℃ for 60 seconds, resulting in an imprinting adhesive thickness of 100–1000nm. A sapphire substrate coated with imprinting adhesive is placed in a nanoimprinter for nanoimprinting. First, a thermal imprinting method is used to transfer the template pattern to a flexible stencil, forming a complementary inverse pattern. Then, a simultaneous thermal imprinting and UV imprinting process is performed, using an imprinting adhesive sensitive to UV light to coat the flexible stencil pattern onto the spin-coated substrate. Appropriate heating is applied to allow the imprinting adhesive to fully flow and fill the gaps in the pattern on the flexible stencil. UV irradiation is then used to cure the adhesive, allowing the template pattern to be replicated onto the sapphire substrate. Figure 1 As shown.

[0035] 2. The sapphire substrate after imprinting is subjected to ICP etching. The etching material is sapphire, forming grooves for burying heterogeneous dielectrics. In this embodiment, the ICP etching conditions are BCl3 = 20 SCCM, PF power 500W, Bias power 40W, and time 100s. The etched grooves are shown below. Figure 2 As shown, the depth is 1µm, the width is 3µm, and the cycle is consistent with the cycle of the printing adhesive.

[0036] 3. Deposit a heterodielectric layer on a sapphire substrate with etched grooves. In this embodiment, the heterodielectric layer is SiO2, and the deposition method used is PECVD with a deposition rate of 15 nm / s and a deposition thickness of 200 nm. Figure 3 As shown, the deposited medium completely fills the etching groove, resulting in a sapphire substrate with a primary patterned heterogeneous medium.

[0037] 4. The sapphire substrate with the patterned heterogeneous dielectric material is subjected to chemical mechanical polishing and cleaning to remove excess SiO2 outside the dielectric tank, retaining only the heterogeneous dielectric material in the etching tank. In this embodiment, an alkaline solution containing SiO2 particles is used as the polishing slurry, and the polishing depth is the same as the thickness of the deposited heterogeneous material, such as... Figure 4 As shown, a sapphire substrate with a buried heterogeneous medium is obtained. The width of the groove structure is on the micrometer scale to ensure the flow of subsequent etching solution. The shape of the pattern needs to ensure that all groove structures are interconnected. This embodiment uses a grid pattern, such as... Figure 5 As shown, after grinding, simply rinse off the grinding liquid with clean water.

[0038] 5. The substrate is then subjected to another PECVD deposition of a SiO2 layer. The deposited dielectric layer should not be too thin; it needs to be greater than the pattern thickness of the cellular nanostructure. Simultaneously, the dielectric layer should not be too thick; it must be matched to the etching time to ensure that the heterogeneous dielectric buried in the grooves is exposed after etching. The dielectric layer thickness is between 200 nm and 1000 nm. In this embodiment, the patterned substrate is cellular in shape with a cell height of 400 nm, and the deposited SiO2 thickness is 500 nm. Figure 6 As shown.

[0039] 6. Perform secondary nanoimprinting on the deposited silica layer. The imprinting conditions can be the same as in the first step, but the template pattern is different. The pattern needs to overlap with the first pattern, and there need to be nanolines connecting the patterns to ensure the connectivity between the cellular nanostructures. The imprinting adhesive needs to be heat-treated according to the pattern morphology. In this embodiment, the template pattern is cylindrical, such as... Figure 7 As shown, the cylinders are 400nm high, 460nm in diameter, and have a period of 500nm. Each cylinder is connected to its adjacent cylinders by a line that is 60nm wide and 500nm high.

[0040] 7. The substrate after imprinting is subjected to ICP etching again, with SiO2 as the material for the second etching. The etched shapes include cellular, frustum, and pyramidal types. In this embodiment, a cellular pattern is used, and the etching conditions are (RF power 500W, Bias power 80W, 80s, CHF3 / SF6 = 20 / 20SCCM) + (RF power 500W, Bias power 200W, 120s, CHF3 / SF6 = 10 / 20SCCM). The proportion of SF6 gas is appropriately increased during etching to allow the SiO2 to be etched at a certain angle. In this embodiment, SiO2 nanocellular nanostructures are obtained after etching, and these nanostructures are connected by SiO2 nanowires, such as... Figure 8 As shown, the cellular nanostructure has a height of 400 nm, a diameter of 460 nm, a period of 500 nm, and nanolines that are 60 nm wide and 200 nm high. Figure 9 As shown, the heterogeneous nanopatterned substrate HNPSS was obtained.

[0041] 8. The above substrate is placed in MOCVD for growth. The growth mode of GaN epitaxy on HNPSS is as follows: after low-temperature nucleation layer growth and high-temperature annealing, GaN is formed both on the cellular nanostructures and in the gaps between the cellular nanostructures. The crystal nuclei in the channels have the same orientation and can be restricted to below 100 nm. The crystal nuclei formed on the cellular nanostructures are disordered. During 3D growth, the crystal nuclei in the gaps between the cellular nanostructures will close and grow, while the growth of crystal nuclei on the cellular nanostructures will be suppressed. As growth proceeds, GaN islands gradually fill the gaps between the cellular nanostructures and form stable {1_101} planes on the sidewalls of the cellular nanostructures. Dislocations bend towards the cellular nanostructures during epitaxial growth, and some terminate at the sidewalls of the cellular nanostructures. Subsequently, GaN grows laterally, and the GaN islands gradually close at the top of the cellular nanostructures. At the closure interface, stress release generates dislocations. During the merging process, due to the Oswald ripening effect, larger GaN islands become even larger and may submerge smaller islands during lateral growth. This is because the atomic stacking order between the large and small islands differs, resulting in stacking faults. As GaN epitaxy progresses, the islands completely merge, eventually forming a smooth surface, resulting in a GaN epitaxial wafer on HNPSS.

[0042] 9. After the GaN epitaxial wafer is completed, it is only necessary to immerse the epitaxial wafer in a solution for etching to achieve substrate stripping. The solution includes all solutions capable of etching the dielectric layer without etching GaN. In this embodiment, the etching solution corresponding to SiO2 is an HF series reagent. Because the SiO2 circular nanostructures are connected to some SiO2 in the bottom grooves and the SiO2 nanolines between the circular nanostructures, HF enters the nanopatterned structure through the dielectric grooves. All SiO2 circular nanostructures and SiO2 in the grooves are interconnected, allowing the etching solution to be evenly distributed, thus etching away all the SiO2 and leaving only GaN in the gaps between the nanopatterns. Due to the large amount of merging between islands in the early stages of GaN growth, many defects exist inside the GaN. Because the connection area between GaN and the substrate is small and of poor quality, GaN will automatically peel off from the substrate.

[0043] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, any equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A heterogeneous nanotopographic substrate, comprising: Patterned groove structures are etched on the surface of a sapphire substrate. These groove structures are interconnected and filled with a heterogeneous dielectric material. Patterned cellular nanostructures are deposited on the surface of the sapphire substrate and connected to each other by nanolines. The materials used for the cellular nanostructures and nanolines are the same as the heterogeneous dielectric material filled in the groove structures. Some of the heterogeneous dielectric material in the patterned cellular nanostructures and nanolines overlaps vertically with the heterogeneous dielectric material filled in the groove structures.

2. The heterogeneous nanographical substrate of claim 1, wherein, The heterogeneous dielectric material is SiO2 or SiNx.

3. The heterogeneous nanographical substrate of claim 1, wherein, The width of the groove structure ranges from 1 to 5 μm, and the depth ranges from 0.5 to 2 μm.

4. The heterogeneous nanographical substrate of claim 1, wherein, The diameter and height of the cellular nanostructure are both less than 1 micrometer.

5. The heterogeneous nanographical substrate of claim 1, wherein, The width of the nanowires ranges from 40 to 100 nm.

6. A method for preparing a heterogeneous nanopatterned substrate, comprising the following steps: 1) First, apply a layer of organic adhesive to the sapphire wafer and pattern the organic adhesive; 2) The sapphire substrate coated with organic adhesive is etched in the first step to obtain a patterned groove structure, and the groove structures are interconnected. 3) Deposit a heterodielectric layer on a sapphire substrate, the thickness of which is the same as the groove depth; 4) Perform chemical mechanical polishing on the sapphire substrate, retaining only the heterogeneous dielectric material in the grooves; 5) Deposit the same heterodielectric material again on the sapphire substrate, ensuring that the thickness of the dielectric layer is greater than that of the cellular nanostructure. 6) Apply a layer of organic adhesive and shape it into a pattern; 7) Using organic adhesive as a mask, the heterogeneous medium is etched to form a cellular nanostructure of heterogeneous medium material. The cellular structures are connected by nanolines of the same material, and part of the heterogeneous medium material in the patterned cellular nanostructure or nanolines overlaps with the heterogeneous medium material filled in the groove structure, thus obtaining a heterogeneous nanopatterned substrate.

7. The production method according to claim 6, wherein The methods for patterning the organic adhesive in steps 1) and 6) are nanoimprinting, electron beam lithography, or step-by-step lithography.

8. A method of exfoliating an epitaxial wafer, characterized by, A GaN epitaxial layer is grown on a heterogeneous nanopatterned substrate as described in claim 1 by metal-organic chemical vapor deposition, and the epitaxial wafer is immersed in an etching solution that etches the heterogeneous dielectric material without etching the GaN, thereby achieving the stripping of the substrate from the epitaxial wafer.

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