A low-power quick wake-up method

Abstract

This invention provides a low-power, fast wake-up method. It designs a hibernate-level hibernation mechanism, combining the advantages of sleep and hibernate to achieve ultra-low power consumption during hibernation and fast wake-up. The method includes: utilizing the hibernation process provided by the Linux system, ensuring that only the RTC and DDR domains are powered during hibernation, with the DDR entering a low-power self-refresh state, while all other power domains are powered off; saving the PLL and DDR configurations before hibernation, and directly jumping to the RTC RAM to implement the wake-up function upon system power-on, restoring the PLL and DDR configurations to accelerate the wake-up speed; because the DDR enters self-refresh mode, the data is preserved and not lost, allowing the program to continue running from its previous position after wake-up, without requiring a system restart.

Description

Technical Field

[0001] This invention relates to the field of power management technology for systems, and in particular to a low-power, fast wake-up method. Background Technology

[0002] With the development of technology, the hibernation and wake-up technology of systems has received increasing attention. Existing Linux systems use the sleep / wake-up mechanism provided by the Linux kernel. During hibernation, the external clock is turned off, the DDR enters self-refresh mode, and power to the CPU core is turned off, while other power is maintained. After waking up, the program continues execution from where it was in hibernation. Linux systems use hibernate hibernation: during hibernate hibernation, the development board only retains power to the RTC domain, while all other parts are powered off. After waking up, power is restored, and the program resumes execution. The development board mentioned here is a circuit board used for embedded system development.

[0003] After waking up, the program continues execution from where it was in hibernation: save the current state --> rest --> wake up --> restore the current state, as if nothing had happened, and the program continues execution from where it was before the rest.

[0004] After waking up and powering on again, the program will start executing again: this means starting from the Bootrom and proceeding with the normal startup process.

[0005] However, in existing technologies, the sleep depth and wake-up speed are related. A shallower sleep depth results in a faster wake-up but higher power consumption; a deeper sleep depth results in a slower wake-up but lower power consumption. Correspondingly, in Linux systems, `sleep` only partially shuts down the power, leading to relatively high power consumption. In Linux systems, `hibernate` essentially restarts the system upon waking, resulting in a slower wake-up speed, and the system cannot continue running from where it was before sleep.

[0006] In addition, the commonly used terms in the prior art are as follows:

[0007] 1. Sleep / Wake-up: A power management method provided by the Linux system.

[0008] 2. idle, sleep: Hibernation modes provided by Linux power management.

[0009] 3. Hibernate: A hibernation mode provided by Linux power management.

[0010] 4. RTC: Real-time clock.

[0011] 5. RTC RAM: A segment of RAM space in the RTC domain used to save code and data during deep sleep.

[0012] 6. DDR: Double Data Rate Dynamic Random Access Memory.

[0013] 7. PLL (Phase Locked Loop): A phase-locked loop is used to unify and integrate clock signals to enable high-frequency devices to operate normally, such as memory access.

[0014] 8. DDR self-refresh: The DDR internally issues a refresh command every 64ms without the need for controller intervention, ensuring that data is not lost.

[0015] 9. TCSM: A segment of SRAM used in this invention to store and execute code during hibernation. The hibernation code is placed in TCSM and is inaccessible after DDR enters self-refresh mode. Before hibernation, there is still code to execute after DDR enters self-refresh mode, so both the hibernation code after DDR enters self-refresh and the hibernation code after self-refresh are placed in TCSM. Alternatively, all hibernation code could be placed in TCSM; the current approach is to place all of it in TCSM.

[0016] 10. Bootrom: The startup code embedded in the chip. Summary of the Invention

[0017] To address the aforementioned issues, the purpose of this method is as follows: This invention provides a deep sleep mechanism that utilizes the sleep process provided by the Linux system. It designs both software and hardware for hibernate-level sleep, combining the advantages of sleep and hibernate to achieve ultra-low power consumption during sleep and fast wake-up functionality.

[0018] Specifically, this invention provides a low-power, fast wake-up method, comprising: utilizing a sleep-wake-up framework provided by an application system, such that during sleep, only the RTC domain and DDR domain are powered, and the DDR enters a low-power self-refresh state, while all other power domains are powered off; saving the PLL and DDR configurations before sleep, and directly jumping to the RTCRAM to implement the wake-up function when the system powers on; that is, when the CPU powers on, it enters the Bootrom and reads a register in the Bootrom, which is a read-only register used to indicate the cause of the current reset, including deep sleep reset, power-on reset, watchdog reset, etc., to determine whether the previous power outage was a deep sleep; if it was a deep sleep, the CPU executes a jump instruction to jump to the address of the recovery code in the RTCRAM, executes the wake-up code, restores the PLL and DDR configurations, and speeds up the wake-up process; if it was not a deep sleep, the normal startup process is followed; since the DDR enters self-refresh mode, the data inside can be saved without loss, and the program can continue running from the position before sleep after waking up, without requiring a system restart.

[0019] The method further includes the following steps:

[0020] Preparing to enter deep hibernation;

[0021] Save DDR and PLL configurations: Specifically, save DATA including PLL and DDR configurations, as well as recovery code for restoring PLL and DDR, in RTC RAM; when a wake-up source is received, start and execute the Bootrom, call the recovery code, and return to the recovery context;

[0022] Save the CPU state;

[0023] Perform DDR self-refresh;

[0024] Enter Hibernate mode and then power off;

[0025] Restore the scene;

[0026] The program continues to execute.

[0027] The method further includes:

[0028] S1. Before entering deep sleep, load a piece of code for hibernation into TCSM, and jump to TCSM to execute the program before the hibernation power failure;

[0029] The code used for hibernation and the program before hibernation power failure both refer to the code that executes the hibernation process and configures the system to enter deep hibernation mode, including the code that configures DDR to enter self-refresh and the code that configures RTC to enter deep sleep mode.

[0030] The jump to TCSM means that the program's PC pointer jumps to the address of TCSM and executes the code inside TCSM;

[0031] S2. Save the code and data to the RTC RAM, including the wake-up code, the PLL and DDR register configuration, the PC address to be executed after the program exits the RTC RAM upon wake-up, and the Resume Code information for restoring the PLL and DDR.

[0032] S3. Save the most basic controller configuration required for system operation to DDR, including clock and serial port information, and register configuration of the clock and serial port modules;

[0033] S4. Save the CPU's current state; the CPU's current state refers to the current values ​​of the CPU's internal general-purpose registers and cp0 register, where cp0 refers to coprocessor 0;

[0034] S5. Configuring DDR to enter self-refresh mode ensures low-power operation and prevents data loss;

[0035] S6. Configure the RTC registers, turn off all power except for RTC and DDR, and enter deep sleep state;

[0036] S7. When the RTC detects that the wake-up button WKUP has been pressed, it restores power supply to each circuit;

[0037] The detection is implemented through the internal logic of the RTC; the wkup_n pin is woken up when its level changes from high to low and then back to high.

[0038] S8. The system powers on and enters the Bootrom. If it detects a deep sleep mode, it jumps to the RTC RAM to execute the wake-up program. Specifically, it reads the value of a register in the Bootrom, which indicates the reset state. If it's deep sleep, the PC pointer jumps to the address in the RTC RAM to execute the wake-up program; otherwise, it proceeds with the normal startup process. S9. In the RTC RAM, the configuration of the PLL and DDR is restored, and the DDR exits its self-refresh state. S10. It jumps to the program execution address saved before hibernation, executes the program, and restores the CPU's context. The function of the program executed at this PC address is to restore the CPU's context. The restoration method is to read the values ​​of the CPU general-purpose registers and CP0 register saved before hibernation and write them back to the CPU general-purpose registers and CP0 register.

[0039] S11. Restore system clock and serial port, including clock and serial port configuration;

[0040] S12. The system continues executing the program from the position it was in before hibernation.

[0041] The program stored at the PC address in step S2 is used to restore the CPU's state.

[0042] The other reset states mentioned in step S8 include power-on reset and watchdog reset.

[0043] The application system includes Linux.

[0044] The main process of the hibernation-wake-up framework is as follows: freeze user-mode processes and kernel-mode tasks, call the suspend callback function of the registered device, hibernate the core device and put the CPU into hibernation state, and wake-up is the reverse process of hibernation.

[0045] The method for saving PLL and DDR configurations is as follows: read the registers of PLL and DDR, and write the read values ​​to an address in RTCRAM.

[0046] The method to continue running from where it left off before hibernation is as follows: before hibernation, the CPU register values ​​are saved, and the data in DDR remains unchanged; upon waking up, the saved CPU register values ​​are written back, and the program continues to run.

[0047] Therefore, the advantage of this application lies in the fact that it combines the low power consumption of Hibernate's hibernation with the fast wake-up speed of sleep, and it has been designed in both software and hardware. The method is simple and the design is ingenious. Attached Figure Description

[0048] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.

[0049] Figure 1 This is a block diagram illustrating the method involved in this application.

[0050] Figure 2 This is a flowchart illustrating the method of the present invention. Detailed Implementation

[0051] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.

[0052] This embodiment presents a low-power, fast wake-up method, combining the low power consumption of Hibernate with the wake-up speed of Sleep, and incorporates both software and hardware design. During sleep, only the RTC and DDR domains remain powered, with the DDR entering a low-power self-refresh state, while all other power domains are powered down, reducing power consumption. Before sleep, the PLL and DDR configurations are saved. Upon system power-on, the wake-up function jumps directly to the RTC RAM, restoring the PLL and DDR configurations and accelerating the wake-up process. Because the DDR enters self-refresh mode, its data is preserved, allowing the program to resume execution from its previous position without requiring a system restart. The method includes:

[0053] Using the hibernation / wake-up framework provided by the Linux system, the main hibernation process is as follows: freeze user-mode processes and kernel-mode tasks, call the suspend callback function of the registered device, hibernate the core device, and put the CPU into hibernation state; wake-up is the reverse process of hibernation; during hibernation, only the RTC domain and DDR domain are powered, and the DDR enters a low-power self-refresh state, while all other power domains are powered off; before hibernation, the configuration of PLL and DDR is saved. The method for saving the configuration of PLL and DDR is to read the registers of PLL and DDR and write the read values ​​to a certain address in RTC RAM;

[0054] When the system powers on, it directly jumps to the RTC RAM to implement the wake-up function, restoring the PLL and DDR configurations and speeding up the wake-up process. Jumping to the RTC RAM means that when the CPU powers on, it enters the Bootrom, reads a register in the RTC RAM, and determines whether the previous power failure was a deep sleep. If it was a deep sleep, the CPU executes a jump instruction to the address in the RTC RAM and executes the wake-up code. If it wasn't a deep sleep, it follows the normal startup process. Because the DDR RAM enters self-refresh mode, the data is preserved and not lost. Upon waking, the program can continue running from where it left off before sleep, without requiring a system reboot. The method for continuing from where it left off is as follows: before sleep, the CPU register values ​​are saved, and the data in the DDR RAM remains unchanged. Upon waking, the saved CPU register values ​​are written back, and the program continues running as if nothing happened.

[0055] like Figure 1 As shown, the steps of the method include:

[0056] Preparing to enter deep hibernation;

[0057] Save DDR and PLL configurations: Specifically, save DATA including PLL and DDR configurations, as well as recovery code for restoring PLL and DDR, in RTC RAM; when a wake-up source is received, start and execute the Bootrom, call the recovery code, and return to the recovery context;

[0058] Save the CPU state;

[0059] Perform DDR self-refresh;

[0060] Enter Hibernate mode and then power off;

[0061] Restore the scene;

[0062] The program continues to execute.

[0063] The specific process is as follows, and the method further includes, for example... Figure 2 As shown:

[0064] S1. Before entering hibernation, load a piece of code for hibernation into TCSM, and jump to TCSM to execute the program before hibernation power failure;

[0065] The code used for hibernation and the program before hibernation power failure refer to the code that executes the hibernation process and configures the system to enter deep sleep mode, including the code that configures DDR to enter self-refresh and the code that configures RTC to enter deep sleep mode.

[0066] The jump to TCSM means that the program's PC pointer jumps to the address of TCSM and executes the code inside TCSM;

[0067] S2. Save the code and data to the RTC RAM, including the wake-up code, the PLL and DDR register configuration, the PC address to be executed after the program exits the RTC RAM upon wake-up, and the Resume Code information for restoring the PLL and DDR.

[0068] S3. Save the most basic controller configuration required for system operation to DDR, including clock and serial port information; register configurations for modules such as clock and serial port;

[0069] S4. Save the CPU's current state; the CPU's current state refers to the current values ​​of the CPU's general-purpose registers and cp0 register; cp0 refers to coprocessor 0;

[0070] S5. Configuring DDR to enter self-refresh mode ensures low-power operation and prevents data loss;

[0071] S6. Configure the RTC registers, turn off all power except for RTC and DDR, and enter deep sleep state;

[0072] S7. When the RTC detects that the wake-up button WKUP has been pressed, it restores power supply to each circuit;

[0073] The RTC detection is implemented through internal RTC logic, not a software operation. The system wakes the device by causing the wkup_n signal to transition from high to low and then back to high.

[0074] S8. The system powers on and boots, entering the Bootrom for execution. If it determines the mode is deep sleep, it jumps to the RTC RAM for execution. Specifically, it reads the value of a register in the Bootrom. This value indicates the specific reset state. If it's deep sleep, the PC pointer jumps to the address in the RTC RAM to execute the wake-up procedure. If it's another reset, including power-on reset or watchdog reset, it proceeds with the normal boot process.

[0075] S9. In RTC RAM, restore the configuration of PLL and DDR, and DDR exits the self-refresh state; S10. Jump to the program execution PC address saved before hibernation, execute the program, and restore the CPU's context: The main function of the program executed at this PC address is to restore the CPU's context; the restoration method is: read the values ​​of the CPU general-purpose registers and cp0 register saved before hibernation, and write them back to the CPU general-purpose registers and cp0 register;

[0076] S11. Restore system clock and serial port, including clock and serial port configuration;

[0077] S12. The system continues executing the program from the position it was in before hibernation.

[0078] The program stored at the PC address in step S2 is used to restore the CPU's state. That is, the value of resume pc is an address where the program is stored, and the function of the program is to restore the CPU's state.

[0079] The application system does not necessarily have to be a Linux system; other systems are also acceptable, but this embodiment only operates on Linux.

[0080] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for low power fast wake-up, the method comprising: The method includes: utilizing the sleep / wake-up framework provided by the application system, ensuring that only the RTC and DDR domains are powered during sleep, with the DDR entering a low-power self-refresh state while all other power domains are powered down; saving the PLL and DDR configurations before sleep, and directly jumping to the RTC RAM to implement the wake-up function when the system powers on; that is, when the CPU powers on, it enters the Bootrom and reads a read-only register indicating the reason for the current reset to determine whether the previous power failure was a deep sleep; if it was a deep sleep, the CPU executes a jump instruction to jump to the address of the recovery code in the RTC RAM, executes the wake-up code, restores the PLL and DDR configurations, and speeds up the wake-up process; if it was not a deep sleep, the normal startup process is followed; since the DDR enters self-refresh mode, the data inside can be saved without loss, and the program can continue running from the position before sleep after waking up, without requiring a system restart; The method further includes: S1. Before entering deep sleep, load a piece of code for hibernation into TCSM, and jump to TCSM to execute the program before the hibernation power failure; The code used for hibernation and the program before hibernation power failure both refer to the code that executes the hibernation process and configures the system to enter deep hibernation mode, including the code that configures DDR to enter self-refresh and the code that configures RTC to enter deep sleep mode. The jump to TCSM means that the program's PC pointer jumps to the address of TCSM and executes the code inside TCSM; S2. Save the code and data to the RTC RAM, including the wake-up code, the PLL and DDR register configuration, the PC address to be executed after the program exits the RTC RAM upon wake-up, and the Resume Code information for restoring the PLL and DDR. S3. Save the most basic controller configuration required for system operation to DDR, including clock and serial port information, and register configuration of the clock and serial port modules; S4. Save the CPU's current state; the CPU's current state refers to the current values ​​of the CPU's internal general-purpose registers and cp0 register, where cp0 refers to coprocessor 0; S5. Configuring DDR to enter self-refresh mode ensures low-power operation and prevents data loss; S6. Configure the RTC registers, turn off all power except for RTC and DDR, and enter deep sleep state; S7. When the RTC detects that the wake-up button WKUP has been pressed, it restores power supply to each circuit; The detection is implemented through the internal logic of the RTC; the wkup_n pin is woken up when its level changes from high to low and then back to high. S8. The system powers on and enters the Bootrom. If it is in deep sleep mode, it jumps to the RTC RAM to execute the wake-up program. Specifically, it reads the value of a register in the Bootrom, which represents the reset state. If it is in deep sleep mode, the PC pointer jumps to the address in the RTC RAM to execute the wake-up program. If it is in any other reset state, it proceeds with the normal boot process. S9. In RTC RAM, restore the configuration of PLL and DDR, and DDR exits self-refresh state; S10. Jump to the program execution PC address saved before hibernation, execute the program, and restore the CPU's state: The function of the program executed at this PC address is to restore the CPU's state; the method of restoration is: read the values ​​of the CPU general-purpose registers and cp0 register saved before hibernation, and write them back to the CPU general-purpose registers and cp0 register; S11. Restore system clock and serial port, including clock and serial port configuration; S12. The system continues executing the program from the position it was in before hibernation.

2. The method of low power consumption fast wake-up according to claim 1, wherein, The program stored at the PC address in S2 is used to restore the CPU's state.

3. The low-power fast wake-up method according to claim 1, characterized in that, The other reset states mentioned in S8 include power-on reset and watchdog reset.

4. The low-power fast wake-up method according to claim 1, characterized in that, The application system includes Linux.

5. The low-power fast wake-up method according to claim 1, characterized in that, The main process of the hibernation-wake-up framework is as follows: freeze user-mode processes and kernel-mode tasks, call the suspend callback function of the registered device, put the core device to sleep and put the CPU into hibernation state, and wake-up is the reverse process of hibernation.

6. The low-power fast wake-up method according to claim 1, characterized in that, The method for saving PLL and DDR configurations is as follows: read the registers of PLL and DDR, and write the read values ​​to an address in RTC RAM.

7. The low-power fast wake-up method according to claim 1, characterized in that, The method to continue running from where it left off before hibernation is as follows: before hibernation, the CPU register values ​​are saved, and the data in DDR remains unchanged; upon waking up, the saved CPU register values ​​are written back, and the program continues to run.

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