Interrupt handling method for sensing devices and its integrated circuit

Abstract

This invention describes an interrupt handling method for a sensing device and its integrated circuit, wherein the integrated circuit includes a processor, a general-purpose interrupt controller, and a bus master. The bus controller includes a bus control circuit and a polling circuit, wherein the polling circuit is used to detect whether an interrupt signal of the sensing device has been asserted. In response to the polling circuit detecting that the interrupt signal has been asserted, the bus control circuit sequentially retrieves each of a plurality of tasks stored in a task queue in memory and executes one or more data transmission operations corresponding to each task to obtain sensor data from the one or more sensors of the sensing device. In response to a task completion signal generated by the bus control circuit, the general-purpose interrupt controller generates an interrupt request signal to be sent to the processor.

Description

Technical Field

[0001] This invention relates generally to input devices. In particular, it relates to interrupt handling methods for integrated circuits and their sensing devices. Background Technology

[0002] Unless otherwise stated, the methods described in this section are not considered prior art to the claims listed below, nor are they considered prior art by virtue of their inclusion in this section.

[0003] Currently, sensing devices, which may include touchpads, touchscreens, and various types of sensors (such as gyroscopes, accelerometers, etc.), are commonly used to control electronic devices. With advancements in technology, given that sensing devices are often touchscreens, their reporting rates have become increasingly higher, for example, from 60Hz to 480Hz or higher. While users may perceive smoother touch operations when sensing devices use higher reporting rates, it can also increase the load on the electronic device's processing unit (e.g., CPU). Specifically, if the sensing device's reporting rate is high enough, it can place a significant burden on the processing unit, leading to a degraded performance of the electronic device.

[0004] Therefore, there is an urgent need for an integrated circuit, a method for controlling the integrated circuit, and an interrupt handling method for a sensing device to solve the above problems. Summary of the Invention

[0005] The following summary is illustrative only and is not intended to be limiting in any way. That is, it is provided to introduce the concepts, key points, benefits, and advantageous effects of the novel and non-obvious techniques described herein. Selected embodiments are further described in the detailed description below. Therefore, the following summary is not intended to identify the essential features of the claimed subject matter, nor is it intended to define the scope of the claimed subject matter.

[0006] This invention provides an integrated circuit, including a processor, a general-purpose interrupt controller, and a bus master. The bus master includes a bus control circuit and a polling circuit for detecting whether an interrupt signal from a sensing device has been asserted. In response to the polling circuit detecting an asserted interrupt signal, the bus control circuit sequentially retrieves each of a plurality of tasks stored in a memory task queue and executes a data transfer operation corresponding to each task to obtain sensor data from the sensing device. In response to a task completion signal generated by the bus control circuit, the general-purpose interrupt controller generates an interrupt request signal. In response to the interrupt request signal, the processor reports sensor events using the sensor data obtained through the data transfer operations corresponding to each task.

[0007] In some embodiments, the polling circuit is disabled while the bus control circuit is performing a data transmission operation corresponding to each task. The polling circuit is enabled in response to a task completion signal.

[0008] In some embodiments, the bus master also includes a direct memory access (DMA) controller configured to fetch each task from memory.

[0009] In some embodiments, the bus master further includes a first register and a second register, wherein a first value stored in the first register represents a hardware task count, and a second value stored in the second register represents the physical base address of the task queue.

[0010] In some embodiments, the bus master further includes a third register and a fourth register, wherein, upon integrated circuit startup, the processor writes tasks to a task queue, writes a first value to the first register and a second value to the second register, and sets a third value to 1 in the third register when the processor has finished writing. In response to the third value of the third register being set to 1, the bus control circuitry begins to retrieve tasks from the task queue sequentially using the first value of the first register and the second value of the second register. The fourth value stored in the fourth register is used to enable or disable the bus master's polling and data transfer hardware functions.

[0011] In some embodiments, in response to the task queue being empty, the bus control circuit writes a third value of the third register to 0, and in response to the third value of the third register being set to 0, the processor begins writing new tasks to the task queue.

[0012] In some embodiments, the processor reports sensor events to an application running on the processor, and the application performs one or more operations corresponding to the reported sensor events.

[0013] In some embodiments, the bus control circuit is connected to the sensing device via a Serial Peripheral Interface (SPI) bus, an Internal Integrated Circuit (I2C) bus, or an Improved Internal Integrated Circuit (I3C) bus.

[0014] Another embodiment of the present invention provides an interrupt handling method for a sensing device, used in an integrated circuit. The integrated circuit includes a processor, a general-purpose interrupt controller, and a bus master. The bus master includes a bus control circuit and a polling circuit. The method includes the following steps: using the polling circuit to detect whether an interrupt signal of the sensing device has been asserted; in response to the polling circuit detecting that the interrupt signal has been asserted, using the bus control circuit to sequentially retrieve each of a plurality of tasks stored in memory, and performing a data transmission operation corresponding to each task to obtain sensor data detected by one or more sensors of the sensing device; in response to a task completion signal generated by the bus control circuit, using the general-purpose interrupt controller to send an interrupt request signal to the processor; and in response to the interrupt request signal, using the sensor data obtained by the processor using the data transmission operation corresponding to each task to report a sensor event. Attached Figure Description

[0015] The accompanying drawings are provided to further illustrate the invention and are incorporated in and constitute a part of this invention. The drawings depict embodiments of the invention and, together with the description, serve to explain the principles of the invention. It is understood that, in order to clearly illustrate the concepts of the invention, the drawings are not necessarily drawn to scale, and some components shown may be depicted at a scale greater than that in the actual embodiments.

[0016] Figure 1 This is a schematic diagram of an electronic device according to an embodiment of the present invention.

[0017] Figure 2A This is a detailed block diagram of an electronic device according to an embodiment of the present invention.

[0018] Figure 2B This is a schematic diagram of a task format stored in a memory according to an embodiment of the present invention.

[0019] Figure 3A This is a flowchart of the polling circuit according to an embodiment of the present invention.

[0020] Figure 3B This is a software flowchart of touch operation according to an embodiment of the present invention.

[0021] Figure 3C This is a flowchart of a processing unit reporting touch events according to an embodiment of the present invention.

[0022] Figure 3D This is a flowchart of a processing unit reporting touch events according to another embodiment of the present invention.

[0023] Figure 4A This is a flowchart of the configuration process of the sensing device according to an embodiment of the present invention.

[0024] Figure 4B This is a flowchart of the configuration process of a sensing device according to another embodiment of the present invention. Detailed Implementation

[0025] This document discloses detailed embodiments and implementations of the claimed subject matter. However, it should be understood that the disclosed embodiments and implementations are merely illustrative of the claimed subject matter, which can be implemented in various forms. The invention can be embodied in many different forms and should not be construed as limited to the exemplary embodiments and implementations set forth herein. Rather, these various exemplary embodiments and implementations are provided so that the description of the invention is comprehensive and complete, and will fully convey the scope of the invention to those skilled in the art. In the following description, details of well-known features and technologies may be omitted to avoid unnecessarily obscuring the presented embodiments and implementations.

[0026] Figure 1 This is a schematic diagram of an electronic device according to an embodiment of the present invention.

[0027] Electronic device 100 may be a laptop computer, tablet computer, smartphone, touch panel, etc. (See reference) Figure 1 The electronic device 100 may include a system-on-a-chip (SoC) 110, a sensing device 120, and a memory 130. The SoC 110 can be connected to the sensing device 120 via bus 11 and to the memory 130 via bus 13. The sensing device 120 may be a device equipped with different types of sensors, such as touch sensors, inertial measurement sensors (e.g., gyroscopes, accelerometers, and magnetometers), temperature sensors, pressure sensors, light sensors, proximity sensors, ultrasonic sensors, etc., but the invention is not limited thereto.

[0028] The memory 130 may be volatile memory, such as static random access memory (SRAM) or dynamic random access memory (DRAM), or non-volatile memory, such as flash memory, but the invention is not limited thereto. The memory 130 may be used to store the program executed by the processing unit 111 and to store the tasks generated by executing the program, wherein some tasks may use the bus master 113 to send data to the sensing device 120 and receive data from the sensing device 120.

[0029] The SoC 110 may include a processing unit 111, a general-purpose interrupt controller (GIC) 112, and a bus master 113. The processing unit 111 may be implemented by a central processing unit (CPU), a microcontroller, or a digital signal processor (DSP), but the invention is not limited thereto. The processing unit 111 can send setting information from the sensing device 120 to the bus master 113, and the bus master 113 can send setting information to the sensing device 120 via the bus 11.

[0030] The general-purpose interrupt controller 112 may be a dedicated hardware circuit that performs critical tasks such as interrupt management, prioritization, and routing, which can improve the efficiency of the processing unit 110 and support interrupt virtualization.

[0031] The bus master 113 can send control signals to the bus slave 123 included in the sensing device 120 via the bus 11. The bus 11 can be implemented via a Serial Peripheral Interface (SPI) bus, an Internal Integrated Circuit (I2C) bus, or an I3C bus, but the invention is not limited thereto. For ease of description, in the following embodiments, the bus 11 is implemented as an SPI bus, and the sensing device 120 is implemented as a touch screen.

[0032] Assuming the sensing device 120 is a touchscreen, it may include a controller 121, a touch sensor array 122, and a bus controller 123. The touch sensor array 122 can be used to detect touch operations performed thereon. The controller 121 may be implemented by a microcontroller, a general-purpose processor, or a digital signal processor, but the invention is not limited thereto. In some embodiments, the touch sensor array 122 may be implemented by a capacitive sensor array, a resistive sensor array, or an optical imaging sensor array, but the invention is not limited thereto.

[0033] Bus controller 123 is the controller interface for bus 11. For example, assuming bus 11 is implemented using an SPI bus, bus master 113 can transmit clock signal CLK, chip select (... The master controller sends a MOSI (Master-to-Slave Integration) signal to the bus slave 123 and receives a MISO (Master-to-In, Slave-to-Out) signal from the bus slave 123. Additionally, the bus master controller can also receive a slave-data synchronization signal 12 from the controller 121 of the sensing device 120.

[0034] In one embodiment, when a user performs a touch operation on the sensing device 120, the touch sensor array 122 can detect these touch operations and send the detected touch signals to the controller 121. The controller 121 can generate a data synchronization signal 12 in response to the detected touch signals. In this case, the data synchronization signal 12 can be regarded as a touch EINT signal (i.e., touch interrupt signal).

[0035] In some other embodiments, the sensing device 120 may be a device other than a touch screen, and the touch sensor array 122 may be replaced by other types of sensors, such as gyroscopes, accelerometers, magnetometers, etc., but the present invention is not limited thereto.

[0036] Figure 2AIt is based on Figure 1 Detailed block diagram of the electronic device of an embodiment. Figure 2B This is a schematic diagram illustrating the format of a task stored in memory according to an embodiment of the present invention. Please refer to... Figure 1 and Figure 2A-2B .

[0037] like Figure 2A As shown, the bus master 113 may include a bus control circuit 1131, a pad macro 1132, a register 1134, a polling circuit 1136, a Tx / Rx buffer 1137, and a direct memory access (DMA) controller 1138. Assuming bus 11 is implemented using an SPI bus, the bus master 113 and the bus slave 123 can be considered as an SPI master and SPI slave, respectively. The bus control circuit 1131 can be a conventional SPI master circuit, which can transmit the clock signal CLK and the chip select signal through the pad macro 1132. The data signal MOSI is transmitted to the bus controller 123 of the sensing device 120, and the data signal MISO is received from the bus controller 123 of the sensing device 120 via the macroboard 1132. Those skilled in the art will understand the operation of the bus control circuit 1131, therefore details are omitted here.

[0038] Polling circuit 1136 can be configured to detect whether the data synchronization signal 12 (i.e., the touch EINT pin of sensing device 120) has been asserted based on the values ​​in registers 141 to 144. For example, when polling circuit 1136 detects that the data synchronization signal has been asserted (e.g., depending on the circuit design, from a low logic state to a high logic state, or from a high logic state to a low logic state), polling circuit 1136 can notify bus control circuit 1131 of an interrupt event, and bus control circuit 1131 can initiate a data transmission operation on bus 11 to send data to bus controller 123 and receive sensor data detected by touch sensor array 122 from bus controller 123. It should be noted that processing unit 111 (i.e., software) does not participate in the data transmission operation initiated by bus control circuit 1131. Meanwhile, during the data transmission operation, polling circuit 1136 is temporarily disabled to stop monitoring the data synchronization signal 12 generated by sensing device 120. After the data transmission operation is completed, the polling circuit 1136 is activated to continue monitoring the data synchronization signal 12 generated by the sensing device 120.

[0039] For example, registers 141 and 143 are used by bus control circuitry 1131 to fetch hardware tasks from task queue 131 in memory 130. Register 141 can define a hardware task count (i.e., the number of hardware tasks), and register 143 can serve as a pointer to the physical base address of the task queue. For instance, when electronic device 100 is powered on, processing unit 111 can write the physical base address of task queue 131 to register 143 and write the required hardware task count to register 141. When polling circuitry 1136 detects that data synchronization signal 12 has been asserted, bus control circuitry 1131 can, via DMA controller 1138 through bus 13 (e.g., Advanced High Performance (AHB) bus, or other high-speed bus), refer to the values ​​stored in registers 141 and 143 to fetch the number of tasks from task queue 131 in memory 130, and the fetched tasks can be considered as hardware tasks to be automatically executed by bus control circuitry 1131.

[0040] In this scenario, assuming the hardware task count stored in register 141 is 2 and the physical base address stored in register 143 is 1, the bus control circuit 1131 can retrieve two tasks from index 1 of the task queue 131 in memory 130, for example, tasks 1 and 2 in sequence in task queue 131. Furthermore, the remaining tasks in task queue 131 (e.g., tasks 3 through N) will be executed by the processing unit 111; these tasks can be considered software tasks.

[0041] Register 142 can be used as a doorbell register to trigger bus control circuit 1131 to execute software tasks. For example, after processing unit 111 stores a task in task queue 131, processing unit 111 can set register 142 to bitmap form. In response to the bitmap form of register 142, bus control circuit 1131 can sequentially begin retrieving each task from task queue 131 according to the values ​​stored in registers 141 and 143, and execute each retrieved task to transmit data to sensing device 120. Furthermore, after bus control circuit 1131 has retrieved all tasks stored in task queue 131, task queue 131 becomes empty, and bus control circuit 1131 can write the value of register 142 to 0 to notify processing unit 111 to fill task queue 131 with tasks.

[0042] In this invention, the doorbell register is used to trigger software tasks, and the touch EINT signal is used to trigger hardware tasks. When the bus control circuit 1131 completes a software task, it is automatically cleared because the software task is written by the user. However, when the bus control circuit 1131 completes a hardware task, it is not cleared because the hardware task is automatically sent when the touch EINT signal arrives; it must be manually cleared or modified. Furthermore, the doorbell register is implemented in bitmap form, where each bit corresponds to a software task. For example, if a user needs to transmit two software tasks and place them in the second and third positions of the task queue respectively, the user needs to write 0b1100 to the doorbell register, and the bus control circuit 1131 can find the corresponding software task based on the value of the doorbell register. In contrast, hardware tasks need to be placed at the beginning of the task queue; for example, two hardware tasks need to be placed in the zeroth and first positions of the task queue. The bus control circuit 1131 can start processing hardware tasks from the beginning of the task queue, where the number of hardware tasks is the value of the hardware task counter register.

[0043] Register 144 can be used to enable and disable hardware functions of bus master 113, such as polling and setting the task queue. For example, if the value of register 144 is set to 0, the hardware functions of bus master 113 are disabled. If the value of the register is set to 1, the hardware functions of bus master 113 are enabled.

[0044] In some implementations, the data synchronization signal 12 is not directly sent to the general interrupt controller 112; the polling circuit 1136 may include a switching circuit. Figure 2A (Not shown) The switching circuitry controls whether to bypass the transmission from data synchronization signal 12 to general interrupt controller 112. For example, the switching circuitry can be controlled by a value stored in register 144. If the hardware function of bus master 113 is disabled (e.g., register 144 is set to 0), the switching circuitry can bypass data synchronization signal 12 to general interrupt controller 112. If the hardware function of bus master 113 is enabled (e.g., register 144 is set to 1), the switching circuitry will not bypass data synchronization signal 12 to general interrupt controller 112.

[0045] In one embodiment, assuming bus 11 is implemented using an SPI bus and bus 13 (e.g., an Advanced High Performance (AHB) bus) has a bus width of 32 bits, then Figure 2BThis displays the format of each task stored in memory 130. For example, each task may include 128 bits of data. The first 32 bits may include hardware or software settings, 4 MSB bits of the Tx buffer, 4 MSB bits of the Rx buffer, and a reserved field. The second 32 bits may refer to the address of the Tx buffer, and the third 32 bits may refer to the address of the Rx buffer. The fourth 32 bits may refer to the length of data to be transmitted to sensing device 120. The aforementioned Tx buffer and Rx buffer can be collectively referred to as Tx / Rx buffer 1137, which may be a first-in, first-out (FIFO) buffer.

[0046] Figure 3A This is a flowchart illustrating the operation of a polling circuit according to an embodiment of the present invention. Please refer to... Figure 1 , Figure 2A-2B as well as Figure 3A .

[0047] In step S302, the parameters of the bus control circuit 1131 are configured. For example, the parameters of the bus control circuit 1131 may include data length, buffer address, and transmission count. Specifically, the hardware task count is stored in register 141, the buffer address and data length of each hardware task are set and written into the task time slot corresponding to the task queue, and the physical base address of the task queue is written into register 143.

[0048] In step S304, polling circuit 1136 is enabled to monitor slave data synchronization signal 12 (e.g., touch EINT pin) from sensing device 120. For example, when a user performs a touch operation on sensing device 120, touch sensor array 122 can detect these touch operations and send the detected touch signal to controller 121, and controller 121 can generate slave data synchronization signal 12 in response to the detected touch signal. In this case, slave data synchronization signal 12 can be regarded as touch EINT signal (i.e., touch interrupt signal).

[0049] In step S306, it is determined whether the slave data synchronization signal 12 (e.g., the touch EINT pin) is asserted. If it is determined that the slave data synchronization signal 12 (e.g., the touch EINT pin) is asserted, step S308 is executed. If it is determined that the slave data synchronization signal 12 (e.g., the touch EINT pin) is not asserted, the process returns to step S304. For example, when the polling circuit 1136 detects that the slave data synchronization signal is asserted (e.g., depending on the circuit design, it can transition from a low logic state to a high logic state, or from a high logic state to a low logic state), the polling circuit 1136 can notify the bus control circuit 1131 of an interrupt event, and the bus control circuit 1131 can initiate a data transmission operation via bus 11 to send data to the bus controller 123 and receive sensor data detected by the touch sensor array 122 from the bus controller 123. Simultaneously, during the data transmission operation, the polling circuit 1136 is temporarily disabled to stop monitoring the slave device data synchronization signal 12 generated by the sensing device 120.

[0050] In step S308, a data transmission operation is performed. After the data transmission operation is completed, the polling circuit 1136 is activated to continue monitoring the data synchronization signal 12 generated by the sensing device 120 (step S304).

[0051] Figure 3B This is a software flowchart of touch operation according to an embodiment of the present invention. Please refer to it. Figure 1 , Figure 2A and Figure 3B . Figure 3B The flowchart can be referenced from the touch detection initialization process of each component in the electronic device 100. The left part 330 can be regarded as the touch initialization stage, and the right part 332 can be regarded as the touch event reporting stage or hardware enhancement stage.

[0052] In step S310, the bus interface is initialized. For example, when the electronic device 100 is started, the bus interface (e.g., SPI interface, including SPI master and SPI slave) is initialized.

[0053] In step S312, the sensing device 120 is initialized. For example, the bus control circuit 1131 can transmit test signals to the sensing device 120 to ensure that the sensing device 120 can work normally.

[0054] In step S314, it is determined whether the sensor initialization is complete. If the sensor initialization is complete, step S316 is executed. If the sensor initialization is not yet complete, the process returns to step S312.

[0055] In step S316, the bus control circuit 1131 is configured. Details of step S316 can be found in [reference needed]. Figure 3AStep S302 in the embodiment.

[0056] In step S318, polling circuit 1136 is activated. In step S320, polling circuit 1136 monitors the touch EINT signal. In step S322, data transmission operation is performed. For details of steps S318 to S322, please refer to [link / reference needed]. Figure 3A Steps S304 to S308 in the embodiments will not be repeated here.

[0057] In step S324, the touch event is reported. For example, after the bus control circuit 1131 completes a data transmission operation, the bus control circuit 1131 can generate an interrupt request (IRQ) signal and send the IRQ signal to the general interrupt controller 112. Then, the general interrupt controller 112 can transmit the IRQ signal to the processing unit 111, which can then be notified of the interrupt event from the bus master 113 and report the touch event to the application running on the processing unit 111. Therefore, the application running on the processing unit 111 can perform the operation corresponding to the touch event.

[0058] Specifically, during the touch initialization phase (i.e., section 330), the processing unit 111, the bus control circuit 1131, and the sensing device 120 must ensure that the touch detection operation can proceed normally, and that the bus control circuit 1131 is in a normal configuration. During the touch reporting phase (i.e., section 332), the configured bus control circuit 1131 retrieves a task from the task queue 131, and in response to the assertion touch EINT signal, the bus control circuit 1131 can automatically initiate a data transmission operation. The processing unit 111 (i.e., the software) does not participate in the data transmission operation initiated by the bus control circuit 1131.

[0059] Figure 3C This is a flowchart illustrating the reporting of touch events by the processing unit according to an embodiment of the present invention. Please refer to... Figure 1 , Figure 2A and Figure 3C .

[0060] In step S332, the bus master 113 detects the touch EINT signal. For example, in this case, it is assumed that the polling circuit 1136 is disabled.

[0061] In step S334, the general interrupt controller 112 reports a touch interrupt request signal to the processing unit 111. Specific details regarding the reporting of the touch interrupt request signal by the general interrupt controller 112 can be found in the foregoing embodiments.

[0062] In step S336, in response to the touch interruption signal, the processing unit 111 generates a touch thread. For example, the touch thread may include multiple tasks such as sending data to the sensing device 120 and reading sensor data from the sensing device 120.

[0063] In step S338, the processing unit 111 sends the touch thread to the bus master 113. For example, after the processing unit 111 sends the touch thread to the bus master 113, the processing unit 111 will enter a sleep mode to save power.

[0064] In step S340, the bus master 113 executes a task of the touch thread. For example, the bus master 113 may execute one or more data transmission operations of the task to send data to the sensing device 120 and read sensor data from the sensing device 120. After the data transmission operation of the task is completed, the bus master 113 may send a task completion signal to the general interrupt controller 112.

[0065] In step S342, the general interrupt controller 112 receives the task completion signal from the bus master 113.

[0066] In step S344, the general interrupt controller 112 sends an SPI IRQ signal to the processing unit 111. Since the processing unit 111 is in sleep mode, the general interrupt controller 112 can use the SPI IRQ signal to wake up the processing unit 111.

[0067] In step S346, the processing unit 111 is woken up from the sleep mode to the working mode.

[0068] In step S348, the processing unit 111 reports the touch event. For example, the processing unit 111 can report the touch event to an application running on the processing unit 111. Therefore, the application running on the processing unit 111 can perform the operation corresponding to the touch event.

[0069] It should be noted that, Figure 3C In the process, steps S336, S338, S344, S346 and S348 are executed by software (e.g., processing unit 111), while steps S332, S334, S340 and S342 are executed by hardware (e.g., bus master 113 and GIC 112).

[0070] Figure 3D This is a flowchart illustrating how a processing unit reports touch events according to another embodiment of the present invention. Please refer to... Figure 1 , Figure 2A and Figure 3D .

[0071] Figure 3C and Figure 3D The difference lies in the fact that the polling circuit 1136 (i.e., hardware circuit) of the bus master 113 detects the touch EINT signal generated by the sensing device (step S362). In response to the detection of the touch EINT signal, the bus control circuit 1131 automatically initiates an SPI transmission operation (step S364), for example, automatically retrieving tasks sequentially from the task queue 131 and executing the retrieved tasks. Therefore, when the hardware functions of the bus master 113 (i.e., polling and data transmission) are disabled, Figure 3C The process in this context can be viewed as a traditional touch event reporting process. When the hardware function of the bus master 113 is enabled, Figure 3D The process in this context can be viewed as a hardware-enhanced touch event reporting process.

[0072] Figure 4A This is a flowchart illustrating the configuration process of the sensing device according to an embodiment of the present invention. Please refer to... Figure 1 , Figure 2A and Figure 4A .

[0073] In step S402, the bus control circuit 1131 is configured. Details of steps S316 and S402 can be found in step S302 of the embodiment shown in Figure 3.

[0074] In step S404, a data transmission operation is triggered. For example, the processing unit 111 can transmit the data required for a task to the bus control circuit 1131, and the bus control circuit 1131 can transmit the data of this task to the sensing device 120 through the bus 11.

[0075] In step S406, the bus control circuit 1131 instructs the GIC 120 to send an SPI IRQ signal to the processing unit 111. For example, after the data transmission operation of a task is completed, the bus control circuit 1131 can send a task completion signal to the GIC 120. The GIC 120 can then generate an SPI IRQ signal in response to the task completion signal and send the generated SPI IRQ signal to the processing unit 111.

[0076] In step S408, it is determined whether the configuration process of the sensing device 120 is complete. If it is determined that the configuration process of the sensing device 120 is complete, the process ends. If it is determined that the configuration process of the sensing device 120 is not yet complete, the process returns to step S404.

[0077] It is worth noting that when a data transfer operation for a task is required, the processing unit 111 must be interrupted once to send the required data to the bus control circuit 1131. Therefore, the bus control circuit 1131 can transmit the data required for this task to the sensing device 120 via the bus 11. However, the configuration process of the sensing device 120 may require multiple tasks, and the processing unit 111 may be interrupted once to execute... Figure 4A Continue the above steps until all tasks in the configuration process are completed.

[0078] Figure 4B This is a flowchart illustrating the configuration process of a sensing device according to another embodiment of the present invention. Please refer to... Figure 1 , Figure 2A and Figure 4B .

[0079] In step S412, the configuration process of the sensing device 120 is started.

[0080] In step S414, the processing unit 111 writes tasks into the task queue 131. For example, the configuration process of the sensing device 120 may include multiple tasks, and the processing unit 111 may write these tasks into the task queue 131 immediately before the bus control circuit 1131 executes them.

[0081] In step S416, the bus control circuit 1131 retrieves a task from the task queue. For example, if the task queue is not empty, the bus control circuit 1131 can retrieve one task from the task queue at a time.

[0082] In step S418, the data transmission operation of the task is triggered. For example, the processing unit 111 can transmit the data required for a task to the bus control circuit 1131, and the bus control circuit 1131 can transmit the data of this task to the sensing device 120 through the bus 11.

[0083] In step S420, it is determined whether task queue 131 is empty. If task queue 131 is empty, step S422 is executed. If task queue 131 is not empty, the process returns to step S416. For example, bus control circuit 1131 can detect the storage status of task queue 131 based on the values ​​stored in registers 141 and 143. Bus control circuit 1131 can use a specific register value in register 1134 to calculate the number of tasks that have been executed; for example, bus control circuit 1131 increments the value of the specific register by 1 each time a task is completed. When the value of the specific register reaches the hardware task count stored in register 141, bus control circuit 1131 knows that task queue 131 is empty. It should be noted that steps S416, S418, and S420 in block 430 can refer to a cycle of task execution.

[0084] In step S422, the bus control circuit 1131 instructs the GIC 120 to send an SPI IRQ signal to the processing unit 111. For example, after all data transmission operations of the configuration process are completed, the bus control circuit 1131 can send a task completion signal to the GIC 120, and then the GIC 120 can generate an SPI IRQ signal in response to the task completion signal and send the generated SPI IRQ signal to the processing unit 111.

[0085] In step S424, the configuration process ends. It should be noted that although the configuration process of the sensing device 120 may require multiple tasks, once all tasks in the configuration process are completed, Figure 4B Processing unit 111 in the process was interrupted once. (And...) Figure 4A Compared to the process in the middle, Figure 4B The process can convert multiple interrupts into a single interrupt during the configuration process of the sensing device 120, thereby reducing the load on the processing unit 111 and improving its performance. It should be noted that if the sensing device is a device other than a touchscreen or touch detection device, the touch event in the above embodiment can be referred to as a sensor event. Furthermore, bus 11 can be implemented using a bus other than the SPI bus.

[0086] In view of this, the present invention provides an interrupt handling method for a sensing device and its integrated circuit. The method utilizes a hardware polling circuit to detect interrupt signals emitted by the sensing device, sequentially retrieves tasks stored in a task queue, and executes the data transmission operation for each task by a bus control circuit to acquire sensor data from one or more sensors of the sensing device. When all tasks in the task queue are completed, the bus control circuit notifies a general interrupt controller to send an interrupt request signal to the processing unit. Therefore, the interrupt handling unit acquires sensor data from the sensing device to report sensor events to the application running on the processing unit. Thus, the present invention can reduce the load on the processing unit and improve its performance.

[0087] The topics described herein sometimes illustrate different components contained within or connected to other components. However, it should be understood that the multiple architectures depicted are merely examples, and many other architectures that implement the same functionality can actually be implemented. Conceptually, any arrangement of components that implement the same functionality is effectively “associated” to enable the desired functionality. Therefore, regardless of architecture or intermediate components, any two components combined in this document to achieve a particular function can be considered “associated” with each other to enable the desired functionality. Similarly, any two components so associating can also be considered “operationally connected” or “operationally coupled” to each other to achieve the desired functionality, and any two components so associating can also be considered “operationally connected” to each other to achieve the desired functionality. Specific examples of operationally coupled components include, but are not limited to, physically mating and / or physically interacting components and / or wirelessly interacting components and / or logically interacting and / or logically interactive components.

[0088] Furthermore, regarding any plural and / or singular terms used herein, those skilled in the art can, in light of context and / or application, convert them from plural to singular and / or from singular to plural where appropriate. For clarity, various singular / plural reciprocities may be explicitly stated herein.

[0089] Furthermore, those skilled in the art will understand that, generally, the terms used herein, and especially in the appended claims (e.g., the body of the appended claims), are generally meant as “open-ended” terms; for example, the term “comprising” should be interpreted as “comprising but not limited to,” the term “having” should be interpreted as “at least having,” the term “comprising” should be interpreted as “comprising but not limited to,” and so on. Those skilled in the art will also understand that if a specific quantity is intentionally listed in the appended claims, such intention will be explicitly listed in the claims, and the absence of such listing will not indicate such intention. For example, to aid understanding, the appended claims may include the use of the introductory phrases “at least one” and “one or more.” However, the use of such phrases should not be construed as implying that the introduction of the indefinite article "a" or "an" limits any particular claim containing such an introduced claim to an embodiment containing only one such listing, even when the same claim contains the introductory phrase "a or more" or "at least one" and indefinite articles such as "a" or "an," for example, "a and / or an" should be interpreted as meaning "at least one" or "one or more," this also applies to the use of definite articles used to introduce the claim listing. Furthermore, even when a specific number of introduced claim listings is explicitly listed, those skilled in the art will recognize that such listing should be interpreted as meaning at least the number listed; for example, in the absence of other modifiers, an unobstructed listing of "two listings" means at least two listings or two or more listings. Furthermore, when using a convention similar to "at least one of A, B, and C," those skilled in the art will understand the meaning of this convention, which generally means such interpretation (e.g., "a system having at least one of A, B, and C" will include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B together, having A and C together, having B and C together, and / or having A, B, and C together). Those skilled in the art will also understand that any transitional words and / or phrases in the specification, claims, or drawings that actually indicate two or more options should be understood to presuppose the possibility of including one, any one, or both of those options.For example, the phrase “A or B” would be understood as containing the possibility of “A” or “B” or “A and B”.

[0090] As can be seen from the foregoing, it is understood that various embodiments of the invention have been described herein for illustrative purposes, and various modifications can be made without departing from the scope and spirit of the invention. Therefore, the various embodiments disclosed herein are not intended to be limiting, and the true scope and spirit are determined by the appended claims.

Claims

1. An integrated circuit, comprising: processor; General-purpose interrupt controller; as well as A bus master controller, wherein the bus master controller is connected to a sensing device including one or more sensors, the bus master controller includes a bus control circuit and a polling circuit, wherein the polling circuit is used to detect whether an interrupt signal of the sensing device is asserted. In response to the polling circuit detecting that the interrupt signal has been asserted, the bus control circuit sequentially retrieves each of a plurality of tasks stored in the task queue of the memory, and executes one or more data transmission operations corresponding to each task to obtain sensor data from the one or more sensors of the sensing device. In response to the task completion signal generated by the bus control circuit, the general-purpose interrupt controller generates an interrupt request signal to be sent to the processor. In response to the interrupt request signal, the processor uses the sensor data obtained through the data transfer operation corresponding to each task to report sensor events.

2. The integrated circuit as described in claim 1, characterized in that, The polling circuit is disabled when the bus control circuit performs the data transmission operation corresponding to each task.

3. The integrated circuit as described in claim 2, characterized in that, The polling circuit is activated in response to the task completion signal.

4. The integrated circuit as described in claim 3, characterized in that, The bus master also includes a direct memory access controller, which is configured to fetch each task from the memory.

5. The integrated circuit as described in claim 4, characterized in that, The bus master also includes a first register and a second register, wherein a first value stored in the first register represents the hardware task count, and a second value stored in the second register represents the physical base address of the task queue.

6. The integrated circuit as described in claim 5, characterized in that, The bus master also includes a third register and a fourth register. When the integrated circuit starts up, the processor writes the task to the task queue, writes the first value to the first register and the second value to the second register, and when the processor completes the writing, sets the third value of the third register to 1. In response to the third value of the third register being set to 1, the bus control circuit begins to use the first value of the first register and the second value of the second register to sequentially retrieve the task from the task queue. The fourth value stored in the fourth register is used to enable or disable the hardware functions of polling and data transmission of the bus master.

7. The integrated circuit as described in claim 6, characterized in that, In response to the task queue being empty, the bus control circuit writes the third value of the third register to 0, and in response to the third value of the third register being set to 0, the processor begins writing new tasks to the task queue.

8. The integrated circuit as claimed in claim 1, characterized in that, The processor reports the sensor event to the application running on the processor, and the application performs one or more operations corresponding to the reported sensor event.

9. The integrated circuit as claimed in claim 1, characterized in that, The bus control circuit is connected to the sensing device via a serial peripheral interface bus, an internal integrated circuit bus, or a modified internal integrated circuit bus.

10. An interrupt handling method for a sensing device, used in an integrated circuit, wherein, The integrated circuit includes a processor, a general-purpose interrupt controller, and a bus master, and the bus master includes bus control circuitry and polling circuitry. The interrupt handling method includes: The polling circuit is used to detect whether the interrupt signal of the sensing device has been asserted. In response to the polling circuit detecting that the interrupt signal is asserted, the bus control circuit sequentially retrieves each of the multiple tasks stored in the task queue of the memory and performs a data transmission operation corresponding to each task to obtain sensor data detected by one or more sensors of the sensing device. In response to the task completion signal generated by the bus control circuit, the general interrupt controller sends an interrupt request signal to the processor. In response to the interrupt request signal, the sensor event is reported using the sensor data obtained by the processor using the data transfer operation corresponding to each task.

11. The interruption handling method of the sensing device as described in claim 10, characterized in that, The polling circuit is disabled when the bus control circuit performs the data transmission operation corresponding to each task.

12. The interruption handling method of the sensing device as described in claim 11, characterized in that, It further includes: enabling the polling circuit in response to the task completion signal.

13. The interruption handling method of the sensing device as described in claim 12, characterized in that, The bus master also includes a direct memory access controller, which is configured to fetch each task from the memory.

14. The interruption handling method of the sensing device as described in claim 13, characterized in that, The bus master also includes a first register and a second register, wherein a first value stored in the first register represents the hardware task count, and a second value stored in the second register represents the physical base address of the task queue.

15. The interruption handling method of the sensing device as described in claim 14, characterized in that, The bus master also includes a third register and a fourth register, and the method further includes: When the integrated circuit starts up, the processor writes the task into the task queue, and writes the first value in the first register and the second value in the second register. When the processor finishes writing, it sets the third value of the third register to 1; as well as In response to the third value of the third register being set to 1, the bus control circuit begins to use the first value of the first register and the second value of the second register to sequentially retrieve the task from the task queue. The fourth value stored in the fourth register is used to enable or disable the hardware functions of polling and data transmission of the bus master.

16. The interruption handling method of the sensing device as described in claim 15, characterized in that, It further includes: in response to the task queue being empty, using the bus control circuit to write the third value of the third register to 0, and in response to the third value of the third register being set to 0, using the processor to start writing new tasks to the task queue.

17. The interruption handling method of the sensing device as described in claim 10, characterized in that, The method involves running an application on the processor and further comprising: using the processor to report the sensor event to the application, and using the application to perform one or more operations corresponding to the reported sensor event.

18. The interruption handling method of the sensing device as described in claim 10, characterized in that, The bus control circuit is connected to the sensing device via a serial peripheral interface bus, an internal integrated circuit bus, or a modified internal integrated circuit bus.

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