Method, system, medium, terminal for multi-channel phase calibration of a radio frequency receiver

Abstract

The application provides a multi-channel phase calibration method, system, medium and terminal of a radio frequency receiver, comprising: obtaining I and Q sampling values of a to-be-calibrated signal on each receiving channel; for each receiving channel, compensating the direct current of the I and Q sampling values; performing FFT transformation on the I sampling value of the reference channel after direct current compensation to obtain a first discrete sequence; performing transformation processing on the points in the first discrete sequence; performing IFFT transformation on the first discrete sequence after transformation processing to obtain a second discrete sequence; calculating the phase difference of each calibration channel relative to the reference channel based on the second discrete sequence; and for each calibration channel, performing phase compensation based on the I and Q sampling values and the phase difference of the calibration channel. The multi-channel phase calibration method, system, medium and terminal of the radio frequency receiver utilize baseband signals for phase compensation, and can calibrate the random phase difference introduced by the phase-locked loop frequency division inside the radio frequency receiver.

Description

Technical Field

[0001] This invention relates to the technical field of phase calibration, and in particular to a multi-channel phase calibration method, system, medium, and terminal for an radio frequency receiver. Background Technology

[0002] like Figure 1 As shown, in an RF receiver with multiple receiving channels, the signal received from the antenna needs to be down-converted after amplification and filtering, and then sampled by an ADC after filtering and IQ demodulation to obtain a digital baseband signal.

[0003] Throughout the signal reception process, the analog circuitry of the RF receiver may exhibit delay differences; simultaneously, the clock signal generated by the RF receiver's phase-locked loop (PLL) module may have phase differences after frequency division. These factors combined introduce a random phase error into the baseband signals of each receiving channel. Unlike antenna phase correction, the phase error caused by PLL frequency division is not fixed; the PLL frequency division may have different error values ​​each time the chip is powered on. Due to the phase differences between channels, the synchronization between all channels of the entire system is significantly affected.

[0004] For multi-channel signal receiving systems, synchronization between channels is a crucial performance indicator, ensuring that the phase difference between channels does not become excessive. Traditional antenna-end phase compensation methods measure the phase difference at the antenna end and then use devices such as phase shifters to adjust it to a fixed value. However, the phase difference between channels in an RF receiver is not constant after each power-on, and traditional antenna-end phase compensation methods cannot adjust the random phase difference in the RF receiver, making them unsuitable for RF receiver applications. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a multi-channel phase calibration method, system, medium, and terminal for an RF receiver, which uses baseband signals for phase compensation and can calibrate the random phase difference introduced by the frequency division of the internal phase-locked loop of the RF receiver chip.

[0006] To achieve the above and other related objectives, this invention provides a multi-channel phase calibration method for an RF receiver, comprising the following steps: when a signal to be calibrated is input to M+1 receiving channels, acquiring the I-channel and Q-channel sampled values ​​of the signal to be calibrated on each receiving channel, where M≥1; for each receiving channel, performing DC compensation on the I-channel and Q-channel sampled values; selecting any one channel from the plurality of receiving channels as a reference channel, and the remaining M channels as calibration channels, and performing an FFT transform on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points; performing transformation processing on the points in the first discrete sequence; wherein, according to The transformation process is performed, where Z(n) represents the first discrete sequence, n represents the point number, and Z′ represents the transformed sequence. An IFFT transformation is performed on the transformed first discrete sequence to obtain a second discrete sequence with N points. For each point in the second discrete sequence, it is divided into a front part and a back part of equal length, and the front part forms a first sequence, while the back part forms a second sequence. The phase difference between each calibration channel and the reference channel is calculated based on the first sequence and the second sequence. For each calibration channel, phase compensation is performed based on the I-channel sampled value, Q-channel sampled value, and the phase difference.

[0007] In one embodiment of the present invention, for each receiving channel, DC compensation for the I-channel sampled values ​​and the Q-channel sampled values ​​includes the following steps:

[0008] Calculate the I-channel sampled value I i and the Q-channel sampled value Q i The mean D over a preset number of sampling periods Ii and D Qi , respectively serving as the DC estimation values ​​for the I-channel and Q-channel; where i represents the receiving channel number;

[0009] According to I i ′=I i -D Ii and Q i ′=Q i -D Qi Calculate the I-channel sampled value I after DC compensation respectively. i ′ and Q-path sampled value Q i ′.

[0010] In one embodiment of the present invention, the preset quantity is 2. m , where m represents a natural number.

[0011] In one embodiment of the present invention, calculating the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence includes the following steps:

[0012] calculate Where A(j) represents the first part, i represents the calibration channel number, and 0 <i≤M,I i (j) represents the I-channel sampled value of the i-th calibration channel;

[0013] calculate Where B(j) represents the latter part;

[0014] according to Obtain the phase difference.

[0015] In one embodiment of the present invention, phase compensation based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel includes the following steps:

[0016] According to I i ′=I i cosφ i +Q i sinφ i The I-channel sampled values ​​of the calibration channel are calibrated; where I i Q i φ represents the DC-compensated sampled values ​​of the I and Q channels of the calibration channel. i I represents the phase difference between the calibration channel and the reference channel. i ′ represents the I-channel sampled value after phase compensation of the calibration channel, and i represents the calibration channel number;

[0017] According to Q′ i =-I i sinφ i +Q i cosφ i The Q-channel sampled values ​​of the calibration channel are calibrated; where Q′ i The Q-channel sample value is the phase-compensated value of the calibration channel.

[0018] In one embodiment of the present invention, the bit width of both the I-channel sampled value and the Q-channel sampled value is 16 bits; the bit width of both the first discrete sequence and the second discrete sequence is 32 bits.

[0019] This invention provides a multi-channel phase calibration system for an RF receiver, comprising a sample value acquisition module, a DC compensation module, a first discrete sequence acquisition module, a transformation processing module, a second discrete sequence acquisition module, a phase difference calculation module, and a calibration module;

[0020] The sampling value acquisition module is used to acquire the I-channel sampling value and Q-channel sampling value of the signal to be calibrated on each receiving channel after the signal to be calibrated is input to M+1 receiving channels, where M≥1;

[0021] The DC compensation module is used to compensate for the DC of the I-channel sampled value and the Q-channel sampled value for each receiving channel;

[0022] The first discrete sequence acquisition module is used to select any one channel as a reference channel from the plurality of receiving channels, and the remaining M channels as calibration channels, and to perform FFT transformation on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points.

[0023] The transformation processing module is used to perform transformation processing on the points in the first discrete sequence; wherein, according to The transformation process is performed, where Z(n) represents the first discrete sequence, n represents the point number, and Z′ represents the transformed sequence.

[0024] The second discrete sequence acquisition module is used to perform IFFT transformation on the first discrete sequence after transformation processing to obtain a second discrete sequence with N points;

[0025] The phase difference calculation module is used to divide each point in the second discrete sequence into a front part and a back part of equal length, and to form a first sequence from the front part and a second sequence from the back part; and to calculate the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence.

[0026] The calibration module is used to perform phase compensation for each calibration channel based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel.

[0027] The present invention provides a storage medium storing a computer program thereon, which, when executed by a processor, implements the above-described multi-channel phase calibration method for an RF receiver.

[0028] This invention provides a multi-channel phase calibration terminal for an RF receiver, comprising: a processor and a memory;

[0029] The memory is used to store computer programs;

[0030] The processor is used to execute the computer program stored in the memory, so that the multi-channel phase calibration terminal of the radio frequency receiver performs the above-described multi-channel phase calibration method for the radio frequency receiver.

[0031] In one embodiment of the present invention, the multi-channel phase calibration terminal of the radio frequency receiver adopts an FPGA.

[0032] As described above, the multi-channel phase calibration method, system, medium, and terminal of the radio frequency receiver of the present invention have the following characteristics:

[0033] Beneficial effects:

[0034] (1) Phase compensation on the baseband signal can calibrate the random phase difference introduced by the local oscillator signal;

[0035] (2) By constructing an auxiliary signal sequence, the influence of the IQ imbalance of the baseband signal on the phase difference calculation is avoided, and the accuracy of the phase difference calculation is improved.

[0036] (3) It is applicable to radio frequency receivers with multiple channels, can realize phase synchronization between multiple receiving channels and has high accuracy, and the method can also be integrated into the radio frequency receiver. Attached Figure Description

[0037] Figure 1 The diagram shows a structural schematic of a radio frequency receiver in one embodiment of the prior art.

[0038] Figure 2 The flowchart shown is an embodiment of the multi-channel phase calibration method for the radio frequency receiver of the present invention.

[0039] Figure 3 The flowchart shown is an embodiment of the phase difference calculation of the present invention;

[0040] Figure 4 The flowchart shown illustrates the phase compensation of the present invention in one embodiment;

[0041] Figure 5 The diagram shows an architecture schematic of a verification platform for the multi-channel phase calibration method of the radio frequency receiver of the present invention in one embodiment.

[0042] Figure 6 Displayed as Figure 5 A schematic diagram of the six channels of the verification platform before calibration in one embodiment;

[0043] Figure 7 Displayed as Figure 5 A schematic diagram of the calibrated I-channel signal of the six channels in one embodiment of the verification platform;

[0044] Figure 8 The diagram shown is a structural schematic of a multi-channel phase calibration system for an RF receiver according to an embodiment of the present invention.

[0045] Figure 9 The diagram shown is a structural schematic of a multi-channel phase calibration terminal of the radio frequency receiver of the present invention in one embodiment. Detailed Implementation

[0046] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features described therein can be combined with each other.

[0047] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0048] The multi-channel phase calibration method, system, medium, and terminal of the present invention for an RF receiver are based on baseband signal phase compensation. Utilizing the phase addition and subtraction characteristics during mixing, it can calibrate the random phase difference introduced by the frequency division of the internal phase-locked loop of the RF receiver chip. When performing phase calibration on the baseband signal, the factors that significantly affect calibration accuracy are the DC input mixed into the signal and the IQ imbalance of the IQ signal. Therefore, estimating the phase difference between channels based on the influence of these two factors effectively improves calibration accuracy.

[0049] like Figure 2 As shown, in one embodiment, the multi-channel phase calibration method of the radio frequency receiver of the present invention includes the following steps:

[0050] Step S1: After the signal to be calibrated is input into N+1 receiving channels, obtain the I-channel sampling value and Q-channel sampling value of the signal to be calibrated on each receiving channel, where N≥1.

[0051] Specifically, the signal to be calibrated is simultaneously input into multiple receiving channels of the radio frequency receiver, and I-channel sampled values ​​(I0, I1, ..., I) are collected on each receiving channel. N+1 ) and Q-channel sampled values ​​(Q0, Q1, ..., Q N+1 Preferably, the bit width of both the I-channel sample value and the Q-channel sample value is 16 bits.

[0052] In one embodiment of the present invention, the signal to be calibrated is the signal after quadrature downconversion by the radio frequency receiver.

[0053] Step S2: For each receiving channel, compensate for the DC of the I-channel sampled value and the Q-channel sampled value.

[0054] In one embodiment of the present invention, for each receiving channel, DC compensation for the I-channel sampled values ​​and the Q-channel sampled values ​​includes the following steps:

[0055] 21) Calculate the I-channel sampled value I i and the Q-channel sampled value Q i The mean D over a preset number of sampling periods Ii and D Qi , respectively, are used as the DC estimation values ​​for the I-channel and Q-channel; where i represents the receiving channel number.

[0056] Specifically, the first step is to calculate the I-channel sampling value I. i and the Q-channel sampled value Q i The cumulative values ​​from multiple sampling periods are then used to calculate the average value as the DC estimate.

[0057] Taking the sampled values ​​I0 from channel 0 and Q0 from channel Q as an example, calculate the cumulative values ​​of I0 and Q0 over N sampling periods. Then calculate the DC estimate D in I0 and Q0. I0 =S I0 >>m,D Q0 =S Q0 >>m, N=2 m m is an integer, and >> indicates a right shift operation.

[0058] 22) According to I′ i =I i -D Ii and Q′ i =Q i -D Qi Calculate the I-channel sampled value I′ after DC compensation respectively. i and Q-path sampled value Q′ i .

[0059] Step S3: Select any one of the multiple receiving channels as the reference channel, and the remaining M channels as calibration channels. Perform FFT transformation on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points.

[0060] Specifically, any one of the multiple receiving channels is selected as the reference channel, and the remaining M channels are used as calibration channels. The reference channel is set as channel 0, and the DC-compensated sample value of channel I is I′0. Then, after FFT transformation, a first discrete sequence Z = FFT(I′0) with N points is obtained. Preferably, the bit width of the first discrete sequence is 32 bits.

[0061] Step S4: Transform the points in the first discrete sequence; wherein, according to The transformation process is performed, where Z(n) represents the first discrete sequence, n represents the point number, and Z′ represents the transformed sequence.

[0062] Specifically, for the first discrete sequence Z(n), its first point, i.e., the point n=1, remains unchanged; for The point is divided into two parts, the high 16 bits and the low 16 bits, and each part is left-shifted by one bit with a sign, and then combined into a number with a width of 32 bits; for The part is set to zero, thus obtaining the first discrete sequence Z′ after transformation.

[0063] Step S5: Perform IFFT transformation on the first discrete sequence after transformation to obtain a second discrete sequence with N points.

[0064] Specifically, the first discrete sequence Z′ after transformation is subjected to IFFT transformation to obtain a second discrete sequence X(n) with N points and 32 bits.

[0065] Step S6: For each point in the second discrete sequence, divide it into a front part and a back part of equal length, and form a first sequence from the front part and a second sequence from the back part; calculate the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence.

[0066] Specifically, such as Figure 3 As shown, the high 16 bits of X(n) are used to form sequence A(n), and the low 16 bits are used to form sequence B(n). Sequences A(n) and B(n) are then multiplied and added with the DC-compensated sampled values ​​of the I-channel of the channel to be calibrated.

[0067]

[0068]

[0069] Where i represents the channel number, 0 <i≤M,I i (j) represents the I-channel sampled value of the i-th calibration channel.

[0070] Input the two accumulated values ​​S1 and S2 into the CORDIC calculation module, and then... This allows us to obtain the phase difference φ1, φ2, ..., φ between the channel to be calibrated and the reference channel. M .

[0071] Step S7: For each calibration channel, perform phase compensation based on the I-channel sampled value, Q-channel sampled value and phase difference of the calibration channel.

[0072] Specifically, such as Figure 4As shown, phase compensation based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel includes the following steps:

[0073] 71) According to I i ′=I i cosφ i +Q i sinφ i The I-channel sampled values ​​of the calibration channel are calibrated; where I i Q i φ represents the DC-compensated sampled values ​​of the I and Q channels of the calibration channel. i I represents the phase difference between the calibration channel and the reference channel. i ′ represents the I-channel sampled value after phase compensation of the calibration channel, and i represents the calibration channel number.

[0074] 72) According to Q′ i =-I i sinφ i +Q i cosφ i The Q-channel sampled values ​​of the calibration channel are calibrated; where Q′ i The Q-channel sample value is the phase-compensated value of the calibration channel.

[0075] The multi-channel phase calibration method for the radio frequency receiver of the present invention will be further illustrated below through specific embodiments.

[0076] In this embodiment, the radio frequency receiver includes two receiving channels. One receiving channel is designated as a reference channel, and the other is designated as a calibration channel.

[0077] (a) The signal to be calibrated is input into two receiving channels to obtain the I-channel sampling value and Q-channel sampling value of the two receiving channels: I1, Q1, I2, Q2, each with a bit width of 16 bits;

[0078] (b) DC calibration is performed on the IQ signals of the two receiving channels. First, the DC quantity in the signal is calculated, and then DC compensation is performed. Taking the I-channel sample value I0 of the reference channel as an example, the signal is calibrated using a 2-channel DC calibration method. m The summation of each sample value yields the accumulated value. N=2 m Then, the average value is calculated to obtain the DC estimate. The number of sampling points can be selected depending on the calibration frequency. To reduce circuit area and save computational resources, preferably, the number of sampling points is 2. m .

[0079] (c) Perform FFT transformation on the I0 signal sequence after DC compensation to obtain the first discrete sequence Z = FFT(I0′) of the frequency domain signal with a bit width of 32 bits. Perform the following transformation on Z to obtain the first discrete sequence Z′ after transformation.

[0080]

[0081] Then, perform an IFFT transform on Z′ to calculate the second discrete sequence X(n) = A(n) + i*B(n) with a bit width of 32 bits, n≤N, and A(n) and B(n) are the high 16 bits and low 16 bits of the second discrete sequence, respectively.

[0082] (d) Calculate the multiplication and addition values ​​of I1 with A and B respectively. and

[0083] The expected value is E(S1) = cosφ + δ s1 (N), where δ s1 (N) represents the error introduced by the number of sampling points N. The larger the value of N, or the closer it is to... The smaller the error is when it is an integer multiple of the frequency, where f is the signal frequency and fs is the sampling frequency. Similarly, E(S2)=-sinφ+δ s2 (N). Therefore, we can conclude that...

[0084] (e) The arctangent value is the desired phase difference, obtained from the phase difference tangent. Preferably, the CORDIC algorithm is used to estimate the phase difference.

[0085] (f) Perform phase compensation on the IQ baseband signal of the calibration channel based on the estimated phase difference between the reference channel and the calibration channel.

[0086] To verify the effectiveness of the multi-channel phase calibration method for the RF receiver of this invention, the method was implemented using an FPGA and then verified. The overall block diagram of the test platform is shown below. Figure 5 As shown, a test calibration signal is input to the six receiving channels of the RF receiver chip. After down-mixing, the test calibration signal is input to the FPGA, where the baseband signals with phase differences from the six channels are captured. DC compensation, first discrete sequence generation, transformation processing, second discrete sequence generation, phase difference calculation, and phase difference compensation are implemented in the FPGA.

[0087] The specific implementation conditions during testing are as follows: A test signal of 1402.5MHz is input; the local oscillator of the RF receiver chip is set to 1400MHz; the frequency of the down-converted baseband signal is 2.5MHz; the six channels are named ch0-ch5; and the I-channel signals of the six uncalibrated channels are as follows: Figure 6As shown, the phase differences of ch1-ch5 relative to ch0 are -140.74°, 168.27°, 114.69°, 129.87°, and -48.04°, respectively. The calibrated phase differences of ch1-ch5 relative to ch0 are -0.41°, -0.24°, -1.29°, -0.58°, and -0.78°, respectively. Figure 7 As shown.

[0088] After verification using an FPGA test platform, the phase consistency between channels was significantly improved after calibration using this method. The phase difference after calibration was no more than 1.5°, and the delay difference between channels was significantly reduced.

[0089] like Figure 8 As shown, in one embodiment, the multi-channel phase calibration system of the radio frequency receiver of the present invention includes a sample value acquisition module 81, a DC compensation module 82, a first discrete sequence acquisition module 83, a transformation processing module 84, a second discrete sequence acquisition module 85, a phase difference calculation module 86, and a calibration module 87.

[0090] The sampling value acquisition module 81 is used to acquire the I-channel sampling value and Q-channel sampling value of the signal to be calibrated on each of the M+1 receiving channels after the signal to be calibrated is input to M+1 receiving channels, where M≥1.

[0091] The DC compensation module 82 is connected to the sampling value acquisition module 81 and is used to compensate the DC of the I-channel sampling value and the Q-channel sampling value for each receiving channel.

[0092] The first discrete sequence acquisition module 83 is connected to the DC compensation module 82 and is used to select any one channel as a reference channel from the plurality of receiving channels, the remaining M channels as calibration channels, and perform FFT transformation on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points.

[0093] The transformation processing module 84 is connected to the first discrete sequence acquisition module 83 and is used to perform transformation processing on the points in the first discrete sequence; wherein, according to The transformation process is performed, where Z(n) represents the first discrete sequence, n represents the point number, and Z′ represents the transformed sequence.

[0094] The second discrete sequence acquisition module 85 is connected to the transformation processing module 84 and is used to perform IFFT transformation on the first discrete sequence after transformation processing to obtain a second discrete sequence with N points.

[0095] The phase difference calculation module 86 is connected to the second discrete sequence acquisition module 85, and is used to divide each point in the second discrete sequence into a front part and a back part of equal length, and to form a first sequence from the front part and a second sequence from the back part; and to calculate the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence.

[0096] The calibration module 87 is connected to the phase difference calculation module 86 and is used to perform phase compensation for each calibration channel based on the DC-compensated I-channel sampled value, Q-channel sampled value and the phase difference of the calibration channel.

[0097] The structure and principle of the sampling value acquisition module 81, DC compensation module 82, first discrete sequence acquisition module 83, transformation processing module 84, second discrete sequence acquisition module 85, phase difference calculation module 86 and calibration module 87 correspond one-to-one with the steps in the multi-channel phase calibration method of the above-mentioned radio frequency receiver, so they will not be described again here.

[0098] It should be noted that the division of the various modules in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, these modules can be implemented entirely in software via processing element calls, entirely in hardware, or partially in software calls via processing elements and partially in hardware. For example, module x can be a separate processing element or integrated into a chip within the device. Additionally, module x can be stored as program code in the device's memory, invoked and executed by a processing element. The implementation of other modules is similar. These modules can be fully or partially integrated together or implemented independently. The processing element mentioned here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each of the above modules can be completed through integrated logic circuits in the hardware of the processor element or through software instructions. These modules can be one or more integrated circuits configured to implement the above methods, such as one or more Application Specific Integrated Circuits (ASICs), one or more Digital Signal Processors (DSPs), one or more Field Programmable Gate Arrays (FPGAs), etc. When a module is implemented through processing element scheduler code, the processing element can be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. These modules can be integrated together to implement a System-on-a-Chip (SOC).

[0099] The storage medium of the present invention stores a computer program, which, when executed by a processor, implements the aforementioned multi-channel phase calibration method for an RF receiver. Preferably, the storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disk, USB flash drive, memory card, or optical disk.

[0100] like Figure 9 As shown, in one embodiment, the multi-channel phase calibration terminal of the radio frequency receiver of the present invention includes a processor 91 and a memory 92.

[0101] The memory 92 is used to store computer programs.

[0102] The memory 92 includes various media capable of storing program code, such as ROM, RAM, magnetic disk, USB flash drive, memory card, or optical disk.

[0103] The processor 91 is connected to the memory 92 and is used to execute the computer program stored in the memory 92 so that the multi-channel phase calibration terminal of the radio frequency receiver performs the above-described multi-channel phase calibration method of the radio frequency receiver.

[0104] Preferably, the processor 91 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0105] Preferably, the multi-channel phase calibration terminal of the radio frequency receiver adopts an FPGA.

[0106] In summary, the multi-channel phase calibration method, system, medium, and terminal of the RF receiver of the present invention perform phase compensation on the baseband signal, which can calibrate the random phase difference introduced by the local oscillator signal. By constructing an auxiliary signal sequence, the influence of IQ imbalance of the baseband signal on the phase difference calculation is avoided, thus improving the accuracy of the phase difference calculation. It is applicable to RF receivers with multiple channels, can achieve phase synchronization between multiple receiving channels, and has high accuracy. Furthermore, this method can be integrated into the RF receiver itself. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial application value.

[0107] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A multi-channel phase calibration method for an RF receiver, characterized in that: Includes the following steps: When the signal to be calibrated is input to M+1 receiving channels, the I-channel sampled value and Q-channel sampled value of the signal to be calibrated on each receiving channel are obtained, where M≥1; For each receiving channel, DC compensation is performed on the I-channel sampled value and the Q-channel sampled value; Select any one of the M+1 receiving channels as a reference channel, and the remaining M channels as calibration channels. Perform FFT transformation on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points. The points in the first discrete sequence are transformed; wherein, according to Perform the transformation process. This represents the first discrete sequence. Indicates the point number. This represents the sequence after the transformation. Perform an IFFT transform on the first discrete sequence after transformation to obtain a second discrete sequence with N points; For each point in the second discrete sequence, it is divided into a front part and a back part of equal length, and the front part is combined into a first sequence and the back part is combined into a second sequence; the phase difference of each calibration channel relative to the reference channel is calculated based on the first sequence and the second sequence; For each calibration channel, phase compensation is performed based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel.

2. The multi-channel phase calibration method for an RF receiver according to claim 1, characterized in that: For each receiving channel, DC compensation for the I-channel sampled values ​​and the Q-channel sampled values ​​includes the following steps: Calculate the I-channel sampled value and the Q-channel sampled value The mean value over a preset number of sampling periods and , respectively serving as the DC estimation values ​​for the I-channel and Q-channel; where i represents the receiving channel number; according to and Calculate the I-channel sampled values ​​after DC compensation respectively and Q-path sampling values , which serves as the IQ sample value for calculating the phase difference and corrected phase.

3. The multi-channel phase calibration method for an RF receiver according to claim 2, characterized in that: The preset quantity is 2 m , where m represents a natural number.

4. The multi-channel phase calibration method for an RF receiver according to claim 1, characterized in that: Calculating the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence includes the following steps: calculate ,in The first part indicates the calibration channel number. , This represents the I-channel sampled value of the i-th calibration channel; calculate ,in Indicates the latter part; according to Obtain the phase difference.

5. The multi-channel phase calibration method for an RF receiver according to claim 1, characterized in that: Phase compensation based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel includes the following steps: according to The I-channel sampled values ​​of the calibration channel are calibrated; wherein These are the DC-compensated sampled values ​​of the I and Q channels of the calibration channel. The phase difference between the calibration channel and the reference channel. The value of the I-channel sample after phase compensation of the calibration channel is given, where i represents the calibration channel number; according to The Q-channel sampled values ​​of the calibration channel are calibrated; wherein The Q-channel sample value is the phase-compensated value of the calibration channel.

6. The multi-channel phase calibration method for an RF receiver according to claim 1, characterized in that: The bit width of both the I-channel sampled value and the Q-channel sampled value is 16 bits; the bit width of both the first discrete sequence and the second discrete sequence is 32 bits.

7. A multi-channel phase calibration system for an RF receiver, characterized in that: It includes a sample value acquisition module, a DC compensation module, a first discrete sequence acquisition module, a transformation processing module, a second discrete sequence acquisition module, a phase difference calculation module, and a calibration module; The sampling value acquisition module is used to acquire the I-channel sampling value and Q-channel sampling value of the signal to be calibrated on each receiving channel after the signal to be calibrated is input to M+1 receiving channels, where M≥1; The DC compensation module is used to compensate for the DC of the I-channel sampled value and the Q-channel sampled value for each receiving channel; The first discrete sequence acquisition module is used to select any one of the M+1 receiving channels as a reference channel, the remaining M channels as calibration channels, and perform FFT transformation on the DC-compensated I-channel sampled values ​​of the reference channel to obtain a first discrete sequence with N points. The transformation processing module is used to perform transformation processing on the points in the first discrete sequence; wherein, according to Perform the transformation process. This represents the first discrete sequence. Indicates the point number. This represents the sequence after the transformation. The second discrete sequence acquisition module is used to perform IFFT transformation on the first discrete sequence after transformation processing to obtain a second discrete sequence with N points; The phase difference calculation module is used to divide each point in the second discrete sequence into a front part and a back part of equal length, and to form a first sequence from the front part and a second sequence from the back part; and to calculate the phase difference of each calibration channel relative to the reference channel based on the first sequence and the second sequence. The calibration module is used to perform phase compensation for each calibration channel based on the I-channel sampled value, Q-channel sampled value, and phase difference of the calibration channel.

8. A storage medium having a computer program stored thereon, characterized in that, When executed by the processor, the program implements the multi-channel phase calibration method for the radio frequency receiver as described in any one of claims 1 to 6.

9. A multi-channel phase calibration terminal for an RF receiver, characterized in that, include: Processor and memory; The memory is used to store computer programs; The processor is used to execute the computer program stored in the memory to cause the multi-channel phase calibration terminal of the radio frequency receiver to perform the multi-channel phase calibration method of the radio frequency receiver according to any one of claims 1 to 6.

10. The multi-channel phase calibration terminal for the radio frequency receiver according to claim 9, characterized in that: The multi-channel phase calibration terminal of the radio frequency receiver uses an FPGA.

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