A system and method for realizing low static current of vehicle-mounted central control STR mode

Abstract

The application discloses a kind of system and method for realizing vehicle control STR mode low static current in the field of automotive electronics, including power supply unit, power supply unit is connected with control unit, processor unit and storage unit respectively, control unit is connected with processor unit and storage unit respectively, and processor unit is connected with storage unit.The system uses power supply unit to power control unit, and at the same time, the control unit also controls the power supply unit to power the processor unit and the storage unit, to realize the wake-up and sleep function of the system.The voltage threshold of the power supply unit and the memory sleep state of the control unit jointly determine the wake-up and sleep logic of the system, i.e.STR mode or non-STR mode.In STR mode, the low static power consumption of the power supply unit and the optimization of the system are the core elements to realize the low static current of the system.

Description

Technical Field

[0001] This invention relates to a system and method for achieving low quiescent current in the STR mode of in-vehicle central control in the field of automotive electronics technology. Background Technology

[0002] Currently, in-car navigation systems are a crucial function of modern vehicles, allowing drivers to conveniently access route information, music entertainment, and intelligent control services. To provide a better user experience, rapid startup speed is a key objective for these systems. They are equipped with high-performance processors, large-capacity memory, and high-definition screens, which enhance system response speed and image processing capabilities. Support for STR (Sleep Mode) has become an important factor in achieving faster startup times. However, STR sleep mode significantly increases quiescent current, preventing the system from operating in this mode for extended periods and impacting battery life. Summary of the Invention

[0003] The purpose of this invention is to provide a system and method for achieving low quiescent current in the STR mode of in-vehicle central control. This invention improves the quiescent current of the system in STR sleep mode from both hardware and software perspectives, thereby increasing the time the system can remain in STR sleep mode and improving the customer experience.

[0004] To achieve the above objectives, the present invention provides a system for realizing low static current in vehicle central control STR mode, including a power supply unit, which is connected to a control unit, a processor unit and a storage unit respectively. The control unit is connected to the processor unit and the storage unit respectively, and the processor unit is connected to the storage unit.

[0005] As a further improvement of the present invention, the control unit includes an MCU, the processor unit includes a SOC, the storage unit includes a DRAM, and the power supply unit includes a Power. The MCU, SOC, and Power are all connected to an electronic switch Switch. The electronic switch Switch is connected to the DRAM. The MCU is also connected to the SOC and Power respectively. The Power is connected to the SOC, and the SOC is also connected to the DRAM.

[0006] As a further improvement of the present invention, Power includes switching power supply chips MPQ4326, MPQ4321, TPS628502, TPS62887, MPQ4323, and MPQ2179. The switching power supply chips MPQ4326, MPQ4321, and MPQ4323, as well as the DET Module, are all connected to a 12V battery.

[0007] The MPQ4326 switching power supply chip is connected to the TLV70218 LDO chip, the TPS628502 switching power supply chip, the TPS62887 switching power supply chip, and the TPS6593 PMU chip, respectively. The DET Module is connected to the R7F7017083AFP MCU chip. The MPQ4321 switching power supply chip is connected to the TLV70233 LDO chip. The TLV70233 LDO chip is connected to the R7F7017083AFP MCU chip and the electronic switch Switch, respectively.

[0008] The electronic switch is connected to the R7F7017083AFP chip of the MCU. The AC8025H chip of the SOC is connected to the R7F7017083AFP chip of the MCU. The R7F7017083AFP chip of the MCU is also connected to the TLV70218 chip of the LDO, the TPS628502 chip of the switching power supply, the TPS62887 chip of the switching power supply, and the TPS6593 chip of the PMU.

[0009] The MPQ4323 and MPQ2179 switching power supply chips are connected. Both the MPQ4323 and MPQ2179 chips are connected to the R7F7017083AFP chip of the MCU. The MPQ2179 chip is connected to the vehicle load module. The vehicle load module is connected to the AC8025H chip of the SOC. The AC8025H chip of the SOC is also connected to the TPS6593 chip of the PMU and the TPS62887 switching power supply chip.

[0010] Compared with existing technologies, the advantages of this invention lie in that the system uses a power supply unit to power the control unit, while the control unit also controls the power supply unit to power the processor unit and the storage unit, thereby realizing the system's wake-up and sleep functions. The voltage threshold of the power supply unit and the sleep state remembered by the control unit jointly determine the system's wake-up and sleep logic, i.e., STR mode or non-STR mode. In STR mode, the low static power consumption of the power supply unit and system optimization are the core elements for achieving low quiescent current in the system.

[0011] To achieve the above objectives, the present invention also provides a method for achieving low quiescent current in the STR mode of an in-vehicle central control system, comprising the following:

[0012] 1. STR mode hibernation;

[0013] 2. Wake up in STR mode;

[0014] 3. Switching between STR mode wake-up state and non-STR mode sleep state;

[0015] 4. Switching between non-STR mode sleep state and non-STR mode wake state.

[0016] As a further improvement of the present invention, the STR mode hibernation specifically includes the following:

[0017] 1.1 After the MCU detects the sleep command, it notifies the SOC to initiate the system sleep process via the UART bus;

[0018] 1,2, The MCU controls the switch to switch to BU3.3V output via the Switch Pin, keeping DDR Reset Pin2 at a high level;

[0019] 1.3 After the SOC completes the information backup, it notifies the MCU that it is ready via the UART bus. The MCU then controls the Power to turn off Power1 and configures the Standby Pin to a high level via the EN Pin.

[0020] 1.4, This completes the STR mode hibernation.

[0021] As a further improvement of the present invention, STR mode wake-up specifically includes the following:

[0022] 2.1 Upon receiving the wake-up signal, control Power to turn on Power1;

[0023] 2.2 Read the Standby Pin status and confirm that it is in STR sleep mode before entering system wake-up mode;

[0024] 2.3 After the system wake-up is complete, a wake-up completion message is sent to the MCU via the UART bus;

[0025] 2.4, Control the switch to DDR Reset Pin1 state via the Switch Pin;

[0026] 2.5, STR mode wake-up is now complete.

[0027] As a further improvement to the present invention, the specific details of the switching between STR mode wake-up state and non-STR mode sleep state are as follows.

[0028] Non-STR mode can be achieved by either of the following two conditions: condition 1 is set in the user interface, and condition 2 is that the battery voltage of the car's electrical system is below 9V for more than 1 minute.

[0029] Under condition 1 or condition 2, non-STR mode sleep can be completed through the following operations;

[0030] 3.1 After receiving the system's command to enter non-STR mode sleep mode, the system notifies the SOC via the UART bus. The SOC then sends the information that needs to be memorized and prepared to the MCU via the UART bus.

[0031] 3.2 The MCU controls Power to turn off Power1 and Power2 via the EN Pin, and configures the Standby Pin to a low level. Then the MCU enters the system sleep state.

[0032] 3.3, This completes the non-STR mode sleep process.

[0033] As a further improvement to the present invention, the specific details of the switching between non-STR mode sleep state and non-STR mode wake-up state are as follows.

[0034] 4.1 After receiving the wake-up command indicating that the system has entered non-STR mode, the MCU controls Power1 and Power2 to turn on via the EN Pin;

[0035] 4.2 After the SOC is powered on, the Standby Pin status is detected and determined to be in non-STR mode wake-up state;

[0036] 4.3 The SOC completes DRAM boot via DDR Reset Pin1 and DDR Pins;

[0037] 4.4, This completes the non-STR mode wake-up process.

[0038] Compared with the prior art, the beneficial effects of the present invention are that it can effectively reduce the energy consumption of the system, increase the time the system can maintain in STR sleep mode, improve the user experience, and at the same time help to improve battery life; it can flexibly realize the ability to switch between STR mode and non-STR mode, providing a convenient operation method for system software; it also flexibly realizes the switching between sleep and wake-up in STR mode and sleep and wake-up in non-STR mode, which can realize efficient and stable operation of the central control system. Attached Figure Description

[0039] Figure 1 This is a block diagram of the system configuration of the present invention.

[0040] Figure 2 This is a hardware logic block diagram of the STR mode wake-up and sleep modes of the present invention.

[0041] Figure 3 This is a flowchart of the STR mode software sleep process of the present invention.

[0042] Figure 4 This is a flowchart of the STR mode software sleep process of the present invention.

[0043] Figure 5This is a decomposition diagram of the static current in the sleep state of the STR mode of the present invention.

[0044] Figure 6 This is a current consumption table for the STR mode sleep state of the present invention. Implementation

[0045] The present invention will be further described below with reference to the accompanying drawings:

[0046] like Figure 1-6 The system shown is a system for achieving low static current in vehicle central control STR mode, including a power supply unit, which is connected to a control unit, a processor unit and a storage unit respectively. The control unit is connected to the processor unit and the storage unit respectively, and the processor unit is connected to the storage unit.

[0047] The control unit includes an MCU, the processor unit includes a SOC, the storage unit includes DRAM, and the power supply unit includes a Power. The MCU, SOC, and Power are all connected to an electronic switch. The electronic switch is connected to the DRAM. The MCU is also connected to the SOC and Power respectively. The Power is connected to the SOC, and the SOC is also connected to the DRAM.

[0048] The power supply includes the MPQ4326, MPQ4321, TPS628502, TPS62887, MPQ4323, and MPQ2179 switching power supply chips. The MPQ4326, MPQ4321, and MPQ4323 chips, as well as the DET Module, are all connected to a 12V battery.

[0049] The MPQ4326 switching power supply chip is connected to the TLV70218 LDO chip, the TPS628502 switching power supply chip, the TPS62887 switching power supply chip, and the TPS6593 PMU chip, respectively. The DET Module is connected to the R7F7017083AFP MCU chip. The MPQ4321 switching power supply chip is connected to the TLV70233 LDO chip. The TLV70233 LDO chip is connected to the R7F7017083AFP MCU chip and the electronic switch Switch, respectively.

[0050] The electronic switch is connected to the R7F7017083AFP chip of the MCU. The AC8025H chip of the SOC is connected to the R7F7017083AFP chip of the MCU. The R7F7017083AFP chip of the MCU is also connected to the TLV70218 chip of the LDO, the TPS628502 chip of the switching power supply, the TPS62887 chip of the switching power supply, and the TPS6593 chip of the PMU.

[0051] The MPQ4323 and MPQ2179 switching power supply chips are connected. Both the MPQ4323 and MPQ2179 chips are connected to the R7F7017083AFP chip of the MCU. The MPQ2179 chip is connected to the vehicle load module. The vehicle load module is connected to the AC8025H chip of the SOC. The AC8025H chip of the SOC is also connected to the TPS6593 chip of the PMU and the TPS62887 switching power supply chip.

[0052] like Figure 1-6 This paper presents a method for achieving low quiescent current in the STR mode of an in-vehicle central control system, which includes the following:

[0053] 1. STR mode hibernation.

[0054] 1.1 After the MCU detects the sleep command, it notifies the SOC to initiate the system sleep process via the UART bus;

[0055] 1,2, The MCU controls the switch to switch to BU3.3V output via the Switch Pin, keeping DDR Reset Pin2 at a high level;

[0056] 1.3 After the SOC completes the information backup, it notifies the MCU that it is ready via the UART bus. The MCU then controls the Power to turn off Power1 and configures the Standby Pin to a high level via the EN Pin.

[0057] 1.4, This completes the STR mode hibernation.

[0058] 2. STR mode wake-up.

[0059] 2.1 Upon receiving the wake-up signal, control Power to turn on Power1;

[0060] 2.2 Read the Standby Pin status and confirm that it is in STR sleep mode before entering system wake-up mode;

[0061] 2.3 After the system wake-up is complete, a wake-up completion message is sent to the MCU via the UART bus;

[0062] 2.4, Control the switch to DDR Reset Pin1 state via the Switch Pin;

[0063] 2.5, STR mode wake-up is now complete.

[0064] 3. Switching between STR mode wake-up state and non-STR mode sleep state.

[0065] Non-STR mode can be achieved by either of the following two conditions: condition 1 is set in the user interface, and condition 2 is that the battery voltage of the car's electrical system is below 9V for more than 1 minute.

[0066] Under condition 1 or condition 2, non-STR mode sleep can be completed through the following operations;

[0067] 3.1 After receiving the system's command to enter non-STR mode sleep mode, the system notifies the SOC via the UART bus. The SOC then sends the information that needs to be memorized and prepared to the MCU via the UART bus.

[0068] 3.2 The MCU controls Power to turn off Power1 and Power2 via the EN Pin, and configures the Standby Pin to a low level. Then the MCU enters the system sleep state.

[0069] 3.3, This completes the non-STR mode sleep process.

[0070] 4. Switching between non-STR mode sleep state and non-STR mode wake state.

[0071] 4.1 After receiving the wake-up command indicating that the system has entered non-STR mode, the MCU controls Power1 and Power2 to turn on via the EN Pin;

[0072] 4.2 After the SOC is powered on, the Standby Pin status is detected and determined to be in non-STR mode wake-up state;

[0073] 4.3 The SOC completes DRAM boot via DDR Reset Pin1 and DDR Pins;

[0074] 4.4, This completes the non-STR mode wake-up process.

[0075] In this invention, such as Figure 1As shown, the system uses the LDO module in section I to power the MCU (Microcontroller Unit) in section II. Simultaneously, the MCU in section II controls the PMU module, DC-DC converter, and LDO module in section I to power sections III and IV, thus enabling the system's wake-up and sleep functions. The power supply voltage threshold in section I and the memory sleep state in section II jointly determine the system's wake-up and sleep logic, i.e., STR mode or non-STR mode. In STR mode, low quiescent power consumption of the power supply module and system optimization are the core elements for achieving low quiescent current.

[0076] Figure 2 The hardware logic block diagram for implementing STR mode wake-up and sleep is shown below, where ① is MCU (Microcontroller Unit), ② is SOC (System on Chip), ③ is Switch, ④ is DRAM (Dynamic Random Access Memory), and ⑤ is Power.

[0077] STR mode hibernation:

[0078] ① Upon detecting a hibernation command, the system notifies the SOC via the UART bus to initiate the system hibernation process;

[0079] ① Switch to BU3.3V via Switch Pin ⑤, and keep DDR Reset Pin 2 at a high level;

[0080] ② After completing the information backup, notify ① that preparation is complete via the UART bus. ① then controls ⑤ to turn off Power1 and configure the Standby Pin to a high level.

[0081] The system has now completed its STR mode hibernation. Figure 3 This is a flowchart of the STR mode software sleep process.

[0082] STR Mode Wake-up:

[0083] ① Upon receiving the wake-up signal, control ⑤ to turn on Power1;

[0084] ② Read the Standby Pin status and confirm that it is in STR sleep mode before entering system wake-up mode;

[0085] ④ After the system wake-up is complete, send a wake-up completion message to ① via the UART bus;

[0086] ① Controlled via Switch Pin ③ Switch to DDR Reset Pin1 state;

[0087] The system has now completed STR mode wake-up. Figure 4 Flowchart for STR mode software wake-up.

[0088] Switching between STR mode wake-up state and non-STR mode sleep state:

[0089] Non-STR mode can be achieved by either of the following two conditions: condition 1 is set in the user interface, and condition 2 is that the battery voltage of the car's electrical system is below 9V for more than 1 minute.

[0090] ① After receiving the system's command to enter non-STR mode sleep mode, ② is notified via the UART bus. ② then sends the information that needs to be memorized and prepared to ① via the UART bus.

[0091] ① Control ⑤ to turn off Power1 and Power2 via EN Pin, and configure Standby Pin to low level, then ① enters system sleep state;

[0092] The system has now completed its non-STR mode sleep.

[0093] Switching between non-STR mode sleep state and non-STR mode wake state:

[0094] ① After receiving the wake-up command for the system to enter non-STR mode, control ⑤ to turn on Power1 and Power2 via EN Pin;

[0095] ② After power-on, the Standby Pin status is checked and determined to be in non-STR mode wake-up state;

[0096] ② Booting is completed via DDR Reset Pin1 and DDR Pins;

[0097] The system has now completed the non-STR mode wake-up.

[0098] Figure 5 This is a breakdown diagram of low quiescent current in STR mode sleep state. A is MPQ4326 switching power supply, B is DETModule, C is MPQ4321 switching power supply, D is LDO TLV70218, E is TPS628502 switching power supply, F is LDOTLV70233, G is 3GB DRAM K4FHE3D4HA, H is MCU R7F7017083AFP, I is Switch, J is PMUTPS6593, K is TPS62887 switching power supply, L is SOC AC8025H, M is MPQ4323 switching power supply, N is MPQ2179 switching power supply, and O is other load modules.

[0099] In STR sleep mode, A, B, C, D, E, F, G, H, and I are powered on, while K, J, L, M, N, and O are powered off.

[0100] H and I are both loads with a current of F. The supply voltage of H and I is 3.3V, and the total current consumption is 1mA. According to the power calculation formula P=UI, the total power consumption of H and I is calculated to be 3.3mW.

[0101] F is an LDO with the same input and output current (1mA). The supply voltage of F is 5.0V. According to the power calculation formula P=UI, the power consumption of F can be calculated to be 5mW.

[0102] C is a switching power supply. The efficiency of C is 78% when the current is 1mA. The current of C under a 12V input voltage can be calculated as: (output power / efficiency) / input voltage = [5 / (78%)] / 12≈0.53(mA);

[0103] G is the load for both E and D, with power ratings of 3.124mW and 0.918mW respectively. The supply voltages for E and D are 1.1V and 1.8V respectively.

[0104] E is a switching power supply. When the current is I=P / U=3.124 / 1.1=2.84(mA), the efficiency is 82%. The current of E under an input voltage of 3.8V can be calculated as: (output power / efficiency) / input voltage=[3.124 / (82%)] / 3.8≈1(mA);

[0105] The power consumption of G at 1.8V is 0.918mW. The output current of D can be calculated as I=W / U=0.918 / 1.8=0.51(mA). D is an LDO, and the input current and output current are the same (0.51mA).

[0106] D and E are both loads of A. The output current of A is the sum of the input current of D and the input current of E: 1 + 0.51 = 1.51 (mA).

[0107] A is a switching power supply with an output power of P=UI=3.8*1.51≈5.74 (mW). The efficiency of A is 78% when the current is 1.51mA. The current of A under a 12V input voltage can be calculated as: (output power / efficiency) / input voltage=[5.74 / (78%)] / 12≈0.61(mA);

[0108] The load power of B is 0.84mA. According to I=P / U, the current consumed by B can be calculated as I=0.84 / 12=0.07 (mA).

[0109] In STR sleep mode, the static current consumption is the sum of the currents consumed by A, B, and C: 0.61 + 0.07 + 0.53 = 1.21 (mA);

[0110] Figure 6 This is a current consumption table for STR mode sleep mode.

[0111] In existing technologies, the static current in STR mode sleep mode is approximately 6mA, and the standby time in STR mode sleep mode is 72 hours, which is the current industry mainstream requirement. This system uses the AC8025H solution to achieve a static current of 1.21mA in STR mode sleep mode. Based on power consumption calculation, the standby time T = 12 * 6 * 72h / (12 * 1.21) = 357 (hours), where "12" in the calculation formula represents the vehicle battery voltage. The standby time is approximately 5 times longer than the current mainstream 72 hours.

[0112] This invention is not limited to the above embodiments. Based on the technical solutions disclosed herein, those skilled in the art can make some substitutions and modifications to some of the technical features without creative effort, and all such substitutions and modifications are within the protection scope of this invention.

Claims

1. A system for achieving low quiescent current in vehicle central control STR mode, characterized in that: The power supply unit is connected with the control unit, the processor unit and the storage unit respectively, the control unit is connected with the processor unit and the storage unit respectively, and the processor unit is connected with the storage unit; The control unit includes MCU, the processor unit includes SOC, the storage unit includes DRAM, the power supply unit includes Power, the MCU, the SOC and the Power are connected with the electronic switch Switch, the electronic switch Switch is connected with the DRAM, the MCU is further connected with the SOC and the Power respectively, the Power is connected with the SOC through Power1, and the SOC is further connected with the DRAM through Power2; After the MCU detects the sleep instruction, the SOC is informed to perform the system sleep process through the Uart bus; the MCU controls the Switch to switch to the BU3.3V output through the SwitchPin, and keeps the DDR Reset Pin2 high level; after the SOC completes information backup, the MCU is informed that the preparation is completed through the Uart bus, the MCU controls the Power to close the Power1 through the EN Pin and configures the Standby Pin to high level; the STR mode sleep is completed; After receiving the wake-up signal, the Power is controlled to open the Power1; after the Standby Pin is converted to the state, it is confirmed that it is the STR sleep mode, the system is woken up; after the system is woken up, the wake-up completion information is sent to the MCU through the Uart bus; the Switch is controlled to switch to the DDR Reset Pin1 state through the Switch Pin; thus, the STR mode wake-up is completed.

2. The system for achieving low static current in STR mode of vehicle central control according to claim 1, characterized in that, The Power includes switch power supply MPQ4326 chip, switch power supply MPQ4321 chip, switch power supply TPS628502 chip, switch power supply TPS62887 chip, switch power supply MPQ4323 chip and switch power supply MPQ2179 chip, and the switch power supply MPQ4326 chip, the switch power supply MPQ4321 chip, the switch power supply MPQ4323 chip and the DET Module are connected with the 12V battery; The switch power supply MPQ4326 chip is connected with the LDO TLV70218 chip, the switch power supply TPS628502 chip, the switch power supply TPS62887 chip and the PMU TPS6593 chip respectively, the DET Module is connected with the MCU R7F7017083AFP chip, the switch power supply MPQ4321 chip is connected with the LDO TLV70233, and the LDO TLV70233 chip is connected with the MCU R7F7017083AFP chip and the electronic switch Switch respectively; The electronic switch Switch is connected with the R7F7017083AFP chip of the MCU, the AC8025H chip of the SOC is connected with the R7F7017083AFP chip of the MCU, and the R7F7017083AFP chip of the MCU is connected with the TLV70218 chip of the LDO, the switch power supply TPS628502 chip, the switch power supply TPS62887 chip and the TPS6593 chip of the PMU respectively; The switch power supply MPQ4323 chip is connected with the switch power supply MPQ2179 chip, and the switch power supply MPQ4323 chip and the switch power supply MPQ2179 chip are connected with the R7F7017083AFP chip of the MCU, the switch power supply MPQ2179 chip is connected with the vehicle-mounted load module, the vehicle-mounted load module is connected with the AC8025H chip of the SOC, and the AC8025H chip of the SOC is connected with the TPS6593 chip of the PMU and the switch power supply TPS62887 chip respectively.

3. A method for realizing low quiescent current of a vehicle-mounted central control STR mode, characterized in that: The STR mode low static current system for vehicle-mounted central control is realized by the method of claim 1 or 2, and the specific content of the STR mode wake-up state and the non-STR mode sleep state switching is as follows, The non-STR mode can be realized by any one of the following two conditions, condition 1 is that the user interface is set, and condition 2 is that the battery voltage of the automobile appliance is less than 9V for more than 1 minute; That is, under condition 1 or condition 2, the non-STR mode sleep is completed by the following operation; 3.1, after receiving the system entering non-STR mode sleep instruction, the SOC is informed through the Uart bus, and the SOC sends the information that needs to be memorized and prepared to the MCU through the Uart bus; 3.2, the MCU controls Power1 and Power2 to be closed through the EN Pin, and the Standby Pin is configured to be low, and then the MCU enters the system sleep state; 3.3, thus the non-STR mode sleep is completed.

4. The method for realizing the STR mode low static current system for vehicle-mounted central control according to claim 3, wherein the specific content of the non-STR mode sleep state and the non-STR mode wake-up state switching is as follows, 4.1, after receiving the system entering non-STR mode wake-up instruction, the MCU controls Power1 and Power2 to be opened through the EN Pin; 4.2, after the SOC is powered on, the state of the Standby Pin is detected, and it is judged to be the non-STR mode wake-up state; 4.3, the SOC completes the DRAM start through the DDR Reset Pin1 and the DDR Pins; 4.4, thus the non-STR mode wake-up is completed.

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