Network switch configuration system with power failure recovery
By using a dedicated five-layer protocol for UDP packets and a power failure recovery module, the problems of high resource consumption, low efficiency, and power failure recovery in the network switch configuration system of avionics systems are solved, thus realizing an efficient and secure configuration system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIDIAN UNIV
- Filing Date
- 2023-08-11
- Publication Date
- 2026-06-02
Smart Images
Figure CN116938845B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of communication technology, specifically relating to a network switch configuration system with power failure recovery function. Background Technology
[0002] The communication services of next-generation avionics systems have expanded from traditional data and voice communication to high-speed data, image, and multimedia services. Avionics systems place increasingly higher demands on the integration, scalability, bandwidth, real-time transmission, and reliability of information transmission networks. A consequence of this is that switches require a large number of working registers to function properly. Therefore, an efficient and reliable configuration system is crucial for switches. Current configuration schemes are based on TCP protocols. The host computer generates TCP packets carrying read / write commands, and after multiple handshakes, a connection is established between the host computer and the configuration system to complete a read / write command transmission. The configuration system can perform TCP handshakes, data frame reception, and parsing. Traditional aviation network switches are reconfigured after power-on via serial ports or command-line interfaces. Computers or terminal devices can be directly connected to the switch via serial cables. Local console management allows interactive configuration via terminal emulation software (such as HyperTerminal, PuTTY, etc.). Many switches provide text-based command-line interfaces, allowing configuration and management via terminal emulation software, SSH, or Telnet connections.
[0003] Current configuration systems based on the TCP protocol have three main drawbacks. First, the TCP protocol is overly complex, requiring significant hardware resources to process TCP packets and resulting in low data transmission efficiency. Before communication, TCP packets require a three-way handshake to establish a point-to-point connection, consuming additional hardware resources. Furthermore, the TCP header is 20 bytes long, and most subfields are not used during configuration, further hindering the transmission of effective data. The redundant header information adds to the hardware overhead. Second, TCP's point-to-point connection prevents the implementation of a unified control plane. Each TCP connection establishes a dedicated communication channel between the communicating parties, providing error-free, lossless, and on-order reliable service. Each connection termination requires a four-way handshake, making it impossible for a single host computer to simultaneously control the configuration of multiple switches over the network, significantly reducing configuration efficiency. Third, traditional configuration systems lack power-off recovery functionality. When a switch loses power, all working registers are set to the initial state. To return to the previous working state, the host computer must resend control data frames. For switches operating under aviation conditions, the longer the reconfiguration time, the greater the risk. Therefore, traditional configuration methods pose significant safety hazards when applied in aviation environments. Summary of the Invention
[0004] To address the aforementioned problems in related technologies, this invention provides a network switch configuration system with power-off recovery functionality. The technical problem to be solved by this invention is achieved through the following technical solution:
[0005] This invention provides a network switch configuration system with power failure recovery function, comprising:
[0006] The protocol processing module is used to receive Ethernet data packets sent by the host computer and parse n AHB protocol control command information from the Ethernet data packets. The Ethernet data packets contain n stacked dedicated protocol frames. The n dedicated protocol frames correspond one-to-one with the n read / write requests. The dedicated protocol frames are generated according to the five-layer dedicated protocol of UDP packets. The control command information of each AHB protocol includes: read / write type, register address to be written / read, and data to be written / read; n is a positive integer.
[0007] The arbitration module is used to send the AHB protocol control command information to the address mapping module when it receives the n AHB protocol control command information and the AHB protocol control command information sent by the power failure recovery module;
[0008] The address mapping module is used to perform read / write operations on the corresponding registers according to the control instruction information of the AHB protocol, and generate return response information indicating whether the operation was successful.
[0009] The protocol processing module is further configured to generate a response data packet containing a return frame to be sent to the host computer based on the returned response information; the return frame is the dedicated protocol frame.
[0010] The power failure recovery module is used to store the control command information corresponding to the return response information indicating successful operation from the n AHB protocol control command information into FLASH. When it restarts, it reads the stored control command information from FLASH and sends it to the arbitration module.
[0011] The present invention has the following beneficial technical effects:
[0012] This invention employs a dedicated five-layer protocol based on UDP packets as the information transmission medium. UDP has a shorter header length (only 8 bytes) than TCP and a simpler structure, eliminating the need for handshakes to establish a communication channel. This simplifies hardware structure and reduces hardware overhead. Furthermore, the dedicated protocol designed in this invention allows each Ethernet packet to carry multiple read / write commands, significantly improving effective data utilization. The UDP-based transmission eliminates the need for point-to-point connections, enabling multicast and broadcast. Addressing the unreliable connection issue of UDP, this invention uses return frames to confirm successful writes or reads. The host computer determines success only upon receiving the return frame. This invention incorporates an additional power-off recovery module for automated and rapid reconfiguration after a power outage and restart. This power-off recovery process is automated by the module without host computer control, significantly reducing configuration time. Therefore, when applied to aviation switches, this invention greatly enhances the security of the aviation switch.
[0013] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0014] Figure 1 A system block diagram of a network switch configuration system with power failure recovery function provided in an embodiment of the present invention;
[0015] Figure 2 A schematic diagram of an exemplary Ethernet packet data format provided in an embodiment of the present invention;
[0016] Figure 3 A schematic diagram of the format of an exemplary dedicated protocol frame provided for an embodiment of the present invention;
[0017] Figure 4 This is a schematic diagram of the protocol processing module provided in an embodiment of the present invention;
[0018] Figure 5 A flowchart illustrating an exemplary disassembly module provided in an embodiment of the present invention;
[0019] Figure 6 A flowchart illustrating the workflow of an exemplary filtering module provided in an embodiment of the present invention;
[0020] Figure 7 A flowchart illustrating an exemplary parsing module provided in an embodiment of the present invention;
[0021] Figure 8 This is a schematic diagram of the structure of the address mapping module provided in an embodiment of the present invention;
[0022] Figure 9 This is a schematic diagram of the power failure recovery module provided in an embodiment of the present invention;
[0023] Figure 10 A schematic diagram of an exemplary four-port airborne switch with power failure recovery function provided for embodiments of the present invention;
[0024] Figure 11 A schematic diagram of an exemplary simulation test environment provided for embodiments of the present invention;
[0025] Figure 12 Waveform diagrams of Ethernet frames within an exemplary input configuration subsystem and response data frames returned from the subsystem, provided for embodiments of the present invention;
[0026] Figure 13 An exemplary timing diagram of data converted to the AHB protocol provided for embodiments of the present invention;
[0027] Figure 14 An exemplary timing diagram of information converted into register read / write information is provided for embodiments of the present invention;
[0028] Figure 15 This is an exemplary timing diagram of using the SPI port to control FLASH writing to complete the configuration backup process, provided as an embodiment of the present invention. Detailed Implementation
[0029] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.
[0030] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0031] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.
[0032] Although the invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, disclosure, and appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.
[0033] Figure 1 This is a system block diagram of a network switch configuration system with power failure recovery function provided in an embodiment of the present invention. For example... Figure 1As shown, system 1 is used to access register 2. Specifically, system 1 includes: a protocol processing module 11, an arbitration module 12, an address mapping module 13, and a power-off recovery module 14. Protocol processing module 11 receives Ethernet data packets sent by the host computer 3 and parses n AHB protocol control command messages from the Ethernet data packets. The Ethernet data packets contain n stacked dedicated protocol frames. Each of the n dedicated protocol frames corresponds to one of the n read / write requests, and the dedicated protocol frames are generated according to the five-layer dedicated protocol of UDP packets. Each AHB protocol control command message includes: read / write type, register address to be written / read, and data to be written / read; n is a positive integer. Arbitration module 12, upon receiving the n AHB protocol control command messages and the AHB protocol control command messages sent by the power-off recovery module, sends the AHB protocol control command messages to address mapping module 13. Address mapping module 13 performs read / write operations on the corresponding registers according to the AHB protocol control command messages and generates return response information indicating whether the operation was successful. The protocol processing module 11 is also used to generate a response data packet containing a return frame to be sent to the host computer 3 based on the returned response information; wherein, the return frame is a dedicated protocol frame. The power failure recovery module 14 is used to store the control command information indicating successful operation from the n AHB protocol control command information into FLASH, and when it restarts, it reads the stored control command information from FLASH and sends it to the arbitration module 12.
[0034] For example, Figure 2 This is a diagram illustrating the data format of an Ethernet packet. (Example:) Figure 2 As shown, the Ethernet packet includes: an Ethernet frame header, an IP frame header, a UDP frame header, and a UDP payload; among which, n dedicated protocol frames ( Figure 2 The dedicated protocols 0, 1, ..., n are stacked within the UDP payload. This design allows devices to forward the Ethernet packet as a regular Ethernet packet, thus ensuring the versatility of the Ethernet packet.
[0035] For example, Figure 3 This is a schematic diagram of the format of a dedicated protocol frame. (Example:) Figure 3As shown, each dedicated protocol frame is 128 bits long and contains seven fields: a 29-bit sequence number field, a 1-bit error field, a 1-bit read / write flag field, a 1-bit request / response flag field, a 32-bit address field, a 32-bit data field, and a 32-bit frame interval flag field. The sequence number field stores the layer number information of the Ethernet packet; the error field indicates whether the read / write request has failed; the read / write flag field indicates whether this dedicated protocol frame is a write frame or a read frame; the request / response flag field indicates whether this dedicated protocol frame is a request frame or a return frame sent by the host computer; the address field indicates the address of the register or RAM where data needs to be written / read; the data field indicates the data to be written or read; and the frame interval flag field separates two adjacent dedicated protocol frames.
[0036] In some embodiments, such as Figure 4 As shown, the protocol processing module 11 includes: a decomposition module 111, an information caching module 112, a filtering module 113, and a parsing module 114. Furthermore, the protocol processing module 11, comprising the decomposition module 111, the information caching module 112, the filtering module 113, and the parsing module 114, constitutes a request channel. Figure 5 As shown, the disassembly module 111 is used to disassemble the received Ethernet data packets, extract the source MAC address, destination MAC address, and upper-layer protocol. If the upper-layer protocol type is not IP, the data packet is discarded. If the upper-layer protocol type is IP, the source IP address, destination IP address, and upper-layer protocol field are extracted from the IP protocol. If the upper-layer protocol field type is not UDP, the data packet is discarded. If the upper-layer protocol field type is UDP, it indicates that the Ethernet data packet is a UDP data packet, and the source port address and destination port number of the UDP protocol field are extracted to obtain the source MAC address, destination MAC address, source IP address, destination IP address, source port number, and destination port number of the UDP data packet. The information caching module 112 is used to cache the source MAC address, destination MAC address, source IP address, destination IP address, source port number, and destination port number. Figure 6 As shown, the filtering module 113 compares the destination MAC address, destination IP address, and destination port number extracted by the disassembly module 111 with preset MAC addresses, preset IP addresses, and preset port numbers. If they match, the Ethernet data packet is determined to be the data packet to be parsed. The parsing module 114 generates n corresponding AHB protocol control command messages based on the n read / write requests contained in the data packet to be parsed. Specifically, as shown... Figure 7As shown, the parsing module 114 operates according to the principle of the parsing state machine transition diagram. The parsing module 114 first initializes its corresponding registers, and after initialization, enters a waiting state to await the data packets to be parsed sent by the filtering module 113. When a data packet to be parsed arrives, it enters an extraction state. In the extraction state, the data packet to be parsed is parsed to obtain all the control command information of the AHB protocol corresponding to the data packet. After parsing one data packet, when the next data packet to be parsed is received, it continues to be in the extraction state and continues to parse the next data packet. When no new data packet to be parsed is received after parsing the previous data packet, it enters an end state and generates an end handshake signal to be sent to the arbitration module 12 and the filtering module 113 respectively. The parsing module 114 completes the parsing of one dedicated protocol frame in each cycle, thus maintaining high parsing efficiency.
[0037] Specifically, when a data packet to be parsed contains n stacked dedicated protocol frames, the parsing module 114 sequentially parses these n stacked dedicated protocol frames to obtain n AHB protocol control command information. For a dedicated protocol frame, the parsing module 114 first extracts the request / response flag field from the dedicated protocol frame. When the type of the request / response flag field is determined to be a request, it determines that the dedicated protocol frame is a request frame sent by the host computer 3. Then, it extracts the read / write type field from the dedicated protocol frame and determines whether the read / write type field is a read type or a write type, and records the determination result. After recording the determination result, it extracts the address field and data field from the dedicated protocol frame into its own register. Based on the recorded result, the extracted address field, and the extracted data field, it generates a control command information of the AHB protocol corresponding to the dedicated protocol frame. This AHB protocol control command information includes the read / write type, the address of the register to which data is to be written / read, and the data to be written / read.
[0038] In some embodiments, the arbitration module 12 is further configured to, when simultaneously acquiring the AHB protocol control instruction information generated by the protocol processing module 11 and the AHB protocol control instruction information sent by the power failure recovery module, prioritize sending the AHB protocol control instruction information generated by the protocol processing module 11 to the address mapping module 13 for processing. Specifically, the parsing module 114 parses each AHB protocol control command and sends it to the AHB protocol port. Similarly, after restarting, the power-off recovery module 14 reads the stored AHB protocol control commands from the FLASH memory and sends all read commands to the AHB protocol port. The arbitration module 12 obtains AHB protocol control commands from the AHB protocol port in real time. When it simultaneously receives control commands from both the power-off recovery module 14 and the parsing module 114, it prioritizes forwarding the AHB protocol control commands from the parsing module 114 to the address mapping module 13, and then forwards the AHB protocol control commands from the power-off recovery module 14 to the address mapping module 13. This ensures that when both the host computer 3 and the power-off recovery module simultaneously write data to the configuration register, only the host computer 3 path can access the register, guaranteeing that the switch operates according to the latest configuration requirements. When the arbitration module 12 only obtains the AHB protocol control command information from the power failure recovery module 14 or the parsing module 114, it directly forwards the obtained AHB protocol control command information to the address mapping module 13.
[0039] In some embodiments, such as Figure 8As shown, the address mapping module 13 includes: a port monitoring module 131, an information queue generation module 132, an address determination module 133, and a return information generation module 134. The port monitoring module 131 monitors whether control command information of the AHB protocol sent by the arbitration module 12 is received. The information queue generation module 132, for each received AHB protocol control command information, concatenates the read / write type, register address, and data to be written / read into an information queue element and stores it in the information queue. The address determination module 133 matches the corresponding register according to the information queue element. When no register is matched, it outputs a matching failure signal. When a corresponding register is matched, it writes data to or reads data from the matched register according to the read / write type and data to be written / read in the information queue element. When writing data successfully, it outputs a write success signal; when reading data successfully, it outputs a read success signal and the read data. The return information generation module 134 is used to generate return response information indicating operation failure corresponding to the control command information of the AHB protocol when a matching failure signal is received, and to generate return response information indicating operation success corresponding to the control command information of the AHB protocol when a write data success signal is received, and to generate return response information indicating operation success and including the read data corresponding to the control command information of the AHB protocol when a read success signal and read data are received.
[0040] Specifically, the port monitoring module 131 captures AHB protocol control command information from the port. When an AHB protocol control command is captured, it sends the command to the information queue generation module 132 (considering the simplest AHB transmission mode, where a single transmission does not burst). The information queue generation module 132 caches the register address and read / write type in the AHB protocol control command. When the read / write type is write, it caches the data to be written in the next cycle. Then, it concatenates the 32-bit register address, the 32-bit data to be written, and the 1-bit read / write flag (i.e., read / write type) into an information queue element and stores it in the information queue, updating the queue pointer. When the read / write type is read, it generates 32 bits of 0 in the next cycle. Then, it concatenates the 32-bit register address, the 32-bit 0, and the 1-bit read / write flag (i.e., read / write type) into an information queue element and stores it in the information queue, updating the queue pointer. The information queue is composed of FIFO and is responsible for caching read and write configuration information. When the information queue is empty, the subsequent modules are triggered.
[0041] Specifically, the address determination module 133 is responsible for retrieving information queue elements when the information queue is not empty and mapping the information queue elements to specific registers. The address determination module 133 includes an address preprocessing module and a large number of parallel comparators. After the address preprocessing module obtains the address of the 32-bit register, it first extracts the high 16 bits and puts them into the base address comparator to confirm whether the register base address configured by the host computer 3 is incorrect. Then, it extracts the low 16 bits of the address and puts them into multiple parallel comparators, each comparator corresponding to one register. In the next cycle, it counts the comparison results and performs an AND operation on the results of all comparators. If the AND result is 0, it means that no configurable register address was matched, and an error signal (i.e., a match failure signal) is output to the return information generation module 134. If the match is successful and data needs to be written to the register, the write pulse signal of the matched register is pulled high for one cycle, and the data to be written is output to the write data port of the register to complete the write and output a write success signal. If the match is successful and data needs to be read from the register, the read pulse of the matched register is pulled high for one cycle, and the read register data is obtained in the following cycle. The read register data and the read success signal are sent together to the return information generation module 134. When a write pulse signal is detected on the clock trigger edge, the corresponding register writes data into the register, and when a read pulse signal is detected, the register information is output. Thus, one register read / write operation is completed.
[0042] Specifically, the return information generation module 134 is responsible for generating the AHB protocol feedback information, HRESP and HRDATA. Specifically, when the address determination module 133 outputs a match failure signal, the return information generation module 134 pulls HRESP high to indicate a read / write operation failure, thus obtaining an AHB response signal (i.e., return response information) representing a read / write operation failure. When the address determination module 133 outputs a read success signal, the return information generation module 134 pulls HRESP low, and HRDATA outputs the read register data to indicate a read operation success, thus obtaining an AHB response signal representing a successful read operation and containing the read data. Similarly, when the address determination module 133 outputs a write success signal, the return information generation module 134 pulls HRESP low to indicate a write operation success, thus obtaining an AHB response signal representing a successful write operation. It should be noted that after generating an AHB response signal corresponding to an AHB protocol control instruction, the return information generation module 134 returns the AHB response signal to the arbitration module 12. The arbitration module 12 also sends the AHB response signal to the AHB protocol port.
[0043] In some embodiments, as described above Figure 4As shown, the protocol processing module 11 further includes a packet assembly module 115 and an encapsulation module 116, wherein the packet assembly module 115 and the encapsulation module 116 constitute a response channel. The packet assembly module 115 can obtain all AHB protocol control command information generated by the parsing module 114 from the AHB protocol port, as well as the AHB response signal corresponding to each AHB protocol control command information. For a single AHB protocol control command information, the packet assembly module 115 generates a return frame corresponding to the control command information based on the control command information, the return response information corresponding to the control command information, and the layer information of the Ethernet data packet stored in the sequence number field of the dedicated protocol frame corresponding to the control command information. The encapsulation module 116 is used to encapsulate the return frame generated by the packet assembly module 115 according to the cached source MAC address, destination MAC address, source IP address, destination IP address, source port number, and destination port number to obtain a response data packet, and then sends the response data packet to the host computer 3.
[0044] Specifically, when the read / write type in an AHB protocol control command is write, the packet assembly module 115 writes the register address in the AHB protocol control command into the address field of a dedicated protocol frame. If the return response information corresponding to the AHB protocol control command indicates a write operation failure, the error field in the dedicated protocol frame is set to "1" to indicate an error in the AHB protocol control command. Conversely, if the return response information corresponding to the AHB protocol control command indicates a write operation success, the error field in the dedicated protocol frame is set to "0" to indicate that the AHB protocol control command was successful. Then, the dedicated protocol frame... The request / response flag field is set to "1" to indicate that the dedicated protocol frame is a return frame. When there is another AHB protocol control command information after the control command information of the AHB protocol, the frame interval flag field in the dedicated protocol frame is set to the field "32'hA5_5A_A5_5A" to indicate that there is another dedicated protocol frame. When there is no AHB protocol control command information after the control command information of the AHB protocol, the frame interval flag field in the dedicated protocol frame is set to the field "32'h0000_0000" to indicate that there is only this one dedicated protocol frame. In this way, a return frame corresponding to a control command information of the AHB protocol is obtained. When the read / write type in an AHB protocol control command is read, the packet assembly module 115 writes the register address from the AHB protocol control command into the address field of a dedicated protocol frame. If the return response information corresponding to the AHB protocol control command indicates a write operation failure, the error field in the dedicated protocol frame is set to "1" to indicate an error in the AHB protocol control command. Conversely, if the return response information indicates a write operation success, the error field in the dedicated protocol frame is set to "0" to indicate that the AHB protocol control command was successful. Then, the module 115 loads the register address to be read from the return response information corresponding to the AHB protocol control command. The data is written into the data field of the dedicated protocol frame. The request / response flag field of the dedicated protocol frame is set to "1" to indicate that the dedicated protocol frame is a return frame. When there is another AHB protocol control command information after the control command information of the AHB protocol, the frame interval flag field of the dedicated protocol frame is set to the field "32'hA5_5A_A5_5A" to indicate that there is another dedicated protocol frame. When there is no AHB protocol control command information after the control command information of the AHB protocol, the frame interval flag field of the dedicated protocol frame is set to the field "32'h0000_0000" to indicate that there is only this one dedicated protocol frame, thereby obtaining a return frame corresponding to the control command information of the AHB protocol.
[0045] In some embodiments, the encapsulation module 116 is configured to continue receiving the next return frame when the frame interval flag field in the return frame received from the packet assembly module 115 is “32'hA5_5A_A5_5A”, until the frame interval flag field in the received return frame is “32'h0000_0000”. Then, it combines these received return frames in a stacked manner and encapsulates the combined return frames into an Ethernet packet, thus generating a response packet. The format of this response packet is as described above. Figure 2 As shown. In some embodiments, the encapsulation module 116 is further configured to encapsulate a return frame in an Ethernet packet upon receiving a return frame from the packet assembly module 115, thereby generating a response packet, and the format of the response packet is as described above. Figure 2 As shown. When encapsulating the return frame, the encapsulation module 116 needs to encapsulate the return frame with a UDP header, an IP header, and an Ethernet header in sequence. To ensure the generated response data packet can be returned to the host computer 3, the source MAC address, source IP address, and source port number of the Ethernet data packet sent by the host computer 3 need to be retrieved from the information cache module 112 and written into the protocol header, corresponding to the destination MAC address, destination IP address, and destination port number of the response data packet. At this point, a complete Layer 5 dedicated protocol response data packet is constructed and, after forwarding, can be returned to the host computer 3.
[0046] In some embodiments, such as Figure 9As shown, the power-off recovery module 14 includes: a write cache module 141, a page write control module 142, an SPI protocol conversion module 143, a read control module 144, and a read cache module 145. The write cache module 141 caches the control command information of the AHB protocol, which indicates successful operation, and converts the data width of all cached control command information into 8 bits before transmitting it to the page write control module 142. The page write control module 142 generates a corresponding write command based on the data sent by the write cache module 141 and sends the write command to the SPI protocol conversion module 143. The SPI protocol conversion module 143 converts the received write command into an SPI timing instruction and stores the control command information cached by the cache module 141 into the FLASH memory according to the SPI timing instruction. The read control module 144 generates a read command after restarting and sends the read command to the SPI protocol conversion module 143. The SPI protocol conversion module 143 converts the received read command into SPI timing instructions and controls the FLASH to read the stored control instruction information according to the SPI timing instructions. The read cache module 145 caches the read and stored control instruction information and sends it to the AHB protocol port for the arbitration module 12 to obtain.
[0047] For example, such as Figure 10 As shown, the network switch configuration system with power-off recovery function provided by this invention can be deployed on a four-port onboard switch, and the port throughput of this four-port onboard switch is 1Gbps, with an operating clock of 125MHz. Figure 10 As shown, the network switch configuration system with power failure recovery function provided by this invention (i.e., Figure 10 The configuration subsystem is integrated into the frame processing channel of the four-port airborne switch. Four Ethernet frame receive / transmit ports are connected to the switch's input / output scheduling module, and the register configuration channel is connected to the configuration registers on the switch. The configuration subsystem also provides an SPI port for connecting to external FLASH memory. Figure 10 As shown, Ethernet data packets sent by host computer 3 enter the switch through four Ethernet frame receive / transmit ports. After passing through the input / output scheduling module, the Ethernet data packets are sent to the configuration subsystem. The Ethernet data packets are split and parsed, converted into register read / write configuration signals, and the successfully written configuration data is stored in the FLASH memory. When the switch restarts after a power outage, the configuration system reads the configuration information from the FLASH memory, generates a register write signal, and completes the register configuration. It should be noted that the network switch configuration system with power-off recovery function provided by this invention can also be other types of airborne switches, and this is not limited.
[0048] The technical effects of the embodiments of the present invention will be further illustrated below using simulation experimental data.
[0049] The functionality of this invention was verified through simulation using the EDA tools Vivado 2018.2 and Modelsim 2020, and a simulation platform was built as follows. Figure 11 The simulation test environment shown is as follows. Figure 11 The DUT mentioned here is the configuration subsystem in this invention. Figure 11 The format of the write configuration data frame and read data frame is an Ethernet data packet carrying a proprietary protocol, the format of which is as described above. Figure 2 As shown, data frames are combined by the excitation generator into test excitation combinations for different scenarios. Driven by Ethernet frames, these excitations are sent to the DUT via the RGMII (Reduced Gigabit Media Independent Interface) timing, transmitting the same excitations to the software reference model while simultaneously recording the excitation frames. Output management records the DUT's output data, and the checker compares the outputs of the reference model and the DUT to determine whether the DUT's behavior matches the expected target.
[0050] Figure 12 The waveforms of the Ethernet frames within the input configuration subsystem and the response data frames returned from the subsystem are shown. Figure 13 A timing diagram showing the data converted to the AHB protocol is presented. Figure 14 The timing diagram shows the conversion of information into register read / write information. Figure 15 A timing diagram is shown illustrating the use of the SPI port to control FLASH writing to complete the configuration backup process.
[0051] The above test results demonstrate that the device described in this invention can convert Ethernet data packets carrying dedicated protocol frames into register configuration instructions within the switch, thus enabling remote register configuration via Ethernet frames. It also stores configuration information in FLASH memory for automatic configuration after a restart, thus achieving power-off recovery. The test results prove that the functionality of this invention is consistent with the intended design.
[0052] This invention offers higher configuration efficiency, a simpler configuration process, and enhanced security. First, using a 1Gbps line-speed network port as the data transmission medium is at least 100 times faster than traditional serial port transmission. Second, compared to TCP-based data frame transmission, this invention employs UDP-based transmission, establishing an instant connection path and simplifying the connection process. A response feedback mechanism addresses unreliable transmission issues. It also supports the transmission needs of a single host to multiple devices. Custom protocol frames belong to Layer 5 in network switching, employing a stacked structure and supporting multi-layer protocol extensions. Configuration information transmission efficiency is improved by carrying multiple read / write control messages on a single Ethernet frame. To meet the safety requirements of aviation applications, the power-loss resistance of FLASH storage is utilized to implement a power-loss recovery mechanism, ensuring that the switch can quickly return to normal operation without host computer intervention in the event of an unexpected incident.
[0053] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.
Claims
1. A network switch configuration system with power failure recovery function, characterized in that, include: The protocol processing module is used to receive Ethernet data packets sent by the host computer and parse n AHB protocol control command information from the Ethernet data packets. The Ethernet packet contains n dedicated protocol frames stacked in a stacked manner; each of the n dedicated protocol frames corresponds to one of the n read / write requests, and the dedicated protocol frames are generated according to the five-layer dedicated protocol of the UDP packet. Each AHB protocol control instruction includes: read / write type, register address to be written to / read from, and data to be written to / read from; n is a positive integer; The arbitration module is used to send the AHB protocol control command information to the address mapping module when it receives the n AHB protocol control command information and the AHB protocol control command information sent by the power failure recovery module; The address mapping module is used to perform read / write operations on the corresponding registers according to the control instruction information of the AHB protocol, and generate return response information indicating whether the operation was successful. The protocol processing module is further configured to generate a response data packet containing a return frame to be sent to the host computer based on the returned response information; the return frame is the dedicated protocol frame. The power failure recovery module is used to store the control command information corresponding to the return response information indicating successful operation in the n AHB protocol control command information into FLASH, and when it restarts, it reads the stored control command information from FLASH and sends it to the arbitration module. An Ethernet packet comprises: an Ethernet frame header, an IP frame header, a UDP frame header, and a UDP payload. The n dedicated protocol frames are arranged sequentially within the UDP payload, and adjacent dedicated protocol frames are separated by a frame interval flag field. Each dedicated protocol frame includes: a sequence number field for storing the layer number information of the Ethernet packet; an error field for indicating whether a read / write request has failed; a read / write flag field for indicating whether the dedicated protocol frame is a write frame or a read frame; a request / response flag field for indicating whether the dedicated protocol frame is a request frame or a return frame sent by the host computer; an address field for indicating the address of the register or RAM where data needs to be written / read; a data field for indicating the data to be written or read; and a frame interval flag field for separating two adjacent dedicated protocol frames. Each dedicated protocol frame is 128 bits. The protocol processing module includes: The disassembly module is used to disassemble the received Ethernet data packets, extract the source MAC address, destination MAC address, and upper-layer protocol. If the upper-layer protocol type is not IP, the Ethernet data packet is discarded, and the module continues to disassemble the next received Ethernet data packet. If the upper-layer protocol type is IP, the module extracts the source IP address, destination IP address, and upper-layer protocol field from the IP protocol. If the upper-layer protocol field type is not UDP, the Ethernet data packet is discarded. If the upper-layer protocol field type is UDP, the module extracts the source port address and destination port number from the UDP protocol field. An information caching module is used to cache the source MAC address, the destination MAC address, the source IP address, the destination IP address, the source port number, and the destination port number; The filtering module is used to compare the destination MAC address, the destination IP address, and the destination port number with preset information, and when they match, determine that the Ethernet data packet is a data packet to be parsed; The parsing module is used to generate a one-to-one corresponding set of n AHB protocol control command information based on the n read / write requests contained in the data packet to be parsed; The arbitration module is specifically used to prioritize sending the AHB protocol control command information generated by the protocol processing module to the address mapping module for processing when it simultaneously obtains the AHB protocol control command information generated by the protocol processing module and the AHB protocol control command information sent by the power failure recovery module.
2. The network switch configuration system with power failure recovery function according to claim 1, characterized in that, The parsing module is also used to initialize its own registers, and when receiving a data packet to be parsed, it sequentially extracts a request / response flag field from one of the n stacked dedicated protocol frames in the data packet to be parsed. When it is determined that the type of the request / response flag field is a request, it determines that the dedicated protocol frame is a request frame sent by the host computer, and extracts a read / write type field from the dedicated protocol frame. It determines whether the read / write type field is a read type or a write type and records the determination result. After recording the determination result, it extracts the address field and data field from the dedicated protocol frame into its own registers. Based on the recorded result, the extracted address field and the extracted data field, it generates a control instruction information of the AHB protocol corresponding to the dedicated protocol frame, and sequentially obtains the n control instruction information of the AHB protocol corresponding to the n stacked dedicated protocol frames.
3. The network switch configuration system with power failure recovery function according to claim 1, characterized in that, The address mapping module includes: The port monitoring module is used to monitor whether the control command information of the AHB protocol sent by the arbitration module is received; The information queue generation module is used to, for each received AHB protocol control instruction information, concatenate the read / write type, the register address, and the data to be written / read into an information queue element and store it in the information queue. The address determination module is used to match the corresponding register according to the information queue element. When no register is matched, it outputs a matching failure signal. When a corresponding register is matched, it writes data to the matched register or reads data from the matched register according to the read / write type and the data to be written / read in the information queue element. When writing data is successful, it outputs a write success signal. When reading data is successful, it outputs a read success signal and the read data. The return information generation module is used to generate a return response information indicating operation failure corresponding to the control command information of the AHB protocol when the matching failure signal is received, and to generate a return response information indicating operation success corresponding to the control command information of the AHB protocol when the write success signal is received, and to generate a return response information indicating operation success and including the read data corresponding to the control command information of the AHB protocol when the read success signal and the read data are received.
4. The network switch configuration system with power failure recovery function according to claim 1, characterized in that, Each AHB protocol control command corresponds to a return response; the protocol processing module includes: The packet assembly module is used to generate a return frame corresponding to each of the n AHB protocol control command messages, based on the control command message, the corresponding return response information, and the layer information of the Ethernet data packet stored in the sequence number field of the dedicated protocol frame corresponding to the control command message, thereby obtaining n stacked return frames corresponding to the n AHB protocol control command messages. The encapsulation module is used to encapsulate the n stacked return frames according to the cached source MAC address, destination MAC address, source IP address, destination IP address, source port number, and destination port number to obtain the response data packet, and send the response data packet to the host computer.
5. The network switch configuration system with power failure recovery function according to claim 4, characterized in that, The packet assembly module is further configured to, for each AHB protocol control instruction, when the read / write type in the AHB protocol control instruction is write type, write the register address in the AHB protocol control instruction to the address field of a dedicated protocol frame; according to the information represented by the return response information corresponding to the AHB protocol control instruction, set the error field in the dedicated protocol frame to "0" or "1" to indicate whether the AHB protocol control instruction is erroneous; set the request / response flag field in the dedicated protocol frame to "1" to indicate that the dedicated protocol frame is a return frame; and when there are AHB protocol control instructions following the AHB protocol control instruction, set the frame interval flag field in the dedicated protocol frame to a first preset field; and when there are no AHB protocol control instructions following the AHB protocol control instruction, set the frame interval flag field in the dedicated protocol frame to a second preset field, thereby obtaining a return frame corresponding to the AHB protocol control instruction.
6. The network switch configuration system with power failure recovery function according to claim 4, characterized in that, The packet assembly module is further configured to, for each AHB protocol control instruction, when the read / write type in the AHB protocol control instruction is read, write the register address in the AHB protocol control instruction into the address field of a dedicated protocol frame; according to the information represented by the return response information corresponding to the AHB protocol control instruction, set the error field in the dedicated protocol frame to "0" or "1" to indicate whether the AHB protocol control instruction has an error; write the data to be read contained in the return response information corresponding to the AHB protocol control instruction into the data field of the dedicated protocol frame; set the request / response flag field in the dedicated protocol frame to "1" to indicate that the dedicated protocol frame is a return frame; and, when there are AHB protocol control instructions following the AHB protocol control instruction, set the frame interval flag field in the dedicated protocol frame to a first preset field; and when there are no AHB protocol control instructions following the AHB protocol control instruction, set the frame interval flag field in the dedicated protocol frame to a second preset field, thereby obtaining a return frame corresponding to the AHB protocol control instruction.