A miniaturized time-phase decoder and QKD receiver
By fabricating a decoder using PLC technology based on planar optical waveguide chips, the problems of large size and low performance of decoders in existing quantum secure communication systems have been solved, achieving miniaturization and high stability, and improving the code generation rate.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- QUANTUMCTEK CO LTD
- Filing Date
- 2022-04-24
- Publication Date
- 2026-06-26
AI Technical Summary
In existing quantum secure communication systems, decoders suffer from problems such as large size, low performance, and high process requirements. In particular, the high requirements for silicon-based chip and fiber optic coupling processes lead to a decrease in the system's code generation rate.
The decoder is fabricated using planar optical waveguide chip technology and PLC process. All on-chip components are passive. By precisely controlling the interferometer arm length difference, no external phase shifter or phase modulator is required, which simplifies polarization state control and reduces the need for an external polarization controller.
A miniaturized time-phase decoder was achieved, which improved the stability and reliability of the system, reduced the size, increased the code generation rate, and reduced optical coupling loss.
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Figure CN116980047B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of quantum information technology, and in particular to a miniaturized time-phase decoder and QKD receiver based on a planar optical waveguide chip. Background Technology
[0002] Quantum secure communication, unlike classical communication, is a secure communication method that can generate a completely consistent unconditional secure key between the communicating parties. It supports encrypting classical information using a "one-time pad" method, ensuring a high level of security in information transmission, and has therefore attracted widespread attention. Existing quantum secure communication systems are mainly based on quantum key distribution (QKD) technology. A QKD system includes a sender and a receiver. The sender uses an encoder to encode and transmit quantum states, while the receiver uses a decoder to decode and detect the quantum states. The decoder is one of the core components of the receiver, determining system metrics such as the key generation rate and error rate of the QKD system. In QKD systems based on phase or time-phase schemes, single-photon detection is achieved by interferometry demodulating the pulse photon pairs containing phase-encoded information emitted by the sender.
[0003] In a time-phase encoding / decoding scheme based on the BB84 protocol, the basis vectors include a phase basis vector and a time basis vector. The phase basis vector can encode photon pairs formed by two consecutive pulses with a specific phase difference, forming a phase-coded optical pulse. The time basis vector can encode pulsed photons distributed sequentially in the time domain, forming a time-coded optical pulse. During decoding, basis vector selection is performed first by a basis vector selection unit, and then different detectors measure the quantum states under different basis vectors. Specifically, the phase-coded optical pulses are mainly demodulated by an unequal-arm interferometer before phase state detection. Existing chip-based time-phase decoders primarily use silicon-based chip materials for time-phase quantum state decoding.
[0004] Figure 1 This paper presents an existing high-speed silicon-based on-chip QKD encoding and decoding system. The time-phase decoder employs a chip reciprocally compatible with the transmitter for decoding, specifically including an equal-arm interferometer and an unequal-arm interferometer. The equal-arm interferometer is used to measure the |0> and |1> states, while the unequal-arm interferometer is used to measure the |+> and |-> states. The interferometric light pulses are ultimately detected by an off-chip single-photon detector.
[0005] Patent document CN111934868A discloses a decoding chip and decoding method for quantum key distribution, which is mainly used in QKD systems based on a time-phase coding protocol. For example... Figure 2As shown, the decoding chip includes an input waveguide, a directional coupler, a phase modulator, a delay line structure, and an output waveguide. The decoding chip enables adjustable beam splitting ratios, balancing the power of the dual-time-slot pulsed light, thus optimizing interference visibility and reducing the bit error rate. The interference visibility of this decoding chip is insensitive to temperature changes; that is, the bit error rate caused by optical devices is insensitive to temperature variations.
[0006] Patent document CN109343173A discloses a hybrid waveguide integrated interferometer used to implement the encoding and decoding functions of a QKD system with a phase coding protocol. For example... Figure 3 As shown, the interferometer comprises optical fiber, waveguide coupler, optical waveguide chip (including delay line), phase waveguide modulator, reflection module, and other structures. In this interferometer, the arm length difference is easily controlled, which helps reduce the production cost of unequal-arm interferometers; the interferometer constructed from optical waveguide chip is more stable and less sensitive to changes in external temperature, vibration, etc.; it is also smaller in size and easier to package.
[0007] Figure 1 and 2 The decoder shown integrates a phase modulator, primarily using silicon or silicon oxynitride as the chip material. The waveguide chip mainly operates in TE or TM modes. Before being coupled into the chip via the fiber optic transmission link, the polarization state is random, leading to direct loss of photons in non-operating modes after entering the waveguide chip. This causes system performance degradation and large fluctuations in the system's bit rate. Solving this problem often requires adding an external polarization controller, significantly increasing the receiver size and system complexity. Furthermore, the large difference in mode field diameter between the silicon-based chip and the fiber optic cable results in high-precision and high-loss optical coupling between the fiber and the chip, also contributing to a decrease in the system's bit rate. Therefore, such solutions often suffer from low performance and demanding manufacturing processes. Figure 3 Although the interferometer in the design is chip-based, it still requires an external optical circulator and phase modulation module, resulting in a relatively large overall size for the QKD receiver. In summary, existing decoders for QKD systems suffer from a trade-off between size and performance. Summary of the Invention
[0008] To address the aforementioned problems in existing technologies, this invention discloses a miniaturized time-phase decoder and QKD receiver based on a planar optical waveguide chip. All on-chip devices are fabricated using PLC technology, which allows for precise control of interferometer arm length differences using existing processes. This eliminates the need for built-in phase shifters or phase modulators in the interferometer ring for interference stabilization. Except for external single-photon detectors, all functional devices are passive, exhibiting high stability and reliability. Furthermore, since the PLC planar optical waveguide mode is essentially consistent with the mode in the optical fiber, there is no need for dedicated polarization state control before coupling into the chip, reducing the need for external polarization controllers and other devices, and further reducing the size of the QKD receiver.
[0009] The first aspect of the present invention relates to a miniaturized time-phase decoder, which includes a decoding chip based on planar optical waveguide technology, a first reflection unit and a second reflection unit;
[0010] The decoding chip includes a first beam splitter and a second beam splitter, and is formed with an input port, a time basis signal output port, a first phase basis signal output port, a second phase basis signal output port, a first reflection port and a second reflection port.
[0011] The first beam splitter has a first port, a second port, a third port and a fourth port, wherein light input through the first port can be output through the second port and the third port, and light input through the third port can be output through the first port and the fourth port;
[0012] The second beam splitter has a fifth port, a sixth port, a seventh port, and an eighth port, wherein light input through the fifth port can be output through the sixth and seventh ports, and light input through the seventh port can be output through the fifth and eighth ports.
[0013] The input port is connected to the first port via the first waveguide;
[0014] The second port is connected to the time basis signal output port via a second waveguide;
[0015] The third port is connected to the fifth port via a third waveguide;
[0016] The sixth port is connected to the first reflection port via the fourth waveguide;
[0017] The seventh port is connected to the second reflection port through the fifth waveguide, wherein the fifth waveguide has an optical path length different from that of the fourth waveguide;
[0018] The eighth port is connected to the first phase basis signal output port through the sixth waveguide;
[0019] The fourth port is connected to the second phase basis signal output port via the seventh waveguide;
[0020] The first reflection unit is located at the first reflection port and is used to reflect the optical signal and cause the polarization state to be deflected by 90 degrees.
[0021] The second reflection unit is located at the second reflection port and is used to reflect the optical signal and cause the polarization state to deflect by 90 degrees.
[0022] Furthermore, the first optical beam splitter is configured such that for light input through the first port, the beam splitting ratio between the second port and the third port is A2:A3, where A2 is not equal to A3; and the second optical beam splitter is configured to provide proportional beam splitting.
[0023] Furthermore, the time phase decoder of the present invention also includes a third beam splitter, which includes a ninth port, a tenth port, an eleventh port and a twelfth port, wherein light input through the ninth port can be output through the tenth port and the eleventh port, light input through the eleventh port can be output through the ninth port and the twelfth port, and for light input through the ninth port, the beam splitting ratio between the tenth port and the eleventh port is A2:A3;
[0024] Furthermore, the sixth waveguide includes a first waveguide segment and a second waveguide segment, the eleventh port is connected to the eighth port through the first waveguide segment, and the twelfth port is connected to the first phase basis signal output port through the second waveguide segment.
[0025] Preferably, the reflecting unit is a 45-degree Faraday rotator mirror.
[0026] Preferably, A2∶A3=70∶30.
[0027] Preferably, the waveguide is formed of silicon dioxide material, and the beam splitter is formed of silicon dioxide material.
[0028] Preferably, the optical path difference between the fifth waveguide and the fourth waveguide is 1 / 2 of the time interval between two optical pulses under the phase basis.
[0029] A second aspect of the invention relates to a QKD receiver for time-phase coding, comprising a first photodetector unit, a second photodetector unit, and a time-phase decoder of the present invention.
[0030] The first photoelectric detection unit is configured to detect the optical signal output from the time basis vector signal output port;
[0031] The second photoelectric detection unit is configured to detect the optical signals output from the first and second phase basis signal output ports.
[0032] Furthermore, the first photoelectric detection unit includes a third single-photon detector, which is located at the time basis signal output port.
[0033] Furthermore, the second photoelectric detection unit includes a first single-photon detector and a second single-photon detector, wherein the first single-photon detector is disposed at the first phase basis signal output port, and the second single-photon detector is disposed at the second phase basis signal output port. Attached Figure Description
[0034] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0036] Figure 1 This paper presents an existing high-speed silicon-based on-chip QKD encoding and decoding system;
[0037] Figure 2 An existing decoding chip for quantum key distribution is shown;
[0038] Figure 3 An existing hybrid waveguide integrated interferometer is shown for implementing encoding and decoding functions in a QKD system based on a phase coding protocol;
[0039] Figure 4 An example of a time-phase decoder according to the present invention is shown;
[0040] Figure 5 It shows the use of Figure 4 A QKD receiver implemented using a time-phase decoder;
[0041] Figure 6 A further example of a time-phase decoder according to the present invention is shown, and a QKD receiver implemented based on this example is also shown. Detailed Implementation
[0042] In the following description, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example in order to fully convey the spirit of the invention to those skilled in the art. Therefore, the invention is not limited to the embodiments disclosed herein.
[0043] Figure 4An example of a time-phase decoder according to the present invention is shown, which includes a decoding chip and first and second reflection units 402, 401 disposed at the boundary of the decoding chip.
[0044] In this invention, the decoding chip is implemented based on planar optical waveguide technology (PLC), for example, it can be fabricated using SiO2 planar optical waveguide technology.
[0045] like Figure 4 As shown, the decoding chip includes a first beam splitter 201 and a second beam splitter 202. The beam splitters 201 / 202 can be formed using silicon dioxide material based on planar optical waveguide technology.
[0046] In the decoding chip, the first beam splitter 201 is formed as a four-port device, having a first port, a second port, a third port and a fourth port, and is configured such that: when an optical signal is input through the first port, it can be output through the second port and the third port after beam splitting; when an optical signal is input through the third port, it can be output through the first port and the fourth port after beam splitting.
[0047] Similarly, the second beam splitter 202 is also formed as a four-port device, having a fifth port, a sixth port, a seventh port and an eighth port, and is configured such that when an optical signal is input via the fifth port, it can be output from the sixth port and the seventh port after beam splitting; when an optical signal is input via the seventh port, it can be output from the fifth port and the eighth port after beam splitting.
[0048] See also Figure 4 The decoding chip also has multiple external input and output ports, namely: input port, time basis signal output port, first phase basis signal output port, second phase basis signal output port, first reflection port and second reflection port.
[0049] In the decoding chip, the input port is used to receive time-phase encoded optical signals, which include photon pairs formed by two consecutive pulses with a specific phase difference under the phase basis, and pulse photons distributed sequentially in the time domain under the time basis.
[0050] Inside the chip, the input port is connected to the first port of the first beam splitter 201 via the first waveguide 103, so as to perform basis vector selection on the input time phase encoded optical signal with the help of the first beam splitter 201.
[0051] The first beam splitter 201 is used as a basis selection unit, wherein: when the time-phase encoded optical signal is output from the second port, it is selected to be decoded under the time basis; when the time-phase encoded optical signal is output from the third port, it is selected to be decoded under the phase basis.
[0052] Therefore, inside the chip, the second port of the first beam splitter 201 is connected to the time basis signal output port through the second waveguide 105, so as to allow decoding under the time basis by probing the optical signal output from the time basis signal output port; at the same time, the third port of the first beam splitter 201 is connected to the fifth port of the second beam splitter 202 through the third waveguide 104, so as to allow decoding of the time phase encoded optical signal under the phase basis by means of the phase decoding optical path including the second beam splitter 202.
[0053] In this invention, the first beam splitter 201 is configured to provide non-equal beam splitting for optical signals, that is: when an optical signal is input from the first port, the ratio of the two optical signal components output from the second port and the third port after beam splitting is A2:A3, where A2 is different from A3.
[0054] In a preferred example, the beam splitting ratio A2:A3 can be selected as 70:30.
[0055] In this invention, phase decoding of time-phase encoded optical signals is achieved by forming an unequal-arm interferometer structure including a second beam splitter 202 in the decoding chip, wherein the second beam splitter 202 is configured to provide an equal split ratio for the optical signal.
[0056] See Figure 4 Inside the decoding chip, the sixth port of the second beam splitter 202 is connected to the first reflection port via the fourth waveguide 106, and the seventh port is connected to the second reflection port via the fifth waveguide 300. The fourth waveguide 106 and the fifth waveguide 300 have different lengths (optical path lengths). Therefore, by placing the first and second reflection units 402 and 401 at the first and second reflection ports respectively, the light signal arriving at the reflection port is reflected, and the polarization state is deflected by 90 degrees, thus realizing an unequal-arm interferometer structure.
[0057] In a preferred example, the first (second) reflecting unit can be a 45-degree Faraday rotator mirror.
[0058] In the unequal-arm interferometer structure, the fourth and fifth waveguides with different optical path lengths serve as two arms of unequal length, providing a relative delay for two consecutive optical signals under the phase basis. Therefore, the length difference (optical path difference) between the fourth and fifth waveguides can be formed as 1 / 2 of the time interval between two consecutive optical pulses under the phase basis, allowing the two optical pulses to achieve interference in the unequal-arm interferometer.
[0059] As an example, the fifth waveguide 300 can be formed as a waveguide delay line, thus serving as the long arm in an unequal-arm interferometer, and vice versa.
[0060] Therefore, when the time-phase encoded optical signal is passively selected by the first beam splitter 201 and enters the third waveguide 104 from the third port for decoding under the phase basis, it enters the unequal-arm interferometer structure through the fifth port. In the unequal-arm interferometer structure, the optical signals transmitted along the fourth and fifth waveguides are reflected by the first and second Faraday rotators 402 / 401 at the first and second reflection ports, respectively, and return to the second beam splitter 202 along the original path. At the same time, their polarization state is rotated by 90 degrees, achieving self-compensation for polarization state changes. The two reflected optical signals interfere at the second beam splitter 202, and the resulting interference signal is output through the fifth and eighth ports of the second beam splitter 202. Those skilled in the art will know that, for time-phase encoded optical signals, in the decoding under the phase basis, the unequal arm interferometer will output three interference signals (interference peaks) in time. Among them, the middle interference signal will correspond to the phase encoding information in the time-phase encoded optical signal. According to the phase difference between the two pulses before and after the photon pair under the phase basis, which is 0 or π, the interference signal will be output at the fifth and eighth ports of the second beam splitter 202.
[0061] See also Figure 4 The eighth port of the second beam splitter 202 is connected to the first phase basis signal output port through the sixth waveguide 101 to allow photon counting detection of the interference signal output from the eighth port; the fifth port of the second beam splitter 202 is connected to the third port of the first beam splitter 201 through the third waveguide 104, and the fourth port of the first beam splitter 201 is connected to the second phase basis signal output port through the seventh waveguide 102 to allow photon counting detection of the interference signal output from the fifth port, thereby realizing phase state decoding.
[0062] In this invention, the waveguide and beam splitter are preferably made of silicon dioxide material and formed using planar optical waveguide technology.
[0063] Figure 5 An example of a QKD receiver according to the present invention is shown, which includes Figure 4 The decoding chip includes a first photodetector unit for time basis decoding and a second photodetector unit for phase basis decoding.
[0064] exist Figure 5 In the example, the first photoelectric detection unit may include a third single-photon detector, which is located at the time basis signal output port and is used to perform photon counting detection on the output optical signal.
[0065] The second photoelectric detection unit may include first and second single-photon detectors, which are respectively disposed at the first and second phase basis signal output ports, for photon counting detection of the output interference signal.
[0066] Since the interference signals output from the fifth and eighth ports of the second beam splitter 202 have different optical paths from the second beam splitter 202 to the first and second phase basis signal output ports, they will have different light intensities when they reach their respective detectors, resulting in an imbalance in the intensity of the detection signals.
[0067] Therefore, in a further example of the decoding chip and QKD receiver of the present invention, a third beam splitter 203 is also provided, such as... Figure 6 As shown.
[0068] like Figure 6 As shown, the third beam splitter 203 is also formed as a 4-port device, having a ninth port, a tenth port, an eleventh port and a twelfth port, and is configured such that when an optical signal is input via the ninth port, it can be output from the tenth port and the eleventh port after beam splitting; when an optical signal is input via the eleventh port, it can be output from the ninth port and the twelfth port after beam splitting.
[0069] The third beam splitter 203 is positioned in the optical path between the second beam splitter 202 and the first phase vector signal output port. In this case, the sixth waveguide can be composed of a first waveguide segment and a second waveguide segment. The eleventh port is connected to the eighth port through the first waveguide segment, and the twelfth port is connected to the first phase vector signal output port through the second waveguide segment, thereby allowing intensity compensation for the interference signal reaching the first phase vector signal output port.
[0070] In order to ensure that the interference signals arriving at the first and second phase basis signal output ports have the same light intensity, the third beam splitter 203 is configured to provide non-equal beam splitting for the optical signal. That is, when the optical signal is input from the ninth port, the ratio of the two optical signal components output from the tenth port and the eleventh port after beam splitting is A2:A3, where A2 is different from A3.
[0071] In a preferred example, the beam splitting ratio A2:A3 can be selected as 70:30. Therefore, when the interference signal output from the fifth port of the second beam splitter 202 reaches the second phase basis signal output port after passing through the fourth port of the first beam splitter 201 (which has a 70% beam splitting ratio), the interference signal output from the eighth port of the second beam splitter 202 will also reach the first phase basis signal output port after passing through the twelfth port of the third beam splitter 203 (which also has a 70% beam splitting ratio). At this time, the detection output results obtained by the first and second single-photon detectors from photon counting detection of the phase state interference signal remain essentially balanced.
[0072] In summary, in the decoding chip and QKD receiver of this invention, all on-chip devices (basis selection unit and time-phase decoding unit) are fabricated using PLC technology. Existing technology allows for precise control of the interferometer arm length difference, eliminating the need for built-in phase shifters or phase modulators in the interferometer ring for interference stabilization. Except for the external single-photon detector, all functional devices are passive, exhibiting high stability and reliability. Furthermore, since the PLC planar waveguide mode is essentially consistent with the mode in the optical fiber, there is no need for dedicated polarization state control before coupling into the chip, reducing the need for external polarization controllers and further reducing the size of the QKD receiver. Compared to… Figure 1 and 2 The fully integrated decoder in this invention combines a basis vector selection unit and a time-phase decoding unit, achieving high integration and effectively solving the performance degradation problems caused by low optical coupling efficiency and polarization mode selection. Furthermore, compared to... Figure 3 As shown in the diagram, this invention integrates both a basis selection unit and a time-phase decoding unit, eliminating the need for an external phase modulator and optical circulator. This significantly reduces the size, while also reducing insertion loss and improving performance.
[0073] Although the present invention has been described above with reference to the accompanying drawings and specific embodiments, those skilled in the art will readily recognize that the above embodiments are merely exemplary and used to illustrate the principles of the present invention. They do not limit the scope of the present invention. Those skilled in the art can make various combinations, modifications and equivalent substitutions to the above embodiments without departing from the spirit and scope of the present invention.
Claims
1. A miniaturized time-phase decoder, comprising a decoding chip based on planar optical waveguide technology, a first reflection unit, and a second reflection unit; The decoding chip includes a first beam splitter and a second beam splitter, and is formed with an input port, a time basis signal output port, a first phase basis signal output port, a second phase basis signal output port, a first reflection port and a second reflection port. The first beam splitter has a first port, a second port, a third port, and a fourth port, wherein, Light input through the first port can be output through the second and third ports, and light input through the third port can be output through the first and fourth ports. The second beam splitter has a fifth port, a sixth port, a seventh port, and an eighth port, wherein light input through the fifth port can be output through the sixth and seventh ports, and light input through the seventh port can be output through the fifth and eighth ports. The input port is connected to the first port via the first waveguide; The second port is connected to the time basis signal output port via a second waveguide; The third port is connected to the fifth port via a third waveguide; The sixth port is connected to the first reflection port via the fourth waveguide; The seventh port is connected to the second reflection port through the fifth waveguide, wherein the fifth waveguide has an optical path length different from that of the fourth waveguide; The eighth port is connected to the first phase basis signal output port through the sixth waveguide; The fourth port is connected to the second phase basis signal output port via the seventh waveguide; The first reflection unit is located at the first reflection port and is used to reflect the optical signal and cause the polarization state to be deflected by 90 degrees. The second reflection unit is located at the second reflection port and is used to reflect the optical signal and cause the polarization state to deflect by 90 degrees.
2. The time-phase decoder as described in claim 1, wherein, The first beam splitter is configured such that, for light input through the first port, the beam splitting ratio between the second port and the third port is A2:A3, where A2 is not equal to A3; and the second beam splitter is configured to provide proportional beam splitting.
3. The time-phase decoder as described in claim 2, further comprising a third beam splitter, the third beam splitter including a ninth port, a tenth port, an eleventh port, and a twelfth port, wherein, Light input through the ninth port can be output through the tenth and eleventh ports, and light input through the eleventh port can be output through the ninth and twelfth ports. For light input through the ninth port, the beam splitting ratio between the tenth and eleventh ports is A2:A3. Furthermore, the sixth waveguide includes a first waveguide segment and a second waveguide segment, the eleventh port is connected to the eighth port through the first waveguide segment, and the twelfth port is connected to the first phase basis signal output port through the second waveguide segment.
4. The time-phase decoder as described in any one of claims 1-3, wherein, The reflecting unit is a 45-degree Faraday rotating mirror.
5. The time-phase decoder as described in claim 2 or 3, wherein, A2:A3=70:
30.
6. The time-phase decoder as described in any one of claims 1-3, wherein, The waveguide is formed of silicon dioxide material, and the beam splitter is also formed of silicon dioxide material.
7. The time-phase decoder as described in any one of claims 1-3, wherein, The optical path difference between the fifth waveguide and the fourth waveguide is half the time interval between two optical pulses under the phase basis.
8. A QKD receiver for time-phase coding, comprising a first photodetector unit, a second photodetector unit, and a time-phase decoder as described in any one of claims 1-7; The first photoelectric detection unit is configured to detect the optical signal output from the time basis vector signal output port; The second photoelectric detection unit is configured to detect the optical signals output from the first and second phase basis signal output ports.
9. The QKD receiver as described in claim 8, wherein, The first photoelectric detection unit includes a third single-photon detector, which is located at the time basis signal output port.
10. The QKD receiver as described in claim 8, wherein, The second photoelectric detection unit includes a first single-photon detector and a second single-photon detector. The first single-photon detector is located at the first phase basis signal output port, and the second single-photon detector is located at the second phase basis signal output port.