Array substrate, display panel and display device

Abstract

The application discloses an array substrate, a display panel and a display device. The array substrate comprises a plurality of pixels and a plurality of data signal lines, the pixel comprises a plurality of sub-pixels, the sub-pixels are arranged in an array, and at least two columns of sub-pixels display different colors; in the case of displaying a double-color mixed-color picture, in each column of sub-pixels displaying the same color, the number of first sub-pixels is equal, the number of second sub-pixels is equal, a previous sub-pixel connected with the first sub-pixel and the same data signal line does not emit light, and a previous sub-pixel connected with the second sub-pixel and the same data signal line emits light. The array substrate of the application has less pre-charging for the first sub-pixel, and the light-emitting brightness is relatively dark; the pre-charging for the second sub-pixel is relatively more, and the light-emitting brightness is relatively bright; by controlling the number of the first sub-pixels of each column displaying the same color to be the same and the number of the second sub-pixels to be the same, the brightness of each column of sub-pixels is equal on the whole, so that the phenomenon of vertical stripe defects is avoided.

Description

Technical Field

[0001] This invention relates to the field of display device technology, and more specifically, to an array substrate, a display panel, and a display device. Background Technology

[0002] With the continuous advancement of flat panel display technology, liquid crystal displays (LCDs) have been successfully applied to various display devices. Dual-gate products can reduce the number of chip-on-film (COF) films, thus lowering costs and gaining increasing favor among panel manufacturers. Because pixels may not be fully charged, the data voltage written to the previous pixel is used to pre-charge the pixel to ensure display quality. In related technologies, due to the Dual-gate pixel architecture, in blue screen displays (a two-color mixed screen where blue and green are bright, and red is not bright), different pre-charging conditions can lead to charging differences between different columns of blue pixels and between different columns of green pixels. These charging differences can cause brightness differences, resulting in vertical stripes in the blue screen display. Summary of the Invention

[0003] The present invention provides an array substrate, a display panel, and a display device.

[0004] This invention provides an array substrate comprising multiple pixels and multiple data signal lines. Each pixel includes multiple sub-pixels arranged in an array. The data signal lines provide data voltages to the sub-pixels, which control the sub-pixels to emit light to display the color corresponding to the sub-pixels. At least two columns of sub-pixels display different colors. In the case of displaying a dual-color mixed image, in each column of sub-pixels displaying the same target color, the number of first sub-pixels is equal and the number of second sub-pixels is equal. The sub-pixel preceding the first sub-pixel connected to the same data signal line does not emit light, while the sub-pixel preceding the second sub-pixel connected to the same data signal line emits light.

[0005] In this way, by controlling the number of first sub-pixels and the number of second sub-pixels in each column of sub-pixels displaying the same target color to be the same, the overall brightness of each column of sub-pixels of the same color is made equal, and there will be no brightness difference during the display process, thus avoiding the phenomenon of vertical stripe defects.

[0006] In some implementations, three sub-pixels constitute one pixel. The three sub-pixels include a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. When displaying a dual-color mixed image, the first color sub-pixel does not emit light, while the second color sub-pixel and the third color sub-pixel emit light.

[0007] Thus, when displaying a two-color mixed image, the sub-pixels corresponding to the displayed two colors emit light, and the sub-pixels corresponding to the undisplayed colors emit light.

[0008] In some implementations, the preceding sub-pixel connected to the same data signal line as the first sub-pixel is the first color sub-pixel, and the preceding sub-pixel connected to the same data signal line as the second sub-pixel is the second color sub-pixel or the third color sub-pixel.

[0009] Thus, when displaying a dual-color mixed image, if the preceding sub-pixel connected to the same signal line as the sub-pixel is a first color sub-pixel, then the sub-pixel is the first sub-pixel; if the preceding sub-pixel connected to the same signal line as the sub-pixel is a second color sub-pixel or a third color sub-pixel, then the sub-pixel is the second sub-pixel.

[0010] In some implementations, the data voltage of the preceding sub-pixel connected to the same data signal line as the sub-pixel is written to precharge the sub-pixel, and the data voltage for precharging the first sub-pixel is greater than the data voltage for precharging the second sub-pixel.

[0011] In this way, by writing the data voltage of the previous sub-pixel connected to the same data signal line as the sub-pixel to pre-charge the sub-pixel, the charging time of the sub-pixel can be improved, thereby making the display effect of the sub-pixel better.

[0012] In some implementations, each of the data signal lines connects to at least two columns of the sub-pixels, and the sub-pixels and the data signal lines are connected in a Z-reversed manner.

[0013] In this way, the sub-pixels and data signal lines are connected in a Z-reversal manner, which makes the polarity of sub-pixels connected to the same data signal line the same, thereby reducing power consumption.

[0014] In some embodiments, the array substrate includes gate driving lines for driving the sub-pixels to operate. The sub-pixels are connected to the gate driving lines via transistors, and sub-pixels in the same row are driven by two gate driving lines.

[0015] Therefore, using a dual-gate drive method to connect the gate drive lines can reduce the number of data signal lines.

[0016] In some embodiments, the gate of the transistor is connected to the gate drive line, and the transistor is also used to connect the sub-pixel and the data signal line.

[0017] In this way, the sub-pixel is connected to the gate drive line and the data signal line through a transistor to realize the control of the gate drive and the writing of the data signal.

[0018] In some implementations, when the gate drive line outputs a high level, the transistor is turned on, and the data voltage of the data signal line is written to the sub-pixel to control the sub-pixel to emit light.

[0019] Thus, when the transistor is turned on, the data voltage can be written to the connected sub-pixels through the transistor; when the transistor is turned off, the data voltage cannot be written to the connected sub-pixels, thereby enabling control over the operation of the sub-pixels.

[0020] In some implementations, sub-pixels connected to the same data signal line in two adjacent rows form a periodic unit. Within a periodic unit, two said sub-pixels are connected to a first side of the data signal line, and two said sub-pixels are connected to a second side of the data signal line.

[0021] Thus, by using a pixel architecture with dual-gate driving and Z-inversion, the number of data signal lines can be reduced, while power consumption and cost are also reduced.

[0022] In some implementations, the sub-pixel does not emit light when the data voltage written to the sub-pixel is low, and emits light when the data voltage written to the sub-pixel is high.

[0023] Thus, by controlling the data voltage transmitted through the data signal line to be high or low, it is possible to control whether the sub-pixel that has that data voltage written on it emits light.

[0024] In some implementations, three sub-pixels constitute one pixel, and the sub-pixels within a pixel are arranged in the order of a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel, and the pixels are arranged in an array such that the sub-pixels are arranged in an array.

[0025] In this way, the corresponding data voltage can be set according to the arrangement order of the sub-pixels to display the corresponding image.

[0026] In some embodiments, each row of sub-pixels is connected to two gate driving lines, and four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes gate driving lines corresponding to the sub-pixel units. The first column of sub-pixels is the first color sub-pixel. In the first row of sub-pixels, the sub-pixels in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line. In the second row of sub-pixels, the sub-pixels in the second, third, fifth, eighth, ninth, and eleventh columns are connected to the first gate driving line. The sub-pixels in the first, fourth, sixth, seventh, tenth, and twelfth columns are connected to the fourth gate driving line; in the third row of sub-pixels, the sub-pixels in the second, fourth, sixth, seventh, tenth, and twelfth columns are connected to the fifth gate driving line, and the sub-pixels in the first, third, fifth, eighth, ninth, and eleventh columns are connected to the sixth gate driving line; in the fourth row of sub-pixels, the sub-pixels in the second, third, fifth, eighth, ninth, and eleventh columns are connected to the seventh gate driving line, and the sub-pixels in the first, fourth, sixth, seventh, tenth, and twelfth columns are connected to the eighth gate driving line.

[0027] Thus, by controlling the connection between the sub-pixels and the gate drive lines, the order in which data signals are written to the sub-pixels can be changed, thereby controlling the number of the first and second sub-pixels.

[0028] In some implementations, the first color sub-pixel is used to display red, the second color sub-pixel is used to display green, and the third color sub-pixel is used to display blue. The sub-pixels and the data signal line are connected in a Z-reversed manner. When displaying a blue screen, the sub-pixels in the first, fourth, seventh, and tenth columns displaying red do not emit light. In the sub-pixels in any one of the second, fifth, eighth, and eleventh columns displaying green, the number of first sub-pixels is 1, and the number of second sub-pixels is 3. In the sub-pixels in any one of the third, sixth, ninth, and twelfth columns displaying blue, the number of first sub-pixels is 2, and the number of second sub-pixels is 2.

[0029] Thus, based on the Z-reversal connection and dual-grid line drive, the four rows and twelve columns of sub-pixels, under the above connection method, each column of G sub-pixels has three high-brightness and one low-brightness sub-pixels, resulting in equal overall brightness; each column of B sub-pixels has two high-brightness and two low-brightness sub-pixels, resulting in equal overall brightness. Therefore, in blue-green mixed color images, the brightness of each column after blue-green mixing is equal, thereby avoiding the phenomenon of poor vertical stripes.

[0030] In some embodiments, each row of sub-pixels is connected to two gate driving lines, and four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to each sub-pixel unit. The first column of sub-pixels is the first color sub-pixel. In the first row of sub-pixels, the sub-pixels in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line. In the second row of sub-pixels, the sub-pixels in the second, third, sixth, seventh, ninth, and eleventh columns are connected to... The third gate driving line connects the sub-pixels in the first, fourth, fifth, eighth, tenth, and twelfth columns to the fourth gate driving line; in the third row of sub-pixels, the sub-pixels in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line; in the fourth row of sub-pixels, the sub-pixels in the second, third, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels in the first, fourth, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0031] In some embodiments, each row of sub-pixels is connected to two gate driving lines, and four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to each sub-pixel unit. The first column of sub-pixels is the first color sub-pixel. In the first row of sub-pixels, the sub-pixels in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line. In the second row of sub-pixels, the sub-pixels in the second, third, sixth, seventh, ninth, and eleventh columns are connected to... The third gate driving line connects the sub-pixels in the first, fourth, fifth, eighth, tenth, and twelfth columns to the fourth gate driving line; in the third row of sub-pixels, the sub-pixels in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line; in the fourth row of sub-pixels, the sub-pixels in the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels in the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0032] In some embodiments, each row of sub-pixels is connected to two gate driving lines, and four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to each sub-pixel unit. The first column of sub-pixels is the first color sub-pixel. In the first row of sub-pixels, the sub-pixels in the second, fourth, fifth, seventh, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels in the first, third, sixth, eighth, ninth, and eleventh columns are connected to the second gate driving line. In the second row of sub-pixels, the sub-pixels in the first, third, sixth, eighth, ninth, and twelfth columns are connected to... The third gate driving line, the sub-pixels in the second, fourth, fifth, seventh, tenth, and eleventh columns are connected to the fourth gate driving line; in the third row of sub-pixels, the sub-pixels in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line; in the fourth row of sub-pixels, the sub-pixels in the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels in the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0033] This invention provides a display panel, which includes a driving unit and an array substrate according to any of the above embodiments, wherein the driving unit is used to drive the pixels of the array substrate.

[0034] Thus, the display panel of the present invention controls the number of first sub-pixels and the number of second sub-pixels in each column of sub-pixels displaying the same target color to be the same, so that the brightness of each column of sub-pixels of the same color is generally equal, and there will be no brightness difference during the display process, thereby avoiding the phenomenon of vertical stripe defects.

[0035] An embodiment of the present invention provides a display device, the display device including a housing and a display panel as described above, the display panel being disposed within the housing.

[0036] Thus, the display device of the present invention controls the number of first sub-pixels and the number of second sub-pixels in each column of sub-pixels displaying the same target color to be the same, so that the brightness of each column of sub-pixels of the same color is generally equal, and there will be no brightness difference during the display process, thereby avoiding the phenomenon of vertical stripe defects.

[0037] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0038] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0039] Figure 1 This is a schematic diagram of the array substrate according to an embodiment of the present invention;

[0040] Figure 2 This is a timing diagram of the array substrate according to an embodiment of the present invention;

[0041] Figure 3 This is a schematic diagram of the array substrate of the related technology;

[0042] Figure 4 This is a timing diagram of the array substrate for related technologies;

[0043] Figure 5 This is a schematic diagram of the array substrate of the related technology;

[0044] Figure 6 This is a schematic diagram of the array substrate according to an embodiment of the present invention;

[0045] Figure 7 This is a schematic diagram of the array substrate according to an embodiment of the present invention;

[0046] Figure 8 This is a schematic diagram of the array substrate according to an embodiment of the present invention;

[0047] Figure 9 This is a schematic diagram of the array substrate according to an embodiment of the present invention;

[0048] Figure 10 This is a schematic diagram of the process flow of an embodiment of the present invention;

[0049] Figure 11 This is a circuit diagram of the gate driving unit according to an embodiment of the present invention;

[0050] Figure 12 This is a timing diagram of the gate driving unit according to an embodiment of the present invention. Detailed Implementation

[0051] Embodiments of the present invention are described in detail below. These embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0052] With the continuous advancement of flat panel display technology, liquid crystal displays (LCDs) have been successfully applied to various display devices. Dual-gate products can reduce the number of chip-on-film (COF) films, thus lowering costs and gaining increasing favor among panel manufacturers. Because pixels may not be fully charged, the data voltage written to the previous pixel is used to pre-charge the pixel to ensure display quality. In related technologies, due to the Dual-gate pixel architecture, in blue screen displays (a two-color mixed screen where blue and green are bright, and red is not bright), different pre-charging conditions can lead to charging differences between different columns of blue pixels and between different columns of green pixels. These charging differences can cause brightness differences, resulting in vertical stripes in the blue screen display.

[0053] Please see Figure 1 This invention provides an array substrate 1000, which includes multiple pixels 100 and multiple data signal lines 200. Each pixel 100 includes multiple sub-pixels 110, which are arranged in an array. The data signal lines 200 provide data voltage to the sub-pixels 110, and the data voltage controls the sub-pixels 110 to emit light to display the color corresponding to the sub-pixels 110. At least two columns of sub-pixels 110 display different colors. In the case of displaying a dual-color mixed image, in each column of sub-pixels 110 displaying the same target color, the number of first sub-pixels 111 is equal and the number of second sub-pixels 112 is equal. The sub-pixel 110 preceding the first sub-pixel 111 connected to the same data signal line 200 does not emit light, while the sub-pixel 110 preceding the second sub-pixel 112 connected to the same data signal line 200 emits light.

[0054] Specifically, the target color can be one of the colors displayed when displaying a dual-color mixed image, or it can be both colors displayed. For example, when displaying a blue image, the target color can be green, or it can be both green and blue. The preceding sub-pixel 110 connected to the same data signal line 200 as the current sub-pixel is called the preceding sub-pixel of the current sub-pixel. The preceding sub-pixel 110 connected to the same data signal line 200 as the first sub-pixel 111 does not emit light, while the preceding sub-pixel 110 connected to the same data signal line 200 as the second sub-pixel 112 emits light. That is, the preceding sub-pixel of the first sub-pixel 111 emits light, while the preceding sub-pixel of the second sub-pixel 112 does not emit light. When a sub-pixel is pre-charged using the data voltage written to the previous sub-pixel, the display brightness of the first sub-pixel 111 is relatively dim because the sub-pixel before the first sub-pixel 111 does not emit light; and the display brightness of the second sub-pixel 112 is relatively bright because the sub-pixel before the second sub-pixel 112 emits light. Therefore, by controlling the number of first sub-pixels 111 and the number of second sub-pixels 112 in the sub-pixels 110 displaying the same target color to be the same, the overall brightness of the sub-pixels 110 displaying the same target color in each column can be made the same, so as to avoid brightness differences and thus avoid vertical stripe defects.

[0055] In this way, by controlling the number of first sub-pixels 111 and the number of second sub-pixels 112 of each column of sub-pixels 110 displaying the same target color to be the same, the brightness of each column of sub-pixels 110 of the same color is made equal overall, and there will be no brightness difference during the display process, thereby avoiding the phenomenon of vertical stripe defects.

[0056] Please see Figure 1 In some implementations, three sub-pixels 110 form one pixel 100. The three sub-pixels 110 include a first color sub-pixel 113, a second color sub-pixel 114, and a third color sub-pixel 115. When displaying a dual-color mixed image, the first color sub-pixel 113 does not emit light, while the second color sub-pixel 114 and the third color sub-pixel 115 emit light.

[0057] Specifically, in one embodiment, the first color sub-pixel 113 can be a red sub-pixel 110, the second color sub-pixel 114 can be a green sub-pixel 110, and the third color sub-pixel 115 can be a blue sub-pixel 110. When displaying a blue image, the red sub-pixel 110 does not emit light, while the green and blue sub-pixels 110 emit light. The displayed image is a two-color mixed image. The two-color mixed image can also be a mixed image of red and green or a mixed image of red and blue; no limitation is made here.

[0058] Thus, when displaying a two-color mixed image, the sub-pixel 110 corresponding to the displayed two colors emits light, while the sub-pixel 110 corresponding to the undisplayed colors does not emit light.

[0059] In some implementations, the preceding sub-pixel 110 connected to the same data signal line 200 as the first sub-pixel 111 is the first color sub-pixel 113, and the preceding sub-pixel 110 connected to the same data signal line 200 as the second sub-pixel 112 is the second color sub-pixel 114 or the third color sub-pixel 115.

[0060] Specifically, since the first color sub-pixel 113 does not emit light when displaying a dual-color mixed image, while the second color sub-pixel 114 and the third color sub-pixel 115 emit light, if the sub-pixel preceding sub-pixel 110 is the first color sub-pixel 113, that is, the sub-pixel preceding sub-pixel 110 does not emit light, then sub-pixel 110 is the first sub-pixel 111; if the sub-pixel preceding sub-pixel 110 is the second color sub-pixel 114 or the third color sub-pixel 115, that is, the sub-pixel preceding sub-pixel 110 emits light, then sub-pixel 110 is the second sub-pixel 112.

[0061] Thus, when displaying a dual-color mixed image, if the preceding sub-pixel 110 connected to the same signal line as sub-pixel 110 is a first color sub-pixel 113, then this sub-pixel 110 is a first sub-pixel 111; if the preceding sub-pixel 110 connected to the same signal line as sub-pixel 110 is a second color sub-pixel 114 or a third color sub-pixel 115, then this sub-pixel 110 is a second sub-pixel 112.

[0062] In some implementations, the data voltage of the previous sub-pixel 110, which is connected to the same data signal line 200 as sub-pixel 110, is used to precharge the sub-pixel 110, and the data voltage for precharging the first sub-pixel 111 is greater than the data voltage for precharging the second sub-pixel 112.

[0063] Specifically, because the charging time of sub-pixel 110 is short at high refresh rates, making it difficult to achieve good display results, the data voltage of the preceding sub-pixel is used to pre-charge sub-pixel 110 to ensure it has a good working state. Since the preceding sub-pixel of the first sub-pixel 111 does not emit light, the data voltage written to it is low, resulting in a smaller pre-charging voltage and a poor pre-charging effect. When the first sub-pixel 111 emits light, its brightness is dim. Conversely, since the preceding sub-pixel of the second sub-pixel 112 emits light, the data voltage written to it is high, resulting in a larger pre-charging voltage and a better pre-charging effect. When the second sub-pixel 112 emits light, its brightness is bright. For related technologies, please refer to [link to related technologies]. Figures 3 to 5 The pixel architecture has a two-row, three-column cycle, and the timing diagram is as follows: Figure 4 As shown, when displaying a blue screen, since the red sub-pixel does not emit light, the sub-pixel connected to the same data signal line as the red sub-pixel and following it is the first sub-pixel. The pre-charge data voltage for the first sub-pixel is low, resulting in poor pre-charge, and is therefore marked "poor". The sub-pixel connected to the same data signal line as the blue or green sub-pixel and following it is the second sub-pixel. The pre-charge data voltage for the second sub-pixel is high, resulting in better pre-charge, and is marked "good". Figure 5 As shown, the third column of sub-pixels displaying green and the fourth column of sub-pixels displaying blue are both "differences", as shown. Figure 5 As shown, the fifth column of subpixels displaying green and the sixth column of subpixels displaying blue are both "good". Figure 5 As shown, the difference in charging after blue-green color mixing will lead to a difference in brightness. Specifically, the display brightness after mixing the third column of sub-pixels that display green and the fourth column of sub-pixels that display blue is relatively low, while the display brightness after mixing the fifth column of sub-pixels that display green and the sixth column of sub-pixels that display blue is relatively high. Therefore, the phenomenon of vertical stripe defects will occur.

[0064] Therefore, by controlling the number of first sub-pixels 111 and the number of second sub-pixels 112 in each column of sub-pixels 110 displaying the same target color, the overall display brightness of the sub-pixels 110 in each column is kept consistent, thus avoiding the phenomenon of poor vertical stripe display. Please refer to [link / reference]. Figure 2 The data voltage writing time of sub-pixel 110 is 1H, and the gate drive line 300 is kept at a high level for 3H, which means that a pre-charge time of 2H is added for sub-pixel 110.

[0065] Thus, by writing the data voltage of the previous sub-pixel 110 connected to the same data signal line 200 as sub-pixel 110 to pre-charge sub-pixel 110, the charging time of sub-pixel 110 can be improved, thereby making the display effect of sub-pixel 110 better.

[0066] In some implementations, each data signal line 200 connects to at least two columns of sub-pixels 110, and the sub-pixels 110 and the data signal line 200 are connected in a Z-reversal manner.

[0067] Specifically, in related technologies, the polarities of sub-pixels connected to the same data signal line are arranged in a positive-negative or negative-positive order. However, this embodiment of the invention uses a Z-reversal connection, which allows sub-pixels 110 connected to the same data signal line 200 to have the same polarity (positive or negative), achieving a 50% reduction in power consumption. Each data signal line 200 can be positioned between at least two columns of sub-pixels 110. Two adjacent rows of sub-pixels 110 include a first row of sub-pixels 111 and a second row of sub-pixels 112. In the sub-pixels 110 connected to the same data signal line 200, the sub-pixels 110 of the first row of sub-pixels 111 are connected to one side of the data signal line 200, and the sub-pixels 110 of the second row of sub-pixels 112 are connected to the other side of the data signal line 200, forming a Z-reversal connection. In one embodiment, sub-pixels 110 of the first sub-pixel row 111 are connected to the left side of the data signal line 200, and sub-pixels 110 of the second sub-pixel row 112 are connected to the right side of the data signal line 200.

[0068] In this way, the sub-pixel 110 and the data signal line 200 are connected in a Z-reversal manner, which makes the polarity of the sub-pixels 110 connected to the same data signal line 200 the same, thereby reducing power consumption.

[0069] In some embodiments, the array substrate 1000 includes a gate driving line 300 for driving sub-pixels 110 to work. The sub-pixels 110 are connected to the gate driving line 300 through transistors 400, and the sub-pixels 110 in the same row are driven by two gate driving lines 300.

[0070] Specifically, the gate driving line 300 is used to transmit the driving voltage. When the driving voltage is high, the transistor 400 connected to the gate driving line 300 is turned on, thereby driving the sub-pixel 110 connected to the transistor 400 to work. Sub-pixels 110 in the same row are driven by two gate driving lines 300, that is, a dual-gate driving method is adopted. This allows one data signal line 200 to connect two sub-pixels 110 in the same row, saving the number of data signal lines 200, simplifying the circuit structure and reducing costs.

[0071] Thus, by using a dual-gate drive to connect the gate drive line 300, the number of data signal lines 200 can be reduced.

[0072] In some embodiments, the gate of transistor 400 is connected to gate drive line 300, and transistor 400 is also used to connect sub-pixel 110 and data signal line 200.

[0073] Specifically, transistor 400 can be a thin-film transistor (TFT), with one sub-pixel 110 corresponding to one TFT. The gate of the TFT is connected to the gate driving line 300, the drain is connected to the data signal line 200, and the source is connected to the corresponding sub-pixel 110. The connection relationship between two sub-pixels 110 in the same row connected to the same data signal line 200 via transistor 400 includes long connections and short connections, such as... Figure 1 In the first row and first column, the R sub-pixel 110 is short-connected to Data1, and the G sub-pixel 110 in the first row and second column is long-connected to Data1. By changing the long or short connection relationship between sub-pixels 110 in the same row and the same data line, the connection relationship between sub-pixels 110 and gate drive lines 300 can be changed, thereby changing the order in which data voltage is written to sub-pixels 110 in that row. For example, two sub-pixels 110 in the first row connected to Data1, and the R sub-pixel 110 in the first column is short-connected to connect to Gate1, the second... The long connection of the G sub-pixel 110 in column 1 connects it to Gate2. Therefore, the data voltage is first written to the R sub-pixel 110 in the first column, and then to the G sub-pixel 110 in the second column. In the third row, the two sub-pixels 110 connected to Data1 are connected. The G sub-pixel 110 in the second column is long-connected to Data1 and connected to Gate5. The R sub-pixel 110 in the first column is short-connected to Data1 and connected to Gate6. Therefore, the data voltage is first written to the G sub-pixel 110 in the second column, and then to the R sub-pixel 110 in the first column. When the gate drive line 300 outputs a high level, the transistor 400 connected to this gate drive line 300 is turned on, allowing the data voltage to be written to its connected sub-pixel 110 through the transistor 400. For example, please refer to... Figure 1 and Figure 2 When Gate1 is high, data signals can be written to the sub-pixels 110 of the first, fourth, sixth, eighth, tenth, and twelfth columns connected to Gate1, respectively.

[0074] Thus, sub-pixel 110 is connected to gate drive line 300 and data signal line 200 via transistor 400 to realize gate drive control and data signal writing.

[0075] In some implementations, when the gate drive line 300 outputs a high level, the transistor 400 is turned on, and the data voltage of the data signal line 200 is written into the sub-pixel 110 to control the sub-pixel 110 to emit light.

[0076] Specifically, when the driving voltage transmitted through the gate driving line 300 is high, the transistor 400 connected to the gate driving line 300 is turned on, so that the data voltage transmitted through the data signal line 200 connected to the drain can be written into the sub-pixel 110 connected to the source, thereby controlling the sub-pixel 110 to work; when the driving voltage transmitted through the gate driving line 300 is low, the transistor 400 connected to the gate driving line 300 is turned off, so that the data voltage cannot be written into the sub-pixel 110, thereby controlling the sub-pixel 110 to work.

[0077] Thus, when transistor 400 is turned on, data voltage can be written to the connected sub-pixel 110 through transistor 400; when transistor 400 is turned off, data voltage cannot be written to the connected sub-pixel 110, thereby realizing control over the operation of sub-pixel 110.

[0078] Please see Figure 1 In some implementations, sub-pixels 110 connected to the same data signal line 200 in two adjacent rows form a periodic unit 500. Within a periodic unit 500, two sub-pixels 110 are connected to the first side of the data signal line 200, and two sub-pixels 110 are connected to the second side of the data signal line 200.

[0079] Specifically, in the pixel architecture based on Dual Gate and Z-inversion, the number of sub-pixels 110 connected to the same data signal line 200 in each row is two. In two adjacent rows, the two sub-pixels 110 connected to the same data signal line 200 in the first row are connected to the first side of the data signal line 200, and the two sub-pixels 110 in the second row are connected to the second side of the same data signal line 200. These four sub-pixels 110 form a periodic unit 500. In one embodiment, please refer to... Figure 1 The first row connects two sub-pixels 110 to the right of Data4, the second row connects two sub-pixels 110 to the left of Data4, and these four sub-pixels 110 can form a periodic unit 500; the third row connects two sub-pixels 110 to the right of Data4, and the fourth row connects two sub-pixels 110 to the left of Data4.

[0080] Thus, by using a pixel architecture with dual-gate driving and Z-inversion, the number of data signal lines 200 can be reduced, while power consumption and cost are also reduced.

[0081] In some implementations, sub-pixel 110 does not emit light when the data voltage written to sub-pixel 110 is low, and emits light when the data voltage written to sub-pixel 110 is high.

[0082] Specifically, please refer to Figure 2 In this configuration, 1 represents a high level and 0 represents a low level. When the gate drive line 300 outputs a high level, the transistor 400 is turned on. The turn-on of the transistor 400 allows the data voltage of the data signal line 200 to be written to the sub-pixel 110. If the data voltage written to the sub-pixel 110 is 1, the sub-pixel 110 emits light; if the data voltage written to the sub-pixel 110 is 0, the sub-pixel 110 does not emit light. In one embodiment, when displaying a blue screen, the data signals written to the red sub-pixel 110 are all 0, so that the red sub-pixel 110 does not emit light; the data signals written to the blue or green sub-pixel 110 are 1, so that the blue or green sub-pixel 110 emits light.

[0083] Thus, by controlling the data voltage transmitted through the data signal line 200 to be high or low, it is possible to control whether the sub-pixel 110 that is written with the data voltage emits light.

[0084] In some implementations, three sub-pixels 110 form a pixel 100, and the sub-pixels 110 within a pixel 100 are arranged in the order of first color sub-pixel 113, second color sub-pixel 114, and third color sub-pixel 115, and the pixel 100 is arranged in an array such that the sub-pixels 110 are arranged in an array.

[0085] Specifically, please refer to Figure 1 Let the first color sub-pixel 113 be red sub-pixel 110, the second color sub-pixel 114 be green sub-pixel 110, and the third color sub-pixel 115 be blue sub-pixel 110. Let R represent the first color sub-pixel 113, G represent the second color sub-pixel 114, and B represent the third color sub-pixel 115. Then, in a pixel 100, the arrangement order of sub-pixels 110 is RGB. If pixels 100 are arranged in a column, then in each row of sub-pixels 110, the arrangement order of sub-pixels 110 is RGBRGB.

[0086] Thus, the corresponding data voltage can be set according to the arrangement order of the sub-pixels 110 to display the corresponding image.

[0087] In some embodiments, each row of sub-pixels 110 is connected to two gate driving lines 300, and four rows and twelve columns of sub-pixels 110 form a sub-pixel 110 unit. The pixel 100 circuit includes eight gate driving lines 300 corresponding to the sub-pixel 110 units. The first column of sub-pixels 110 consists of first color sub-pixels 113. In the first row of sub-pixels 110, the sub-pixels 110 in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving lines 300, and the sub-pixels 110 in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving lines 300. In the second row of sub-pixels 110, the sub-pixels 110 in the second, third, fifth, eighth, ninth, and eleventh columns are connected to... The third gate driving line 300 connects the sub-pixels 110 of the first, fourth, sixth, seventh, tenth, and twelfth columns to the fourth gate driving line 300; in the third row of sub-pixels 110, the sub-pixels 110 of the second, fourth, sixth, seventh, tenth, and twelfth columns to the fifth gate driving line 300, and the sub-pixels 110 of the first, third, fifth, eighth, ninth, and eleventh columns to the sixth gate driving line 300; in the fourth row of sub-pixels 110, the sub-pixels 110 of the second, third, fifth, eighth, ninth, and eleventh columns to the seventh gate driving line 300, and the sub-pixels 110 of the first, fourth, sixth, seventh, tenth, and twelfth columns to the eighth gate driving line 300.

[0088] Specifically, please refer to Figure 1 The TFT-side connection relationship of the four rows and twelve columns of sub-pixels 110, data signal lines 200, and gate drive lines 300 can be: short long long long long long long - long short short short short short - short long long short long long long - long short short long short short - long long long short long short - long long long short long long - short short short short short short - short long long short short - short short long short short - short long long short long short - long short short long short short.

[0089] In the first row, only the first sub-pixel 110 connected to Gate1 is a short connection, and the rest are long connections. Similarly, only the first sub-pixel 110 connected to Gate2 is a long connection, and the rest are short connections. In the second row, only the first and fourth sub-pixels 110 connected to Gate3 are short connections, and the rest are long connections. Similarly, only the first and fourth sub-pixels 110 connected to Gate4 are long connections, and the rest are short connections. In the third row, only the fourth sub-pixel 110 connected to Gate5 is a short connection, and the rest are long connections. Similarly, only the fourth sub-pixel 110 connected to Gate6 is a long connection, and the rest are short connections. In the fourth row, only the first sub-pixel 110 connected to Gate7 is a short connection, and the rest are long connections. Similarly, only the first and fourth sub-pixels 110 connected to Gate8 are long connections, and the rest are short connections. Since the arrangement order of each row of sub-pixels 110 is RGBRGB, changing the TFT-side connection relationship of sub-pixels 110 can change the connection relationship between sub-pixels 110 and gate driving lines 300, thereby changing the order of data voltage writing.

[0090] Thus, by controlling the connection between sub-pixel 110 and gate drive line 300, the order in which data signals are written to sub-pixel 110 can be changed, thereby controlling the number of first sub-pixel 111 and second sub-pixel 112.

[0091] In some embodiments, the first color sub-pixel 113 is used to display red, the second color sub-pixel 114 is used to display green, and the third color sub-pixel 115 is used to display blue. The sub-pixels 110 and the data signal line 200 are connected in a Z-reversal manner. When displaying a blue screen, the sub-pixels 110 in the first, fourth, seventh, and tenth columns that display red do not emit light. In the sub-pixels 110 in any one of the second, fifth, eighth, and eleventh columns that display green, the number of first sub-pixels 111 is 1, and the number of second sub-pixels 112 is 3. In the sub-pixels 110 in any one of the third, sixth, ninth, and twelfth columns that display blue, the number of first sub-pixels 111 is 2, and the number of second sub-pixels 112 is 2.

[0092] Specifically, set the target colors to blue and green. See also... Figure 6The four rows and twelve columns of sub-pixels 110, based on Z-inversion connection and dual gate line drive, are connected to seven data signal lines 200 and eight gate drive lines 300, respectively. Specifically, the sub-pixels 110 in the first row and first column, the first row and second column, the third row and first column, and the third row and second column are connected to Data1. The data voltage written to Data1 is 01111011, and this cycle repeats thereafter, where 0 represents a low level and 1 represents a high level. The sub-pixels 110 in the first row and third column, the first row and fourth column, the second row and first column, the second row and second column, the third row and third column, and the third row and second column are also connected. The sub-pixels 110 in the fourth column, the first column of the fourth row, and the second column of the fourth row are connected to Data2. The data voltage written to Data2 is 01100110, and this cycle continues thereafter. The sub-pixels 110 in the fifth column of the first row, the sixth column of the first row, the third column of the second row, the fourth column of the second row, the fifth column of the third row, the sixth column of the third row, the third column of the fourth row, and the fourth column of the fourth row are connected to Data3. The data voltage written to Data3 is 11101110, and this cycle continues thereafter. The sub-pixels 110 in the seventh column of the first row, the eighth column of the first row, the fifth column of the second row, and the... The sub-pixels 110 in the second row, sixth column, third row, seventh column, third row, eighth column, fourth row, fifth column, and fourth row, sixth column are connected to Data4. The data voltage written to Data4 is 10110111, and this cycle continues thereafter. The sub-pixels 110 in the first row, ninth column, first row, tenth column, second row, seventh column, second row, eighth column, third row, ninth column, third row, tenth column, fourth row, seventh column, and fourth row, eighth column are connected to Data5. The data voltage written to Data5 is 01100110, and this cycle continues thereafter. Sub-pixels 110 in columns 11, 1 row 12, 2 row 9, 2 row 10, 3 row 11, 3 row 12, 4 row 9, and 4 row 10 are connected to Data6. The data voltage written to Data6 is 11101110, and this cycle continues thereafter. Sub-pixels 110 in columns 2 row 11, 2 row 12, 4 row 11, and 4 row 12 are connected to Data7. The data voltage written to Data7 is the same as that of Data1, 01111011, and this cycle continues thereafter.

[0093] The second column of sub-pixels 110 are all used to display green. The preceding sub-pixel of the first row, second column sub-pixel 110 is R sub-pixel 110, therefore it does not emit light when displaying a blue screen. The first row, second column sub-pixel 110 is the first sub-pixel 111, and the data voltage written to this red sub-pixel 110 is low. Therefore, the pre-charge voltage for the first row, second column sub-pixel 110 is small, resulting in a poor pre-charge effect. When the first row, second column sub-pixel 110 emits light, the display brightness is dim, and this sub-pixel 110 is marked as "poor". The preceding sub-pixel of the second row, second column sub-pixel 110 is not R sub-pixel 110, therefore this sub-pixel 110 emits light when displaying a blue screen. The second row, second column sub-pixel 110 is the second sub-pixel 112, and the data voltage written to this non-red sub-pixel 110 is high. Therefore, the pre-charge voltage for the first row, second column sub-pixel 110 is small, resulting in a poor pre-charge effect. The higher pre-charging voltage results in better pre-charging performance. Sub-pixel 110 in the second row and second column displays a brighter brightness when illuminated, and is therefore marked as "good." Similarly, sub-pixels 110 in the third and fourth rows and second columns also display a brighter brightness when illuminated, and are also marked as "good." Therefore, in the second column of sub-pixels 110, there is one "poor" and three "good." In the fifth column of G sub-pixels 110, the sub-pixel 110 in the second row is the first sub-pixel 111, and is therefore marked as "poor." The sub-pixels 110 in the remaining rows are the second sub-pixels 112, and are marked as "good." Thus, in the fifth column of sub-pixels 110, there is also one "poor" and three "good." Similarly, in the eighth and eleventh columns of G sub-pixels 110, there is one "poor" and three "good," respectively. Therefore, the overall display brightness of each column of G sub-pixels 110 is equal.

[0094] The sub-pixels 110 in the third column are all used to display blue. Among them, the sub-pixel preceding the sub-pixel 110 in the first row and third column is the R sub-pixel 110, so it does not emit light when displaying a blue screen. The sub-pixel 110 in the first row and third column is the first sub-pixel 111. The sub-pixel 110 in the first row and third column is marked as "poor". Similarly, the sub-pixel 110 in the third row and third column is also marked as "poor". The sub-pixel 110 preceding the sub-pixel 110 in the second row and third column that is connected to the same data signal line 200 is the sub-pixel 110 that does not display red, so it emits light when displaying a blue screen. The sub-pixel 110 in the second row and third column is the second sub-pixel 112. The sub-pixel 110 in the second row and third column is marked as "good". Similarly, the sub-pixel 110 in the fourth row and third column is also marked as "good". Therefore, in the sub-pixel 110 of the third column, there are two "good" and two "bad" values; similarly, in the sub-pixels 110 of the sixth, ninth and twelfth columns, there are two "good" and two "bad" values ​​respectively. Therefore, there is no brightness difference in the sub-pixels 110 of each column B as a whole, and the display brightness is equal.

[0095] Therefore, for blue-green mixed-color images, since there is no brightness difference between each column of sub-pixels 110 displaying blue, and also no brightness difference between each column of sub-pixels 110 displaying green, there is still no brightness difference when blue and green are mixed, thus avoiding the phenomenon of vertical stripe defects. Similarly, for red-green mixed-color images and red-blue mixed-color images, the sub-pixel 110 arrangement with a period of four rows and twelve columns can improve the phenomenon of vertical stripe defects.

[0096] Furthermore, when displaying a blue screen, the sub-pixel 110 architecture arranged in a four-row, twelve-column cycle can also improve the phenomenon of poor horizontal stripes. Each row of G sub-pixels 110 includes one "bad" and three "good", so the brightness of each row of G sub-pixels 110 is equal when displayed. Since the human eye is more sensitive to green, even if the brightness of each row of B sub-pixels 110 is not equal, the problem of uneven brightness of horizontal stripes can be greatly improved under human visual observation.

[0097] Thus, based on the Z-reversal connection and dual-grid line drive, the four rows and twelve columns of sub-pixels 110, under the above connection method, each column of G sub-pixels 110 has three high-brightness and one low-brightness sub-pixels 110, resulting in equal overall brightness; each column of B sub-pixels 110 has two high-brightness and two low-brightness sub-pixels 110, resulting in equal overall brightness. Therefore, in blue-green mixed color images, the brightness of each column after blue-green mixing is equal, thereby avoiding the phenomenon of poor vertical stripes.

[0098] Please see Figure 7In some embodiments, each row of sub-pixels 110 is connected to two gate driving lines 300, and four rows and twelve columns of sub-pixels 110 form a sub-pixel 110 unit. The pixel circuit includes eight gate driving lines 300 corresponding to the sub-pixel 110 units. The first column of sub-pixels 110 is a first color sub-pixel 110. In the first row of sub-pixels 110, the sub-pixels 110 in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving lines, and the sub-pixels 110 in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving lines. In the second row of sub-pixels 110, the sub-pixels 110 in the second, third, sixth, seventh, ninth, and eleventh columns are connected to the second gate driving lines. Subpixels 110 are connected to the third gate driving line, and subpixels 110 in the first, fourth, fifth, eighth, tenth, and twelfth columns are connected to the fourth gate driving line. In the third row of subpixels 110, subpixels 110 in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and subpixels 110 in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the fourth row of subpixels 110, subpixels 110 in the second, third, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and subpixels 110 in the first, fourth, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0099] Specifically, in this four-row, twelve-column sub-pixel 110 architecture, sub-pixels 110 and data signal lines 200 are connected in a Z-reversal manner, and the target color is green. Sub-pixels 110 with good pre-charging effect are marked as "good," and sub-pixels 110 with poor pre-charging effect are marked as "poor." When displaying a blue screen, the sub-pixels 110 in the first, fourth, seventh, and tenth columns (displaying red) do not emit light. In the second column of sub-pixels 110 (displaying green), the preceding sub-pixel of the first row of sub-pixels 110 is a red sub-pixel, so the data voltage written to the preceding sub-pixel is low, resulting in a small pre-charge voltage and poor pre-charge effect. Therefore, this sub-pixel 110 is marked as "poor". The preceding sub-pixel of the second row of sub-pixels 110 is a blue sub-pixel, so the data voltage written to the preceding sub-pixel is high, resulting in a larger pre-charge voltage and better pre-charge effect. Therefore, this sub-pixel 110 is marked as "good". Similarly, the sub-pixels 110 in the third and fourth rows are also marked as "good". Therefore, there is one "poor" and three "good" in the second column, meaning the number of the first sub-pixel 111 is 1 and the number of the second sub-pixel 112 is 3. Similarly, in the fifth, eighth, and eleventh columns of green sub-pixels 110, there is one "bad" and three "good" sub-pixels respectively. Therefore, there is no pre-charging difference in the green sub-pixels 110 in each column, resulting in equal overall display brightness.

[0100] Furthermore, among the sub-pixels 110 displaying blue, the sub-pixels 110 in the third, ninth, and twelfth columns each contain two "poor" and two "good" values, while the sub-pixels 110 in the sixth column contain three "poor" and one "good" value. Since the human eye is more sensitive to green, when displaying a blue image, the charging status of the sub-pixels 110 displaying green is generally consistent, and only one column of the sub-pixels 110 displaying blue has a different charging status than the other three columns. This ensures that the brightness of the blue-green color mixing in each column is basically consistent, greatly improving the phenomenon of poor vertical stripe quality.

[0101] Thus, based on the Z-reversal connection and dual-grid line drive, the four rows and twelve columns of sub-pixels 110, under the above connection method, have a target color of green, and each column of green sub-pixels 110 has three high-brightness and one low-brightness sub-pixels 110, and the overall brightness of each column is equal. Since the human eye is more sensitive to green, in the blue-green mixed color image, the brightness of each column after blue-green mixing is basically equal in the human eye, thereby avoiding the phenomenon of poor vertical stripes.

[0102] Please see Figure 8 In some embodiments, each row of sub-pixels 110 is connected to two gate driving lines 300, and four rows and twelve columns of sub-pixels 110 form a sub-pixel 110 unit. The pixel circuit includes eight gate driving lines 300 corresponding to the sub-pixel 110 units. The first column of sub-pixels 110 is a first color sub-pixel 110. In the first row of sub-pixels 110, the sub-pixels 110 in the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving lines, and the sub-pixels 110 in the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving lines. In the second row of sub-pixels 110, the sub-pixels 110 in the second, third, sixth, seventh, ninth, and eleventh columns are connected to the second gate driving lines. Subpixels 110 are connected to the third gate driving line, and subpixels 110 in the first, fourth, fifth, eighth, tenth, and twelfth columns are connected to the fourth gate driving line. In the third row of subpixels 110, subpixels 110 in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and subpixels 110 in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the fourth row of subpixels 110, subpixels 110 in the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and subpixels 110 in the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0103] Specifically, in this four-row, twelve-column sub-pixel 110 architecture, the sub-pixels 110 and the data signal lines 200 are connected in a Z-reversal manner, with the target color being green. When displaying a blue screen, the second, fifth, eighth, and eleventh columns of sub-pixels 110 displaying green each contain one "bad" and three "good" sub-pixels. Therefore, there is no pre-charge difference among the green sub-pixels 110 in each column, resulting in uniform overall display brightness.

[0104] Furthermore, among the blue sub-pixels 110, the sixth, ninth, and twelfth columns each contain two "poor" and two "good" sub-pixels, while the third column contains three "poor" and one "good" sub-pixel. Since the human eye is more sensitive to green, when displaying a blue image, the charging status of the green sub-pixels 110 is generally consistent, and only one column of the blue sub-pixels 110 differs from the other three columns in charging status. This ensures that the blue-green mixed brightness of each column is basically consistent, thus greatly improving the phenomenon of poor vertical stripe quality.

[0105] Thus, based on the Z-reversal connection and dual-grid line drive, the four rows and twelve columns of sub-pixels 110, under the above connection method, have a target color of green, and each column of green sub-pixels 110 has three high-brightness and one low-brightness sub-pixels 110, and the overall brightness of each column is equal. Since the human eye is more sensitive to green, in the blue-green mixed color image, the brightness of each column after blue-green mixing is basically equal in the human eye, thereby avoiding the phenomenon of poor vertical stripes.

[0106] Please see Figure 9In some embodiments, each row of sub-pixels 110 is connected to two gate driving lines 300, and four rows and twelve columns of sub-pixels 110 form a sub-pixel 110 unit. The pixel circuit includes eight gate driving lines 300 corresponding to the sub-pixel 110 units. The first column of sub-pixels 110 is a first color sub-pixel 110. In the first row of sub-pixels 110, the sub-pixels 110 in the second, fourth, fifth, seventh, tenth, and twelfth columns are connected to the first gate driving lines, and the sub-pixels 110 in the first, third, sixth, eighth, ninth, and eleventh columns are connected to the second gate driving lines. In the second row of sub-pixels 110, the sub-pixels 110 in the first, third, sixth, eighth, ninth, and twelfth columns are connected to the second gate driving lines. Subpixels 110 in the third row are connected to the third gate driving line, and subpixels 110 in the second, fourth, fifth, seventh, tenth, and eleventh columns are connected to the fourth gate driving line. In the third row of subpixels 110, subpixels 110 in the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and subpixels 110 in the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the fourth row of subpixels 110, subpixels 110 in the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and subpixels 110 in the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

[0107] Specifically, in this four-row, twelve-column sub-pixel 110 architecture, the sub-pixels 110 and the data signal lines 200 are connected in a Z-reversal manner, with the target color being green. When displaying a blue screen, the second, fifth, eighth, and eleventh columns of sub-pixels 110 displaying green each contain one "bad" and three "good" sub-pixels. Therefore, there is no pre-charge difference among the green sub-pixels 110 in each column, resulting in uniform overall display brightness.

[0108] Furthermore, among the sub-pixels 110 displaying blue, the third column of sub-pixels 110 contains three "poor" and one "good," while the ninth and twelfth columns of sub-pixels 110 each contain two "poor" and two "good," and the third column of sub-pixels 110 contains three "poor" and one "good." Since the human eye is more sensitive to green, when displaying a blue image, the charging status of the green sub-pixels 110 is generally consistent, making the brightness of the blue-green mixture in each column basically consistent in the human eye, thus greatly improving the phenomenon of poor vertical stripe quality.

[0109] Thus, based on the Z-reversal connection and dual-grid line drive, the four rows and twelve columns of sub-pixels 110, under the above connection method, have a target color of green, and each column of green sub-pixels 110 has three high-brightness and one low-brightness sub-pixels 110, and the overall brightness of each column is equal. Since the human eye is more sensitive to green, in the blue-green mixed color image, the brightness of each column after blue-green mixing is basically equal in the human eye, thereby avoiding the phenomenon of poor vertical stripes.

[0110] In some implementations, the pixel 100 circuit can be obtained by setting a process flow.

[0111] Specifically, please refer to Figure 10 The manufacturing process for the 100-pixel design is 1. st ITO→Gate→SSM→PVX→2 nd ITO, of which 1 st ITO is a COM electrode, 2 nd ITO is a pixel 100 electrode, 1 st There is no insulating layer between the ITO and the Gate. The steps for setting up the process flow are as follows:

[0112] 1. Fabricate the first ITO layer: The material is ITO with a thickness of 700A. The desired pattern (mainly Vcom electrode) is formed by the process of coating, exposure, development and wet etching. It can be a whole piece within 100 pixels.

[0113] 2. Fabrication of the Gate layer: The material is Mo / Al / Mo, and the thickness is 150 / 3000 / 800. The desired pattern (main gate lines) is formed by the process of coating, exposure, development and wet etching. There are also metal Vcom lines formed under the gate lines. After the fabrication is completed, a whole layer of GI insulating layer (thickness is 4000A, material is SiNx) is laid on it.

[0114] 3. Fabrication of the SSM layer: To form the TFT and SD metal, first deposit an active layer (semiconductor layer) with a thickness of 1700 Å, then deposit an SD metal layer (forming the source and drain of the TFT and the matrix bridging formed by the SD metal layer) with a thickness of 150 / 3000 / 800 Å. Then, using the SSM process (4Mask process), the source and drain of the TFT, the channel, and the Tx lines are formed through one dry etching and one wet etching. The first wet etching removes the SD metal, forming the source and drain and the Tx lines. Then, the second dry etching exposes the channel (the Tx lines and data lines are fabricated on the same layer and can be understood as parallel). The 4Mask process fabricates the active and SD layers simultaneously. Compared to the traditional 5Mask process, 4Mask deposits the active and SD layers together, coats the PR resist, and performs only one masking. SSM is used to form partial exposure in the channel region; the source lines are etched first, and the channel is exposed after ashing.

[0115] 4. Fabrication of PVX Mask: A full layer of PVX with a thickness of 4000 Å and SiNx material is deposited. The unnecessary insulating layer is dry-etched away through exposure, development, and etching processes to expose the vias, mainly in the areas with vias, such as the connecting vias of the Pixel 100 electrode and the semi-vias formed in this patent.

[0116] 5. Fabrication of the 2nd ITO Mask: The material is ITO with a thickness of 700A. The desired pattern (100 main pixels electrode) and the ITO connection parts used for via connection are formed by coating, exposure, development and wet etching.

[0117] Thus, a 100-pixel circuit can be obtained by setting the process flow.

[0118] The present invention provides a display panel, which includes a driving unit and an array substrate 1000 according to any of the above embodiments. The driving unit is used to drive the pixels 100 of the array substrate 1000.

[0119] The driving unit includes a gate drive (GOA) circuit, and a gate drive line 300 connects the gate drive circuit and the sub-pixel 110. (See also...) Figure 11The GOA circuit can be a 19T1C structure, with one GOA circuit corresponding to one row of sub-pixels 110. When STV1 is high, the GOA circuit starts working. The input turns on M1, allowing VGH to charge the PU point. At this time, the clock signal CLK1 is low. When CLK1 goes high, the PU potential becomes higher due to the effect of capacitor C, thus turning on M3 and M13. M3 and M13 output CLK high, and GOUT and GOUTC output high. GOUTC serves as the input signal to the next row of the GOA circuit, causing the GOA circuit to output sequentially to achieve the shift register function. GOUT is the gate drive signal transmitted by the gate drive line 300, meaning that the gate drive line 300 outputs high at this time. VDD1 and VDD2 are interleaved (VDD1 is high when VDD2 is low, and VDD2 is high when VDD1 is low), which controls the PD point. When the PU point is low, the PD point can reduce noise, so that the PU point goes low without affecting the output, thus avoiding damage to the TFT (thin-film transistor 400) due to prolonged high level.

[0120] In one embodiment, the display size is FHD (1920×1080). Due to the Dual Gate design, the number of gate signal lines is 2160. The GOA is set to 6CLK, meaning that Gate1 to Gate2 160 output sequentially in 6CLK cycles. A 2H precharge time is added, resulting in 3H for both high and low levels. The data signal is written to sub-pixel 110 in 1H time. The timing diagram is as follows. Figure 12 As shown.

[0121] Thus, the display panel of the present invention controls the number of first sub-pixels 111 and the number of second sub-pixels 112 of each column of sub-pixels 110 displaying the same target color to be the same, so that the brightness of each column of sub-pixels 110 of the same color is generally equal, and there will be no brightness difference during the display process, thereby avoiding the phenomenon of vertical stripe defects.

[0122] The present invention provides a display device, which includes a housing and a display panel as described in the above embodiments, the display panel being disposed within the housing.

[0123] Thus, in the display device of this embodiment, the sub-pixels 110 can be pre-charged by the data voltage written to the previous sub-pixel 110. Since the previous sub-pixel 110 connected to the same signal line as the first sub-pixel 111 does not emit light, and the data voltage written to the previous sub-pixel 110 is at a low level, the pre-charging of the first sub-pixel 111 is less, and the brightness of the first sub-pixel 111 is dimmer. Since the previous sub-pixel 110 connected to the same signal line as the second sub-pixel 112 emits light, and the data voltage written to the previous sub-pixel 110 is at a high level, the pre-charging of the second sub-pixel 112 is more, and the brightness of the second sub-pixel 112 is brighter. By controlling the number of first sub-pixels 111 in each column of sub-pixels 110 displaying the same target color to be the same, and the number of second sub-pixels 112 to be the same, the brightness of each column of sub-pixels 110 of the same color is made to be equal overall, and no brightness difference will occur during the display process, thereby avoiding the phenomenon of vertical stripe defects.

[0124] In the description of this specification, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with an embodiment or example that are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0125] Furthermore, the term "connection" should be interpreted broadly. For example, it can include fixed connections, detachable connections, or integral connections; it can include direct connections or indirect connections through an intermediate medium; and it can also include internal communication between two elements. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0126] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0127] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0128] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. An array substrate, characterized in that, The array substrate includes multiple pixels and multiple data signal lines. Each pixel includes multiple sub-pixels, which are arranged in an array. The data signal lines are used to provide data voltage to the sub-pixels, and the data voltage is used to control the sub-pixels to emit light in order to display the color corresponding to the sub-pixels. At least two columns of the sub-pixels display different colors. In the case of displaying a dual-color mixed image, in each column of sub-pixels displaying the same target color, the number of first sub-pixels is equal and the number of second sub-pixels is equal. The sub-pixel whose preceding sub-pixel connected to the same data signal line does not emit light is the first sub-pixel, and the sub-pixel whose preceding sub-pixel connected to the same data signal line emits light is the second sub-pixel. Three sub-pixels constitute one pixel. The three sub-pixels include a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. When displaying a dual-color mixed image, the first color sub-pixel does not emit light, while the second color sub-pixel and the third color sub-pixel emit light. The preceding sub-pixel connected to the first sub-pixel on the same data signal line is the first color sub-pixel, and the preceding sub-pixel connected to the second sub-pixel on the same data signal line is the second color sub-pixel or the third color sub-pixel.

2. The array substrate according to claim 1, characterized in that, The data voltage of the preceding sub-pixel connected to the same data signal line as the sub-pixel is used to precharge the sub-pixel, and the data voltage for precharging the first sub-pixel is greater than the data voltage for precharging the second sub-pixel.

3. The array substrate according to claim 1, characterized in that, Each of the data signal lines connects to at least two columns of the sub-pixels, and the sub-pixels and the data signal lines are connected in a Z-reversed manner.

4. The array substrate according to claim 1, characterized in that, The array substrate includes gate driving lines, which are used to drive the sub-pixels to work. The sub-pixels are connected to the gate driving lines through transistors, and sub-pixels in the same row are driven by two gate driving lines.

5. The array substrate according to claim 4, characterized in that, The gate of the transistor is connected to the gate drive line, and the transistor is also used to connect the sub-pixel and the data signal line.

6. The array substrate according to claim 4, characterized in that, When the gate drive line outputs a high level, the transistor is turned on, and the data voltage of the data signal line is written to the sub-pixel to control the sub-pixel to emit light.

7. The array substrate according to claim 4, characterized in that, A sub-pixel connected to the same data signal line in two adjacent rows is a periodic unit. Within a periodic unit, two of the sub-pixels are connected to the first side of the data signal line, and two of the sub-pixels are connected to the second side of the data signal line.

8. The array substrate according to claim 1, characterized in that, When the data voltage written to the sub-pixel is low, the sub-pixel does not emit light; when the data voltage written to the sub-pixel is high, the sub-pixel emits light.

9. The array substrate according to claim 1, characterized in that, Three sub-pixels constitute one pixel, and the sub-pixels within a pixel are arranged in the order of first color sub-pixel, second color sub-pixel, and third color sub-pixel. The pixels are arranged in an array such that the sub-pixels are arranged in an array.

10. The array substrate according to claim 9, characterized in that, Each row of sub-pixels is connected to two gate driving lines, and the four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to the sub-pixel unit, wherein the first column of sub-pixels is the first color sub-pixel. In the sub-pixels of the first row, the sub-pixels of the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels of the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line; In the sub-pixels of the second row, the sub-pixels of the second, third, fifth, eighth, ninth, and eleventh columns are connected to the third gate driving line, and the sub-pixels of the first, fourth, sixth, seventh, tenth, and twelfth columns are connected to the fourth gate driving line. In the sub-pixels of the third row, the sub-pixels of the second, fourth, sixth, seventh, tenth, and twelfth columns are connected to the fifth gate driving line, and the sub-pixels of the first, third, fifth, eighth, ninth, and eleventh columns are connected to the sixth gate driving line. In the sub-pixels of the fourth row, the sub-pixels of the second, third, fifth, eighth, ninth, and eleventh columns are connected to the seventh gate driving line, and the sub-pixels of the first, fourth, sixth, seventh, tenth, and twelfth columns are connected to the eighth gate driving line.

11. The array substrate according to claim 10, characterized in that, The first color sub-pixel is used to display red, the second color sub-pixel is used to display green, and the third color sub-pixel is used to display blue. The sub-pixels and the data signal line are connected in a Z-reversed manner. When displaying a blue screen, the sub-pixels in the first, fourth, seventh, and tenth columns that display red do not emit light. In the sub-pixels in any one of the second, fifth, eighth, and eleventh columns that display green, the number of the first sub-pixels is 1, and the number of the second sub-pixels is 3. In the sub-pixels in any one of the third, sixth, ninth, and twelfth columns that display blue, the number of the first sub-pixels is 2, and the number of the second sub-pixels is 2.

12. The array substrate according to claim 9, characterized in that, Each row of sub-pixels is connected to two gate driving lines, and the four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to the sub-pixel unit, wherein the first column of sub-pixels is the first color sub-pixel. In the sub-pixels of the first row, the sub-pixels of the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels of the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line; In the sub-pixels of the second row, the sub-pixels of the second, third, sixth, seventh, ninth, and eleventh columns are connected to the third gate driving line, and the sub-pixels of the first, fourth, fifth, eighth, tenth, and twelfth columns are connected to the fourth gate driving line. In the sub-pixels of the third row, the sub-pixels of the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels of the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the sub-pixels of the fourth row, the sub-pixels of the second, third, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels of the first, fourth, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

13. The array substrate according to claim 9, characterized in that, Each row of sub-pixels is connected to two gate driving lines, and the four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to the sub-pixel unit, wherein the first column of sub-pixels is the first color sub-pixel. In the sub-pixels of the first row, the sub-pixels of the first, fourth, sixth, eighth, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels of the second, third, fifth, seventh, ninth, and eleventh columns are connected to the second gate driving line; In the sub-pixels of the second row, the sub-pixels of the second, third, sixth, seventh, ninth, and eleventh columns are connected to the third gate driving line, and the sub-pixels of the first, fourth, fifth, eighth, tenth, and twelfth columns are connected to the fourth gate driving line. In the sub-pixels of the third row, the sub-pixels of the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels of the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the sub-pixels of the fourth row, the sub-pixels of the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels of the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

14. The array substrate according to claim 9, characterized in that, Each row of sub-pixels is connected to two gate driving lines, and the four rows and twelve columns of sub-pixels form a sub-pixel unit. The pixel circuit includes eight gate driving lines corresponding to the sub-pixel unit, wherein the first column of sub-pixels is the first color sub-pixel. In the sub-pixels of the first row, the sub-pixels of the second, fourth, fifth, seventh, tenth, and twelfth columns are connected to the first gate driving line, and the sub-pixels of the first, third, sixth, eighth, ninth, and eleventh columns are connected to the second gate driving line; In the sub-pixels of the second row, the sub-pixels of the first, third, sixth, eighth, ninth, and twelfth columns are connected to the third gate driving line, and the sub-pixels of the second, fourth, fifth, seventh, tenth, and eleventh columns are connected to the fourth gate driving line. In the sub-pixels of the third row, the sub-pixels of the second, fourth, sixth, eighth, tenth, and eleventh columns are connected to the fifth gate driving line, and the sub-pixels of the first, third, fifth, seventh, ninth, and twelfth columns are connected to the sixth gate driving line. In the sub-pixels of the fourth row, the sub-pixels of the second, fourth, fifth, eighth, ninth, and twelfth columns are connected to the seventh gate driving line, and the sub-pixels of the first, third, sixth, seventh, tenth, and eleventh columns are connected to the eighth gate driving line.

15. A display panel, characterized in that, The display panel includes a driving unit and an array substrate as described in any one of claims 1-14, wherein the driving unit is used to drive the pixels of the array substrate.

16. A display device, characterized in that, The display device includes a housing and a display panel as described in claim 15, wherein the display panel is disposed within the housing.

Images