A broadband rectifier circuit and system employing a terminal matching network

Abstract

This invention relates to a broadband rectifier circuit and system employing a termination matching network, comprising a DC filter network and at least one termination matching network structure. The termination matching network structure includes a first microstrip line, a rectifier diode, a second microstrip line, and a third microstrip line. One end of the first microstrip line is connected to ground, and the other end is connected to one end of the rectifier diode. One end of the second microstrip line is connected to the other end of the rectifier diode, and the other end of the second microstrip line is open-circuited. One end of the third microstrip line is connected between the second microstrip line and the rectifier diode, and the other end is connected to the input terminal of the broadband rectifier circuit. This broadband rectifier circuit overcomes the shortcomings of current broadband rectification methods, such as insufficient bandwidth and non-compact circuit structure leading to large size and high cost.

Description

Technical Field

[0001] This invention belongs to the field of electronic technology, specifically relating to a broadband rectifier circuit and system employing a terminal matching network. Background Technology

[0002] In recent years, with the increasing emphasis on new energy sources and the rapid development of wireless technology, microwave energy transmission has attracted widespread attention due to its enormous application prospects. The methods of powering long-distance electronic devices through directional microwave energy transmission are becoming increasingly common, and rectifier modules, as crucial components for converting microwave energy into usable DC energy, are being extensively studied.

[0003] Conventional rectification is only efficient at a single frequency. However, microwave energy often operates across multiple frequency bands, making it difficult for conventional rectifiers to cover all of them. Some research has employed dual-frequency or multi-frequency rectification to broaden the frequency range, but these rectifiers can only achieve efficient rectification in narrow frequency bands, and their broadband effect is not ideal. Furthermore, the superposition of multi-frequency rectification and the complex multi-frequency matching techniques lead to a significant increase in circuit area, raising costs. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a broadband rectifier circuit and system employing a terminal matching network. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] This invention provides a broadband rectifier circuit employing a termination matching network, comprising: a DC filter network and at least one termination matching network structure, wherein,

[0006] The input terminal of the DC filter network is connected to the input terminal of the broadband rectifier circuit, and the output terminal is connected to the output terminal of the broadband rectifier circuit. When there is only one terminal matching network structure, the terminal matching network structure is connected to the input terminal of the DC filter network. When there are two or more terminal matching network structures, multiple terminal matching network structures are connected in parallel to the input terminal of the DC filter network, and the multiple terminal matching network structures have different frequency bands.

[0007] The terminal matching network structure includes a first microstrip line, a rectifier diode, a second microstrip line, and a third microstrip line. One end of the first microstrip line is connected to a ground terminal, and the other end is connected to one end of the rectifier diode. One end of the second microstrip line is connected to the other end of the rectifier diode, and the other end of the second microstrip line is open. One end of the third microstrip line is connected between the second microstrip line and the rectifier diode, and the other end is connected to the input terminal of the broadband rectifier circuit.

[0008] In one embodiment of the present invention, the characteristic impedance and electrical length of the first microstrip line are calculated according to the following formula:

[0009] Z in1 (f)=Z d +Z1tanθ1(f)

[0010] Z in1 (f H ) = [Z in1 (f L )]*

[0011] Among them, Z in1 Z1 is the impedance viewed from the rectifier diode terminal face towards the first microstrip line, Z1 is the characteristic impedance of the first microstrip line, θ1 is the electrical length of the first microstrip line, and Z... d Here, f is the characteristic impedance of the rectifier diode, and f is the frequency. H f is the highest frequency point in the design frequency band. L This is the lowest frequency point in the design frequency band.

[0012] In one embodiment of the present invention, the characteristic impedance and electrical length of the second microstrip line are calculated according to the following formula:

[0013] Z in2 (f)=(Z2Z in1 (f)) / (Z2+jZ in1 (f)tanθ2(f))

[0014] Z in2 (f H ) = Z in2 (f L )

[0015] Among them, Z in2 Z2 is the impedance from the point where the rectifier diode and the second microstrip line meet, looking toward the second microstrip line; Z2 is the characteristic impedance of the second microstrip line; and θ2 is the electrical length of the second microstrip line.

[0016] In one embodiment of the present invention, the characteristic impedance and electrical length of the third microstrip line are calculated according to the following formula:

[0017] Z in3 (f)=Z3(Z in2 (f)+jZ3tanθ3(f)) / (Z3+jZ in2 (f)tanθ3(f))

[0018] Z in3 (f H ) = 40~60Ω

[0019] Among them, Z in3Z3 is the impedance of the third microstrip line as seen from the input of the broadband rectifier circuit, Z3 is the characteristic impedance of the third microstrip line, and θ3 is the electrical length of the third microstrip line.

[0020] In one embodiment of the present invention, the DC filter network includes an inductor and a capacitor, wherein,

[0021] One end of the inductor is connected to the input terminal of the broadband rectifier circuit, and the other end is connected to one end of the capacitor and the output terminal of the broadband rectifier circuit; the other end of the capacitor is connected to the ground terminal.

[0022] In one embodiment of the present invention, a dielectric substrate and a metal ground plane are further included, wherein,

[0023] The DC filter network and at least one terminal matching network structure form a circuit topology layer, the circuit topology layer is disposed on the upper surface of the dielectric substrate, and the metal ground plane is disposed on the lower surface of the dielectric substrate.

[0024] Another embodiment of the present invention provides a broadband rectifier system employing a terminal matching network, comprising a broadband rectifier circuit, a load resistor, and a DC blocking capacitor, wherein,

[0025] The DC blocking capacitor is connected to the input terminal of the broadband rectifier circuit;

[0026] The broadband rectifier circuit adopts the broadband rectifier circuit with terminal matching network described in the above embodiment;

[0027] One end of the load resistor is connected to the output terminal of the broadband rectifier circuit, and the other end is connected to the ground terminal.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0029] 1. This invention employs a broadband rectifier circuit with a terminal matching network. At the rectifier diode terminal, a first microstrip line, a second microstrip line, and a third microstrip line are jointly designed. The first microstrip line forms a short-circuit stub microstrip line, the second microstrip line forms an open-circuit stub microstrip line, and the third microstrip line forms an impedance transformation microstrip line. Each microstrip line has two variables: characteristic impedance and electrical length. Therefore, the terminal matching network has six variables, providing strong matching flexibility and a high degree of freedom. It can easily achieve impedance matching within a broadband range to achieve efficient broadband rectification. Simultaneously, all three microstrip lines are connected to the rectifier diode. Since the matching network is concentrated at the diode terminal, the circuit structure is more compact, reducing the design layout area and lowering costs. Therefore, this broadband rectifier circuit solves the shortcomings of current broadband rectification methods, such as insufficient bandwidth and non-compact circuit structure leading to large size and high cost.

[0030] 2. This invention can further expand the bandwidth by parallel superposition of multiple terminal matching networks of different frequency bands, thereby achieving a wider ultra-wideband high-efficiency rectification design. Attached Figure Description

[0031] Figure 1 A schematic diagram of a broadband rectifier circuit topology using a terminal matching network is provided for an embodiment of the present invention;

[0032] Figure 2 A graph showing the variation of input terminal S11 with input frequency, provided for an embodiment of the present invention;

[0033] Figure 3 A graph showing the efficiency as a function of input frequency, provided for an embodiment of the present invention;

[0034] Figure 4 A schematic diagram of a broadband rectifier circuit topology using a dual-terminal matching network is provided for an embodiment of the present invention.

[0035] Figure 5 A graph showing the variation of another input terminal S11 with input frequency, provided for an embodiment of the present invention;

[0036] Figure 6 Another efficiency curve as a function of input frequency is provided for an embodiment of the present invention. Detailed Implementation

[0037] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0038] Example 1

[0039] This embodiment provides a broadband rectifier circuit using a terminal matching network. The broadband rectifier circuit is formed by a three-layer structure, consisting of a circuit topology layer, a dielectric substrate, and a metal ground plane from top to bottom. The circuit topology layer is disposed on the upper surface of the dielectric substrate, and the metal ground plane is disposed on the lower surface of the dielectric substrate.

[0040] Please see Figure 1 , Figure 1 This invention provides a schematic diagram of a broadband rectifier circuit topology employing a termination matching network. The broadband rectifier circuit includes a DC filter network 1 and a termination matching network structure 2, which form a circuit topology layer. The input terminal of the DC filter network 1 is connected to the input terminal of the broadband rectifier circuit, and its output terminal is connected to the output terminal of the broadband rectifier circuit. A termination matching network structure 2 is connected to the input terminal of the DC filter network 1.

[0041] The terminal matching network structure 2 includes a first microstrip line 21, a rectifier diode 22, a second microstrip line 23, and a third microstrip line 24. One end of the first microstrip line 21 is connected to a ground terminal, and the other end is connected to one end of the rectifier diode 22. One end of the second microstrip line 23 is connected to the other end of the rectifier diode 22, and the other end of the second microstrip line 23 is open. One end of the third microstrip line 24 is connected between the second microstrip line 23 and the rectifier diode 22, and the other end is connected to the input terminal of the broadband rectifier circuit.

[0042] It can be understood that the first microstrip line 21 forms a short-circuit stub microstrip line, the second microstrip line 23 forms an open-circuit stub microstrip line, and the third microstrip line 24 forms an impedance transformation microstrip line. The rectifier diode 22 can have its positive terminal connected to the first microstrip line 21 and its negative terminal connected to the second microstrip line 23; or its positive terminal connected to the second microstrip line 23 and its negative terminal connected to the first microstrip line 21.

[0043] Based on transmission line theory, this embodiment calculates the impedance Z from the end face of the rectifier diode 22 towards the first microstrip line 21 using the following formula. in1 :

[0044] Z in1 (f)=Z d +Z1tanθ1(f) (1)

[0045] Where f is the frequency, Z1 is the characteristic impedance of the first microstrip line, θ1 is the electrical length of the first microstrip line, and Z... d The characteristic impedance of the rectifier diode can be calculated from the SPICE parameters of the rectifier diode.

[0046] Meanwhile, Z in1 At the highest frequency point of the design frequency band f H and the lowest point f L satisfy:

[0047] Z in1 (f H ) = [Z in1 (f L )]* (2)

[0048] Among them, f H f is the highest frequency point in the design frequency band. L This is the lowest frequency point in the design frequency band.

[0049] Since the conjugate of equation (2) has the characteristic of "equal real parts and opposite imaginary parts", the characteristic impedance Z1 and electrical length θ1 of the first microstrip line 21 can be determined by combining equation (1) and equation (2).

[0050] Similarly, according to transmission line theory, the impedance Z from the point where the rectifier diode and the second microstrip line meet, looking towards the second microstrip line, can be calculated using the following formula.in2 :

[0051] Z in2 (f)=(Z2Z in1 (f)) / (Z2+jZ in1 (f)tanθ2(f)) (3)

[0052] Z2 is the characteristic impedance of the second microstrip line, and θ2 is the electrical length of the second microstrip line.

[0053] Meanwhile, Z in2 At the highest frequency point of the design frequency band f H and the lowest point f L satisfy:

[0054] Z in2 (f H ) = Z in2 (f L (4)

[0055] Since Equation (4) has the characteristic of "equal real parts and equal imaginary parts", the characteristic impedance Z2 and electrical length θ2 of the second microstrip line 23 can be determined by combining Equation (3) and Equation (4).

[0056] Similarly, according to transmission line theory, the impedance Z from the input terminal of the broadband rectifier circuit to the third microstrip line can be calculated using the following formula. in3 :

[0057] Z in3 (f)=Z3(Z in2 (f)+ jZ3tanθ3(f)) / ( Z3+ jZ in2 (f)tanθ3(f)) (5)

[0058] Where Z3 is the characteristic impedance of the third microstrip line, and θ3 is the electrical length of the third microstrip line.

[0059] Meanwhile, Z in3 The following conditions must be met:

[0060] Z in3 (f H )=40~60Ω (6)

[0061] Among them, Z in3 (f H The value is taken as the resistance of the signal source. Generally, Z is... in3 (f H =50Ω.

[0062] According to equation (6), "the real part is a fixed value and the imaginary part is 0". Therefore, by combining equations (5) and (6), the characteristic impedance Z3 and electrical length θ3 of the third microstrip line 24 can be determined.

[0063] Through the above calculations, the accurate parameters of the first microstrip line 21, the second microstrip line 23, and the third microstrip line 24 that meet the good matching requirements within the design frequency band are obtained.

[0064] In one specific embodiment, the DC filter network 1 includes an inductor 11 and a capacitor 12, wherein one end of the inductor 11 is connected to the input terminal of the broadband rectifier circuit, and the other end is connected to one end of the capacitor 12 and the output terminal of the broadband rectifier circuit; the other end of the capacitor 12 is connected to the ground terminal.

[0065] The DC filter network (1) can also use other existing DC filter circuits, which will not be described in detail in this embodiment.

[0066] Furthermore, in actual testing or simulation, in addition to the broadband rectifier circuit using the aforementioned terminal matching network, load resistor 3 and DC blocking capacitor 4 also need to be connected. For example... Figure 1 As shown, the DC blocking capacitor 4 is connected to the input terminal of the broadband rectifier circuit, and one end of the load resistor 3 is connected to the output terminal of the broadband rectifier circuit, while the other end is connected to the ground terminal. The load resistor 3, the DC blocking capacitor 4, and the broadband rectifier circuit together form a broadband rectifier system with a terminating matching network.

[0067] This embodiment employs a broadband rectifier circuit with a termination matching network. A first, second, and third microstrip line are jointly designed at the rectifier diode termination. The first microstrip line forms a short-circuit stub microstrip line, the second microstrip line forms an open-circuit stub microstrip line, and the third microstrip line forms an impedance transformation microstrip line. Each microstrip line has two variables: characteristic impedance and electrical length. Therefore, the termination matching network has six variables, offering strong matching flexibility and a high degree of freedom. It can easily achieve impedance matching within a broadband range to achieve efficient broadband rectification. Simultaneously, all three microstrip lines are connected to the rectifier diode. Since the matching network is concentrated at the diode termination, the circuit structure is more compact, reducing the design layout area and lowering costs. Therefore, this broadband rectifier circuit solves the shortcomings of current broadband rectification methods, such as insufficient bandwidth and non-compact circuit structure leading to large size and high cost.

[0068] The following description, combined with simulation experiments, further illustrates the effects of this embodiment:

[0069] 1. Simulation conditions

[0070] The simulation was performed using ADS software, and a signal source with a transmit power of 30dBm and an internal resistance of 50Ω was selected to replace the microwave AC signal received by the antenna as the input of the entire rectifier circuit.

[0071] 2. Simulation Content

[0072] A simulation model of the rectifier circuit for microwave energy harvesting was established, and the broadband efficiency of this embodiment as a function of the input frequency was simulated. The dielectric substrate used was Rogers 4350B material, with a thickness of 0.508 mm, a dielectric constant of 3.48, a loss tangent of 0.0009, and a thickness of 0.018 mm for both the top circuit topology layer and the bottom metal ground plane.

[0073] In a rectifier circuit, the highest frequency point f H and the lowest point f L The first microstrip line 21 has a characteristic impedance of 20.1Ω and an electrical length of 40 degrees at 2GHz, using 2.8GHz and 1.6GHz respectively. The rectifier diode 22 is a self-developed GaN SBD, and its main SPICE parameters are shown in Table 1. The second microstrip line 23 has a characteristic impedance of 47.2Ω and an electrical length of 11.4 degrees at 2GHz. The third microstrip line 24 has a characteristic impedance of 55.9Ω and an electrical length of 9.3 degrees at 2GHz. The inductor 11 has a value of 10nH, the capacitor 12 has a value of 7.5pF, and the load resistor 3 has a value of 100Ω.

[0074] Table 1. SPICE parameters of GaN SBD

[0075] parameter numerical values unit Saturation current 5.6E-9 A On resistance 3 Ω Ideal factor 1.05 / Breakdown voltage 115 V Zero-bias junction capacitance 0.28 pF

[0076] To verify the simulation effect of the present invention, the change of input S11 with the magnitude of input frequency in this embodiment was simulated, and the simulation results are as follows: Figure 2 As shown, Figure 2 This is a graph illustrating the variation of input terminal S11 with input frequency, provided as an embodiment of the present invention. The horizontal axis represents the input frequency (GHz), and the vertical axis represents the input S11 parameter (dB). From... Figure 2 It can be seen that when the input frequency is between 1.6 and 2.8 GHz, the input terminal S11 is below -10 dB.

[0077] The efficiency as a function of input frequency was simulated, and the simulation results are as follows: Figure 3 As shown, Figure 3 This is a graph illustrating the efficiency versus input frequency, provided as an embodiment of the present invention. The horizontal axis represents the input frequency (GHz), and the vertical axis represents the efficiency. From... Figure 3 It can be seen that when the load resistance is 100Ω and the input frequency is 2.55GHz, the efficiency is up to 85%, and the efficiency can be higher than 70% when the input frequency is between 1.6 and 2.8GHz.

[0078] from Figure 2 and Figure 3 The simulation results show that the rectifier circuit using the terminal matching network has a good broadband matching effect and can achieve high-efficiency broadband rectification.

[0079] Example 2

[0080] Based on Embodiment 1, this embodiment provides another broadband rectifier circuit employing a termination matching network. This broadband rectifier circuit includes: a DC filter network 1 and multiple termination matching network structures 2, with the number of termination matching network structures 2 being greater than or equal to two. The input terminal of the DC filter network 1 is connected to the input terminal of the broadband rectifier circuit, and its output terminal is connected to the output terminal of the broadband rectifier circuit. The multiple termination matching network structures 2 are connected in parallel at the input terminal of the DC filter network 1, and these structures have different frequency bands and identical circuit structures. The DC filter network 1 and the multiple termination matching network structures 2 together form a top-level topology layer, which is disposed on the upper surface of a dielectric substrate. A metal ground plane is disposed on the lower surface of the dielectric substrate.

[0081] Please see Figure 4 , Figure 4 This invention provides a schematic diagram of a broadband rectifier circuit topology employing a dual-terminal matching network. The broadband rectifier circuit includes a DC filter network 1 and two terminal matching network structures 2. The two terminal matching network structures 2 are connected in parallel at the input of the DC filter network 1, and are respectively a low-frequency terminal matching network and a high-frequency terminal matching network.

[0082] For the circuit structure of the terminal matching network structure 2 and the calculation of the characteristic impedance and electrical length of the first microstrip line 21, the second microstrip line 23, and the third microstrip line 24, as well as the circuit structure of the DC filter network 1, please refer to Embodiment 1. This embodiment will not repeat the details.

[0083] Furthermore, in actual testing or simulation, in addition to the broadband rectifier circuit with multiple terminal matching networks described above, load resistor 3 and DC blocking capacitor 4 also need to be connected. For example... Figure 4 As shown, the DC blocking capacitor 4 is connected to the input terminal of the broadband rectifier circuit, and one end of the load resistor 3 is connected to the output terminal of the broadband rectifier circuit, while the other end is connected to the ground terminal. The load resistor 3, the DC blocking capacitor 4, and the broadband rectifier circuit together form a broadband rectifier system with a terminating matching network.

[0084] This embodiment can further expand the bandwidth by parallel superposition of multiple terminal matching networks of different frequency bands, and realize a wider ultra-wideband high-efficiency rectification design.

[0085] The following description, combined with simulation experiments, further illustrates the effects of this embodiment:

[0086] 1. Simulation conditions

[0087] The simulation was performed using ADS software, and a signal source with a transmit power of 30dBm and an internal resistance of 50Ω was selected to replace the microwave AC signal received by the antenna as the input of the entire rectifier circuit.

[0088] 2. Simulation Content

[0089] A simulation model of the rectifier circuit for microwave energy harvesting was established, and the broadband efficiency of this embodiment as a function of the input frequency was simulated. The dielectric substrate used was Rogers 4350B material, with a thickness of 0.508 mm, a dielectric constant of 3.48, a loss tangent of 0.0009, and a thickness of 0.018 mm for both the top circuit topology layer and the bottom metal ground plane.

[0090] In the rectifier circuit, the highest frequency point f of the low-frequency terminating matching network is... H and the lowest point f L Using 2.1GHz and 0.9GHz respectively, the highest frequency point f of the high-frequency band terminal is matched to the network. H and the lowest point f L The operating frequencies are 3.3 GHz and 2.2 GHz, respectively. In the low-frequency band termination matching network, the characteristic impedance of the first microstrip line 21 is 18.8 Ω, and its electrical length is 17 degrees at 2 GHz; the rectifier diode 22 is the diode used in Example 1; the characteristic impedance of the second microstrip line 23 is 62.6 Ω, and its electrical length is 8.1 degrees at 2 GHz; the characteristic impedance of the third microstrip line 24 is 63.9 Ω, and its electrical length is 4.7 degrees at 2 GHz. In the high-frequency band termination matching network, the characteristic impedance of the first microstrip line 21 is 61.8 Ω, and its electrical length is 35.1 degrees at 2 GHz; the characteristic impedance of the second microstrip line 23 is 19.5 Ω, and its electrical length is 3.7 degrees at 2 GHz; the characteristic impedance of the third microstrip line 24 is 63.9 Ω, and its electrical length is 35.5 degrees at 2 GHz. The inductor 11 is 10 nH, the capacitor 12 is 7.5 pF, and the load resistor 3 is 100 Ω.

[0091] To verify the simulation effect of the present invention, the change of input S11 with the magnitude of input frequency in this embodiment was simulated, and the simulation results are as follows: Figure 5 As shown, Figure 5 This is another graph showing the variation of input terminal S11 with input frequency provided in an embodiment of the present invention. The horizontal axis represents the input frequency (GHz), and the vertical axis represents the input S11 parameter (dB). From... Figure 5 It can be seen that when the input frequency is between 0.9 and 3.3 GHz, the input terminal S11 is below -10 dB.

[0092] The efficiency as a function of input frequency was simulated, and the simulation results are as follows: Figure 6 As shown, Figure 6 Another efficiency-frequency curve provided for an embodiment of the present invention, where the horizontal axis represents the input frequency (GHz) and the vertical axis represents efficiency. From Figure 6 It can be seen that when the load resistance is 100Ω and the input frequency is 2.5GHz, the efficiency is the highest at 79.2%, and the efficiency can be higher than 70% when the input frequency is between 0.9 and 3.1GHz.

[0093] from Figure 5 and Figure 6 The simulation results show that the rectifier circuit with dual-terminal matching network has good ultra-wideband matching effect and can achieve high-efficiency rectification of ultra-wideband.

[0094] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A broadband rectifier circuit employing a terminal matching network, characterized in that, include: A DC filter network (1) and at least one terminal matching network structure (2), wherein, The input terminal of the DC filter network (1) is connected to the input terminal of the broadband rectifier circuit, and the output terminal is connected to the output terminal of the broadband rectifier circuit. When the number of the terminal matching network structure (2) is 1, the terminal matching network structure (2) is connected to the input terminal of the DC filter network (1). When the number of the terminal matching network structure (2) is greater than or equal to 2, multiple terminal matching network structures (2) are connected in parallel to the input terminal of the DC filter network (1), and the multiple terminal matching network structures (2) have different frequency bands. The terminal matching network structure (2) includes a first microstrip line (21), a rectifier diode (22), a second microstrip line (23), and a third microstrip line (24). One end of the first microstrip line (21) is connected to a ground terminal, and the other end is connected to one end of the rectifier diode (22). One end of the second microstrip line (23) is connected to the other end of the rectifier diode (22), and the other end of the second microstrip line (23) is open. One end of the third microstrip line (24) is connected between the second microstrip line (23) and the rectifier diode (22), and the other end is connected to the input terminal of the broadband rectifier circuit.

2. The broadband rectifier circuit employing a terminal matching network according to claim 1, characterized in that, The characteristic impedance and electrical length of the first microstrip line (21) are calculated according to the following formula: Z in1 (f)=Z d +Z1 tanθ1(f) Z in1 (f H )=[Z in1 (f L )]* Among them, Z in1 Z1 is the impedance viewed from the rectifier diode terminal face towards the first microstrip line, Z1 is the characteristic impedance of the first microstrip line, θ1 is the electrical length of the first microstrip line, and Z... d Here, f is the characteristic impedance of the rectifier diode, and f is the frequency. H f is the highest frequency point in the design frequency band. L This is the lowest frequency point in the design frequency band.

3. The broadband rectifier circuit employing a terminal matching network according to claim 2, characterized in that, The characteristic impedance and electrical length of the second microstrip line (23) are calculated according to the following formula: Z in2 (f)=(Z2Z in1 (f)) / (Z2+jZ in1 (f)tanθ2(f)) Z in2 (f H )=Z in2 (f L ) Among them, Z in2 Z2 is the impedance from the point where the rectifier diode and the second microstrip line meet, looking toward the second microstrip line; Z2 is the characteristic impedance of the second microstrip line; and θ2 is the electrical length of the second microstrip line.

4. The broadband rectifier circuit employing a terminal matching network according to claim 3, characterized in that, The characteristic impedance and electrical length of the third microstrip line (24) are calculated according to the following formula: Z in3 (f)=Z3(Z in2 (f)+jZ3tanθ3(f)) / (Z3+jZ in2 (f)tanθ3(f)) Z in3 (f H )=40~60Ω Among them, Z in3 Z3 is the impedance of the third microstrip line as seen from the input of the broadband rectifier circuit, Z3 is the characteristic impedance of the third microstrip line, and θ3 is the electrical length of the third microstrip line.

5. The broadband rectifier circuit employing a terminal matching network according to claim 1, characterized in that, The DC filter network (1) includes an inductor (11) and a capacitor (12), wherein, One end of the inductor (11) is connected to the input terminal of the broadband rectifier circuit, and the other end is connected to one end of the capacitor (12) and the output terminal of the broadband rectifier circuit; the other end of the capacitor (12) is connected to the ground terminal.

6. The broadband rectifier circuit employing a terminal matching network according to claim 1, characterized in that, It also includes a dielectric substrate and a metal ground plane, wherein, The DC filter network (1) and at least one terminal matching network structure (2) form a circuit topology layer, the circuit topology layer being disposed on the upper surface of the dielectric substrate, and the metal ground plane being disposed on the lower surface of the dielectric substrate.

7. A broadband rectification system employing a terminal matching network, characterized in that, It includes a broadband rectifier circuit, a load resistor (3), and a DC blocking capacitor (4), wherein, The DC blocking capacitor (4) is connected to the input terminal of the broadband rectifier circuit; The broadband rectifier circuit adopts the broadband rectifier circuit with terminal matching network as described in any one of claims 1-6; One end of the load resistor (3) is connected to the output terminal of the broadband rectifier circuit, and the other end is connected to the ground terminal.

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