Circuit reliability processing method and device, storage medium and electronic equipment

Abstract

The application provides a circuit reliability processing method, device, storage medium and electronic equipment. The circuit reliability processing method comprises the following steps: obtaining the failure rate of each device in a preset circuit and the corresponding failure coefficient; determining the failure expectation value of each device according to the failure rate of each device and the corresponding failure coefficient; comparing a plurality of failure expectation values to determine the target device to be modified in the preset circuit. The technical scheme of the application can improve the technical problem that the reliability of the insulation detection circuit cannot be quantified, and how to modify the circuit to increase the reliability cannot be determined.

Description

Technical Field

[0001] This invention relates to the field of detection circuit technology, and more specifically to a method, apparatus, storage medium, and electronic device for processing circuit reliability. Background Technology

[0002] In related technologies, it is impossible to quantify the reliability of insulation detection circuits through a unified calculation method. Even when faced with existing insulation resistance detection circuits, it is impossible to quantify their reliability into specific values ​​to assess whether the reliability of the insulation resistance detection circuit is high or low. Furthermore, it is impossible to determine how to modify the circuit to increase its reliability and reduce the possibility of the insulation resistance detection circuit failing during operation. Summary of the Invention

[0003] Embodiments of the present invention provide a method, apparatus, storage medium, and electronic device for processing circuit reliability, which can improve the technical problem that the reliability of insulation detection circuits cannot be quantified and that it is impossible to determine how to modify the circuits to increase their reliability.

[0004] In a first aspect, embodiments of the present invention provide a method for processing circuit reliability, the method comprising:

[0005] Obtain the failure rate and corresponding failure coefficient of each device in the preset circuit;

[0006] Based on the failure rate of each device and its corresponding failure coefficient, the expected failure value of each device is determined.

[0007] By comparing multiple expected failure values, a target device to be modified in the preset circuit is determined, and the connection method of the target device is changed according to the failure coefficient of the target device to reduce the expected failure value of the target device.

[0008] In one embodiment, obtaining the failure coefficient corresponding to each device in the preset circuit includes:

[0009] According to the preset standard failure mode, obtain all failure situations of each device and the failure percentage corresponding to each failure situation;

[0010] Obtain the circuit connection method of each device in the preset circuit, and determine the various target failure conditions of the device during operation based on the circuit connection method;

[0011] The failure coefficient of each device is determined by summing the failure rates of the various target failure scenarios corresponding to each device.

[0012] In one embodiment, comparing the plurality of said failure expectations includes:

[0013] The multiple expected failure values ​​are sorted from largest to smallest to obtain a sorted queue;

[0014] According to the order of the queue, based on the connection method of the device corresponding to the expected failure value, it is determined whether the device can be modified, so as to identify a preset number of target devices that can be modified; and / or,

[0015] According to the order of the queue, the device corresponding to the failure expectation value that is greater than the preset ranking is taken as the target device.

[0016] In one embodiment, changing the connection method of the target device according to the failure coefficient of the target device specifically includes:

[0017] Based on the failure rate of the target device in the target failure scenario, the connection method between the target device and surrounding devices is changed.

[0018] In one embodiment, after determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes:

[0019] Based on the expected failure value, failure rate and corresponding failure coefficient of each device, the total expected failure value of the preset circuit is obtained;

[0020] Based on the relationship between the total expected failure value of the preset circuit and the expected threshold, it is determined whether to modify the preset circuit.

[0021] In one embodiment, the expected thresholds are multiple, including a first expected threshold and a second expected threshold, wherein the first expected threshold is greater than the second expected threshold, and determining whether to modify the preset circuit based on the relationship between the total expected failure value of the preset circuit and the expected thresholds includes:

[0022] When the total expected failure value is greater than the first expected threshold, the multiple target devices in the preset circuit are modified according to the difference between the total expected failure value and the first expected threshold.

[0023] When the total expected failure value is less than the first expected threshold and greater than the second expected threshold, the target device in the preset circuit is determined to be modified based on the relationship between the expected failure value of each device and the preset device threshold corresponding to the device.

[0024] When the total expected failure value is less than the second expected threshold, the preset circuit is not modified.

[0025] In one embodiment, determining whether to modify the preset circuit based on the relationship between the total expected failure value of the preset circuit and the expected threshold includes:

[0026] If the total expected failure value is greater than the expected threshold, the preset circuit will be modified.

[0027] If the total expected failure value is not greater than the expected threshold, then determine whether there is a device whose expected failure value is greater than its corresponding preset device threshold.

[0028] If it exists, the preset circuit will be modified.

[0029] If it does not exist, the preset circuit will not be modified.

[0030] In one embodiment, after determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes:

[0031] Multiple modified circuits are automatically generated based on the target device, and the total expected failure value of each modified circuit is obtained.

[0032] The multiple total failure expectations are sorted, and one or more target circuits are determined according to the sorting order.

[0033] Secondly, embodiments of the present invention provide a circuit reliability processing apparatus, comprising:

[0034] The parameter acquisition module is used to acquire the failure rate of each device in the preset circuit and its corresponding failure coefficient.

[0035] The processing module is used to determine the expected failure value of each device based on the failure rate of each device and its corresponding failure coefficient.

[0036] The comparison module is used to compare multiple expected failure values ​​to determine the target device in the preset circuit.

[0037] Thirdly, embodiments of the present invention provide a storage medium storing a computer program that, when run on a computer, causes the computer to perform the circuit reliability processing method described above.

[0038] Fourthly, embodiments of the present invention provide an electronic device, including a processor and a memory, wherein the memory has a computer program, characterized in that the processor executes the above-described circuit reliability processing method by calling the computer program.

[0039] The beneficial effects of the embodiments of the present invention are as follows:

[0040] In embodiments of the present invention, by obtaining the failure rate and corresponding failure coefficient of each device in the preset circuit, and determining the expected failure value of each device based on the failure rate and corresponding failure coefficient, the reliability of the insulation detection circuit is quantified through a unified calculation method. Furthermore, by determining the devices that need optimization based on multiple expected failure values, and by changing the connection relationship between the devices and surrounding devices according to the failure mode of the devices, the reliability of each device in the preset circuit can be quantified. The reliability of each device is directly reflected by the magnitude of the expected failure value. Moreover, by comparing multiple expected failure values, it is possible to determine which devices in the preset circuit primarily affect the reliability of the preset circuit, and to determine the modification of the preset circuit based on the connection relationship of specific devices. This allows for a more direct and concise determination of the direction of modification to the preset circuit, achieving higher reliability in the modified circuit during operation. This addresses the technical problem of being unable to quantify the reliability of the insulation detection circuit and determining how to modify the circuit to increase its reliability. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a schematic flowchart of a circuit reliability processing method provided in an embodiment of the present invention;

[0043] Figure 2 This is a flowchart illustrating step S100 provided in an embodiment of the present invention;

[0044] Figure 3 This is a flowchart illustrating step S300 provided in an embodiment of the present invention.

[0045] Figure 4 This is another schematic flowchart of the circuit reliability processing method provided in the embodiments of the present invention;

[0046] Figure 5 This is a flowchart illustrating step S600 provided in an embodiment of the present invention;

[0047] Figure 6 This is a flowchart illustrating step S620 provided in an embodiment of the present invention;

[0048] Figure 7 This is another schematic flowchart of the circuit reliability processing method provided in the embodiments of the present invention;

[0049] Figure 8 This is a circuit connection diagram of a preset circuit provided in an embodiment of the present invention;

[0050] Figure 9 This is a circuit connection diagram of the modified circuit provided in an embodiment of the present invention;

[0051] Figure 10 This is a circuit block diagram of a circuit reliability processing device provided in an embodiment of the present invention. Detailed Implementation

[0052] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Furthermore, it should be understood that the specific embodiments described herein are only for illustration and explanation of the present invention and are not intended to limit the present invention. In the present invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0053] S100: Obtain the failure rate of each device in the preset circuit and its corresponding failure coefficient;

[0054] In this embodiment, the preset circuit is the circuit to be processed, which is input by the user through a PC or other device.

[0055] The failure rate is obtained by the user based on existing device failure rate standards. In this embodiment, standard SN29500 is used. In other cases, other device failure rate standards, such as IEC62380, can be used as needed. The failure coefficient is the proportion of the possible target failure conditions of each device in the total failure conditions. For example, for a switching transistor, all failure conditions include parameter drift, short circuit, and open circuit. In the off state, the possible target failure conditions include parameter drift and short circuit. At this time, the marked failure coefficient of the switching transistor is the sum of the probabilities of parameter drift and short circuit.

[0056] When optimizing the reliability of an insulation detection circuit, the user first determines the required device failure rate standard. Based on the standard, the failure rate of each device in the existing insulation detection circuit is determined. For example, when calculating the failure rate of switching transistors and resistors according to standard SN29500, the failure rate of the switching transistors is 40 FIT; the failure rate of the resistors is 1.26 FIT. The total probability of the target failure condition that each device will experience is then determined as a parameter for calculating the device failure condition.

[0057] S200. Determine the expected failure value of each device based on its failure rate and corresponding failure coefficient.

[0058] In this embodiment, the expected failure value is the proportion of the target failure situation of each device to the total target failure situation of the circuit. Figure 8 For example, Figure 8 For the insulation detection circuit before improvement, Figure 8 The expected failure value of the first switching transistor K1 in the circuit is calculated as follows:

[0059] P K1_1 =a*F K1 / (F R1 +F R2 +F R3 +F R4 +a*F K1 +b*F K2 +c*F K3 ), where a is the failure coefficient of the first switch K1, b is the failure coefficient of the second switch K2, c is the failure coefficient of the second switch K3, and F R1 F is the failure rate of the first resistor R1. R2 F is the failure rate of the second resistor R2. R3 F is the failure rate of the third resistor R3. R4 F is the failure rate of the fourth resistor R4. K1 F is the failure rate of the first switch K1. K2 F is the failure rate of the second switch K2. K3 The failure rate of the third switch K3, (F R1 +F R2 +F R3 +F R4 +a*F K1 +b*F K2 +c*F K3 () represents the target failure condition of the overall circuit.

[0060] S300. Compare multiple expected failure values ​​to determine the target device to be modified in the preset circuit, and change the connection method of the target device according to the failure coefficient of the target device to reduce the expected failure value of the target device.

[0061] It should be noted that circuit failure rate is mainly composed of the number of components, their own failure rate, failure modes, and circuit architecture. Even the same components can exhibit different target failure scenarios due to variations in their connections. Taking a reference ambient temperature of 40℃ and considering only single-point failure modes, short circuits, open circuits, and drift account for 10%, 50%, and 40% of all failure scenarios for optical MOSFETs, respectively. This demonstrates that even for the same optical MOSFET, the failure percentage differs under open-circuit and short-circuit conditions, resulting in different failure coefficients in calculations. Consequently, the expected failure values ​​obtained after applying these parameters to a circuit will also differ.

[0062] In this embodiment, after obtaining the failure rate and failure coefficient of each device, and calculating the expected failure value of each device based on these parameters, multiple expected failure values ​​are compared. When the expected failure value of a device is higher than that of other devices, it indicates that the device is more likely to fail and malfunction. Therefore, the device is addressed. Specifically, when the failure coefficient of a device is mainly affected by open circuits, it is possible to modify its connection relationship with surrounding devices to reduce the situation where multiple identical devices are closed at the same time.

[0063] This invention provides a solution by acquiring the failure rate and corresponding failure coefficient of each device in a preset circuit, and determining the expected failure value of each device based on its failure rate and corresponding failure coefficient. This quantifies the reliability of the insulation detection circuit through a unified calculation method. Furthermore, by determining the devices requiring optimization based on multiple expected failure values, and modifying the connection relationships between the devices and surrounding devices according to their failure modes, the reliability of each device in the preset circuit can be quantified. The reliability of each device is directly reflected by the magnitude of its expected failure value. By comparing multiple expected failure values, it can determine which devices in the preset circuit primarily affect its reliability, thus pinpointing modifications to the connection relationships of specific devices. This provides a more direct and concise direction for circuit modification, resulting in a more reliable circuit during operation. This addresses the technical problem of being unable to quantify the reliability of the insulation detection circuit and determine how to modify it to increase its reliability.

[0064] Reference Figures 1 to 2 In one embodiment, obtaining the failure coefficient corresponding to each device in the preset circuit includes:

[0065] S110. Obtain all failure scenarios of each device and the failure percentage corresponding to each failure scenario according to the preset standard failure mode.

[0066] S120. Obtain the circuit connection method of each device in the preset circuit, and determine the various target failure conditions of the device during operation based on the circuit connection method.

[0067] S130. Determine the failure coefficient of the device based on the sum of the failure ratios of the various target failure conditions corresponding to each device.

[0068] In this embodiment, each device can be identified by the standard failure modes, but due to different circuit connections, not every failure mode will occur. For example, a switch in the open state has three states in the standard failure modes: short circuit, open circuit, and parameter drift. However, for an open switch, an open circuit will not affect its operation. Therefore, the open circuit failure cannot be included in the calculation. Thus, when calculating the failure coefficient of each device, the connection state of its circuit must first be determined to determine whether there are any failures that will not affect the operation. The probabilities of the target failures that affect the operation are accumulated and used as the failure coefficient of the first device.

[0069] Furthermore, the operating states of each component in the insulation detection circuit are not always constant during operation. In order to obtain the resistance values ​​of the positive and negative ground resistances in the insulation detection circuit, there are usually at least two operating states, and each operating state corresponds to a connection circuit. Therefore, when calculating the expected failure value of the components in the insulation detection circuit, it is necessary to calculate the expected failure value of each component in multiple operating states simultaneously.

[0070] like Figure 8 As shown, according to standard SN29500:

[0071] The failure rate of the resistors in the preset circuit is: F R1 =F R2 =F R3 =F R4 =1.26 FIT;

[0072] The failure rate of the switching transistor in the preset circuit is: F K1 =F K2 =F K3 =40 FIT;

[0073] The preset circuit includes a first working state and a second working state;

[0074] When the preset circuit is in the first working state, the first switch is closed and the second switch is open;

[0075] When the preset circuit is in the second working state, both the first switch and the second switch are closed.

[0076] (1) When the first switch K1 and the second switch K2 are closed and the third switch K3 is open, the failure calculation of the insulation detection circuit is as follows:

[0077] P R1_1 =P R2_1 =P R3_1 =P R4_1 =F R1 / (F R1 +F R2 +F R3 +F R4 +0.9*F K1 +0.9*F K2 +0.5*F K3 ) = 0.013;

[0078] P K1_1 =P K2_1 =0.9*F K1 / (F R1 +F R2 +F R3 +F R4 +0.9*F K1 +0.9*F K2 +0.5*F K3 ) = 0.371;

[0079] P K3_1 =0.5*F K3 / (F R1 +F R2 +F R3 +F R4 +0.9*F K1 +0.9*F K2 +0.5*F K3 ) = 0.206;

[0080] (2) When the first switch K1 and the third switch K3 are closed, and the second switch K2 is open, the failure calculation of the insulation detection circuit is as follows:

[0081] P R2_2 =P R3_2 =P R4_2 =F R1 / (F R2 +F R3 +F R4 +0.9*F K1+0.5*F K2 +0.9*F K3 ) = 0.0132;

[0082] P K1_2 =P K2_2 =0.9*F K1 / (F R2 +F R3 +F R4 +0.9*F K1 +0.5*F K2 +0.9*F K3 ) = 0.3758;

[0083] P K3_2 =0.5*F K3 / (F R2 +F R3 +F R4 +0.9*F K1 +0.5*F K2 +0.9*F K3 = 0.2088.

[0084] Reference Figure 1 , Figure 2 and Figure 8 In one embodiment, comparing the plurality of said failure expectations includes:

[0085] S310. Sort the multiple failure expectation values ​​from largest to smallest to obtain a sorted queue.

[0086] S320. Following the order of the queue, determine whether a device can be modified based on the connection method of the device corresponding to the expected failure value, thereby identifying a preset number of target devices that can be modified; and / or,

[0087] S330. According to the order of the queue, the device corresponding to the failure expectation value that is greater than the preset ranking is taken as the target device.

[0088] In this embodiment, a higher expected failure value for a device compared to other devices indicates that the device is more prone to failure and damage. Therefore, after obtaining the expected failure value for each device, these expected failure values ​​need to be sorted from largest to smallest to determine which devices in the preset circuit have a greater impact on the circuit, and then these devices can be addressed. Specifically, for example... Figure 8 The insulation detection circuit, because P is in the first working state of the preset circuit, R1_1 =P R2_1 =P R3_1 =P R4_1 =0.013, PK1_1 =P K2_1 =0.371, P K3_1 =0.206, at this point the expected failure value ranking P K1_1 =P K2_1 >P K3_1 >P R1_1 =P R2_1 =P R3_1 =P R4_1 When the preset circuit is in the second operating state, P R1_2 =P R2_2 =P R3_2 =P R4_2 =0.0132, P K1_2 =P K2_2 =0.3758, P K3_2 =0.2088, at this point the expected failure value ranking P K1_2 =P K2_2 >P K3_2 >P R1_2 =P R2_2 =P R3_2 =P R4_2 .

[0089] Since not every component in the preset circuit is movable, as in the above embodiment, the failure expectation value ranking P is determined. K1_1 =P K2_1 >P K3_1 >P R1_1 =P R2_1 =P R3_1 =P R4_1 However, the first switch K1 is limited by the circuit function and cannot be structurally adjusted, so it is prioritized to the second switch K2 and the third switch K3, which have a higher failure rate.

[0090] It should be noted that the preset quantity and preset ranking can be related to the number of components in the preset circuit and / or the number of components with a larger expected value. The more components in the preset circuit, the larger the preset quantity and preset ranking can be. Similarly, the more components with a larger expected value, the larger the preset quantity and preset ranking can be.

[0091] Reference Figures 1 to 9 The step of changing the connection method of the target device according to the failure coefficient of the target device specifically includes:

[0092] S400. Based on the failure rate of the target failure condition of the device, change the connection method between the target device and surrounding devices.

[0093] In this embodiment, since the first switch K1 cannot be structurally adjusted due to circuit functional limitations, the circuit structures of the second switch K2 and the third switch K3 are optimized, and the second switch K2 and the third switch K3 are optimized into... Figure 9 The parallel structure shown by the fifth switch K5 and the sixth switch K6 reduces the device failure states of the second switch K2 and the third switch K3.

[0094] Circuit failure rate is mainly composed of the number of components, its own failure rate, failure modes, and circuit architecture. Figure 8 Optimize the circuit architecture, such as Figure 9 As shown. The optimized circuit architecture is compatible with both balanced and unbalanced bridge methods. When the fifth switch K5 experiences an open-circuit fault, the sixth switch K6 is switched to the balanced bridge method for insulation detection. Similarly, when the sixth switch K6 experiences an open-circuit fault, the fifth switch K5 is switched to the unbalanced bridge method for insulation detection, thereby increasing the reliability of the insulation detection circuit.

[0095] Redesign the circuit based on the design direction given above, and recalculate the expected failure value of each component.

[0096] According to standard SN29500:

[0097] The failure rate of the resistors in the modified circuit is: F R5 =F R6 =F R7 =F R8 =1.26 FIT;

[0098] The failure rate of the switching transistor in the modified circuit is: F K4 =F K5 =F K6 =40 FIT;

[0099] In one embodiment, when the modified circuit is configured as an unbalanced detection bridge:

[0100] (1) If the unbalanced detection bridge is in the first working state, the fourth switch K4 and the fifth switch K5 are closed, and the sixth switch K6 is open. The failure states of the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor all include open circuit and resistor parameter drift. The failure state of the fourth switch K4 includes open circuit and switch parameter drift. The failure state of the fifth switch K5 includes switch parameter drift. The failure state of the sixth switch K6 includes short circuit.

[0101] At this point, the failure calculation for the insulation detection circuit is as follows:

[0102] P R5_1 =P R6_1=P R7_1 =F R5 / (F R5 +F R6 +F R7 +0.9*F K4 +0.4*F K5 +0.1*F K6 ) = 0.0211;

[0103] P K4_1 =0.9*F K4 / (F R5 +F R6 +F R7 +0.9*F K4 +0.4*F K5 +0.1*F K6 ) = 0.6022;

[0104] P K5_1 =0.4*F K4 / (F R5 +F R6 +F R7 +0.9*F K4 +0.4*F K5 +0.1*F K6 ) = 0.2676;

[0105] P K6_1 =0.1*FK4 / (F R5 +F R6 +F R7 +0.9*F K4 +0.4*F K5 +0.1*F K6 ) = 0.0669;

[0106] (2) When the unbalanced detection bridge is in the second working state, the fourth switch K4 is closed, and the fifth switch K5 and the sixth switch K6 are open. The failure states of the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor all include open circuit and resistor parameter drift. The failure state of the fourth switch K4 includes open circuit and switch parameter drift. The failure states of the fifth switch K5 and the sixth switch K6 all include short circuit and switch parameter drift.

[0107] At this point, the failure calculation for the insulation detection circuit is as follows:

[0108] P R6_2 =P R7_2 =F R6 / (F R6 +F R7 +0.9*F K4+0.5*F K5 +0.5*F K6 ) = 0.016;

[0109] P K4_2 =0.9*F K4 / (F R6 +F R7 +0.9*F K4 +0.5*F K5 +0.5*F K6 ) = 0.4586;

[0110] P K5_2 =P K6_2 =0.5*F K5 / (F R6 +F R7 +0.9*F K4 +0.5*F K5 +0.5*F K6 = 0.2547.

[0111] In another embodiment, when the modified circuit is configured as a balanced detection bridge:

[0112] (1) If the balance detection bridge is in the first working state, the fourth switch K4 and the sixth switch K6 are closed, and the fifth switch K5 is open. The failure states of the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor all include open circuit and resistor parameter drift. The failure state of the fourth switch K4 includes open circuit and parameter drift. The failure state of the fifth switch K5 includes short circuit. The failure state of the sixth switch K6 includes switch parameter drift.

[0113] At this point, the failure calculation for the insulation detection circuit is as follows:

[0114] P R5_3 =P R6_2 =P R7_2 =P R8_2 =F R5 / (F R5 +F R6 +F R7 +F R8 +0.9*F K4 +0.1*F K5 +0.4*F K6 ) = 0.0206;

[0115] P K4_3 =0.9*F K4 / (F R5 +F R6 +F R7 +FR8 +0.9*F K4 +0.1*F K5 +0.4*F K6 ) = 0.5898;

[0116] P K5_3 =0.1*F K4 / (F R5 +F R6 +F R7 +F R8 +0.9*F K4 +0.1*F K5 +0.4*F K6 ) = 0.0655;

[0117] P K6_3 =0.4*F K4 / (F R5 +F R6 +F R7 +F R8 +0.9*F K4 +0.1*F K5 +0.4*F K6 = 0.0419.

[0118] (2) When the balance detection bridge is in the second working state, the fourth switch K4 is closed, and the fifth switch K5 and the sixth switch K6 are open. The failure states of the fifth resistor, the sixth resistor, the seventh resistor and the eighth resistor all include open circuit and resistor parameter drift. The failure state of the fourth switch K4 includes open circuit and switch parameter drift. The failure states of the fifth switch K5 and the sixth switch K6 all include short circuit and switch parameter drift.

[0119] At this point, the failure calculation for the insulation detection circuit is as follows:

[0120] P R6_4 =P R7_2 =F R6 / (F R6 +F R7 +0.9*F K4 +0.5*F K5 +0.5*F K6 ) = 0.016;

[0121] P K4_4 =0.9*F K4 / (F R6 +F R7 +0.9*F K4 +0.5*F K5 +0.5*F K6) = 0.4586;

[0122] P K5_4 =P K6_2 =0.5*F K5 / (F R6 +F R7 +0.9*F K4 +0.5*F K5 +0.5*F K6 = 0.2547.

[0123] Reference Figure 1 and Figure 4 In one embodiment, after determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes:

[0124] S500. Based on the expected failure value, failure rate and corresponding failure coefficient of each device, obtain the total expected failure value of the preset circuit.

[0125] S600. Based on the relationship between the total expected failure value of the preset circuit and the expected threshold, determine whether to modify the preset circuit.

[0126] In this embodiment, since the circuit of the input device does not necessarily need to be modified and may have high reliability in some cases, it is necessary to first determine the total expected failure value of the circuit of the input device and pre-store the expected threshold in the device. The expected threshold is a critical value for classifying the total expected failure value. For example, when the total expected failure value is lower than the expected threshold, the circuit does not need to be modified.

[0127] The first total expected failure value of the preset circuit is determined based on the failure rate, the expected failure value, and the failure coefficient corresponding to the multiple devices;

[0128] The second total expected failure value of the preset circuit is determined based on the failure rate, expected failure value and failure coefficient of the multiple devices, and the failure rate, expected failure value and failure coefficient of at least one replaced second device.

[0129] like Figure 8 In the preset circuit, the total expected failure value in its first operating state is:

[0130] F1 = F R1 *P R1_1 +F R2 *P R2_1 +F R3 *P R3_1 +F R4 *P R4_1 +0.9*FK1 *P K1_1 +0.9*F K2 *P K2_1 +0.

[0131] 5*F K3 *P K3_1 =30.89752 FIT;

[0132] The total expected failure value in its second operating state is:

[0133] F2 = F R2 *P R2_2 +F R3 *P R3_2 +F R4 *P R4_2 +0.9*F K1 *P K1_2 +0.5*F K2 *P K2_2 +0.9*F K3 *P K3_

[0134] 2 = 31.283496 FIT.

[0135] Based on this, the total expected failure value of the modified circuit can be obtained:

[0136] In one embodiment, when the modified circuit is an unbalanced detection bridge, the total expected failure value in its first operating state is:

[0137] F3 = F R5 *P R5_1 +F R6 *P R6_1 +F R7 *P R7_1 +0.9*F K4 *P K4_1 +0.4*F K5 *P K5_1 +0.1*F K6 *P K6_

[0138] 1 = 28.426558 FIT.

[0139] The total expected failure value in its second operating state is:

[0140] F4 = F R6 *P R6_2 +F R7 *P R7_2 +0.9*F K4 *P K4_2 +0.5*F K5*P K5_2 + 0.5 * F K6 *P K6_2 = 21.6439

[0141] 2 FIT。

[0142] In another embodiment, when the modified circuit is a balanced detection bridge, the total expected failure value in its first working state is:

[0143] F5 = F R5 *P R5_3 + F R6 *P R6_3 + F R7 *P R7_3 + 0.9 * F K4 *P K4_3 + 0.1 * F K5 *P K5_3 + 0.4 * F K6 *P K6_

[0144] 3 = 22.243068 FIT。

[0145] The total expected failure value in its second working state is:

[0146] F6 = F R6 *P R6_4 + F R7 *P R7_4 + 0.9 * F K4 *P K4_4 + 0.5 * F K5 *P K5_4 + 0.5 * F K6 *P K6_4 = 21.6439

[0147] 2 FIT。

[0148] Therefore, it can be obtained that F5 < F3 < F1, F6 = F4 < F2; that is, whether the modified circuit is in a balanced detection bridge or an unbalanced detection bridge, its total expected failure value is lower than that of the preset circuit. Therefore, the modified circuit has higher reliability than the preset circuit. And, since the sixth switch tube K6 in the modified circuit is also connected in series with an eighth resistor R8, there are fewer failed devices in the balanced detection bridge, and its reliability is higher than that of the unbalanced detection bridge.

[0149] Refer to Figures 1 to 7In one embodiment, the expected thresholds are multiple, including a first expected threshold and a second expected threshold, wherein the first expected threshold is greater than the second expected threshold. Determining whether to modify the preset circuit based on the relationship between the total expected failure value of the preset circuit and the expected thresholds includes:

[0150] S611. When the total expected failure value is greater than the first expected threshold, the multiple target devices in the preset circuit are modified according to the difference between the total expected failure value and the first expected threshold.

[0151] S612. When the total expected failure value is less than the first expected threshold and greater than the second expected threshold, based on the relationship between the expected failure value of each device and the preset device threshold corresponding to the device, determine to modify one of the target devices in the preset circuit.

[0152] S613. When the total expected failure value is less than the second expected threshold, the preset circuit is not modified.

[0153] In this embodiment, the first expected threshold is the maximum critical value of the preset circuit. That is, when the total expected failure value of the preset circuit is greater than the first expected threshold, it indicates that its reliability is very poor and it must be modified. The basis for modification is related to the difference between the total expected failure value and the first expected threshold. The larger the difference between the total expected failure value and the first expected threshold, the worse the reliability of the preset circuit. At this time, more devices need to be modified. When selecting devices according to the ranking of expected failure values, the larger the value of the preset ranking, the more proportional the setting of the preset ranking is to the difference between the total expected failure value and the first expected threshold.

[0154] The second expected threshold is the minimum critical value of the preset circuit. When the total expected failure value of the preset circuit is lower than the second expected threshold, it means that the reliability of the preset circuit is very good, and there is no need to modify the circuit at all. It can be applied directly.

[0155] Therefore, it is only necessary to further determine whether the circuit needs to be modified when the total expected failure value of the preset circuit is between the first expected threshold and the second expected threshold.

[0156] Reference Figures 1 to 7 In one embodiment, determining whether to modify the preset circuit based on the relationship between the total expected failure value of the preset circuit and the expected threshold includes:

[0157] S621. If the total expected failure value is greater than the expected threshold, the preset circuit shall be modified.

[0158] S622. If the total expected failure value is not greater than the expected threshold, then determine whether there is a device whose expected failure value is greater than its corresponding preset device threshold.

[0159] S623. If it exists, then modify the preset circuit;

[0160] S624. If not, the preset circuit is not modified. In this embodiment, when the total expected failure value of the preset circuit is determined to be between the first expected threshold and the second expected threshold, the device begins to analyze the expected failure value of each device in the circuit. The device has a corresponding device failure threshold for each device to measure the reliability of each device. When the expected failure value of each device is lower than its corresponding device failure threshold, it indicates that each device in the preset circuit has good reliability and is not prone to failure during long-term circuit operation. In this case, the preset circuit can be directly put into application without modification.

[0161] When at least one device has a failure expectation value higher than its corresponding device failure threshold, it indicates that there is a low-reliability device in the preset circuit. During circuit operation, the circuit is likely to fail due to the high failure rate of this device. In this case, the preset circuit needs to modify the device with the failure expectation value higher than the device failure threshold by changing its connection with surrounding devices to reduce the failure expectation value of the device until the failure expectation value of the device is lower than the corresponding device failure threshold.

[0162] Reference Figure 1 and Figure 6 In one embodiment, after determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes:

[0163] S710. Automatically generate multiple modified circuits based on the target device, and obtain the total expected failure value of each modified circuit;

[0164] S720. Sort the multiple total failure expectation values ​​and determine one or more target circuits according to the sorting order.

[0165] In this embodiment, the automatic generation of multiple modified circuits can be achieved by the layout based on the input device parameters. Since the result of automatically generating the insulation detection circuit is not unique, and it cannot be determined whether the generated insulation detection circuit is the circuit required by the user, when multiple modified circuits are obtained, the effect of improved reliability can be determined by calculating their total expected value. The circuit with the highest reliability, i.e., the lowest total expected failure value, is selected as the target circuit required by the user.

[0166] Reference Figure 10The present invention also proposes a circuit reliability processing device, comprising:

[0167] The parameter acquisition module 810 is used to acquire the failure rate of each device in the preset circuit and its corresponding failure coefficient.

[0168] The processing module 820 is used to determine the expected failure value of each device based on the failure rate of each device and its corresponding failure coefficient.

[0169] The comparison module 830 is used to compare multiple failure expectation values ​​to determine the target device to be modified in the preset circuit.

[0170] In this embodiment, the parameter acquisition module 810 may include a memory; the processing module 820 may include a main control chip, a processor, etc.; and the comparison module 830 may include a comparison circuit integrated in the main control chip.

[0171] The circuit reliability processing device can be connected to an industrial control computer, a home PC, etc. When processing circuit reliability, the circuit to be modified is input as a preset circuit into the processing device via an interactive device such as an industrial control computer or a home PC. This allows the processing device to identify each component in the preset circuit. The parameter acquisition module 810, based on the identified component type, acquires the failure rate and corresponding failure coefficient of each component in the preset circuit, and outputs the failure rate and corresponding failure coefficient of each component to the processing module 820. The processing module 820 then determines the expected failure value of each component based on its failure rate and corresponding failure coefficient. After determining the expected failure value of each component through the processing module 820, the comparison module 830 compares these expected failure values ​​to determine the target component in the preset circuit that needs modification.

[0172] The present invention also proposes a storage medium storing a computer program thereon. When the computer program is run on a computer, it causes the computer to execute the circuit reliability processing method described above. The specific structure of the circuit reliability processing method is as described in the above embodiments. Since this storage medium adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here.

[0173] The present invention also proposes an electronic device, including a processor and a memory, wherein the memory has a computer program. The processor is characterized in that it executes the above-described circuit reliability processing method by calling the computer program. The specific structure of the circuit reliability processing method is as described in the above embodiments. Since the electronic device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated here.

[0174] The embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for handling circuit reliability, characterized in that, The method for handling circuit reliability includes: Obtain the failure rate and corresponding failure coefficient of each device in the preset circuit; According to the preset standard failure mode, obtain all failure situations of each device and the failure percentage corresponding to each failure situation; Obtain the circuit connection method of each device in the preset circuit, and determine the various target failure conditions of the device during operation based on the circuit connection method; The failure coefficient of each device is determined by summing the failure rates of the various target failure scenarios corresponding to each device. The target failure condition of a device is determined by multiplying the failure rate of each device by its corresponding failure coefficient. The target failure condition of a preset circuit is determined by summing the target failure conditions of each device in the preset circuit. The expected failure value of each device is determined by the proportion of the target failure condition of each device to the total target failure condition of the preset circuit. By comparing multiple expected failure values, a target device to be modified in the preset circuit is determined, and the connection method of the target device is changed according to the failure coefficient of the target device to reduce the expected failure value of the target device.

2. The circuit reliability processing method as described in claim 1, characterized in that, The comparison of the multiple expected failure values ​​includes: The multiple expected failure values ​​are sorted from largest to smallest to obtain a sorted queue; According to the order of the queue, based on the connection method of the device corresponding to the expected failure value, it is determined whether the device can be modified, so as to identify a preset number of target devices that can be modified; and / or, According to the order of the queue, the device corresponding to the failure expectation value that is greater than the preset ranking is taken as the target device.

3. The circuit reliability processing method as described in claim 2, characterized in that, The step of changing the connection method of the target device according to the failure coefficient of the target device specifically includes: Based on the failure rate of the target device in the target failure scenario, the connection method between the target device and surrounding devices is changed.

4. The circuit reliability processing method as described in claim 1, characterized in that, After determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes: Based on the expected failure value, failure rate and corresponding failure coefficient of each device, the total expected failure value of the preset circuit is obtained; Based on the relationship between the total expected failure value and the expected threshold of the preset circuit, it is determined whether the preset circuit should be modified.

5. The circuit reliability processing method as described in claim 4, characterized in that, The expected thresholds are multiple, including a first expected threshold and a second expected threshold, wherein the first expected threshold is greater than the second expected threshold. Determining whether to modify the preset circuit based on the relationship between the total expected failure value of the preset circuit and the expected thresholds includes: When the total expected failure value is greater than the first expected threshold, the multiple target devices in the preset circuit are modified according to the difference between the total expected failure value and the first expected threshold. When the total expected failure value is less than the first expected threshold and greater than the second expected threshold, the target device in the preset circuit is determined to be modified based on the relationship between the expected failure value of each device and the preset device threshold corresponding to the device. When the total expected failure value is less than the second expected threshold, the preset circuit is not modified.

6. The circuit reliability processing method as described in claim 4, characterized in that, The step of determining whether to modify the preset circuit based on the relationship between the total expected failure value and the expected threshold of the preset circuit includes: If the total expected failure value is greater than the expected threshold, the preset circuit will be modified. If the total expected failure value is not greater than the expected threshold, then determine whether there is a device whose expected failure value is greater than its corresponding preset device threshold. If it exists, the preset circuit will be modified. If it does not exist, the preset circuit will not be modified.

7. The circuit reliability processing method as described in claim 1, characterized in that, After determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, the method further includes: Multiple modified circuits are automatically generated based on the target device, and the total expected failure value of each modified circuit is obtained. The multiple total failure expectations are sorted, and one or more target circuits are determined according to the sorting order.

8. A circuit reliability processing device, characterized in that, include: The parameter acquisition module is used to acquire the failure rate of each device in the preset circuit and its corresponding failure coefficient. According to the preset standard failure mode, obtain all failure situations of each device and the failure percentage corresponding to each failure situation; Obtain the circuit connection method of each device in the preset circuit, and determine the multiple target failure conditions of the device during operation based on the circuit connection method; determine the failure coefficient of the device based on the sum of the failure ratios of the multiple target failure conditions corresponding to each device. The processing module is used to determine the target failure status of the device based on the product of the failure rate of each device and its corresponding failure coefficient, to determine the target failure status of the preset circuit based on the sum of the target failure statuses of each device in the preset circuit, and to determine the expected failure value of each device based on the proportion of the target failure status of each device to the target failure status of the preset circuit. The comparison module is used to compare multiple failure expectation values ​​to determine the target device to be modified in the preset circuit.

9. A storage medium having a computer program stored thereon, characterized in that, When the computer program is run on a computer, it causes the computer to perform the circuit reliability processing method as described in any one of claims 1 to 7.

10. An electronic device comprising a processor and a memory, wherein the memory has a computer program, characterized in that, The processor invokes the computer program to execute the circuit reliability processing method as described in any one of claims 1 to 7.

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