Linear image sensor and method of controlling the same
By employing an N-ary tree-like driving circuit to drive the pixel and column quantization control circuits in a linear image sensor, synchronous response of pixel units is achieved, solving the problem of inconsistent response time in traditional linear image sensors and improving image quality and circuit efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SMARTSENS TECH (SHANGHAI) CO LTD
- Filing Date
- 2022-06-17
- Publication Date
- 2026-04-21
AI Technical Summary
In traditional linear image sensors, as the pixel size increases, the control response time of the pixels becomes inconsistent, resulting in differences between the near and far ends of the image. Furthermore, the complexity of the storage and readout circuitry increases, reducing the chip area utilization rate.
An N-ary tree-like driving circuit is used to drive the pixel control circuit and the column quantization control circuit. The pixel units and circuits are arranged hierarchically to realize the transmission of signals from top to bottom, ensuring that all pixel units receive control signals at the same time.
This solves the problem of inconsistent pixel response time, improves image quality, reduces circuit design complexity, and increases chip area utilization and operating speed.
Smart Images

Figure CN117294967B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of image sensor technology, and in particular to a linear image sensor and its control method. Background Technology
[0002] Linear image sensors are widely used in remote sensing, industrial inspection, and other applications. Based on their application characteristics, linear image sensors need to have features such as global shutter speed and high line frequency.
[0003] In the readout circuit layout of traditional linear image sensors, as the line array size continues to increase, for example, when the pixel size is 7µm, the lateral direction of an 8k linear image sensor will be at least 57.344mm. The width of the lateral control signal line inside the pixel is limited, and the ultra-long trace introduces large parasitic resistance and capacitance, which will limit the transmission speed of the control signal. Furthermore, the signal delay between the near end and the far end of the control signal drive circuit is inconsistent, resulting in inconsistent control response times of the pixels at both ends of the linear image sensor, which ultimately manifests as differences between the near end and the far end in the image.
[0004] As pixel size increases further, such as in a 16k linear image sensor, the number of channels in the memory readout circuit will double in order to achieve the same line readout rate. Too many channels in the memory readout circuit will greatly increase the complexity of the circuit design and reduce the utilization rate of the chip area. Summary of the Invention
[0005] In order to overcome the shortcomings and deficiencies of the prior art, the purpose of this invention is to provide a linear image sensor and its control method to solve the problem of inconsistent control response time of pixels at both ends of the image sensor in the prior art.
[0006] The objective of this invention is achieved through the following technical solution:
[0007] The present invention provides a linear image sensor, including at least one image sensing area, the image sensing area including a pixel array area, a pixel control circuit area and a column quantization control module, the column quantization control module including a column quantization control circuit area, the pixel array area having a plurality of pixel units arranged in an array, the pixel control circuit area having a pixel control circuit, the column quantization control circuit area having a column quantization control circuit, and each pixel unit being electrically connected to the pixel control circuit and the column quantization control circuit;
[0008] Both the pixel control circuit area and the pixel array area extend along the row direction and are arranged along the column direction. The pixel control circuit is driven by an N-ary tree-like driving circuit. And / or, both the column quantization control circuit area and the pixel array area extend along the row direction and are arranged along the column direction. The column quantization control circuit is driven by an N-ary tree-like driving circuit.
[0009] The N-ary tree-like driving circuit is divided into M stages in the column direction, and the m-th stage circuit has N... m-1 One main line and N m There are n branch lines, where N > 1, M > 1, M ≥ m ≥ 1, and N, M, and m are all positive integers.
[0010] Furthermore, the pixel units within the pixel array area are arranged in an X-row, Y-column configuration, and the pixel units in the Y-column corresponding to the X-row are divided into N... M Each pixel group has at least one column of pixel units, and each pixel unit in each pixel group is electrically connected to the same branch line of the M-th stage circuit, where Y≥4, X≥1, and X and Y are both positive integers.
[0011] Furthermore, the branch paths corresponding to the pixel units in the same row are interconnected.
[0012] Furthermore, 2≤N≤5, 5≤M≤10.
[0013] Furthermore, the pixel control circuit area, the column quantization control circuit area, and the pixel array area all extend along the row direction and are arranged along the column direction, and the pixel control circuit and the column quantization control circuit are both driven by an N-ary tree-like driving circuit.
[0014] Furthermore, the pixel control circuit area and the column quantization control circuit area are located on opposite sides of the pixel array area in the column direction.
[0015] Furthermore, the column quantization control module also includes a column quantization analog-to-digital conversion circuit area. The column quantization analog-to-digital conversion circuit area and the pixel array area both extend along the row direction and are arranged along the column direction. The column quantization analog-to-digital conversion circuit area is provided with a column quantization analog-to-digital conversion circuit. The column quantization control circuit is electrically connected to the pixel unit through the column quantization analog-to-digital conversion circuit. The column quantization analog-to-digital conversion circuit is used to convert the analog signal output by the pixel unit into a digital signal.
[0016] Furthermore, the column quantization analog-to-digital conversion circuit area includes a column quantization analog circuit area and a column quantization digital circuit area. The column quantization analog circuit area, the column quantization digital circuit area, and the pixel array area all extend along the row direction and are arranged along the column direction. The column quantization analog circuit area is provided with a column quantization analog circuit, and the column quantization digital circuit area is provided with a column quantization digital circuit.
[0017] Furthermore, the column quantization analog circuit area and the column quantization digital circuit area are respectively disposed on the upper and lower sides of the column quantization control circuit area, and are arranged on the side of the pixel array area away from the pixel control circuit area.
[0018] Furthermore, the image sensing area also includes a digital image processing circuit area, which, along with the pixel array area, extends along the row direction and is arranged along the column direction. The digital image processing circuit area is provided with a digital image processing circuit, which is electrically connected to the pixel control circuit and the column quantization control circuit, respectively.
[0019] Furthermore, the image sensing area also includes a storage readout circuit area; the storage readout circuit area is provided with a storage readout circuit, which is connected to the digital image processing circuit and the analog-to-digital conversion circuit respectively.
[0020] Furthermore, the digital image processing circuit area has a notch, and the storage readout circuit area is located at the notch of the digital image processing circuit area; and / or, the digital image processing circuit area is arranged on the side of the column quantization control circuit area away from the pixel array area.
[0021] Furthermore, the image sensing area also includes a data output interface, which, along with the pixel array area, extends along the row direction and is arranged along the column direction. The data output interface is electrically connected to the digital image processing circuit.
[0022] Furthermore, the linear image sensor includes a plurality of image sensing areas, which are arranged along the row direction and aligned in the column direction.
[0023] Furthermore, the image sensor regions are connected using the same mask, which is stitched together during the device fabrication process.
[0024] The present invention also provides a control method for a linear image sensor, wherein the control method is applicable to the linear image sensor described in any of the above-mentioned solutions, and the control method includes:
[0025] Provide a linear image sensor as described in any of the above solutions;
[0026] Drive the pixel control circuit area and the column quantization control circuit area;
[0027] Wherein, the pixel control circuit is driven by an N-ary tree-like driving circuit; and / or, the column quantization control circuit is driven by an N-ary tree-like driving circuit.
[0028] The pixel unit generates corresponding image information based on the control of the corresponding pixel control circuit area and the column quantization control circuit area.
[0029] The beneficial effects of this invention are as follows: by driving the pixel control circuit and / or column quantization control circuit based on an M-level N-ary tree-like driving circuit, the pixel control signal and / or column circuit control signal are transmitted from top to bottom, so that all pixel units receive control signals simultaneously at the M-level branch lines, thus avoiding the inconsistency in the control response time of pixel units at both ends of the linear image sensor, which would lead to differences between the near and far ends of the image. Attached Figure Description
[0030] Figure 1 This is a schematic diagram of the module structure of the linear image sensor in this invention;
[0031] Figure 2 This is a schematic diagram of the circuit layout of the pixel control circuit in this invention;
[0032] Figure 3 This is a schematic diagram of the circuit layout of the quantization control circuit in this invention;
[0033] Figure 4 This is a schematic diagram of the circuit layout of the pixel control circuit in another embodiment of the present invention;
[0034] Figure 5 This is a schematic diagram of the module structure of a linear image sensor in another embodiment of the present invention. Detailed Implementation
[0035] To further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the following detailed description, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation, structure, features, and effects of the linear image sensor proposed according to the present invention:
[0036] Figure 1 This is a schematic diagram of the module structure of the linear image sensor in this invention. Figure 2 This is a schematic diagram of the circuit layout of the pixel control circuit in this invention. Figure 3 This is a schematic diagram of the circuit layout of the quantization control circuit in this invention.
[0037] like Figures 1 to 3 As shown, the present invention provides a linear image sensor including at least one image sensing area 10. In this embodiment, the linear image sensor has one image sensing area 10.
[0038] The image sensing area 10 includes a pixel array area 11, a pixel control circuit area 12, and a column quantization control module. The column quantization control module includes a column quantization control circuit area 13. The pixel array area 11 contains multiple pixel units arranged in an array. The pixel control circuit area 12 contains a pixel control circuit, and the column quantization control circuit area 13 contains a column quantization control circuit. Each pixel unit is electrically connected to both the pixel control circuit and the column quantization control circuit. It should be noted that a pixel unit can represent a photosensitive area unit, which can be composed of a photosensitive element (such as a photodiode PD) and a corresponding pixel circuit. In this embodiment, a photosensitive element and a corresponding pixel circuit are selected. Of course, in other examples, it can also be composed of two or more photosensitive elements shared by corresponding pixel circuits. Furthermore, the pixel control circuit is, for example, an xdec (control signal generation circuit module), used to control the pixel units to generate analog signals. The column quantization control module is, for example, an ADC (analog-to-digital converter module), used to quantize the analog signals output by the pixel units, such as reset signals (Vrst signals) and image signals (Vsig signals), to complete the A / D conversion. For the specific structure of the pixel control circuit and column quantization control circuit, please refer to existing technologies; it will not be elaborated here.
[0039] In this embodiment, the pixel control circuit area 12, the column quantization control circuit area 13, and the pixel array area 11 all extend along the row direction and are arranged along the column direction. Both the pixel control circuit and the column quantization control circuit are driven by the N-ary tree driving circuit 20. Of course, in other embodiments, the pixel control circuit area 12 and the pixel array area 11 may both extend along the row direction and be arranged along the column direction, with the pixel control circuit driven by the N-ary tree driving circuit 20; or, the column quantization control circuit area 13 and the pixel array area 11 may both extend along the row direction and be arranged along the column direction, with the column quantization control circuit driven by the N-ary tree driving circuit 20. Furthermore, it should be noted that the rows and columns described in this invention can be interchanged according to the actual structure; it can be understood that they represent an extension in one direction within a linear image sensor.
[0040] like Figures 2 to 4 As shown, the N-ary tree-like driving circuit 20 is divided into M levels in the column direction, that is, in the column direction (from top to bottom), the N-ary tree-like driving circuit 20 has a first-level circuit, a second-level circuit, ..., an M-level circuit. The m-th level circuit has N... m-1 Main lines 21 and N mThere are N branch lines 22 under each main line 21, that is, each main line 21 has N branch lines 22 in a tree-like structure. Since there are multiple levels from top to bottom, the (m+1)th level main line 21 corresponds one-to-one with the m-th level branch line 22 and is electrically connected; or, it can be said that the (m+1)th level main line 21 is the m-th level branch line 22. Where N > 1, M > 1, M ≥ m ≥ 1, and N, M, and m are all positive integers.
[0041] In this embodiment, the pixel units in the pixel array area 11 are arranged in Y columns, and the Y column pixel units are divided into N... M Each pixel group 111 contains at least one column of pixel units, and all pixel units in each pixel group 111 are electrically connected to the same branch line 22 of the M-th stage circuit, where Y ≥ 4 and Y is a positive integer. Furthermore, the pixel units in the pixel array area 11 are arranged in X rows, where the pixel units in the pixel array area 11 can be in one row or multiple rows.
[0042] In one example, the signal control lines of all column pixel units within each pixel group 111 are connected together, so that all column pixel units within each pixel group 111 simultaneously receive control signals. For example, the control terminals of the transmission transistors (TX) of all column pixel units within each pixel group 111 are connected together. Alternatively, the signal control lines of all column pixel units within the pixel array area 11 can also be connected together, for example, the control terminals of the transmission transistors (TX) of all column pixel units within the pixel array area 11 are connected together. It should be noted that for a column of pixel units, all rows can constitute this pixel group, or several rows can constitute this pixel group, depending on the actual image signal acquisition requirements and the actual circuit structure, to receive the corresponding control signals and perform response operations. Furthermore, in an optional example, the branch lines corresponding to pixel units in the same row are interconnected, allowing the pixel units in that row to share a common line, which is beneficial for signal balance between pixels.
[0043] Furthermore, 5 ≥ N ≥ 2, 10 ≥ M ≥ 5. It can be understood that once the linear image sensor is determined, such as a 2K, 4K, 8K, or 16K image sensor, the total number of columns of pixel units within each pixel array region 11 can be determined. If the values of N and M are larger, the number of pixel groups 111 within the pixel array region 11 is greater, and the number of columns of pixel units within each pixel group 111 is smaller. This helps to reduce the delay in receiving control signals for pixel units in the near and far columns. Of course, the larger the values of N and M are, the larger the area required for the N-ary tree-like driving circuit 20. Therefore, the values of N and M can be set according to actual needs, preferably within the range of 5 ≥ N ≥ 2, 10 ≥ M ≥ 5.
[0044] like Figure 2 and Figure 3 As shown, in the N-ary tree-like driving circuit 20, N=2, and M is preferably 7, i.e., a seven-level binary tree-like driving circuit. For example, if the pixel array area 11 has 4096 columns of pixel units, then after calculation, each pixel group 111 has 32 columns of pixel units, that is, each 32 columns of pixel units share one branch line 22. Figure 4 As shown, in another embodiment, N=3 and M is preferably 7 in the N-tree driving circuit 20, that is, a seven-level three-tree driving circuit. For example, if there are 4374 columns of pixel units in the pixel array area 11, then after calculation, each group of pixel units 111 has 2 columns of pixel units, that is, every two columns of pixel units share a branch line 22, thereby further reducing the delay of the control signal.
[0045] In this embodiment, the pixel control circuit area 12 and the column quantization control circuit area 13 are located on both sides of the pixel array area 11 in the column direction, that is, the pixel control circuit area 12 and the column quantization control circuit area 13 are located on the upper and lower sides of the pixel array area 11, which facilitates the design of the pixel control circuit and the column quantization control circuit.
[0046] In this embodiment, the column quantization control module further includes a column quantization analog-to-digital conversion circuit area 14. Both the column quantization analog-to-digital conversion circuit area 14 and the pixel array area 11 extend along the row direction and are arranged along the column direction. The column quantization analog-to-digital conversion circuit area 14 contains a column quantization analog-to-digital conversion circuit. The column quantization control circuit is electrically connected to the pixel unit through the column quantization analog-to-digital conversion circuit. The column quantization analog-to-digital conversion circuit is used to convert the analog signal output by the pixel unit into a digital signal.
[0047] Furthermore, the column quantization analog-to-digital conversion circuit area 14 includes a column quantization analog circuit area 141 and a column quantization digital circuit area 142. The column quantization analog circuit area 141, the column quantization digital circuit area 142, and the pixel array area 11 all extend along the row direction and are arranged along the column direction. The column quantization analog circuit area 141 contains a column quantization analog circuit used to receive the analog signal output from the pixel array area 11. The column quantization digital circuit area 142 contains a column quantization digital circuit used to convert the analog signal into a digital signal. The circuits in the column quantization analog circuit area 141 and the column quantization digital circuit area 142 can together constitute the quantization circuit for image sensor signals in the prior art. For example, the signal in the analog domain of the column quantization analog circuit area 141 includes a comparator, and the signal in the digital domain of the column quantization digital circuit area 142 includes a counter; the specific design can be based on the actual circuit design.
[0048] In this embodiment, the column quantization analog circuit area 141 and the column quantization digital circuit area 142 are respectively disposed on the upper and lower sides of the column quantization control circuit area 13, and are arranged on the side of the pixel array area 11 away from the pixel control circuit area 12, thereby facilitating the design of the column quantization analog circuit, the column quantization digital circuit and the column quantization control circuit.
[0049] In this embodiment, the image sensing area 10 further includes a digital image processing circuit area 15. Both the digital image processing circuit area 15 and the pixel array area 11 extend along the row direction and are arranged along the column direction. The digital image processing circuit area 15 is equipped with digital image processing circuits (such as ISP and DSP). The digital image processing circuits are electrically connected to the pixel control circuit and the column quantization control circuit, respectively. The digital image processing circuits generate various timing signals required for chip operation, such as pixel control signals and column circuit control signals. The pixel control signals are transmitted to the pixel control circuit and control the pixel control circuit. The column circuit control signals are transmitted to the column quantization control circuit and control the column quantization control circuit.
[0050] Furthermore, the image sensing area 10 also includes a storage readout circuit area 16; the storage readout circuit area 16 is equipped with a storage readout circuit, which is connected to both the digital image processing circuit and the analog-to-digital conversion circuit. The storage readout circuit area 16 can utilize existing memory. In one example, the storage readout circuit can read out the data stored in the quantization circuit column by column.
[0051] Furthermore, the image sensing area 10 also includes a data output interface 17. The data output interface 17 and the pixel array area 11 both extend along the row direction and are arranged along the column direction. The data output interface 17 is electrically connected to the digital image processing circuit. The data output interface 17 can be an existing input / output interface.
[0052] Among them, the column quantization analog-to-digital conversion circuit (column quantization analog circuit, column quantization digital circuit) quantizes the signal collected by the pixel array and temporarily stores it in the column quantization digital circuit of the conversion circuit. The storage readout circuit reads out the data stored in the column quantization digital circuit column by column, and transmits the read data to the digital image processing circuit for data processing. Finally, the processed data is transmitted out through the data output interface 17.
[0053] In this embodiment, the digital image processing circuit area 15 has a notch 151, and the storage readout circuit area 16 is located at the notch 151 of the digital image processing circuit area 15, thereby increasing the utilization rate of the image sensing area 10. Of course, in other examples, the storage readout circuit area 16 and the digital image processing circuit area 15 can be arranged side by side, and can be adjusted according to actual needs. Preferably, the digital image processing circuit area 15 is arranged on the side of the column quantization control circuit area 13 away from the pixel array area 11, thereby facilitating the design of the digital image processing circuit and the column quantization digital circuit.
[0054] like Figure 5 As shown, in another embodiment, the linear image sensor includes multiple image sensing areas 10, which are arranged along the row direction and aligned in the column direction. In one embodiment, each image sensor area is stitched together using the same mask during the device fabrication process. For example, during the fabrication of a chip on a wafer, the chip is divided into different image sensor areas, each with the same circuit layout, and fabrication is completed using the same mask. This stitching can be performed during the fabrication process based on the movement of the wafer fabrication equipment. Alternatively, during material fabrication, corresponding marks can be developed by exposing and developing an OVL BOX pattern on a material layer (such as a photoresist mask layer) based on the mask during the material fabrication process. Precise stitching is then achieved by measuring the marks corresponding to the OVL BOX. In an optional example, if stitching is successful, subsequent process steps are directly performed. If the measurement shows that stitching is unsuccessful, the photoresist mask layer (such as a photoresist layer) can be removed, and exposure can be repeated. Subsequent etching steps are then performed only after successful stitching is detected, thus eliminating unnecessary steps and enabling stitching detection based on the photoresist layer. Of course, in other examples, alignment marks can also be fabricated at the positions corresponding to the dicing paths, and detection can be performed based on the alignment marks at these positions. Marks located on the dicing paths do not affect device fabrication. In one example, after exposure of all the chip regions on the semiconductor substrate is completed, the etch mask layer is developed. That is, after the entire wafer has been exposed, the wafer will be developed, and after development, the wafer will be transferred to an OVL metrology system for measurement. In further examples, the measurement of other alignment marks involved in other prior art can also be performed simultaneously.
[0055] For example, a linear image sensor includes three image sensing areas 10 arranged along the row direction and aligned in the column direction. By stitching together multiple image sensing areas 10, the linear image sensor can be made larger. For instance, in an 8k or 12k linear array using a single-sided lateral drive control circuit, the signal traces suffer from greater delays at the left and right ends compared to a 4k linear array due to parasitic capacitance and resistance, resulting in slower rise and fall times. This limits the circuit's operating speed and makes the difference between the left and right sides more pronounced. Arranging multiple image sensing areas 10 along the row direction eliminates the impact of longer traces; furthermore, using multiple sets of storage and readout circuits halves the number of readout data channels for the same readout speed, reducing the design complexity of column quantization digital circuits and improving layout utilization efficiency. Preferably, the pixel array area 11, pixel control circuit area 12, column quantization control circuit area 13, column quantization analog circuit area 141, column quantization digital circuit area 142, digital image processing circuit area 15, and data output interface 17 all extend along the row direction and are arranged along the column direction, thereby splicing multiple image sensing areas 10 along the row direction and reducing the splicing difficulty.
[0056] In addition, the present invention also provides a control method for a linear image sensor, the control method being applicable to any of the linear image sensors described above, the control method comprising: providing a linear image sensor as described in any of the above schemes; driving the pixel control circuit area and the column quantization control circuit area; wherein the pixel control circuit is driven based on an N-ary tree driving circuit; and / or, the column quantization control circuit is driven based on an N-ary tree driving circuit; and the pixel unit generating corresponding image information based on the control of the corresponding pixel control circuit area and the column quantization control circuit area.
[0057] Specifically, based on this control method, the readout of a linear sensor can be achieved. Of course, existing linear image sensor control methods can be used to control the linear image sensor in this embodiment based on actual needs, thereby acquiring the corresponding information. In this scheme, the circuits originally distributed on the left and right sides of the pixel and column quantization circuits are transformed into the top and bottom sides, making the overall system easily scalable; a clock tree is used to control the pixel and column circuits, solving the left-right difference caused by control signal delay and improving the operating speed of the quantization circuit. The circuits originally distributed on the left and right sides of the pixel and column quantization circuits are transformed into the top and bottom sides, where the pixel control signal and column circuit control signal can be in the form of a clock tree. The control signal generated by the digital image processing module is driven by a binary tree, which helps to ensure that the distance from each last-level signal to the signal source is the same. This effectively solves the left-right difference in the image caused by the control signal, maintains the symmetry of the binary tree, and improves the change speed of the control signal inversion edge, further improving the overall operating speed of the circuit, thereby increasing the line frequency. By employing multiple sets of storage and readout circuits, the number of readout data channels can be halved while maintaining the same readout speed. This reduces the design complexity of the digital components in the column quantization digital-to-analog converter circuit, improves the utilization efficiency of the layout, solves the problems existing in traditional linear image sensors, and enhances the performance of image sensors.
[0058] In this document, the directional terms such as up, down, left, right, front, and back are defined according to the position of the structures in the accompanying drawings and the relative positions of the structures, and are only used for clarity and convenience in expressing the technical solution. It should be understood that the use of these directional terms should not limit the scope of protection claimed in this application. It should also be understood that the terms "first" and "second," etc., used herein are only used for distinction in name and are not used to limit the number or order.
[0059] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content without departing from the scope of the technical solution of the present invention, which are equivalent embodiments with equivalent changes. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the technical solution of the present invention shall still fall within the protection scope of the technical solution of the present invention.
Claims
1. A linear image sensor, characterized in that, The system includes at least one image sensing area, which comprises a pixel array area, a pixel control circuit area, and a column quantization control module. The column quantization control module includes a column quantization control circuit area and a column quantization analog-to-digital converter (ADC) circuit area. The pixel array area contains multiple pixel units arranged in an array. The pixel control circuit area contains a pixel control circuit, and the column quantization control circuit area contains a column quantization control circuit. Each pixel unit is electrically connected to both the pixel control circuit and the column quantization control circuit. The pixel control circuit includes a control signal generation circuit for controlling the pixel units to generate analog signals. The column quantization ADC circuit area contains a column quantization ADC circuit, and the column quantization control circuit is electrically connected to the pixel units through the column quantization ADC circuit. The column quantization ADC circuit converts the analog signals output by the pixel units into digital signals. The image sensing area also includes a digital image processing circuit area, a storage and readout circuit area, and a data output interface. The digital image processing circuit area and the data output interface both extend along the row direction and are arranged along the column direction. The pixel control circuit area, the column quantization control circuit area, and the pixel array area both extend along the row direction and are arranged along the column direction. The pixel control circuit is driven by an N-ary tree-like driving circuit. And / or, the column quantization control circuit is driven based on an N-ary tree-like driving circuit; When the linear image sensor includes multiple image sensing areas, the multiple image sensing areas are arranged along the row direction and aligned in the column direction; the circuit layout of each different image sensing area is set to be the same, and the pixel array area, the pixel control circuit area, the column quantization control circuit area, the column quantization analog-to-digital conversion circuit area, the digital image processing circuit area and the data output interface all extend along the row direction and are arranged along the column direction, and the multiple image sensing areas are spliced together along the row direction; The N-ary tree-like driving circuit is divided into M stages in the column direction, and the m-th stage circuit has N... m-1 One main line and N m There are n branch lines, where N > 1, M > 1, M ≥ m ≥ 1, and N, M, and m are all positive integers.
2. The linear image sensor according to claim 1, characterized in that, The pixel units within the pixel array area are arranged in X rows and Y columns, and the pixel units in the Y columns corresponding to the X rows are divided into N... M Each pixel group has at least one column of pixel units, and each pixel unit in each pixel group is electrically connected to the same branch line of the M-th stage circuit, where Y≥4, X≥1, and X and Y are both positive integers.
3. The linear image sensor according to claim 2, characterized in that, The branch lines corresponding to the pixel units in the same row are interconnected.
4. The linear image sensor according to claim 1, characterized in that, 2≤N≤5, 5≤M≤10.
5. The linear image sensor according to claim 1, characterized in that, The pixel control circuit area and the column quantization control circuit area are located on both sides of the pixel array area in the column direction.
6. The linear image sensor according to claim 1, characterized in that, The column quantization analog-to-digital conversion circuit area includes a column quantization analog circuit area and a column quantization digital circuit area. The column quantization analog circuit area, the column quantization digital circuit area, and the pixel array area all extend along the row direction and are arranged along the column direction. The column quantization analog circuit area is provided with a column quantization analog circuit, and the column quantization digital circuit area is provided with a column quantization digital circuit.
7. The linear image sensor according to claim 6, characterized in that, The column quantization analog circuit area and the column quantization digital circuit area are respectively located on both sides of the column quantization control circuit area along the column direction, and are arranged on the side of the pixel array area away from the pixel control circuit area.
8. The linear image sensor according to claim 1, characterized in that, The digital image processing circuit area is equipped with a digital image processing circuit, which is electrically connected to the pixel control circuit and the column quantization control circuit respectively.
9. The linear image sensor according to claim 8, characterized in that, The storage readout circuit area is provided with a storage readout circuit, which is electrically connected to the digital image processing circuit and the column quantization analog-to-digital conversion circuit respectively.
10. The linear image sensor according to claim 9, characterized in that, The digital image processing circuit area has a notch, and the storage readout circuit area is located at the notch of the digital image processing circuit area; and / or, the digital image processing circuit area is arranged on the side of the column quantization control circuit area away from the pixel array area.
11. The linear image sensor according to claim 9, characterized in that, The data output interface is electrically connected to the digital image processing circuit.
12. The linear image sensor according to claim 11, characterized in that, Each of the image sensing areas is achieved by stitching together the same mask during the device fabrication process.
13. A control method for a linear image sensor, characterized in that, The control method includes: Provide a linear image sensor as described in any one of claims 1-12; Drive the pixel control circuit area and the column quantization control circuit area; Wherein, the pixel control circuit is driven by an N-ary tree-like driving circuit; and / or, the column quantization control circuit is driven by an N-ary tree-like driving circuit. The pixel unit generates corresponding image information based on the control of the corresponding pixel control circuit area and the column quantization control circuit area.
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