Sot-mram device and method of manufacturing the same

Abstract

The application provides an SOT-MRAM device, comprising: a bottom electrode; a magnetic tunnel junction on the bottom electrode, comprising, from bottom to top, a reference layer, a barrier layer, and a free layer; an insulator conductor layer on the magnetic tunnel junction; a conductive layer surrounding the insulator conductor layer; and a spin-orbit torque effect layer on the insulator conductor layer, wherein the insulator conductor layer is used to conduct the spin current generated by the spin-orbit torque effect layer flowing through the write current to the magnetic tunnel junction when writing the magnetic tunnel junction; and the conductive layer is used to provide a flow path for the read current when reading the magnetic tunnel junction.

Description

Technical Field

[0001] This invention relates to the field of magnetic memory technology, and in particular to a SOT-MRAM device and its manufacturing method. Background Technology

[0002] SOT-MRAM (Spin-Orbit Torque Magnetic Random Access Memory), as a next-generation non-volatile magnetic random access memory, requires careful optimization of its fabrication process, with device yield being a key performance indicator. In current fabrication processes, MTJs (Multi-Torque Magnetoresistive Random Access Memory) utilize a top-pinned (TP) structure, consisting of a free layer, a barrier layer, and a reference layer from bottom to top, with the spin-orbit torque effect layer located below the free layer. This structure demands high precision in etching, requiring accurate control of the etching process's stopping point to minimize the impact of etching damage on the spin-orbit torque effect layer. Furthermore, the thickness of both the spin-orbit torque effect layer and its overlying functional layers is less than 10 nanometers, resulting in a very narrow process window. Summary of the Invention

[0003] To address the above problems, this invention provides an SOT-MRAM device and its manufacturing method, which can improve the manufacturing process and enhance device characteristics.

[0004] On one hand, the present invention provides a SOT-MRAM device, comprising:

[0005] Bottom electrode;

[0006] A magnetic tunnel junction located on the bottom electrode, the magnetic tunnel junction comprising a reference layer, a barrier layer and a free layer stacked from bottom to top;

[0007] An insulating conductive layer located on the magnetic tunnel junction;

[0008] A conductive layer surrounding the insulating conductive layer; and,

[0009] The spin-orbit moment effect layer located on the insulating conductive layer,

[0010] The insulating conductive layer is used to conduct the spin current generated by the write current flowing through the spin orbit moment effect layer to the magnetic tunnel junction during the write operation of the magnetic tunnel junction;

[0011] The conductive layer provides a path for the reading current during the reading operation of the magnetic tunnel junction.

[0012] Optionally, the material of the insulating conductive layer is nickel oxide.

[0013] Optionally, the conductive layer is made of tantalum, molybdenum, or tungsten.

[0014] Optionally, it also includes:

[0015] A dielectric protective layer surrounds the magnetic tunnel junction and the conductive layer, and extends horizontally on the surface of the bottom electrode.

[0016] On the other hand, the present invention provides a SOT-MRAM device, comprising:

[0017] Bottom electrode;

[0018] A magnetic tunnel junction located on the bottom electrode, the magnetic tunnel junction comprising a reference layer, a barrier layer and a free layer stacked from bottom to top;

[0019] The metallic conductive layer located on the magnetic tunnel junction;

[0020] The spin-orbit moment effect layer located on the metal conductive layer,

[0021] The metal conductive layer is used to conduct the spin current generated by the write current flowing through the spin orbital moment effect layer to the magnetic tunnel junction during the write operation of the magnetic tunnel junction, and also to provide a path for the read current during the read operation of the magnetic tunnel junction.

[0022] Optionally, the material of the metal conductive layer is titanium.

[0023] Optionally, it also includes:

[0024] A dielectric protective layer surrounds the magnetic tunnel junction and the metallic conductive layer, and extends horizontally on the surface of the bottom electrode.

[0025] Optionally, it also includes:

[0026] A bottom interconnect structure formed on a substrate, wherein the bottom interconnect structure is connected to the bottom electrode;

[0027] A top interconnect structure is formed on the spin-orbit moment effect layer, and the top interconnect structure is connected to the spin-orbit moment effect layer.

[0028] On the other hand, the present invention provides a method for manufacturing an SOT-MRAM device, comprising:

[0029] A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode;

[0030] A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film.

[0031] The hard mask layer is formed by photolithography and etching.

[0032] Using the hard mask layer as a mask, the insulating conductive layer film is etched to form the insulating conductive layer;

[0033] A conductive thin film is deposited across the entire surface;

[0034] Using the hard mask layer and the conductive layer film on its sidewalls as a mask, the magnetic tunnel junction stacked film and the conductive layer film on the surface are etched to form a magnetic tunnel junction. At the same time, a portion of the conductive layer film is retained on the sidewalls of the hard mask layer and the insulating conductive layer, and this portion of the conductive layer film is used to form a conductive layer.

[0035] Deposition medium protective layer;

[0036] Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed;

[0037] Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer;

[0038] Form a top interconnect structure.

[0039] On the other hand, the present invention provides a method for manufacturing an SOT-MRAM device, comprising:

[0040] A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode;

[0041] A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film.

[0042] The hard mask layer is formed by photolithography and etching.

[0043] Using the hard mask layer as a mask, the insulating conductive layer film is etched to form an insulating conductive layer. The metal byproducts generated during the etching process are left on the sidewalls of the hard mask layer and the insulating conductive layer to form a conductive layer.

[0044] First deposition medium protective layer;

[0045] Using the metal byproducts of the hard mask layer and its sidewalls as a mask, the magnetic tunnel junction stacked thin film and the dielectric protective layer on the surface are etched. After etching, a magnetic tunnel junction is formed, while the metal byproducts of the hard mask layer and the sidewalls of the insulator conductive layer remain intact.

[0046] Second deposition medium protective layer;

[0047] Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed;

[0048] Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer;

[0049] Form a top interconnect structure.

[0050] On the other hand, the present invention provides a method for manufacturing an SOT-MRAM device, comprising:

[0051] A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode;

[0052] A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film.

[0053] The hard mask layer is formed by photolithography and etching.

[0054] Using the hard mask layer as a mask, the insulating conductive layer film is etched to form the insulating conductive layer;

[0055] Continue etching the magnetic tunnel junction stacked thin film to form a magnetic tunnel junction after etching.

[0056] The outermost material of the insulating conductive layer is reduced to a metal layer using hydrogen reduction, and this metal layer is used to form a conductive layer.

[0057] Deposition medium protective layer;

[0058] Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed;

[0059] Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer;

[0060] Form a top interconnect structure.

[0061] Optionally, the material of the insulating conductive layer is nickel oxide.

[0062] On the other hand, the present invention provides a method for manufacturing an SOT-MRAM device, comprising:

[0063] A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode;

[0064] A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of a metal conductive layer film and a hard mask layer film.

[0065] The hard mask layer is formed by photolithography and etching.

[0066] Using the hard mask layer as a mask, the metal conductive layer thin film is etched to form the metal conductive layer;

[0067] Continue etching the magnetic tunnel junction stacked thin film to form a magnetic tunnel junction after etching.

[0068] Deposition medium protective layer;

[0069] Fill the interlayer medium and planarize it, then completely remove the hard mask layer until the surface of the metal conductive layer is exposed;

[0070] Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer;

[0071] Form a top interconnect structure.

[0072] Optionally, the material of the metal conductive layer is titanium.

[0073] The SOT-MRAM device and its manufacturing method provided by this invention employ a bottom-pinned (BP) magnetic tunnel junction (MTJ). The spin-orbit moment effect (MTJ) layer is positioned on top of the MTJ. An insulator and a conductive layer are placed between the MTJ and the MTJ. The insulator conduction layer conducts the spin current generated when write current flows through the MTJ to the MTJ, enabling MTJ write operations. The conductive layer forms the path for read current, enabling MTJ read operations. Alternatively, a metal conductor is placed between the MTJ and the MTJ. The metal conductor conducts the spin current generated when write current flows through the MTJ to the MTJ, enabling MTJ write operations. The metal conductor provides the path for read current, enabling MTJ read operations. Compared to existing technologies, this invention avoids damage to the MTJ during the etching process to form the MTJ, providing a larger process window and improving the manufacturing process. Meanwhile, the magnetic tunnel junction adopts a bottom-pinned (BP) structure, which has better electrical, magnetic and annealing stability than the existing top-pinned (TP) MTJ structure. Attached Figure Description

[0074] Figure 1 This is a schematic diagram of the structure of an SOT-MRAM device according to an embodiment of the present invention;

[0075] Figure 2 This is a schematic diagram of the structure of an SOT-MRAM device according to another embodiment of the present invention;

[0076] Figures 3A to 3H This is a schematic diagram of the manufacturing process of an SOT-MRAM device according to an embodiment of the present invention;

[0077] Figures 4A to 4H This is a schematic diagram of the manufacturing process of an SOT-MRAM device according to an embodiment of the present invention;

[0078] Figures 5A to 5H This is a schematic diagram of the manufacturing process of an SOT-MRAM device according to an embodiment of the present invention;

[0079] Figures 6A to 6G This is a schematic diagram of the manufacturing process of an SOT-MRAM device according to an embodiment of the present invention. Detailed Implementation

[0080] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and not intended to limit the scope of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention. Furthermore, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily obscuring the concepts of this disclosure.

[0081] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0082] In the context of this disclosure, when a layer / element is referred to as being "above" another layer / element, the layer / element may be directly above the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "above" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0083] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0084] One embodiment of the present invention provides a SOT-MRAM device, such as... Figure 1 As shown, the SOT-MRAM device includes:

[0085] The bottom electrode 1003 is formed on the substrate 100;

[0086] The magnetic tunnel junction 101 is located on the bottom electrode 1003. The magnetic tunnel junction 101 adopts a bottom pinning structure, which includes a reference layer, a barrier layer and a free layer stacked from bottom to top.

[0087] An insulating conductive layer 102 is located on the magnetic tunnel junction 101;

[0088] The conductive layer 104 surrounding the insulating conductive layer 102; and,

[0089] The spin-orbit moment effect layer 107 is located on the insulator conductive layer 102.

[0090] The insulating conductive layer 102 is used to conduct the spin current generated by the write current flowing through the spin orbit moment effect layer 107 to the magnetic tunnel junction during the write operation of the magnetic tunnel junction.

[0091] The conductive layer 104 provides a path for the read current during the read operation of the magnetic tunnel junction.

[0092] In one embodiment, the insulating conductive layer 102 can be made of nickel oxide. The conductive layer 104 can be made of tantalum, molybdenum, or tungsten.

[0093] Furthermore, Figure 1 The structure shown also includes a dielectric protective layer 105 surrounding the periphery of the magnetic tunnel junction 101 and the conductive layer 102, and extending horizontally on the surface of the bottom electrode.

[0094] A bottom interconnect structure is formed on the substrate 100. This can be a bottom via (BV) 1002 or a metal layer. When a bottom via is used, the size of the bottom via 1002 is smaller than the size of the bottom electrode. The bottom interconnect structure is connected to the bottom electrode 1003.

[0095] A top interconnect structure is formed above the spin-orbit moment effect layer 107. This structure can be a top via (TV) 109, which requires two top vias. The top interconnect structure is connected to the spin-orbit moment effect layer 107.

[0096] It should also be noted that the bottom interconnect structure, the top interconnect structure, and the dielectric protective layer are surrounded by interlayer dielectric.

[0097] This invention provides a SOT-MRAM device with a bottom-pinned (BP) magnetic tunnel junction (MTJ). The spin-orbit moment effect (TOF) layer is positioned on top of the MTJ. An insulating conductive layer conducts the spin current generated when write current flows through the TOF layer to the MTJ, enabling MTJ write operations. A conductive layer forms the path for read current, enabling MTJ read operations. This structure eliminates concerns about damaging the TOF layer during etch formation of the MTJ, providing a larger process window. Furthermore, the bottom-pinned (BP) structure offers superior electrical, magnetic, and annealing stability compared to existing top-pinned (TP) MTJ structures.

[0098] On the other hand, another embodiment of the present invention provides an SOT-MRAM device, such as Figure 2 As shown, the SOT-MRAM device includes:

[0099] The bottom electrode 2003 is formed on the substrate 200;

[0100] The magnetic tunnel junction 201 is located on the bottom electrode 2003. The magnetic tunnel junction 201 adopts a bottom pinning structure, which includes a reference layer, a barrier layer and a free layer stacked from bottom to top.

[0101] Metal conductive layer 202 located on magnetic tunnel junction 201;

[0102] The spin-orbit moment effect layer 207 is located on the metallic conductive layer 202.

[0103] The metal conductive layer 202 is used to conduct the spin current generated by the write current flowing through the spin orbital moment effect layer to the magnetic tunnel junction during the write operation of the magnetic tunnel junction, and also to provide a path for the read current during the read operation of the magnetic tunnel junction.

[0104] As one implementation, the metal conductive layer 202 can be made of titanium.

[0105] Furthermore, Figure 2 The structure shown also includes a dielectric protective layer 205 surrounding the magnetic tunnel junction 201 and the metal conductive layer 202, and extending horizontally on the surface of the bottom electrode.

[0106] A bottom interconnect structure is formed on the substrate 200. This can be a bottom via (BV) 2002 or a metal layer. When a bottom via is used, the size of the bottom via 2002 is smaller than the size of the bottom electrode. The bottom interconnect structure is connected to the bottom electrode 2003.

[0107] A top interconnect structure is formed above the spin-orbit moment effect layer 207. This structure can be a top via (TV) 209, which requires two top vias. The top interconnect structure is connected to the spin-orbit moment effect layer 207.

[0108] It should also be noted that the bottom interconnect structure, the top interconnect structure, and the dielectric protective layer are surrounded by interlayer dielectric.

[0109] This invention provides a SOT-MRAM device with a bottom-pinned (BP) magnetic tunnel junction (MTJ). The spin-orbit moment effect (TOF) layer is positioned on top of the MTJ. A metal conductive layer connects the MTJ and the TOF layer, conducting the spin current generated when write current flows through the TOF layer to the MTJ for MTJ write operations. The metal conductive layer also provides a path for read current, enabling MTJ read operations. This structure eliminates concerns about damaging the TOF layer during etch formation of the MTJ, offering a larger process window. Furthermore, the bottom-pinned (BP) structure provides superior electrical, magnetic, and annealing stability compared to existing top-pinned (TP) MTJ structures.

[0110] On the other hand, embodiments of the present invention provide a method for manufacturing an SOT-MRAM device. Figures 3A to 3H The process flow of this manufacturing method is shown, specifically including:

[0111] like Figure 3A As shown, a substrate 300 is provided, including a bottom interconnect structure 3002 and a bottom electrode 3003 formed on an interlayer dielectric 3001. In this embodiment, the bottom interconnect structure 3002 is a bottom via, and the size of the bottom via is smaller than the size of the bottom electrode 3003. A magnetic tunnel junction stacked thin film 301a is first deposited on the substrate 300. Because a bottom pinning structure is to be formed, a multilayer thin film including a reference layer, a barrier layer, and a free layer is deposited sequentially from bottom to top. Then, an insulator conductive layer thin film 302a and a hard mask layer thin film 303a are deposited. The insulator conductive layer thin film 302a can be made of nickel oxide (NiO) and its thickness can be 10-25 nanometers.

[0112] like Figure 3B As shown, the hard mask layer 303a is photolithographically etched and etched to form the hard mask layer 303.

[0113] like Figure 3C As shown, using a hard mask layer 303 as a mask, the insulating conductive layer thin film 302a is etched to form the insulating conductive layer 302. The specific etching method can be ion beam etching or reactive ion etching. Metal byproducts are generated during the etching process; the amount of metal byproducts can be controlled by adjusting the etching menu. The metal byproducts are removed after etching is complete.

[0114] like Figure 3D As shown, a conductive thin film 304a is deposited on the entire surface, covering the magnetic tunnel junction thin film 301a, the insulating conductive layer 302, the sidewalls of the hard mask layer 303, and the surface of the hard mask layer 303. Specifically, the conductive thin film 304a can be tantalum, molybdenum, or tungsten, and its thickness can be 5-10 nanometers.

[0115] like Figure 3E As shown, using the hard mask layer 303 and the conductive layer film on its sidewalls as a mask, the magnetic tunnel junction stacked film 301a and the conductive layer film 304a on the surface are etched. The specific etching method can be ion beam etching. After etching, the magnetic tunnel junction 301 is formed. Simultaneously, the remaining hard mask layer 303 and the insulating conductive layer 302 still retain a portion of the conductive layer film deposited in the previous process on their sidewalls. This portion of the conductive layer film is used to form the conductive layer 304, which contacts the upper surface of the magnetic tunnel junction 301. It should be noted that the magnetic tunnel junction can be etched into a cylindrical shape; naturally, the hard mask layer 303 and the insulating conductive layer 302 in the previous process are also cylindrical. After etching to form the magnetic tunnel junction 301, a protective dielectric layer, such as silicon nitride, is deposited.

[0116] like Figure 3F As shown, the interlayer dielectric 306 can be silicon dioxide or silicon oxynitride. Then, planarization is performed to completely remove the hard mask layer 303 until the surface of the insulating conductive layer 302 is exposed.

[0117] like Figure 3G As shown, a spin-orbit moment effect layer thin film is deposited. The material can be tungsten, tantalum, topological insulator, or multilayer films and alloys thereof. The spin-orbit moment effect layer 307 is formed by photolithography / etching, and then etched down to the dielectric protective layer 305a deposited after MTJ etching to form the dielectric protective layer 305.

[0118] like Figure 3H As shown, a top interconnect structure is formed. Specifically, an interlayer dielectric 308 is filled, and then a top via 309 is formed by photolithography / etching and filled with metal.

[0119] On the other hand, embodiments of the present invention provide a method for manufacturing an SOT-MRAM device. Figures 4A to 4H The process flow of this manufacturing method is shown, specifically including:

[0120] like Figure 4AAs shown, a substrate 400 is provided, including a bottom interconnect structure 4002 and a bottom electrode 4003 formed on an interlayer dielectric 4001. In this embodiment, the bottom interconnect structure 4002 is a bottom via, and the size of the bottom via is smaller than the size of the bottom electrode 4003. A magnetic tunnel junction stacked thin film 401a is first deposited on the substrate 400. Because a bottom pinning structure is to be formed, a multilayer thin film including a reference layer, a barrier layer, and a free layer is deposited sequentially from bottom to top. Then, an insulator conductive layer thin film 402a and a hard mask layer thin film 403a are deposited. The insulator conductive layer thin film 402a can be made of nickel oxide (NiO) and its thickness can be 10-25 nanometers.

[0121] like Figure 4B As shown, the hard mask layer thin film 403a is photolithographically etched and etched to form the hard mask layer 403.

[0122] like Figure 4C As shown, using a hard mask layer 403 as a mask, an insulating conductive layer thin film 402a is etched to form an insulating conductive layer 402. The specific etching method can be ion beam etching or reactive ion etching. Metal byproducts are generated during the etching process, and the amount of these byproducts can be controlled by adjusting the etching menu. In this embodiment, the metal byproducts 404 generated during the etching process are left on the sidewalls of the hard mask layer 403 and the insulating conductive layer 402, and subsequently used as a conductive layer.

[0123] like Figure 4D As shown, the first deposited dielectric protective layer 405a covers the metal byproducts on the sidewalls, preventing them from being destroyed during subsequent etching to form a magnetic tunnel junction. The dielectric protective layer material can be silicon nitride.

[0124] like Figure 4E As shown, using the hard mask layer 403 and the metal byproducts on its sidewalls as a mask, the magnetic tunnel junction stacked thin film 401a and the surface dielectric protective layer 405a are etched, forming the magnetic tunnel junction 401. Simultaneously, the metal byproducts 404 on the sidewalls of the hard mask layer and the insulating conductive layer remain intact. These metal byproducts 404 are in contact with the upper surface of the magnetic tunnel junction 401. It should be noted that the magnetic tunnel junction can be etched into a cylindrical shape; naturally, the hard mask layer 403 and the insulating conductive layer 402 in the preceding process are also cylindrical. After etching to form the magnetic tunnel junction 401, a second dielectric protective layer 405b, such as silicon nitride, is deposited.

[0125] like Figure 4F As shown, the interlayer dielectric 406 can be silicon dioxide or silicon oxynitride. Then, planarization is performed to completely remove the hard mask layer 403 until the surface of the insulating conductive layer 402 is exposed.

[0126] like Figure 4GAs shown, a spin-orbit moment effect layer thin film is deposited. The material can be tungsten, tantalum, topological insulator, or multilayer films and alloys thereof. The spin-orbit moment effect layer 407 is formed by photolithography / etching, and then etched down to the dielectric protective layer 405b deposited after MTJ etching to form the dielectric protective layer 405.

[0127] like Figure 4H As shown, a top interconnect structure is formed. Specifically, interlayer dielectric 408 is filled, and then top vias 409 are photolithographically / etched and filled with metal.

[0128] On the other hand, embodiments of the present invention provide a method for manufacturing an SOT-MRAM device. Figures 5A to 5H The process flow of this manufacturing method is shown, specifically including:

[0129] like Figure 5A As shown, a substrate 500 is provided, including a bottom interconnect structure 5002 and a bottom electrode 5003 formed on an interlayer dielectric 5001. In this embodiment, the bottom interconnect structure 5002 is a bottom via, and the size of the bottom via is smaller than the size of the bottom electrode 5003. A magnetic tunnel junction stacked thin film 501a is first deposited on the substrate 500. Because a bottom pinning structure is to be formed, a multilayer thin film consisting of a reference layer, a barrier layer, and a free layer is deposited sequentially from bottom to top. Then, an insulating conductive layer thin film 502a and a hard mask layer thin film 503a are deposited. The insulating conductive layer thin film 502a can be made of nickel oxide (NiO), and its thickness can be 10-25 nanometers.

[0130] like Figure 5B As shown, the hard mask layer 503a is photolithographically etched and etched to form the hard mask layer 503.

[0131] like Figure 5C As shown, using the hard mask layer 503 as a mask, the insulating conductive layer thin film 502a is etched to form the insulating conductive layer 502. The magnetic tunnel junction stacked thin film 501a is then etched downwards, with appropriate over-etching to the bottom electrode to form the magnetic tunnel junction 501. The specific etching method can be ion beam etching or reactive ion etching. Metal byproducts are generated during the etching process; the amount of metal byproducts can be controlled by adjusting the etching menu. The metal byproducts are removed after etching. It should be noted that the magnetic tunnel junction 501 can be etched into a cylindrical shape; naturally, the hard mask layer 503 and the insulating conductive layer 502 are also cylindrical.

[0132] like Figure 5D As shown, the outermost material of the insulating conductive layer 502 is reduced to a metal layer by hydrogen reduction, and this metal layer is used to form the conductive layer 504.

[0133] like Figure 5E As shown, the deposited medium protective layer 505a is, for example, silicon nitride.

[0134] like Figure 5F As shown, the interlayer dielectric 506 can be silicon dioxide or silicon oxynitride. Then, planarization is performed to completely remove the hard mask layer 503 until the surface of the insulating conductive layer 502 is exposed.

[0135] like Figure 5G As shown, a spin-orbit moment effect layer thin film is deposited. The material can be tungsten, tantalum, topological insulator, or multilayer films and alloys thereof. The spin-orbit moment effect layer 507 is formed by photolithography / etching, and then etched down to the dielectric protective layer 505a deposited after MTJ etching to form the dielectric protective layer 505.

[0136] like Figure 5H As shown, a top interconnect structure is formed. Specifically, the interlayer dielectric 508 is filled, and then a top via 509 is formed by photolithography / etching and filled with metal.

[0137] The manufacturing methods for SOT-MRAM devices provided in the three embodiments above utilize an insulating conductive layer to conduct the spin current generated when the write current flows through the spin-orbit moment effect layer to the magnetic tunnel junction, thereby realizing the MTJ write operation; and utilizes a conductive layer to form a path for the read current, thereby realizing the MTJ read operation. This structure does not require concern about damaging the spin-orbit moment effect layer during the etching process to form the magnetic tunnel junction, thus offering a large process window.

[0138] On the other hand, embodiments of the present invention provide a method for manufacturing an SOT-MRAM device. Figures 6A to 6G The process flow of this manufacturing method is shown, specifically including:

[0139] like Figure 6A As shown, a substrate 600 is provided, including a bottom interconnect structure 6002 and a bottom electrode 6003 formed on an interlayer dielectric 6001. In this embodiment, the bottom interconnect structure 6002 is a bottom via, and the size of the bottom via is smaller than the size of the bottom electrode 6003. A magnetic tunnel junction stacked thin film 601a is first deposited on the substrate 600. Because a bottom pinning structure is to be formed, a multilayer thin film including a reference layer, a barrier layer, and a free layer is deposited sequentially from bottom to top. Then, a metal conductive layer thin film 602a and a hard mask layer thin film 603a are deposited. The metal conductive layer thin film 602a can be made of titanium (Ti), and its thickness can be 10-15 nanometers.

[0140] like Figure 6B As shown, the hard mask layer 603a is photolithographically etched and etched to form the hard mask layer 603.

[0141] like Figure 6CAs shown, using a hard mask layer 603 as a mask, the metal conductive layer thin film 602a is etched to form the metal conductive layer 602. The magnetic tunnel junction stacked thin film 601a is then etched downwards, with appropriate over-etching to the bottom electrode to form the magnetic tunnel junction 601. The specific etching method can be ion beam etching or reactive ion etching. Metal byproducts are generated during the etching process; the amount of metal byproducts can be controlled by adjusting the etching menu. After etching, the metal byproducts are removed. It should be noted that the magnetic tunnel junction 601 can be etched into a cylindrical shape; naturally, the hard mask layer 603 and the metal conductive layer 602 are also cylindrical.

[0142] like Figure 6D As shown, the deposited medium protective layer 605a is, for example, silicon nitride.

[0143] like Figure 6E As shown, the interlayer dielectric 606 can be silicon dioxide or silicon oxynitride. Then, planarization is performed to completely remove the hard mask layer 603 until the surface of the metal conductive layer 602 is exposed.

[0144] like Figure 6F As shown, a spin-orbit moment effect layer thin film is deposited. The material can be tungsten, tantalum, topological insulator, or multilayer films and alloys thereof. The spin-orbit moment effect layer 607 is formed by photolithography / etching, and then etched down to the dielectric protective layer 605a deposited after MTJ etching to form the dielectric protective layer 605.

[0145] like Figure 6G As shown, a top interconnect structure is formed. Specifically, an interlayer dielectric 608 is filled, and then a top via 609 is formed by photolithography / etching and filled with metal.

[0146] The method for manufacturing a SOT-MRAM device provided in this invention utilizes a metal conductive layer to conduct the spin current generated when the write current flows through the spin-orbit moment effect layer to the magnetic tunnel junction, thereby realizing the MTJ write operation. Simultaneously, the metal conductive layer also provides a path for the read current, thus enabling the MTJ read operation. This structure eliminates concerns about damaging the spin-orbit moment effect layer during the etching process to form the magnetic tunnel junction, offering a large process window.

[0147] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0148] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A SOT-MRAM device, characterized in that, include: Bottom electrode; A magnetic tunnel junction located on the bottom electrode, the magnetic tunnel junction comprising a reference layer, a barrier layer and a free layer stacked from bottom to top; An insulating conductive layer located on the magnetic tunnel junction; A conductive layer surrounding the insulating conductive layer; as well as, The spin-orbit moment effect layer located on the insulating conductive layer, The insulating conductive layer is used to conduct the spin current generated by the write current flowing through the spin orbit moment effect layer to the magnetic tunnel junction during the write operation of the magnetic tunnel junction; The conductive layer provides a path for the reading current during the reading operation of the magnetic tunnel junction.

2. The SOT-MRAM device according to claim 1, characterized in that, The insulating conductive layer is made of nickel oxide.

3. The SOT-MRAM device according to claim 1, characterized in that, The conductive layer is made of tantalum, molybdenum, or tungsten.

4. The SOT-MRAM device according to claim 1, characterized in that, Also includes: A dielectric protective layer surrounds the magnetic tunnel junction and the conductive layer, and extends horizontally on the surface of the bottom electrode.

5. A SOT-MRAM device, characterized in that, include: Bottom electrode; A magnetic tunnel junction located on the bottom electrode, the magnetic tunnel junction comprising a reference layer, a barrier layer and a free layer stacked from bottom to top; The metallic conductive layer located on the magnetic tunnel junction; The spin-orbit moment effect layer located on the metal conductive layer, The metal conductive layer is used to conduct the spin current generated by the write current flowing through the spin orbital moment effect layer to the magnetic tunnel junction during the write operation of the magnetic tunnel junction, and also to provide a path for the read current during the read operation of the magnetic tunnel junction.

6. The SOT-MRAM device according to claim 5, characterized in that, The material of the metal conductive layer is titanium.

7. The SOT-MRAM device according to claim 5, characterized in that, Also includes: A dielectric protective layer surrounds the magnetic tunnel junction and the metallic conductive layer, and extends horizontally on the surface of the bottom electrode.

8. The SOT-MRAM device according to claim 1 or 5, characterized in that, Also includes: A bottom interconnect structure formed on a substrate, wherein the bottom interconnect structure is connected to the bottom electrode; A top interconnect structure is formed on the spin-orbit moment effect layer, and the top interconnect structure is connected to the spin-orbit moment effect layer.

9. A method for manufacturing an SOT-MRAM device, characterized in that, include: A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode; A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film. The hard mask layer is formed by photolithography and etching. Using the hard mask layer as a mask, the insulating conductive layer film is etched to form the insulating conductive layer; A conductive thin film is deposited across the entire surface; Using the hard mask layer and the conductive layer film on its sidewalls as a mask, the magnetic tunnel junction stacked film and the conductive layer film on the surface are etched to form a magnetic tunnel junction. At the same time, a portion of the conductive layer film is retained on the sidewalls of the hard mask layer and the insulating conductive layer, and this portion of the conductive layer film is used to form a conductive layer. Deposition medium protective layer; Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed; Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer; Form a top interconnect structure.

10. A method for manufacturing an SOT-MRAM device, characterized in that, include: A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode; A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film. The hard mask layer is formed by photolithography and etching. Using the hard mask layer as a mask, the insulating conductive layer film is etched to form an insulating conductive layer. The metal byproducts generated during the etching process are left on the sidewalls of the hard mask layer and the insulating conductive layer to form a conductive layer. First deposition medium protective layer; Using the metal byproducts of the hard mask layer and its sidewalls as a mask, the magnetic tunnel junction stacked thin film and the dielectric protective layer on the surface are etched. After etching, a magnetic tunnel junction is formed, while the metal byproducts of the hard mask layer and the sidewalls of the insulator conductive layer remain intact. Second deposition medium protective layer; Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed; Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer; Form a top interconnect structure.

11. A method for manufacturing an SOT-MRAM device, characterized in that, include: A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode; A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of an insulating conductive layer film and a hard mask layer film. The hard mask layer is formed by photolithography and etching. Using the hard mask layer as a mask, the insulating conductive layer film is etched to form the insulating conductive layer; Continue etching the magnetic tunnel junction stacked thin film to form a magnetic tunnel junction after etching. The outermost material of the insulating conductive layer is reduced to a metal layer using hydrogen reduction, and this metal layer is used to form a conductive layer. Deposition medium protective layer; Fill the interlayer dielectric and planarize it, then completely remove the hard mask layer until the surface of the insulating conductive layer is exposed; Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer; Form a top interconnect structure.

12. The method according to any one of claims 9 to 11, characterized in that, The insulating conductive layer is made of nickel oxide.

13. A method for manufacturing an SOT-MRAM device, characterized in that, include: A substrate is provided, the substrate including a bottom interconnect structure and a bottom electrode; A magnetic tunnel junction multilayer film is deposited on the substrate, comprising a reference layer, a barrier layer and a free layer from bottom to top, followed by the deposition of a metal conductive layer film and a hard mask layer film. The hard mask layer is formed by photolithography and etching. Using the hard mask layer as a mask, the metal conductive layer thin film is etched to form the metal conductive layer; Continue etching the magnetic tunnel junction stacked thin film to form a magnetic tunnel junction after etching. Deposition medium protective layer; Fill the interlayer medium and planarize it, then completely remove the hard mask layer until the surface of the metal conductive layer is exposed; Deposit a spin-orbit moment effect layer thin film, and etch to form the spin-orbit moment effect layer; Form a top interconnect structure.

14. The method according to claim 13, characterized in that, The material of the metal conductive layer is titanium.

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