Hardware accelerator supporting dynamic and static sparse attention mechanisms
CN117744728BActive Publication Date: 2026-06-23SHANGHAI JIAOTONG UNIV
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI JIAOTONG UNIV
- Filing Date
- 2023-12-19
- Publication Date
- 2026-06-23
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Figure CN117744728B_ABST
Abstract
The application discloses a kind of support dynamic sparse and static sparse hardware accelerator, comprising: data segmentation and reordering module is used to the input data is segmented to adapt to the size of spatial accelerator hardware;Spatial accelerator module is used to support the operation of sparse attention mechanism;Weight summation module is used to support the segmentation of hybrid attention mode, the result obtained by the calculation of segmented input data is merged to obtain the final output;Pattern matching module includes matrix multiplication operation module, double tuning sequencer and sliding window comparator, for hybrid attention mode matching.The application simultaneously supports static sparse method and dynamic sparse method, and can carry out efficient static and dynamic sparse attention calculation.Saves at least 6.1 times of calculation amount, while maintaining the accuracy of output result.
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