Polishing pad, method of manufacturing the same, and method of manufacturing semiconductor device using the same
By spraying calcined cerium dioxide slurry onto the grinding wafer and controlling the pore morphology to meet the ISO25178-2 standard, the problem of difficult pore morphology adjustment in the grinding wafer is solved, improving the grinding rate and wafer surface quality.
CN118061073BActive Publication Date: 2026-05-29SK ENPULSE CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SK ENPULSE CO LTD
- Filing Date
- 2021-06-21
- Publication Date
- 2026-05-29
Smart Images
Figure CN118061073B_ABST
Abstract
An example of the present invention relates to a polishing pad used in a chemical mechanical planarization (CMP) process of a semiconductor, a method of manufacturing the same, and a method of manufacturing a semiconductor device using the same, the polishing pad of the example of the present invention can improve a polishing rate, and significantly reduce surface residues, surface scratches, and dishing of a wafer by adjusting surface roughness characteristics of the polishing pad after polishing is performed.
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